5962-9168901MXA中文资料_数据手册_规格书

application

INFO

UC1625

UC2625

UC3625

available

Brushless DC Motor Controller

FEATURES

DESCRIPTION

• Drives Power MOSFETs or Power Darlingtons The UC3625 family of motor controller ICs integrate most of the

Directly

functions required for high-performance brushless DC motor con-

trol into one package. When coupled with external power

MOSFETs or Darlingtons, these ICs perform fixed-frequency PWM

motor control in either voltage or current mode while implementing

closed loop speed control and braking with smart noise rejection,

safe direction reversal, and cross–conduction protection.

• 50V Open Collector High-Side Drivers

• Latched Soft Start

• High-speed Current-Sense Amplifier with Ideal

Diode

Although specified for operation from power supplies between 10V

and 18V, the UC1625 can control higher voltage power devices

with external level-shifting components. The UC1625 contains fast,

high-current push-pull drivers for low-side power devices and 50V

open-collector outputs for high-side power devices or level shifting

circuitry.

• Pulse-by-Pulse and Average Current Sensing

• Over-Voltage and Under-Voltage Protection

• Direction Latch for Safe Direction Reversal

• Tachometer

The UC1625 is characterized for operation over the military tem-

perature range of –55°C to +125°C, while the UC2625 is charac-

terized from –40°C to +105°C and the UC3625 is characterized

from 0°C to 70°C. (NOTE: ESD Protection to 2kV)

• Trimmed Reference Sources 30mA

• Programmable Cross-Conduction Protection

• Two-Quadrant and Four-Quadrant Operation

TYPICAL APPLICATION

+15V

VMOTOR

+5V TO HALL

SENSORS

VREF

+

3kΩ

100nF

20µF

100nF

100µF

+

20µF

2N3904

10Ω

10kΩ

3kΩ

R

33kΩ

2

19

11

OSC

QUAD

DIR

2N3906

IRF9350

22

6

3kΩ

16

17

18

14

13

TO

MOTOR

1k

TO OTHER

CHANNELS

1

100nF

28

27

25

UC3625

4kΩ

REQUIRED

FOR BRAKE

AND FAST

REVERSE

TO OTHER

CHANNELS

10Ω

IRF532

2200pF

12

20

C

OSC

15

10kΩ

BRAKE

21

26

3

24

23

8

9

10

4

5

7

100nF

3nF

68kΩ

REQUIRED

FOR

5nF

100nF

C

240Ω

FROM

HALL

R

T

AVERAGE

CURRENT

SENSING

0.02Ω

SENSORS

2nF

5nF

240Ω

R

S

2nF

0.02Ω

R

D

UDG-99045

SLUS353A - NOVEMBER 1999

UC1625

UC2625

UC3625

ABSOLUTE MAXIMUM RATINGS

CONNECTION DIAGRAM

VCC Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V

Pwr V_CCSupply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . +20V

PWM In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to 6V

E/A IN(+), E/A IN(–). . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to 12V

DIL-28 (TOP VIEW)

J or N PACKAGE

I

_SENSE1, I_SENSE2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.3 to 6V

OV–Coast, Dir, Speed-In, SSTART, Quad Sel . . . . . . –0.3 to 8V

H1, H2, H3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to 12V

PU Output Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to 50V

PU Output Current . . . . . . . . . . . . . . . . . . +200 mA continuous

PD Output Current . . . . . . . . . . . . . . . . . . 200 mA continuous

E/A Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA

I

_SENSEOutput Current . . . . . . . . . . . . . . . . . . . . . . . . . . –10 mA

Tach Out Output Current. . . . . . . . . . . . . . . . . . . . . . . . 10 mA

_REFOutput Current . . . . . . . . . . . . . . . . . . –50 mA continuous

V

Operating Temperature Range UC1625. . . . . . –55°C to 125°C

Operating Temperature Range UC2625. . . . . . –40°C to 105°C

Operating Temperature Range UC3625. . . . . . . . . 0°C to 70°C

Note 1: Currents are positive into and negative out of the spec-

ified terminal.

Note 2: Consult Unitrode Integrated Circuits databook for infor-

mation regarding thermal specifications and limitations

of packages.

Note 3: This pinout applies to the SOIC (DW), PLCC (Q), and

LCC (L) packages (ie. pin 22 has the same function on all

packages.)

ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for: T_A= 25°C; Pwr V_CC= V_CC= 12V;

R_OSC= 20k to V_REF; C_OSC= 2nF; R_TACH= 33k; C_TACH= 10nF; and all outputs unloaded. T_A= T_J.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNITS

Overall

Supply current

V_CCTurn-On Threshold

_CCTurn-Off Threshold

Over Operating Range

14.5

8.95

8.05

30.0

9.45

8.55

mA

V

Over Operating Range

8.65

7.75

V

Overvoltage/Coast

OV-Coast Inhibit Threshold

OV-Coast Restart Threshold

OV-Coast Hysteresis

OV-Coast Input Current

Logic Inputs

Over Operating Range

1.65

1.55

0.05

–10

1.75

1.65

0.10

–1

1.85

1.75

0.15

0

V

µA

H1, H2, H3 Low Threshold

H1, H2, H3 High Threshold

H1, H2, H3 Input Current

Quad Sel, Dir Thresholds

Quad Sel Hysteresis

Dir Hysteresis

Over Operating Range

Over Operating Range, to 0V

Over Operating Range

0.8

1.6

1.0

1.9

1.2

2.0

V

-400

0.8

-250 –120

µA

V

1.4

70

2.0

mV

V

0.6

50

Quad Sel Input Current

Dir Input Current

–30

150

30

µA

–1

PWM Amp/Comparator

E/A In(+), E/A In(–) Input Current To 2.5V

–5.0

0

–0.1

3

5.0

30

10

µA

mV

dB

PWM In Input Current

Error Amp Input Offset

Error Amp Voltage Gain

To 2.5V

0V < V_COMMON-MODE< 3V

–10

70

90

2

UC1625

UC2625

UC3625

ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for: T_A= 25°C; Pwr V_CC= V_CC= 12V;

R_OSC= 20k to V_REF; C_OSC= 2nF; R_TACH= 33k; C_TACH= 10nF; and all outputs unloaded. T_A= T_J.

PARAMETER

PWM Amp/Comparator (cont.)

E/A Out Range

TEST CONDITIONS

MIN

TYP

MAX UNITS

0.25

–16

0.1

3.50

–5

V

µA

mA

V

S_STARTPull-up Current

To 0V

–10

0.4

0.2

S

_STARTDischarge Current

To 2.5V

3.0

0.3

S_{START Restart Threshold}

Current Amp

Gain

0.1

I_SENSE1= .3V, I_SENSE2= .5V to .7V

1.75

1.95

2.15

V/V

Level Shift

I

_SENSE1= .3V, I_SENSE2= .3V

_SENSE1= 0V, Force I_SENSE2

2.4

2.5

2.65

0.26

0.36

0

V

Peak Current Threshold

Over Current Threshold

0.14

0.26

0.20

0.30

V

I

_SENSE1, I_SENSE2Input Current

_SENSE1, I_SENSE2Offset Current

To 0V

–850 –320

µA

V

2

12

Range I_SENSE1, I_SENSE2

Tachometer/Brake

Tach-Out High Level

Tach-Out Low Level

On Time

–1

2

Over Operating Range, 10k to 2.5V

4.7

5

5.3

0.2

280

V

170

220

0.1

µs

%

On Time Change With Temp

RC-Brake Input Current

Threshold to Brake, RC-Brake

Brake Hysteresis, RC-Brake

Speed-In Threshold

Speed-In Input Current

Low-Side Drivers

Voh, –1mA, Down From V_CC

V Voh, –50mA, Down From V_CC

Vol, 1mA

Over Operating Range

To 0V

–4.0

0.8

–1.9

1.0

mA

V

Over Operating Range

1.2

0.09

257

–5

V

Over Operating Range

220

–30

290

30

mV

µA

Over Operating Range

10% to 90% Slew Time, into 1nF

1.60

1.75

0.05

0.36

50

2.1

2.2

0.4

0.8

V

Vol, 50mA

V

Rise/Fall Time

ns

High-Side Drivers

Vol, 1mA

Over Operating Range

0.1

1.0

0.4

1.8

25

V

Vol, 50mA

Over Operating Range

Leakage Current

Fall Time

Output Voltage = 50V

µA

ns

10% to 90% Slew Time, 50mA Load

50

Oscillator

Frequency

40

35

60

65

kHz

Frequency

Over Operating Range

Reference

Output Voltage

4.9

4.7

–40

–10

50

5.0

–5

5.1

5.3

V

Output Voltage

Over Operating Range

0mA to –20mA Load

10V to 18V V_CC

V

Load Regulation

Line Regulation

mV

mA

–1

10

Short Circuit Current

Over Operating Range

100

150

3

UC1625

UC2625

UC3625

ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for: T_A= 25°C; Pwr V_CC= V_CC= 12V;

R_OSC= 20k to V_REF; C_OSC= 2nF; R_TACH= 33k; C_TACH= 10nF; and all outputs unloaded. T_A= T_J.

PARAMETER TEST CONDITIONS

Miscellaneous

MIN

TYP

MAX UNITS

Output Turn-On Delay

Output Turn-Off Delay

1

µs

BLOCK DIAGRAM

Quad Sel 22

RC-Osc 25

PWM In 26

E/A Out 27

5V

2

VREF

REFERENCE

S

R

Q

OSC

PWM CLOCK

E/A In(+)

1

2.9V

E/A In (–) 28

10µA

SSTART

ISENSE

24

3

Q1

R

S

Q

0.2V

ABS VALUE

2.5V

250Ω

ISENSE1

ISENSE2

4

2X

5

3.1V

VCC 19

9V

PWM

CLOCK

OV-Coast

23

1.75V

18 PUA

17 PUB

16 PUC

Dir

6

7

DIRECTION

LATCH

Speed-In

0.25V

+5V

PWM CLOCK

DIR

H1

COAST

CHOP

QUAD

11 Pwr Vcc

14 PDA

H1

H2

H3

8

9

CROSS

D

L

Q

CONDUCTION

PROTECTION

LATCHES

+5V

H2

H3

DECODER

BRAKE

D

L

13 PDB

D

L

12 PDC

15 GND

EDGE

DETECT

+5V

2k

RC-Brake 21

ONE

SHOT

20 Tach-Out

UDG-99044

1V

4

UC1625

UC2625

UC3625

PIN DESCRIPTIONS

Dir, Speed-In: The position decoder logic translates the

Hall signals and the Dir signal to the correct driver sig-

nals (PUs and PDs). To prevent output stage damage,

the signal on Dir is first loaded into a direction latch,

then shifted through a two-bit register.

H1, H2, H3: The three shaft-position sensor inputs con-

sist of hysteresis comparators with input pull-up resis-

tors. Logic thresholds meet TTL specifications and can

be driven by 5V CMOS, 12V CMOS, NMOS, or

open-collectors.

As long as Speed-In is less than 250mV, the direction

latch is transparent. When Speed-In is higher than

250mV, the direction latch inhibits all changes in direc-

tion. Speed-In can be connected to Tach-Out through a

filter, so that the direction latch is only transparent when

the motor is spinning slowly, and has too little stored en-

ergy to damage power devices.

Connect these inputs to motor shaft position sensors

that are positioned 120 electrical degrees apart. If noisy

signals are expected, zener clamp and filter these inputs

with 6V zeners and an RC filter. Suggested filtering

components are 1kΩ and 2nF. Edge skew in the filter is

not a problem, because sensors normally generate

modified Gray code with only one output changing at a

time, but rise and fall times must be shorter than 20µs

for correct tachometer operation.

Additional circuitry detects when the input and output of

the direction latch are different, or when the input and

output of the shift register are different, and inhibits all

output drives during that time. This can be used to allow

the motor to coast to a safe speed before reversing.

Motors with 60 electrical degree position sensor coding

can be used if one or two of the position sensor signals

is inverted.

The shift register guarantees that direction can't be

changed instantaneously. The register is clocked by the

PWM oscillator, so the delay between direction changes

is always going to be between one and two oscillator pe-

riods. At 40kHz, this corresponds to a delay of between

25µs and 50µs. Regardless of output stage, 25µs dead

time should be adequate to guarantee no overlap

cross-conduction. Toggling DIR will cause an output

pulse on Tach-Out regardless of motor speed.

I_SENSE1, I_SENSE2, I_SENSE: The current sense amplifier

has a fixed gain of approximately two. It also has a

built-in level shift of approximately 2.5V. The signal ap-

pearing on I_SENSEis:

I_SENSE= 2.5V + 2• ABS I_SENSE1–I_{SENSE 2}

(

)

(

I_SENSE1and I_SENSE2are interchangeable and can be

used as differential inputs. The differential signal applied

can be as high as 0.5V before saturation.

If spikes are expected on I_SENSE1or I_SENSE2, they are

best filtered by a capacitor from I_SENSEto ground. Fil-

tering this way allows fast signal inversions to be cor-

rectly processed by the absolute value circuit. The

peak-current comparator allows the PWM to enter a cur-

rent-limit mode with current in the windings never ex-

ceeding approximately 0.2V/R_SENSE. The over current

comparator provides a fail-safe shutdown in the unlikely

case of current exceeding 0.3V/R_SENSE. Then, soft start

is commanded, and all outputs are turned off until the

high current condition is removed. It is often essential to

use some filter driving I_SENSE1and I_SENSE2to reject ex-

treme spikes and to control slew rate. Reasonable start-

ing values for filter components might be 250Ω series

resistors and a 5nF capacitor between I_SENSE1and

I_SENSE2. Input resistors should be kept small and

matched to maintain gain accuracy.

E/A In(+), E/A In(–), E/A Out, PWM In: E/A In(+) and

E/A In(–) are not internally committed to allow for a wide

variety of uses. They can be connected to the I_SENSE, to

Tach-Out through a filter, to an external command volt-

age, to a D/A converter for computer control, or to an-

other op amp for more elegant feedback loops. The

error amplifier is compensated for unity gain stability, so

E/A Out can be tied to E/A In(–) for feedback and major

loop compensation.

E/A Out and PWM In drive the PWM comparator. For

voltage-mode PWM systems, PWM In can be connected

to RC-Osc. The PWM comparator clears the PWM latch,

commanding the outputs to chop.

The error amplifier can be biased off by connecting E/A

In(–) to a higher voltage than E/A In(+). When biased

off, E/A Out will appear to the application as a resistor to

ground. E/A Out can then be driven by an external am-

plifier.

OV-Coast: This input can be used as an over-voltage

shutdown in put, as a coast input, or both. This input

can be driven by TTL, 5V CMOS, or 12V CMOS.

GND: All thresholds and outputs are referred to the

GND pin except for the PD and PU outputs.

5

UC1625

UC2625

UC3625

PIN DESCRIPTIONS (cont.)

PDA, PDB, PDC: These outputs can drive the gates of

N-Channel power MOSFETs directly or they can drive

the bases of power Darlingtons if some form of current

limiting is used. They are meant to drive low-side power

devices in high-current output stages. Current available

from these pins can peak as high as 0.5A. These out-

puts feature a true totem-pole output stage. Beware of

exceeding IC power dissipation limits when using these

outputs for high continuous currents. These outputs pull

high to turn a “low-side” device on (active high).

ground. Recommended values for R_Tare 10kΩ to

500kΩ, and recommended values for C_Tare 1nF to

100nF, allowing times between 5µs and 10ms. Best ac-

curacy and stability are achieved with values in the cen-

ters of those ranges.

RC-Brake also has another function. If RC-Brake pin is

pulled below the brake threshold, the IC will enter brake

mode. This mode consists of turning off all three

high-side devices, enabling all three low-side devices,

and disabling the tachometer. The only things that in-

hibit low-side device operation in braking are

low-supply, exceeding peak current, OV-Coast com-

mand, and the PWM comparator signal. The last of

these means that if current sense is implemented such

that the signal in the current sense amplifier is propor-

tional to braking current, the low-side devices will brake

the motor with current control. (See applications) Sim-

pler current sense connections will result in uncontrolled

braking and potential damage to the power devices.

PUA, PUB, PUC: These outputs are open-collector,

high-voltage drivers that are meant to drive high-side

power devices in high-current output stages. These are

active low outputs, meaning that these outputs pull low

to command a high-side device on. These outputs can

drive low-voltage PNP Darlingtons and P-channel

MOSFETs directly, and can drive any high-voltage de-

vice using external charge-pump techniques, trans-

former signal coupling, cascode level-shift transistors, or

opto-isolated drive (high-speed opto devices are recom-

mended). (See applications).

RC-Osc: The UC3625 can regulate motor current using

fixed-frequency pulse width modulation (PWM). The

RC-Osc pin sets oscillator frequency by means of timing

resistor ROSC from the RC-Osc pin to V_REFand capaci-

tor C_OSCfrom RC-Osc to Gnd. Resistors 10kΩ to

100kΩ and capacitors 1nF to 100nF will work best, but

frequency should always be below 500kHz. Oscillator

frequency is approximately:

PWR V_CC: This supply pin carries the current sourced

by the PD outputs. When connecting PD outputs directly

to the bases of power Darlingtons, the PWR V_CCpin can

be current limited with a resistor. Darlington outputs can

also be "Baker Clamped" with diodes from collectors

back to PWR V_CC. (See Applications)

Quad Sel: The IC can chop power devices in either of

two modes, referred to as “two-quadrant” (Quad Sel low)

and “four-quadrant” (Quad Sel high). When

two-quadrant chopping, the pull-down power devices

are chopped by the output of the PWM latch while the

pull-up drivers remain on. The load will chop into one

commutation diode, and except for back-EMF, will ex-

hibit slow discharge current and faster charge current.

Two-quadrant chopping can be more efficient than

four-quadrant.

2

F =

R

(

•C_OSC

)

OSC

Additional components can be added to this device to

cause it to operate as a fixed off-time PWM rather than

a fixed frequency PWM, using the RC-Osc pin to select

the monostable time constant.

The voltage on the RC-Osc pin is normally a ramp of

about 1.2V peak-to-peak, centered at approximately

1.6V. This ramp can be used for voltage-mode PWM

control, or can be used for slope compensation in cur-

rent-mode control.

When four-quadrant chopping, all power drivers are

chopped by the PWM latch, causing the load current to

flow into two diodes during chopping. This mode exhibits

better control of load current when current is low, and is

preferred in servo systems for equal control over accel-

eration and deceleration. The Quad Sel input has no ef-

fect on operation during braking.

S_START: Any time that V_CCdrops below threshold or the

sensed current exceeds the over-current threshold, the

soft-start latch is set. When set, it turns on a transistor

that pulls down on S_START. Normally, a capacitor is con-

nected to this pin, and the transistor will completely dis-

charge the capacitor. A comparator senses when the

NPN transistor has completely discharged the capacitor,

and allows the soft-start latch to clear when the fault is

removed. When the fault is removed, the soft-start ca-

pacitor will charge from the on-chip current source.

RC-Brake: Each time the Tach-Out pulses, the capaci-

tor tied to RC-Brake discharges from approximately

3.33V down to 1.67V through a resistor. The tachometer

pulse width is approximately T = 0.67 R_TC_T, where R_T

and C_Tare a resistor and capacitor from RC-Brake to

6

UC1625

UC2625

UC3625

PIN DESCRIPTIONS (cont.)

S_STARTclamps the output of the error amplifier, not al-

lowing the error amplifier output voltage to exceed

S_STARTregardless of input. The ramp on RC-Osc can

be applied to PWM In and compared to E/A Out. With

S_STARTdischarged below 0.2V and the ramp minimum

being approximately 1.0V, the PWM comparator will

keep the PWM latch cleared and the outputs off. As

S_STARTrises, the PWM comparator will begin to

duty-cycle modulate the PWM latch until the error ampli-

fier inputs overcome the clamp. This provides for a safe

and orderly motor start-up from an off or fault condition.

tation cycle, additional commutations are not possible.

Although this will effectively set a maximum rotational

speed, the maximum speed can be set above the high-

est expected speed, preventing false commutation and

chatter.

V_CC: This device operates with supplies between 10V

and 18V. Under-voltage lockout keeps all outputs off be-

low 7.5V, insuring that the output transistors never turn

on until full drive capability is available. Bypass V_CCto

ground with an 0.1µF ceramic capacitor. Using a 10µF

electrolytic bypass capacitor as well can be beneficial in

applications with high supply impedance.

Tach-Out: Any change in the H1, H2, or H3 inputs loads

data from these inputs into the position sensor latches.

At the same time data is loaded, a fixed-width 5V pulse

is triggered on Tach-Out. The average value of the volt-

age on Tach-Out is directly proportional to speed, so

this output can be used as a true tachometer for speed

feedback with an external filter or averaging circuit

which usually consists of a resistor and capacitor.

V_REF: This pin provides regulated 5 volts for driving

Hall-effect devices and speed control circuitry. V_REFwill

reach +5V before V_CCenables, ensuring that Hall-effect

devices powered from V_REFwill become active before

the UC3625 drives any output. Although V_REFis current

limited, operation over 30mA is not advised. For proper

performance V_REFshould be bypassed with at least a

0.1µF capacitor to ground.

Whenever Tach-Out is high, the position latches are in-

hibited, such that during the noisiest part of the commu-

APPLICATION INFORMATION

Cross Conduction Prevention

cleared two PWM oscillator cycles after that drive signal

is turned off. The output of each flip flop is used to inhibit

drive to the opposing output (see below). In this way, it is

impossible to turn on driver PUA and PDA at the same

time. It is also impossible for one of these drivers to turn

on without the other driver having been off for at least

two PWM oscillator clocks.

The UC3625 inserts delays to prevent cross conduction

due to overlapping drive signals. However, some thought

must always be given to cross conduction in output stage

design because no amount of dead time can prevent fast

slewing signals from coupling drive to a power device

through a parasitic capacitance.

The UC3625 contains input latches that serve as noise

blanking filters. These latches remain transparent

through any phase of a motor rotation and latch immedi-

ately after an input transition is detected. They remain

latched for two cycles of the PWM oscillator. At a PWM

oscillator speed of 20kHz, this corresponds to 50µs to

100µs of blank time which limits maximum rotational

speed to 100kRPM for a motor with six transitions per ro-

tation or 50kRPM for a motor with 12 transitions per rota-

tion.

EDGE

FINDER

SHIFT

REG

S

R

Q

PUA

PDA

PWM

CLK

PULL UP

S

R

Q

FROM

DECODER

This prevents noise generated in the first 50µs of a tran-

sition from propagating to the output transistors and

causing cross–conduction or chatter.

PULL

DOWN

The UC3625 also contains six flip flops corresponding to

the six output drive signals. One of these flip flops is set

every time that an output drive signal is turned on, and Figure 1. Cross conduction prevention.

7

UC1625

UC2625

UC3625

TYPICAL CHARACTERISTICS

1MHz

100kHz

Rosc

-

10k

30k

Rosc

10kHz

1kHz

-

Rosc

100k

100Hz

0.001

0.01

0.1

C

OSC (µF)

Figure 4. Supply current vs. temperature.

Figure 2. Oscillator frequency vs. C_OSCand R_OSC

.

100ms

10ms

500k

-

R^T

100k

30k

-

1ms

100µs

10µs

-

R^T

10k

-

1µs

0.001

0.01

0.1

C

T

(µF)

Figure 3. Tachometer on time vs R_Tand C_T.

Figure 5. Soft start pull-up current vs temperature.

8

UC1625

UC2625

UC3625

TYPICAL CHARACTERISTICS (cont.)

Figure 6. Soft start discharge current vs.

temperature.

Figure 7. Current sense amplifier transfer function.

APPLICATION INFORMATION (cont.)

Power Stage Design

cases, R_Dis not needed. The low-side circulating di-

odes go to ground and the current sense terminals of

the UC3625 (I_SENSE1and I_SENSE2) are connected to R_S

through a differential RC filter. The input bias current of

the current sense amplifier will cause a common mode

offset voltage to appear at both inputs, so for best accu-

racy, keep the filter resistors below 2k and matched.

The UC3625 is useful in a wide variety of applications,

including high-power in robotics and machinery. The

power output stages used in such equipment can take a

number of forms, according to the intended perfor-

mance and purpose of the system. Below are four differ-

ent power stages with the advantages and

disadvantages of each shown.

The current that flows through R_Sis discontinuous be-

cause of chopping. It flows during the on time of the

power stage and is zero during the off time. Conse-

quently, the voltage across R_Sconsists of a series of

pulses, occurring at the PWM frequency, with a peak

value indicative of the peak motor current.

For high-frequency chopping, fast recovery circulating

diodes are essential. Six are required to clamp the wind-

ings. These diodes should have a continuous current

rating at least equal to the operating motor current,

since diode conduction duty-cycle can be high. For

low-voltage systems, Schottky diodes are preferred. In

higher voltage systems, diodes such as Microsemi

UHVP high voltage platinum rectifiers are recom-

mended.

To sense average motor current instead of peak cur-

rent, add another current sense resistor (R_Din Fig. D) to

measure current in the low-side circulating diodes, and

operate in four quadrant mode (pin 22 high). The nega-

tive voltage across R_Dis corrected by the absolute

value current sense amplifier. Within the limitations im-

posed by Table 1, the circuit of Fig. B can also sense

average current.

In a pulse-by-pulse current control arrangement, current

sensing is done by resistor R_S, through which the tran-

sistor's currents are passed (Fig. A, B, and C). In these

9

UC1625

UC2625

UC3625

APPLICATION INFORMATION (cont.)

FIGURE A

FIGURE B

TO

MOTOR

R

S

FIGURE C

FIGURE D

TO

MOTOR

R

D

R

S

2

4

SAFE

POWER

REVERSE

NO

CURRENT SENSE

PULSE BY PULSE AVERAGE

QUADRANT QUADRANT BRAKING

FIGURE A

FIGURE B

FIGURE C

FIGURE D

YES

NO

YES

NO

YES

NO

YES

IN 4-QUAD MODE ONLY

IN -4QUAD MODE ONLY

IN-4QUADMODE ONLY

YES

10

UC1625

UC2625

UC3625

APPLICATION INFORMATION (cont.)

Figure 8. Fast high-side P-channel driver.

Figure 9. Optocoupled N-channel high-side driver.

Figure 11. Power NPN low-side driver.

For drives where speed is critical, P-Channel MOSFETs

can be driven by emitter followers as shown in Fig. 8.

Here, both the level shift NPN and the PNP must with-

stand high voltages. A zener diode is used to limit

gate-source voltage on the MOSFET. A series gate re-

sistor is not necessary, but always advisable to control

overshoot and ringing.

High-voltage optocouplers can quickly drive high-voltage

MOSFETs if a boost supply of at least 10 volts greater

than the motor supply is provided (See Fig. 9.) To protect

the MOSFET, the boost supply should not be higher than

18 volts above the motor supply.

For under 200V 2-quadrent applications, a power NPN

driven by a small P-Channel MOSFET will perform well

as a high-side driver as in Fig. 10. A high voltage

small-signal NPN is used as a level shift and a high volt-

age low-current MOSFET provides drive. Although the

NPN will not saturate if used within its limitations, the

base-emitter resistor on the NPN is still the speed limiting

component.

Fig. 11 shows a power NPN Darlington drive technique

using a clamp to prevent deep saturation. By limiting sat-

uration of the power device, excessive base drive is mini-

mized and turn-off time is kept fairly short. Lack of base

series resistance also adds to the speed of this ap-

proach.

Figure 10. Power NPN high-side driver.

11

UC1625

UC2625

UC3625

APPLICATION INFORMATION (cont.)

+12V

VMOTOR

3

33kΩ

6

4

7

8

PUA

2

4

7

UC3724N

UC3725N

1:2

8

1

2

5

1

6

3

5kΩ

1nF

100nF

UDG-99047

TO MOTOR

Figure 12. Fast high-side N-channel driver with transformer isolation.

These ICs operate with position sensor encoding that

has either one or two signals high at a time, never all low

or all high. This coding is sometimes referred to as “120°

Coding” because the coding is the same as coding with

position sensors spaced 120 magnetic degrees about

the rotor. In response to these position sense signals,

only one low-side driver will turn on (go high) and one

high-side driver will turn on (pull low) at any time.

Fast High-Side N-Channel Driver with Transformer

Isolation

A small pulse transformer can provide excellent isolation

between the UC3625 and a high-voltage N-Channel

MOSFET while also coupling gate drive power. In this

circuit (shown in Fig. 12), a UC3724 is used as a trans-

former driver/encoder that duty-cycle modulates the

transformer with a 150kHz pulse train. The UC3725 recti-

fies this pulse train for gate drive power, demodulates the

signal, and drives the gate with over 2 amp peak current.

Table I. Computational truth table.

Both the UC3724 and the UC3725 can operate up to

500kHz if the pulse transformer is selected appropriately.

To raise the operating frequency, either lower the timing

resistor of the UC3724 (1kΩ min), lower the timing ca-

pacitor of the UC3724 (500pF min) or both.

INPUTS

OUTPUTS

High-Side

DIR H1 H2 H3 Low-Side

6

1

0

X

8

0

1

0

1

0

9

0

1

0

1

0

1

0

10

1

0

1

0

1

0

12

L

13

H

L

14

L

16

L

17

H

L

18

H

L

H

L

If there is significant capacitance between transformer

primary and secondary, together with very high output

slew rate, then it may be necessary to add clamp diodes

from the transformer primary to +12V and ground. Gen-

eral purpose small signal switching diodes such as

1N4148 are normally adequate.

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

The UC3725 also has provisions for MOSFET current

limiting. Consult the UC3725 data sheet for more infor-

mation on implementing this.

L

H

L

H

L

Computational Truth Table

L

H

L

H

This table shows the outputs of the gate drive and open

collector outputs for given hall input codes and direction

signals. Numbers at the top of the columns are pin

numbers.

L

12

UC1625

UC2625

UC3625

APPLICATION INFORMATION (cont.)

+15V

VMOTOR

+5V TO HALL

SENSORS

VREF

+

3kΩ

100nF

100µF

+

20µF

2N3904

10Ω

20µF

10kΩ

3kΩ

R

33kΩ

2

19

11

OSC

QUAD

DIR

2N3906

IRF9350

22

6

3kΩ

16

17

18

14

13

TO

MOTOR

1k

TO OTHER

CHANNELS

1

100nF

28

27

25

UC3625

4kΩ

REQUIRED

FOR BRAKE

AND FAST

REVERSE

TO OTHER

CHANNELS

10Ω

IRF532

2200pF

12

20

C

OSC

15

10kΩ

BRAKE

21

26

3

24

23

8

9

10

4

5

7

100nF

3nF

68kΩ

REQUIRED

FOR

5nF

100nF

C

240Ω

FROM

HALL

R

T

AVERAGE

CURRENT

SENSING

0.02Ω

SENSORS

2nF

5nF

240Ω

R

S

2nF

0.02Ω

R

D

UDG-99045

Figure 13. 45V/8A brushless DC motor drive circuit.

N–Channel power MOSFETs are used for low–side driv-

ers, while P–Channel power MOSFETs are shown for

high–side drivers. Resistors are used to level shift the

UC3625 open–collector outputs, driving emitter follow-

ers into the MOSFET gate. A 12V zener clamp insures

that the MOSFET gate–source voltage will never exceed

12V. Series 10Ω gate resistors tame gate reactance,

preventing oscillations and minimizing ringing.

steady–state motor speed is closely related to applied

voltage.

Pin 20 (Tach-Out) is connected to pin 7 (SPEED IN)

through an RC filter, preventing direction reversal while

the motor is spinning quickly. In two–quadrant opera-

tion, this reversal can cause kinetic energy from the mo-

tor to be forced into the power MOSFETs.

A diode in series with the low-side MOSFETs facilitates

PWM current control during braking by insuring that

braking current will not flow backwards through low–side

MOSFETs. Dual current–sense resistors give continu-

ous current sense, whether braking or running in

four–quadrant operation, an unnecessary luxury for

two–quadrant operation.

The oscillator timing capacitor should be placed close to

pins 15 and 25, to keep ground current out of the capac-

itor. Ground current in the timing capacitor causes oscil-

lator distortion and slaving to the commutation signal.

The potentiometer connected to pin 1 controls PWM

duty cycle directly, implementing a crude form of speed

control. This control is often referred to as “voltage

mode” because the potentiometer position sets the aver-

age motor voltage. This controls speed because

The 68kΩ and 3nF tachometer components set maxi-

mum commutation time at 140µs. This permits smooth

operation up to 35,000 RPM for four–pole motors, yet

gives 140µs of noise blanking after commutation.

UNITRODE CORPORATION

7 CONTINENTAL BLVD. • MERRIMACK, NH 03054

TEL. (603) 424-2410 • FAX (603) 424-3460

13

PACKAGE OPTION ADDENDUM

www.ti.com

19-Jul-2005

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

CDIP

LCCC

SOIC

Drawing

5962-9168901MXA

UC1625J

OBSOLETE

ACTIVE

J

28

TBD

Call TI

UC1625J883B

UC1625L

J

FK

DW

UC1625L883B

UC2625DW

20 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

UC2625DWTR

ACTIVE

SOIC

DW

28

1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

UC2625N

UC2625Q

ACTIVE

PDIP

PLCC

SOIC

N

28

13

37

TBD

Call TI

Level-NA-NA-NA

FN

DW

Level-2-220C-1 YEAR

UC2625QTR

UC3625DW

750

20 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

UC3625DWTR

ACTIVE

SOIC

DW

28

1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

UC3625N

UC3625Q

ACTIVE

PDIP

PLCC

N

28

13

37

TBD

Call TI

Level-NA-NA-NA

FN

Level-2-220C-1 YEAR

UC3625QTR

750

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan

-

The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS

&

no Sb/Br)

-

please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

IMPORTANT NOTICE

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是否无铅：	含铅	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP-28
针数：	28	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.72	Is Samacsys：	N
模拟集成电路 - 其他类型：	BRUSHLESS DC MOTOR CONTROLLER	JESD-30 代码：	R-GDIP-T28
JESD-609代码：	e0	长度：	36.83 mm
功能数量：	1	端子数量：	28
最高工作温度：	125 °C	最低工作温度：	-55 °C
最大输出电流：	2 A	封装主体材料：	CERAMIC, GLASS-SEALED
封装代码：	DIP	封装形状：	RECTANGULAR
封装形式：	IN-LINE	认证状态：	Not Qualified
筛选级别：	MIL-STD-883	座面最大高度：	5.08 mm
最大供电电压 (Vsup)：	18 V	最小供电电压 (Vsup)：	10 V
标称供电电压 (Vsup)：	12 V	表面贴装：	NO
技术：	BIPOLAR	温度等级：	MILITARY
端子面层：	TIN LEAD	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
宽度：	15.24 mm	Base Number Matches：	1

型号	制造商	描述	价格	文档
5962-9168901MXX	ETC	DC Motor Controller/Driver	获取价格
5962-9168902VYA	TI	RAD-TOLERANT CLASS V, BRUSHLESS DC MOTOR CONTROLLER	获取价格
5962-9169001M3A	ADI	IC 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CQCC28, CERAMIC, CC-28, Analog to Digital Converter	获取价格
5962-9169001M3X	ETC	Analog-to-Digital Converter， 12-Bit	获取价格
5962-9169001MXC	ADI	ADC, Successive Approximation, 12-Bit, 1 Func, 1 Channel, Parallel, Word Access, CDIP28, CERAMIC, DIP-28	获取价格
5962-9169001MXX	ETC	Analog-to-Digital Converter， 12-Bit	获取价格
5962-9169002M3X	ETC	Analog-to-Digital Converter， 12-Bit	获取价格
5962-9169002MXX	ETC	Analog-to-Digital Converter， 12-Bit	获取价格
5962-9169003M3A	ADI	Complete 12-Bit A/D Converters	获取价格
5962-9169003M3X	ETC	Analog-to-Digital Converter， 12-Bit	获取价格

5962-9168901MXA

5962-9168901MXA 概述

5962-9168901MXA 规格参数

5962-9168901MXA 数据手册

5962-9168901MXA 相关器件

5962-9168901MXA 相关文章

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