概述
数据手册SI9110_11 概述
High-Voltage Switchmode Controllers 高压开关模式控制器
SI9110_11 数据手册
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PDF下载Si9110, Si9111
Vishay Siliconix
High-Voltage Switchmode Controllers
DESCRIPTION
FEATURES
•
•
•
•
•
•
•
•
10 V to 120 V Input Range
The Si9110/9111 are BiC/DMOS integrated circuits
designed for use as high-performance switchmode
controllers. A high-voltage DMOS input allows the controller
to work over a wide range of input voltages (10 to 120 VDC).
Current-mode PWM control circuitry is implemented in
CMOS to reduce internal power consumption to less than
10 mW.
Current-Mode Control
High-Speed, Source-Sink Output Drive
High Efficiency Operation (> 80 %)
Internal Start-Up Circuit
Internal Oscillator (1 MHz)
SHUTDOWN and RESET
A push-pull output driver provides high-speed switching for
MOSPOWER devices large enough to supply 50 W of output
power. When combined with an output MOSFET and
transformer, the Si9110/9111 can be used to implement
single-ended power converter topologies (i.e., flyback,
forward, and cuk).
Reference Selection
Si9110 - 1 %
Si9111 - 10 %
The Si9110/9111 are available in both standard and lead
(Pb)-free 14-pin plastic DIP and SOIC packages which are
specified to operate over the industrial temperature range of
- 40 °C to 85 °C.
FUNCTIONAL BLOCK DIAGRAM
OSC OSC
IN OUT
FB
14
COMP DISCHARGE
9
13
8
7
Error
Amplifier
OSC
Clock ( /
To
CC
-
V
10
1
f )
2 OSC
V
REF
+
4 V
2 V
Current-Mode
Comparator
4
5
-
Ref
Gen
OUTPUT
R
+
Q
- V
IN
S
+
-
C/L
Comparator
1
Current
To
BIAS
Sources
Internal
Circuits
1.2 V
3
SENSE
V
CC
6
2
V
CC
Undervoltage
Comparator
11
12
SHUTDOWN
RESET
S
R
+V
IN
-
Q
+
8.1 V
-
+
8.6 V
Pre-Regulator/Start-Up
Document Number: 70004
S11-0975-Rev. I, 16-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si9110, Si9111
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
Unit
Voltages Referenced to - VIN (Note: VCC < + VIN + 0.3 V)
VCC
15
+VIN
120
V
Logic Inputs (RESET, SHUTDOWN, OSC IN, OSC OUT)
- 0.3 to VCC + 0.3
Linear Inputs (FEEDBACK, SENSE, BIAS, VREF
HV Pre-Regulator Input Current (continuous)
Storage Temperature
)
- 0.3 to VCC + 0.3
5
- 65 to 150
- 40 to 85
150
mA
°C
Operating Temperature
Junction Temperature (TJ)
14-Pin Plastic DIP (J Suffix)b
14-Pin SOIC (Y Suffix)c
750
Power Dissipation (Package)a
mW
900
14-Pin Plastic DIP
167
Thermal Impedance (JA
Notes:
)
°C/W
14-Pin SOIC
140
a. Device Mounted with all leads soldered or welded to PC board.
b. Derate 6 mW/°C above 25 °C.
c. Derate 7.2 mW/°C above 25 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Limit
Unit
Voltages Referenced to - VIN
VCC
9.5 to 13.5
10 to 120
V
+ VIN
fOSC
40 kHzto 1 MHz
25 kto 1 M
0 to VCC - 3
0 to VCC
ROSC
Linear Inputs
Digital Inputs
V
a
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
DISCHARGE = - VIN = 0 V
D Suffix
- 40 °C to 85 °C
VCC = 10 V, + VIN = 48 V
RBIAS = 390 k, ROSC = 330 k
Parameter
Reference
Symbol
Temp.b Min.d
Typ.c
Max.d
Unit
Si9110 Room
Si9111 Room
3.92
3.60
3.86
3.52
15
4.0
4.0
4.08
4.40
4.14
4.46
45
OSC IN = - VIN
(OSC Disabled)
RL = 10 M
VR
Output Voltage
V
Si9110
Si9111
Full
Full
Output Impedancee
Short Circuit Current
Temperature Stabilitye
ZOUT
ISREF
TREF
Room
Room
Full
30
100
0.5
k
µA
VREF = - VIN
70
130
1.0
mV/°C
Oscillator
Maximum Frequencye
fMAX
fOSC
ROSC = 0
Room
Room
Room
Room
Full
1
3
MHz
kHz
ROSC = 330 k, See Note f
ROSC = 150 k, See Note f
80
100
200
10
120
240
15
Initial Accuracy
160
Voltage Stability
Temperature Coefficiente
f/f
f/f = f(13.5 V) - f(9.5 V)/f(9.5 V)
%
TOSC
200
500
ppm/°C
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Document Number: 70004
S11-0975-Rev. I, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si9110, Si9111
Vishay Siliconix
a
SPECIFICATIONS
Test Conditions
D Suffix
- 40 °C to 85 °C
Unless Otherwise Specified
DISCHARGE = - VIN = 0 V
V
CC = 10 V, + VIN = 48 V
Parameter
Symbol
Temp.b Min.d
Typ.c
Max.d
Unit
RBIAS = 390 k, ROSC = 330 k
Error Amplifier
Si9110 Room
3.96
3.60
4.00
4.00
25
4.04
4.40
500
40
FB Tied to COMP
VFB
Feedback Input Voltage
V
OSC IN = - VIN, (OSC Disabled)
Si9111 Room
Room
IFB
VOS
AVOL
BW
OSC IN = - VIN, VFB = 4 V
Input BIAS Current
nA
mV
dB
Input OFFSET Voltage
Room
15
Open Loop Voltage Gaine
Unity Gain Bandwidthe
Dynamic Output Impedancee
Room
60
1
80
OSC IN = - VIN
(OSC Disabled)
Room
1.3
MHz
ZOUT
Room
1000
- 2.0
0.15
70
2000
- 1.4
Source (VFB = 3.4 V)
Sink (VFB = 4.5 V)
Room
IOUT
Output Current
mA
dB
Room
0.12
50
9.5 V VCC 13.5 V
Power Supply Rejection
Current Limit
PSRR
Room
VSOURCE
td
VFB = 0
Threshold Voltage
Room
Room
1.0
1.2
1.4
V
Delay to Outpute
VSENSE = 1.5 V, See Figure 1
100
150
ns
Pre-Regulator/Start-Up
+ VIN
+ IIN
IIN = 10 µA
Input Voltage
Room
Room
120
V
VCC 9.4 V
Input Leakage Current
Pre-Regulator Start-Up Current
10
µA
mA
ISTART
Pulse Width 300 µs, VCC = VULVO
Room
8
15
V
CC Pre-Regulator Turn-Off
VREG
IPRE-REGULATOR = 10 µA
Room
7.8
8.6
9.4
8.9
Threshold Voltage
V
VUVLO
VDELTA
Undervoltage Lockout
Room
Room
7.0
0.3
8.1
0.6
V
REG - VUVLO
Supply
ICC
VLOAD 75 pF (Pin 4)
Supply Current
Bias Current
Logic
Room
Room
0.45
10
0.6
15
1.0
20
mA
µA
IBIAS
SHUTDOWN Delaye
SHUTDOWN Pulse Widthe
RESET Pulse Widthe
Latching Pulse Width
SHUTDOWN and RESET Lowe
Input Low Voltage
tSD
tSW
tRW
CL = 500 pF, VSENSE = - VIN, See Figure 2
See Figure 3
Room
Room
Room
50
100
50
50
ns
tLW
See Figure 3
Room
25
VIL
VIH
IIH
Room
Room
Room
Room
2.0
5
V
Input High Voltage
8.0
VIN = 10 V
VIN = 0 V
Input Current Input Voltage High
Input Current Input Voltage Low
Output
1
µA
IIL
- 35
- 25
Room
Full
Room
Full
Room
Full
9.7
9.5
VOH
VOL
IOUT = - 10 mA
IOUT = 10 mA
Output High Voltage
Output Low Voltage
Output Resistance
V
0.30
0.50
30
50
20
25
ROUT
IOUT = 10 mA, Source or Sink
Rise Timee
Fall Timee
tr
tf
Room
Room
40
75
CL = 500 pF
ns
40
75
Notes:
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
e. Guaranteed by design, not subject to production test.
f. CSTRAY Pin 8 = 5 pF.
Document Number: 70004
S11-0975-Rev. I, 16-May-11
www.vishay.com
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si9110, Si9111
Vishay Siliconix
TIMING WAVEFORMS
V
CC
1.5 V
-
t
f
10 ns
90 %
≤
SHUTDOWN
0
50 %
t
r
10 ns
≤
50 %
SENSE
0
-
t
SD
t
d
V
V
CC
CC
90 %
OUTPUT
OUTPUT
0
-
0 -
Figure 2.
Figure 1.
t
SW
V
CC
t , t ≤ 10 ns
r
f
50 %
50 %
SHUTDOWN
0
-
-
t
LW
V
CC
50 %
50 %
50 %
RESET
0
t
RW
Figure 3.
TYPICAL CHARACTERISTICS
1 M
140
V
CC
= - V
IN
120
100
80
60
40
20
0
100 k
10 k
10 k
100 k
1 M
10
15
20
r
(Ω)
+I (mA)
IN
OSC
Figure 4. + VIN vs. + IIN at Start-Up
Figure 5. Output Switching Frequency
vs. Oscillator Resistance
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Document Number: 70004
S11-0975-Rev. I, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si9110, Si9111
Vishay Siliconix
PIN CONFIGURATIONS AND ORDERING INFORMATION
Dual-In-Line and SOIC
ORDERING INFORMATION
Part Number
Temperature Range
Package
BIAS
FB
1
2
3
4
5
6
7
14
13
12
11
10
9
Si9110DY
+V
IN
COMP
Si9110DY-T1
Si9110DY-T1-E3
Si9111DY
SENSE
RESET
SOIC-14
OUTPUT
SHUTDOWN
- V
IN
V
REF
Si9111DY-T1
Si9111DY-T1-E3
Si9110DJ
- 40 °C to 85 °C
V
CC
DISCHARGE
OSC IN
OSC OUT
8
Si9110DJ-E3
Si9111DJ
PDIP-14
Top View
Si9111DJ-E3
DETAILED DESCRIPTION
Pre-Regulator/Start-Up Section
sections and the pull-up current for the SHUDOWN and
RESET pins. The current flowing in the bias resistor is
nominally 15 µA.
Due to the low quiescent current requirement of the Si9110/
9111 control circuitry, bias power can be supplied from the
unregulated input power source, from an external regulated
low-voltage supply, or from an auxiliary "bootstrap" winding
on the output inductor or transformer.
Reference Section
The reference section of the Si9110 consists of a
temperature compensated buried zener and trimmable
divider network. The output of the reference section is
connected internally to the non-inverting input of the error
amplifier. Nominal reference output voltage is 4 V. The
trimming procedure that is used on the Si9110 brings the
output of the error amplifier (which is configured for unity gain
during trimming) to within 1 % of 4 V. This compensates for
input offset voltage in the error amplifier.
When power is first applied during start-up, + VIN (pin 2) will
draw a constant current. The magnitude of this current is
determined by a high-voltage depletion MOSFET device
which is connected between + VIN and VCC (pin 6). This
start-up circuitry provides initial power to the IC by charging
an external bypass capacitance connected to the VCC pin.
The constant current is disabled when VCC exceeds 8.6 V. If
VCC is not forced to exceed the 8.6 V threshold, then VCC will
be regulated to a nominal value of 8.6 V by the pre-regulator
circuit.
The output impedance of the reference section has been
purposely made high so that a low impedance external
voltage source can be used to override the internal voltage
source, if desired, without otherwise altering the
performance of the device.
As the supply voltage rises toward the normal operating
conditions, an internal undervoltage (UV) lockout circuit
keeps the output driver disabled until VCC exceeds the
undervoltage lockout threshold (typically 8.1 V). This
guarantees that the control logic will be functioning properly
and that sufficient gate drive voltage is available before the
MOSFET turns on. The design of the IC is such that the
undervoltage lockout threshold will be at least 300 mV less
than the pre-regulator turn-off voltage. Power dissipation can
be minimized by providing an external power source to VCC
such that the constant current source is always disabled.
Applications which use a separate external reference, such
as non-isolated converter topologies and circuits employing
optical coupling in the feedback loop, do not require a
trimmed voltage reference with 1 % accuracy. The Si9111
accommodates the requirements of these applications at a
lower cost, by leaving the reference voltage untrimmed. The
10 % accurate reference thus provided is sufficient to
establish a dc bias point for the error amplifier.
Note: During start-up or when VCC drops below 8.6 V the
start-up circuit is capable of sourcing up to 20 mA. This may
lead to a high level of power dissipation in the IC (for a 48 V
input, approximately 1 W). Excessive start-up time caused
by external loading of the VCC supply can result in device
damage. Figure 6 gives the typical pre-regulator current at
BiC/DMOS as a function of input voltage.
Error Amplifier
Closed-loop regulation is provided by the error amplifier,
which is intended for use with "around-the-amplifier"
compensation. A MOS differential input stage provides for
low input current. The noninverting input to the error amplifier
(VREF) is internally connected to the output of the reference
supply and should be bypassed with a small capacitor to
ground.
BIAS
To properly set the bias for the Si9110/9111, a 390 k
resistor should be tied from BIAS (pin 1) to - VIN (pin 5). This
determines the magnitude of bias current in all of the analog
Document Number: 70004
S11-0975-Rev. I, 16-May-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si9110, Si9111
Vishay Siliconix
DETAILED DESCRIPTION (CONT’D)
Oscillator Section
Table 1. Truth Table for the SHUTDOWN and RESET Pins
The oscillator consists of a ring of CMOS inverters,
capacitors, and a capacitor discharge switch. Frequency is
set by an external resistor between the OSC IN and OSC
OUT pins. (See Figure 5 for details of resistor value vs.
frequency.) The DISCHARGE pin should be tied to - VIN for
normal internal oscillator operation. A frequency divider in
the logic section limits switch duty cycle to 50 % by locking
the switching frequency to one half of the oscillator
frequency.
SHUTDOWN
RESET
Output
H
H
L
H
Normal Operation
Normal Operation (No Change)
Off (Not Latched)
H
L
L
L
Off (Latched)
Off (Latched, No Change)
Both pins have internal current source pull-ups and should
be left disconnected when not in use. An added feature of the
current sources is the ability to connect a capacitor and an
open-collector driver to the SHUTDOWN or RESET pins to
provide variable shutdown time.
Remote synchronization is accomplished by capacitive
coupling of a positive SYNC pulse into the OSC IN (pin 8)
terminal. For a 5 V pulse amplitude and 0.5 µs pulse width,
typical values would be 100 pF in series with 3 k to pin 8.
SHUTDOWN and RESET
Output Driver
The push-pull driver output has a typical on-resistance of
20 . Maximum switching times are specified at 75 ns for a
500 pF load. This is sufficient to directly drive MOSFETs
such as the 2N7004, 2N7005, IRFD120 and IRFD220.
Larger devices can be driven, but switching times will be
longer, resulting in higher switching losses. In order to drive
large MOSPOWER devices, it is necessary to use an
external driver IC, such as the Vishay Siliconix D469A. The
D469A can switch very large devices such as the
SMM20N50 (500 V, 0.3 ) in approximately 100 ns.
SHUTDOWN (pin 11) and RESET (pin 12) are intended for
overriding the output MOSFET switch via external control
logic. The two inputs are fed through a latch preceding the
output switch. Depending on the logic state of RESET,
SHUTDOWN can be either a latched or unlatched input. The
output is off whenever SHUTDOWN is low. By
simultaneously having SHUTDOWN and RESET low, the
latch is set and SHUTDOWN has no effect until RESET goes
high. The truth table for these inputs is given in Table 1.
APPLICATIONS
1N5822
+ 5 V
GND
at 0.75 A
OSC SYNC PULSE
(If Needed)
220 µF
47 µF
3 k
2
Si9110
5
0.022 µF
100 pF
8
1N5819
13
14
6
0.1 µF
20 µF
- 5 V
240 k
at 0.25 A
150 k
FEEDBACK
1N4148
7
4
To Pin 6 V
V
CC
CC
2N7004
10
18 k
12 k
1 µF
Feedback
To Pin 14
1
3
0.1 µF
1 Ω
390 k
9
1
/
2
W
- 48 V
Figure 6. 5 Watt Power Supply for Telecom Applications
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?70004.
www.vishay.com
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Document Number: 70004
S11-0975-Rev. I, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SOIC (NARROW): 14-LEAD (POWER IC ONLY)
MILLIMETERS
INCHES
Min
1.35
0.10
0.38
0.18
8.55
3.8
Max
1.75
0.20
0.51
0.23
8.75
4.00
Min
Max
0.069
0.008
0.020
0.009
0.344
0.157
Dim
A
A1
B
C
D
0.053
0.004
0.015
0.007
0.336
0.149
14
1
13
2
12
3
11
4
10
5
9
6
8
7
E
E
1.27 BSC
0.050 BSC
e
5.80
0.50
0_
6.20
0.93
8_
0.228
0.020
0_
0.244
0.037
8_
H
L
Ø
ECN: S-40080—Rev. A, 02-Feb-04
DWG: 5914
D
H
C
A
ALL LEADS
0.101 mm
Ø
A
1
e
B
L
0.004″
Document Number: 72809
28-Jan-04
www.vishay.com
1
Package Information
Vishay Siliconix
PDIP: 14-LEAD (POWER IC ONLY)
14
1
13
2
12
3
11
4
10
5
9
6
8
7
E
E
1
D
S
1
Q
A
A
1
L
15°
MAX
C
e
1
B
B
1
e
A
MILLIMETERS
INCHES
Min
Dim
A
A1
B
B1
C
D
Min
3.81
0.38
0.38
0.89
0.20
17.27
7.62
5.59
2.29
7.37
2.79
1.27
1.02
Max
5.08
1.27
0.51
1.65
0.30
19.30
8.26
7.11
2.79
7.87
3.81
2.03
2.03
Max
0.200
0.050
0.020
0.065
0.012
0.760
0.325
0.280
0.110
0.310
0.150
0.080
0.080
0.150
0.015
0.015
0.035
0.008
0.680
0.300
0.220
0.090
0.290
0.110
0.050
0.040
E
E1
e1
eA
L
Q1
S
ECN: S-40081—Rev. A, 02-Feb-04
DWG: 5919
Document Number: 72814
28-Jan-04
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1
Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree
to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and
damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay
or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to
obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 11-Mar-11
www.vishay.com
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SI9110_11 相关器件
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| SI9111DY-E3 | VISHAY | Current Mode PWM Controller 14-Pin SOIC N | 获取价格 |
|
| SI9111DY-T1 | VISHAY | High-Voltage Switchmode Controllers | 获取价格 |
|
| SI9111DY-T1-E3 | VISHAY | High-Voltage Switchmode Controllers | 获取价格 |
|
| SI9112 | VISHAY | High-Voltage Switchmode Controller | 获取价格 |
|
| SI9112DJ | VISHAY | High-Voltage Switchmode Controller | 获取价格 |
|
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