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SIHF9Z14L-E3

更新时间：2025-06-17 08:32:53

品牌：VISHAY

描述：Power MOSFET

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规格参数
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SIHF9Z14L-E3 概述

Power MOSFET 功率MOSFET 功率场效应晶体管

SIHF9Z14L-E3 规格参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	TO-262AA
包装说明：	IN-LINE, R-PSIP-T3	针数：	3
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8541.29.00.95	风险等级：	5.11
Is Samacsys：	N	其他特性：	AVALANCHE RATED
雪崩能效等级（Eas）：	140 mJ	配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	60 V	最大漏极电流 (Abs) (ID)：	6.7 A
最大漏极电流 (ID)：	6.7 A	最大漏源导通电阻：	0.5 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR	JEDEC-95代码：	TO-262AA
JESD-30 代码：	R-PSIP-T3	JESD-609代码：	e3
湿度敏感等级：	1	元件数量：	1
端子数量：	3	工作模式：	ENHANCEMENT MODE
最高工作温度：	175 °C	封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	260	极性/信道类型：	P-CHANNEL
最大功率耗散 (Abs)：	43 W	最大脉冲漏极电流 (IDM)：	27 A
认证状态：	Not Qualified	子类别：	Other Transistors
表面贴装：	NO	端子面层：	Matte Tin (Sn)
端子形式：	THROUGH-HOLE	端子位置：	SINGLE
处于峰值回流温度下的最长时间：	40	晶体管应用：	SWITCHING
晶体管元件材料：	SILICON	Base Number Matches：	1

SIHF9Z14L-E3 数据手册

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IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

Power MOSFET

FEATURES

PRODUCT SUMMARY

V_DS(V)

• Advanced Process Technology

- 60

• Surface Mount (IRF9Z14S/SiHF9Z14S)

Available

R_DS(on)(Ω)

V_GS= - 10 V

0.50

•

Low-ProfileThrough-Hole (IRF9Z14L/SiHF9Z14L)

RoHS*

COMPLIANT

Q_g(Max.) (nC)

3.8

• 175 °C Operating Temperature

• Fast Switching

_gs(nC)

_gd(nC)

5.1

• P-Channel

• Fully Avalanche Rated

• Lead (Pb)-free Available

Configuration

Single

DESCRIPTION

Third generation Power MOSFETs from Vishay utilize

advanced processing techniques to achieve extremely low

on-resistance per silicon area. This benefit, combined with

the fast switching speed and ruggedized device design that

Power MOSFETs are well known for, provides the designer

with an extremely efficient and reliable device for use in a

wide variety of applications.

D²PAK (TO-263)

I²PAK (TO-262)

The D²PAK is a surface mount power package capable of

accommodating die size up to HEX-4. It provides the highest

power capability and the lowest possible on-resistance in

any existing surface mount package. The D²PAK is suitable

for high current applications because of is low internal

connection resistance and can dissipate up to 2.0 W in a

typical surface mount application.

P-Channel MOSFET

The through-hole version (IRF9Z14L/SiHF9Z14L) is

available for low-profile applications.

ORDERING INFORMATION

Package

D²PAK (TO-263)

IRF9Z14SPbF

SiHF9Z14S-E3

IRF9Z14S

D²PAK (TO-263)

IRF9Z14STRLPbF^a

SiHF9Z14STL-E3^a

IRF9Z14STRL^a

I²PAK (TO-262)

IRF9Z14LPbF

Lead (Pb)-free

SiHF9Z14L-E3

SnPb

SiHF9Z14S

SiHF9Z14STL^a

Note

a. See device orientation.

ABSOLUTE MAXIMUM RATINGS T_C= 25 °C, unless otherwise noted

PARAMETER

SYMBOL

LIMIT

UNIT

Drain-Source Voltage

Gate-Source Voltage

V_DS

V_GS

- 60

_C= 25 °C

- 6.7

- 4.7

- 27

0.29

140

- 6.7

4.3

Continuous Drain Current^e

V_GSat - 10 V

I_D

T_C=100°C

Pulsed Drain Current^{a, e}

Linear Derating Factor

Single Pulse Avalanche Energy^{b, e}

Avalanche Current^a

I_DM

W/°C

E_AS

I_AR

Repetiitive Avalanche Energy^a

E_AR

_C= 25 °C

3.7

Maximum Power Dissipation

P_D

T_A= 25 °C

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91089

S-Pending-Rev. A, 02-Jun-08

www.vishay.com

WORK-IN-PROGRESS

IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

ABSOLUTE MAXIMUM RATINGS T_C= 25 °C, unless otherwise noted

PARAMETER

Peak Diode Recovery dV/dt^{c, e}

SYMBOL

dV/dt

LIMIT

- 4.5

UNIT

V/ns

Operating Junction and Storage Temperature Range

Soldering Recommendations (Peak Temperature)

T_J, T_stg

- 55 to + 175

300^d

°C

for 10 s

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b. V_DD= - 25 V, starting T_J= 25 °C, L = 3.6 mH, R_G= 25 Ω, I_AS= - 6.7 A (see fig. 12).

c. I_SD≤ - 6.7 A, dI/dt ≤ 90 A/µs, V_DD≤ V_DS, T_J≤ 175 °C.

d. 1.6 mm from case.

e. Uses IRF9Z14/SiHF9Z14 data and test conditions.

THERMAL RESISTANCE RATINGS

PARAMETER

SYMBOL

TYP.

MAX.

UNIT

Maximum Junction-to-Ambient (PCB

Mounted, steady-state)^a

R_thJA

°C/W

Maximum Junction-to-Case (Drain)

R_thJC

3.5

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

SPECIFICATIONS T_J= 25 °C, unless otherwise noted

PARAMETER

SYMBOL

TEST CONDITIONS

MIN.

TYP.

MAX.

UNIT

Static

Drain-Source Breakdown Voltage

V_DS

ΔV_DS/T_J

V_GS(th)

I_GSS

V_GS= 0 V, I_D= - 250 µA

- 60

V/°C

_DSTemperature Coefficient

Reference to 25 °C, I_D= - 1 mA^c

V_DS= V_GS, I_D= - 250 µA

- 0.06

Gate-Source Threshold Voltage

Gate-Source Leakage

- 2.0

- 4.0

100

- 100

- 500

0.5

V_GS

20 V

V_DS= - 60 V, V_GS= 0 V

Zero Gate Voltage Drain Current

I_DSS

µA

_DS= - 48 V, V_GS= 0 V, T_J= 150 °C

Drain-Source On-State Resistance

Forward Transconductance

Dynamic

R_DS(on)

g_fs

V_GS= - 10 V

V_DS= - 25 V, I_D= - 4.0 A^c

I_D= - 4.0 A^b

1.4

Input Capacitance

C_iss

C_oss

C_rss

Q_g

270

170

V_GS= 0 V,

_DS= - 25 V,

f = 1.0 MHz, see fig. 5^c

Output Capacitance

Reverse Transfer Capacitance

Total Gate Charge

3.8

5.1

I_D= - 6.7 A, V_DS= - 48 V,

see fig. 6 and 13^{b, c}

Gate-Source Charge

Gate-Drain Charge

Q_gs

Q_gd

t_d(on)

t_r

V_GS= - 10 V

Turn-On Delay Time

Rise Time

7.5

_DD= - 30 V, I_D= - 6.7 A,

Turn-Off Delay Time

Fall Time

t_d(off)

t_f

_G= 24 Ω, R_D= 4.0 Ω, see fig. 10^b

Internal Source Inductance

Drain-Source Body Diode Characteristics

L_S

Between lead, and center of die contact

MOSFET symbol

showing the

integral reverse

p - n junction diode

Continuous Source-Drain Diode Current

I_S

- 6.7

Pulsed Diode Forward Current^a

Body Diode Voltage

I_SM

- 27

V_SD

T_J= 25 °C, I_S= - 6.7 A, V_GS= 0 V^b

- 5.5

www.vishay.com

Document Number: 91089

S-Pending-Rev. A, 02-Jun-08

IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

SPECIFICATIONS T_J= 25 °C, unless otherwise noted

PARAMETER

SYMBOL

TEST CONDITIONS

MIN.

TYP.

MAX.

UNIT

Drain-Source Body Diode Characteristics

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge

Forward Turn-On Time

t_rr

160

190

T_J= 25 °C, I_F= - 6.7 A, dI/dt = 100 A/µs^{b, c}

Q_rr

t_on

Intrinsic turn-on time is negligible (turn-on is dominated by L_Sand L_D)

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.

c. Uses IRF9Z14/SiHF9Z14 data and test conditions.

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Fig. 1 - Typical Output Characteristics

Fig. 3 - Typical Transfer Characteristics

Fig. 2 - Typical Output Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91089

S-Pending-Rev. A, 02-Jun-08

www.vishay.com

IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 8 - Maximum Safe Operating Area

www.vishay.com

Document Number: 91089

S-Pending-Rev. A, 02-Jun-08

IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

R_D

V_DS

V_GS

D.U.T.

R_G

V_DD

- 10 V

Pulse width ≤ 1 µs

Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

t_d(on)t_rt_d(off)t_f

V_GS

10 %

90 %

V_DS

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

I_AS

V_DS

Vary t_pto obtain

required I_AS

V_DS

D.U.T.

R _G

V_DD

I_AS

t_p

- 10 V

0.01 Ω

t_p

V_DS

Fig. 12b - Unclamped Inductive Waveforms

Fig. 12a - Unclamped Inductive Test Circuit

Document Number: 91089

S-Pending-Rev. A, 02-Jun-08

www.vishay.com

IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Current regulator

Same type as D.U.T.

50 kΩ

Q_G

- 10 V

12 V

0.2 µF

0.3 µF

Q_GS

Q_GD

D.U.T.

V_G

V_GS

- 3 mA

Charge

I_G

I_D

Current sampling resistors

Fig. 13a - Basic Gate Charge Waveform

Fig. 13b - Gate Charge Test Circuit

www.vishay.com

Document Number: 91089

S-Pending-Rev. A, 02-Jun-08

IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

Circuit layout considerations

•

Low stray inductance

• Ground plane

•

Low leakage inductance

current transformer

R_G

• dV/dt controlled by R_G

• I_SDcontrolled by duty factor "D"

• D.U.T. - device under test

V_DD

Compliment N-Channel of D.U.T. for driver

Driver gate drive

P.W.

Period

D =

P.W.

= - 10 V*

D.U.T. I waveform

Reverse

recovery

current

Body diode forward

current

dI/dt

D.U.T. V waveform

Diode recovery

dV/dt

Re-applied

voltage

Body diode forward drop

Ripple ≤ 5 %

Inductor current

* V_GS= - 5 V for logic level and - 3 V drive devices

Fig. 14 - For P-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon

Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and

reliability data, see http://www.vishay.com/ppg?91089.

Document Number: 91089

S-Pending-Rev. A, 02-Jun-08

www.vishay.com

Legal Disclaimer Notice

Vishay

Disclaimer

All product specifications and data are subject to change without notice.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf

(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein

or in any other disclosure relating to any product.

Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any

information provided herein to the maximum extent permitted by law. The product specifications do not expand or

otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed

therein, which apply to these products.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this

document or by any conduct of Vishay.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless

otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such

applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting

from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding

products designed for such applications.

Product names and markings noted herein may be trademarks of their respective owners.

Document Number: 91000

Revision: 18-Jul-08

www.vishay.com

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