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March 1994  
Revised November 1999  
74ABT240  
Octal Buffer/Line Driver with 3-STATE Outputs  
General Description  
Features  
The ABT240 is an inverting octal buffer and line driver  
designed to be employed as a memory address driver,  
clock driver and bus oriented transmitter or receiver which  
provides improved PC board density.  
■ Output sink capability of 64 mA, source capability of  
32 mA  
■ Guaranteed latchup protection  
■ High impedance glitch free bus loading during entire  
power up and power down cycle  
■ Nondestructive hot insertion capability  
Ordering Code:  
Order Number Package Number  
Package Description  
74ABT240CSC  
74ABT240CSJ  
74ABT240CMSA  
74ABT240CMTC  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MSA20  
MTC20  
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
3-STATE Output  
Enable Inputs  
Inputs  
OE1, OE2  
I0–I7  
O0–O7  
Outputs  
Truth Tables  
Inputs  
OE1  
Outputs  
(Pins 12, 14, 16, 18)  
In  
L
L
L
H
X
H
L
H
Z
Inputs  
OE2  
Outputs  
(Pins 3, 5, 7, 9)  
In  
L
L
L
H
X
H
L
H
Z
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
Z = High Impedance  
© 1999 Fairchild Semiconductor Corporation  
DS011664  
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 1)  
Recommended Operating  
Conditions  
−65°C to +150°C  
Storage Temperature  
Junction Temperature under Bias  
−55°C to +150°C  
−0.5V to +7.0V  
Free Air Ambient Temperature  
Supply Voltage  
−40°C to +85°C  
+4.5V to +5.5V  
V
CC Pin Potential to Ground Pin  
Input Voltage (Note 2)  
Input Current (Note 2)  
Voltage Applied to Any Output  
in the Disabled or  
−0.5V to +7.0V  
Minimum Input Edge Rate (∆V/∆t)  
Data Input  
−30 mA to +5.0 mA  
50 mV/ns  
20 mV/ns  
Enable Input  
Power-Off State  
−0.5V to 5.5V  
−0.5V to VCC  
in the HIGH State  
Current Applied to Output  
in LOW State (Max)  
twice the rated IOL (mA)  
DC Latchup Source Current  
(Across Comm Operating Range)  
Over Voltage Latchup (I/O)  
−150 mA  
Note 1: Absolute maximum ratings are values beyond which the device  
may be damaged or have its useful life impaired. Functional operation  
under these conditions is not implied.  
10V  
Note 2: Either voltage limit or current limit is sufficient to protect inputs.  
DC Electrical Characteristics  
VCC  
Symbol  
VIH  
Parameter  
Input HIGH Voltage  
Min  
Typ  
Max  
Units  
Conditions  
2.0  
V
V
V
V
V
V
Recognized HIGH Signal  
Recognized LOW Signal  
VIL  
Input LOW Voltage  
0.8  
VCD  
VOH  
Input Clamp Diode Voltage  
Output HIGH Voltage  
−1.2  
Min  
Min  
Min  
Min  
I
I
I
I
IN = −18 mA  
OH = −3 mA  
OH = −32 mA  
OL = 64 mA  
2.5  
2.0  
VOL  
IIH  
Output LOW Voltage  
Input HIGH Current  
0.55  
1
V
V
V
V
V
IN = 2.7V (Note 3)  
IN = VCC  
µA  
µA  
µA  
V
Max  
Max  
Max  
0.0  
1
IBVI  
IIL  
Input HIGH Current Breakdown Test  
Input LOW Current  
7
IN = 7.0V  
−1  
−1  
IN = 0.5V (Note 3)  
IN = 0.0V  
VID  
Input Leakage Test  
4.75  
I
ID = 1.9 µA  
All Other Pins Grounded  
IOZH  
IOZL  
Output Leakage Current  
Output Leakage Current  
10  
µA  
µA  
0 − 5.5V  
0 − 5.5V  
V
OUT = 2.7V; OEn = 2.0V  
−10  
V
V
V
V
OUT = 0.5V; OEn = 2.0V  
OUT = 0.0V  
IOS  
Output Short-Circuit Current  
Output HIGH Leakage Current  
Bus Drainage Test  
−100  
−275  
50  
mA  
µA  
µA  
µA  
mA  
Max  
Max  
0.0  
ICEX  
IZZ  
ICCH  
ICCL  
ICCZ  
OUT = VCC  
100  
50  
OUT = 5.5V; All Others GND  
Power Supply Current  
Power Supply Current  
Max  
Max  
All Outputs HIGH  
All Outputs LOW  
30  
Power Supply Current  
50  
µA  
Max  
Max  
Max  
OEn = VCC  
;
All Others at VCC or Ground  
VI = VCC − 2.1V  
ICCT  
Additional ICC/Input  
Outputs Enabled  
1.5  
1.5  
50  
mA  
mA  
µA  
Outputs 3-STATE  
Outputs 3-STATE  
Enable Input VI = VCC − 2.1V  
Data Input VI = VCC − 2.1V  
All Others at VCC or Ground  
Outputs Open  
ICCD  
Dynamic ICC  
(Note 3)  
No Load  
mA/  
0.1  
MHz  
OEn = GND, (Note 4)  
One Bit Toggling, 50% Duty Cycle  
Note 3: Guaranteed, but not tested.  
Note 4: For 8 bits toggling, ICCD < 0.8 mA/MHz.  
www.fairchildsemi.com  
2
AC Electrical Characteristics  
T
A = +25°C  
T
A = −55°C to +125°C  
CC = 4.5V–5.5V  
L = 50 pF  
Max  
T
A = −40°C to +85°C  
CC = 4.5V–5.5V  
L = 50 pF  
Max  
V
CC = +5V  
L = 50 pF  
Typ  
V
V
C
C
C
Symbol  
Parameter  
Units  
Min  
1.0  
1.6  
1.1  
1.1  
1.8  
1.6  
Max  
4.8  
4.8  
6.2  
6.2  
6.4  
5.8  
Min  
0.8  
1.0  
0.8  
0.8  
1.0  
1.0  
Min  
1.0  
1.6  
1.1  
1.1  
1.8  
1.6  
tPLH  
Propagation Delay  
5.5  
5.5  
7.5  
7.7  
7.5  
7.2  
4.8  
4.8  
6.2  
6.2  
6.4  
5.8  
ns  
ns  
ns  
tPHL  
tPZH  
tPZL  
tPHZ  
tPLZ  
Data to Outputs  
Output Enable  
Time  
Output Disable  
Time  
Capacitance  
Conditions  
Symbol  
Parameter  
Typ  
Units  
T
A = 25°C  
CIN  
COUT (Note 5)  
Input Capacitance  
Output Capacitance  
5.0  
9.0  
pF  
pF  
V
V
CC = 0V  
CC = 5.0V  
Note 5: COUT is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012.  
3
www.fairchildsemi.com  
AC Loading  
*Includes jig and probe capacitance  
Standard AC Test Load  
Test Input Signal Levels  
Amplitude Rep. Rate  
3.0V 1 MHz  
tW  
tr  
tf  
500 ns  
2.5 ns  
2.5 ns  
Test Input Signal Requirements  
AC Waveforms  
Propagation Delay,  
Propagation Delay Waveforms for  
Pulse Width Waveforms  
Inverting and Non-Inverting Functions  
3-STATE Output HIGH  
Setup Time, Hold Time  
and LOW Enable and Disable Times  
and Recovery Time Waveforms  
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4
Physical Dimensions inches (millimeters) unless otherwise noted  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body  
Package Number M20B  
5
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
Package Number M20D  
www.fairchildsemi.com  
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
Package Number MSA20  
7
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Package Number MTC20  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
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