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A
PLUS MAKE YOUR PRODUCTION A-PLUS  
ASM0906CB  
DATA SHEET  
APLUS INTEGRATED CIRCUITS INC.  
Address:  
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,  
Sales E-mail: Mr. Jason  
Taiwan 115, R.O.C.  
sales@aplusinc.com.tw  
(115)台北市南港區成功路㆒段 32 3 樓之 10.  
Technology E-mail: Mr. George  
service@aplusinc.com.tw  
TEL: 886-2-2782-9266  
FAX: 886-2-2782-9255  
WEBSITE : http: //www.aplusinc.com.tw  
ASM0906CB  
ASM0906CB VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR  
1.0 General Description  
The ASM0906CB is very low cost voice synthesizer with 4-bit microprocessor. It has various  
features including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog  
timer(WDT), voice synthesizer, etc. It consists of 22 instructions in the device. With CMOS  
technology and halt function can minimize power dissipation. Its architecture is similar to RISC,  
with two stages of instruction pipeline. It allows all instructions to be executed in a single cycle,  
except for program branches and data table read instructions (which need two instruction  
cycles).  
1.1 Feature  
‹ Single power supply can operate from 2.4V through 5V  
‹ Internal Program ROM: 4K x 10-bit  
‹ 1 sets of 15-bit DPR can access up to 32K x 10 bits data memory space  
‹ Data Registers:  
64 x 4-bit data RAM (00-1Fh plus 40h-5Fh)  
Unbanked special function registers (SFR) range: 20h-3Fh  
‹ I/O Ports:  
PRA: 4-bit I/O Port A (2Bh)  
PRB: 2-bit Output Port B (2Dh)  
‹ On-chip clock generator:  
‹ Timer: 1  
Resistive Clock Drive(RM)  
Timer0: a 9-bit auto-reload timer/counter  
‹ Stack: 2-level subroutine nesting  
‹ HALT and Release from HALT function to reduce power consumption  
‹ Watch Dog Timer (WDT)  
‹ Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles  
‹ Number of instruction: 22  
‹ The Voice function can be implemented by microprocessor instruction  
One 8-bit COUT output for ASM0906CB  
1
Rev 1.0  
ASM0906CB  
FIGURE 1.1 : Block Diagram of ASM0906CB  
Data Bus[3:0]  
ROM Latch  
PCLATCH(8)  
PCH(8)  
PCL(4)  
Stack(12)  
(2-Level)  
PC[11:0]  
Instruction  
Latch  
(ADDR[14:12])  
=000b  
ROM_ADDR[14:0]  
ADDR[14:0]  
0
1
Instruction Bus [9:0]  
DPR3,2,1  
Program  
(Data)  
ROM  
Instruction  
Decoder  
DPR[14:0]  
Control Signal  
DLATCH(10)  
ROM_Data[9:0]  
Data Bus[3:0]  
Instruction Bus [9:0]  
Timer0(9)  
Accumlator(4)  
PRA(4)  
PRB(2)  
SRAM  
(64 x 4)  
Immediate(4)  
ALU(4)  
00h-1Fh  
40h-5Fh  
Register(4)  
weak or strong  
pull-low for PRA,  
PRB, PRC  
P1,P2,P3,P4  
Clock Generator  
OSC  
PRASL(4)  
enter test mode  
Reset Chip  
Test select  
One-Channel  
Power on Reset  
VDD/GND  
( Voice synthesizer )  
Reset Chip  
RESET pin  
COUT  
COUT  
2
Rev 1.0  
ASM0906CB  
FIGURE 1.2 : External ROM Map of ASM0906CB  
PC[11:0]  
12bit x 2 STACK  
15-bit Data Pointer  
Reset Vector  
00000h  
00080h  
00080h-003FFh  
Reserved for Testing  
00400h  
00000h-00FFFh  
00FFFh(4K)  
00000h-07FFFh  
07FFFh(32Kx10-bits)  
3
Rev 1.0  
ASM0906CB  
1.2 Pin-Out  
ASM0906CB Pin-Out  
VDD  
I
-
Power supply during operation  
I/O port with programmable strong pull-low or weak pull-low or fix-input-  
PRA3-1  
I/O  
STI  
Std./O.D. floating capability  
Output type with standard or Open-Drain output  
I/O port with programmable strong pull-low or weak pull-low or fix-input-  
Std./O.D. floating capability  
PRA0/RESET I/O  
STI  
Output type with standard or Open-Drain output  
Mask option selected as an external RESET pin with weak pull-low capability  
RM mode Oscillator input  
OSC  
I
-
-
-
-
COUT  
GND  
O
I
Current Output of Audio  
Circuit Ground Potential  
TEST  
PRB0-1  
O
O
Enter Test Mode. ( TEST = High )  
Std./O.D. Output type with standard or Open-Drain output  
1.3 Application circuit  
4
Rev 1.0  
ASM0906CB  
1.4 Bonding Diagram  
32K x 10 bit ROM  
Y= 1360+80(um)  
ASM0906CB  
11  
1
2
CHIP SIZE: X= 1550+80(um) , Y= 1360+80(um)  
10  
9
3
4
5
6
7
8
X= 1550+80(um)  
Substrate must be connected to GND.  
ASM0906CB Pad Location  
PAD # PAD Name  
Chip Size: X= 1550 + 80 (um), Y=1360 + 80 (um)  
X
Y
PAD # PAD Name  
X
Y
1
2
3
4
5
6
RA3  
RA2  
RA1  
RA0  
OSC  
GND  
-664.92 -275.52  
-664.92 -403.64  
7
8
TEST  
COUT  
VDD  
RB0  
105.44  
303.96  
683.04  
664.92  
664.92  
-600.2  
-600.2  
-600.2  
-399.2  
-280.8  
-662.64  
-468.24  
-281.04  
-111.72  
-600.2  
-600.2  
-600.2  
-600.2  
9
10  
11  
RB1  
5
Rev 1.0  
ASM0906CB  
1.5 DC Characteristics for ASM0906CB  
SYMBOL  
PARAMETER  
VDD MIN. TYP. MAX. UNIT  
CONDITION  
VDD  
OPERATING VOLTAGE  
2.4  
3
5.0  
1
V
depending on Freq.  
4MHz, RM  
3
5
3
5
3
5
Isb  
STANDBY  
uA  
in HALT Mode  
4MHz, RM  
1
SUPPLY  
CURRENT  
2
7
3
9
Iop  
OPERATING  
mA  
IO Floating  
4MHz, RM  
INPUT CURRENT  
/Internal pull low  
in HALT Mode  
(IO Ports with weak  
pull-high pull-low)  
Iih  
uA  
5
-5.2  
3
5
3
5
3
5
-3  
-8  
7
Ioh  
Iol  
OUTPUT HIGH CURRENT  
OUTPUT LOW CURRENT  
mA  
4MHz, RM  
(IO ports)  
20  
4
DA CURRENT OUT  
(FULL SCALE)  
FREQUENCY  
STABILITY  
Cout  
dF/F  
dF/F  
5.2  
Fosc(3v- 2.4v)  
Fosc (3v)  
-10  
-20  
10  
20  
%
%
VDD=3V,  
Fosc VARIATION  
Rosc=850k, 4MHz  
FIGURE 1.3 : Frequency Range for Rosc in RM mode  
Resistor(k ohm)  
3v Freq.(MHz)  
1200  
2.92  
1000  
3.51  
820  
4.13  
560  
7.02  
Rosc & Freq.  
8
6
4
2
0
7.02  
4.13  
3.51  
2.92  
0
200  
400  
600  
800  
1000  
1200  
1400  
Rosc k ohm  
6
Rev 1.0