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April 1988  
Revised January 2004  
74F538  
1-of-8 Decoder with 3-STATE Outputs  
General Description  
The 74F538 decoder/demultiplexer accepts three Address  
Features  
Output polarity control  
(A0–A2) input signals and decodes them to select one of  
Data demultiplexing capability  
eight mutually exclusive outputs. A polarity control input (P)  
determines whether the outputs are active LOW or active  
HIGH. A HIGH Signal on either of the active LOW Output  
Enable (OE) inputs forces all outputs to the high imped-  
ance state. Two active HIGH and two active LOW input  
enables are available for easy expansion to 1-of 32 decod-  
ing with four packages, or for data demultiplexing to 1-of-8  
or 1-of-16 destinations.  
Multiple enables for expansion  
3-STATE outputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74F538SC  
74F538PC  
M20B  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 2004 Fairchild Semiconductor Corporation  
DS009551  
www.fairchildsemi.com  
Unit Loading/Fan Out  
Input IIH/IIL  
U.L.  
Pin Names  
Description  
Output IOH/IOL  
HIGH/LOW  
1.0/1.0  
A0A2  
E1, E2  
E3, E4  
P
Address Inputs  
20 µA/0.6 mA  
20 µA/0.6 mA  
Enable Inputs (Active LOW)  
Enable Inputs (Active HIGH)  
Polarity Control Input  
1.0/1.0  
1.0/1.0  
20 µA/0.6 mA  
1.0/1.0  
20 µA/0.6 mA  
OE1, OE2  
O0O7  
Output Enable Inputs (Active LOW)  
3-STATE Outputs  
1.0/1.0  
20 µA/0.6 mA  
150/40 (33.3)  
3 mA/24 mA (20 mA)  
Truth Table  
Inputs  
Outputs  
Function  
OE1 OE2 E1  
E2  
E3  
E4  
A2  
A1  
A0  
O0  
O1  
O2  
O3  
O4  
O5  
O6  
O7  
High  
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
X
H
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
X
X
H
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
X
X
X
L
X
X
X
X
X
L
X
X
X
X
X
X
L
X
X
X
X
X
X
L
X
X
X
X
X
X
L
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Impedance  
Disable  
Outputs Equal P Input  
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Active HIGH  
Output  
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
(P = L)  
L
H
H
L
L
H
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
H
H
H
H
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
H
H
L
L
L
L
L
L
H
L
L
H
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
Active LOW  
Output  
L
H
L
H
H
L
H
H
H
L
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
H
H
(P = H)  
L
H
H
L
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
Z = High Impedance  
www.fairchildsemi.com  
2
Logic Diagram  
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.  
3
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 1)  
Recommended Operating  
Conditions  
Storage Temperature  
65°C to +150°C  
Ambient Temperature under Bias  
Junction Temperature under Bias  
VCC Pin Potential to Ground Pin  
Input Voltage (Note 2)  
55°C to +125°C  
55°C to +150°C  
0.5V to +7.0V  
Free Air Ambient Temperature  
Supply Voltage  
0°C to +70°C  
+4.5V to +5.5V  
0.5V to +7.0V  
Input Current (Note 2)  
30 mA to +5.0 mA  
Voltage Applied to Output  
in HIGH State (with VCC = 0V)  
Standard Output  
Note 1: Absolute maximum ratings are values beyond which the device  
may be damaged or have its useful life impaired. Functional operation  
under these conditions is not implied.  
0.5V to VCC  
3-STATE Output  
0.5V to +5.5V  
Note 2: Either voltage limit or current limit is sufficient to protect inputs.  
Current Applied to Output  
in LOW State (Max)  
twice the rated IOL (mA)  
DC Electrical Characteristics  
VCC  
Symbol  
VIH  
Parameter  
Input HIGH Voltage  
Min  
Typ  
Max  
Units  
Conditions  
2.0  
V
V
V
Recognized as a HIGH Signal  
Recognized as a LOW Signal  
VIL  
Input LOW Voltage  
Input Clamp Diode Voltage  
Output HIGH  
0.8  
VCD  
VOH  
1.2  
Min  
Min  
I
I
I
I
I
IN = −18 mA  
OH = −1 mA  
OH = −3 mA  
OH = −1 mA  
OH = −3 mA  
10% VCC  
10% VCC  
5% VCC  
5% VCC  
2.5  
2.4  
2.7  
2.7  
Voltage  
V
VOL  
Output LOW  
10% VCC  
0.5  
5.0  
7.0  
V
Min  
Max  
Max  
I
OL = 20 mA  
Voltage  
IIH  
Input HIGH Current  
Input HIGH Current  
Breakdown Test  
Output HIGH  
µA  
µA  
V
IN = 2.7V  
IN = 7.0V  
IBVI  
V
ICEX  
50  
µA  
V
Max  
0.0  
V
OUT = VCC  
Leakage Current  
Input Leakage  
VID  
I
ID = 1.9 µA  
All Other Pins Grounded  
IOD = 150 mV  
All Other Pins Grounded  
4.75  
Test  
IOD  
Output Leakage  
Circuit Current  
V
3.75  
µA  
0.0  
IIL  
Input LOW Current  
Output Leakage Current  
Output Leakage Current  
Output Short-Circuit Current  
Bus Drainage Test  
Power Supply Current  
Power Supply Current  
Power Supply Current  
0.6  
50  
mA  
µA  
Max  
Max  
Max  
Max  
0.0V  
Max  
Max  
Max  
V
V
V
V
V
V
V
V
IN = 0.5V  
IOZH  
IOZL  
IOS  
OUT = 2.7V  
OUT = 0.5V  
OUT = 0V  
50  
150  
500  
45  
µA  
60  
mA  
µA  
IZZ  
OUT = 5.25V  
O = HIGH  
O = LOW  
ICCH  
ICCL  
ICCZ  
31  
37  
37  
mA  
mA  
mA  
56  
56  
O = HIGH Z  
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4
AC Electrical Characteristics  
T
A = +25°C  
T
A = 0°C to +70°C  
CC = +5.0V  
L = 50 pF  
Max  
V
CC = +5.0V  
V
Symbol  
Parameter  
Units  
C
L = 50 pF  
C
Min  
6.0  
4.0  
5.0  
4.0  
6.0  
5.0  
6.0  
6.0  
3.0  
5.0  
2.0  
3.0  
Typ  
11.0  
7.5  
Max  
16.0  
11.0  
15.0  
9.0  
Min  
6.0  
4.0  
5.0  
4.0  
6.0  
5.0  
6.0  
6.0  
3.0  
5.0  
2.0  
3.0  
tPLH  
Propagation Delay  
An to On  
17.0  
12.0  
16.0  
10.0  
17.0  
15.0  
20.0  
17.0  
11.0  
14.0  
7.0  
tPHL  
tPLH  
tPHL  
tPLH  
tPHL  
tPLH  
tPHL  
tPZH  
tPZL  
tPHZ  
tPLZ  
ns  
ns  
ns  
Propagation Delay  
E1 or E2 to On  
8.5  
6.5  
Propagation Delay  
E3 or E4 to On  
11.0  
10.0  
11.5  
11.0  
5.5  
16.0  
14.0  
18.0  
16.0  
10.0  
13.0  
6.0  
Propagation Delay  
P to On  
Output Enable Time  
OE1 or OE2 to On  
Output Disable Time  
OE1 or OE2 to On  
9.0  
4.0  
5.0  
8.0  
9.0  
5
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Physical Dimensions inches (millimeters) unless otherwise noted  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Package Number M20B  
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Package Number N20A  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
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7
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