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REVISIONS  
LTR  
A
DESCRIPTION  
DATE (YR-MO-DA)  
00-08-21  
APPROVED  
R. MONNIN  
Make changes to t , T , V  
, t , T tests and switch footnotes 2 and 3  
T1 DP PAUX T2 DA  
as specified under table I. - ro  
B
00-09-20  
R. MONNIN  
Make changes to SEP as specified under 1.5 and I , t , tT2 tests as  
CCS T1  
specified in table I. – ro  
C
D
Make correction to PWR pin description as specified in figure 1. - ro  
Make changes to UV- in table I, added footnote to 1.5 and table I. - gt  
01-12-14  
03-06-19  
R. MONNIN  
R. MONNIN  
REV  
SHEET  
REV  
D
D
D
D
D
D
D
21  
D
D
22  
D
SHEET  
15  
16  
17  
18  
19  
20  
REV STATUS  
OF SHEETS  
PMIC N/A  
REV  
D
3
D
4
D
5
D
6
D
7
D
8
D
9
D
D
D
D
D
SHEET  
1
2
10  
11  
12  
13  
14  
PREPARED BY  
RICK OFFICER  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216  
CHECKED BY  
RAJESH PITHADIA  
STANDARD  
MICROCIRCUIT  
DRAWING  
http://www.dscc.dla.mil  
APPROVED BY  
RAYMOND MONNIN  
THIS DRAWING IS AVAILABLE  
FOR USE BY ALL  
DEPARTMENTS  
AND AGENCIES OF THE  
DEPARTMENT OF DEFENSE  
MICROCIRCUIT, DIGITAL-LINEAR, RADIATION  
HARDENED, COMPLEMENTARY SWITCH FET  
DRIVER, MONOLITHIC SILICON  
DRAWING APPROVAL DATE  
00-07-26  
AMSC N/A  
REVISION LEVEL  
D
SIZE  
A
CAGE CODE  
5962-00521  
67268  
SHEET  
1
OF  
22  
DSCC FORM 2233  
APR 97  
5962-E446-03  
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.  
1. SCOPE  
1.1 Scope. This drawing documents three product assurance class levels consisting of high reliability (device classes Q and  
M), space application (device class V) and for appropriate satellite and similar applications (device class T). A choice of case  
outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of  
Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device class T, the user is encouraged to review the  
manufacturer’s Quality Management (QM) plan as part of their evaluation of these parts and their acceptability in the intended  
application.  
1.2 PIN. The PIN is as shown in the following example:  
5962  
F
00521  
01  
V
X
C
Federal  
stock class  
designator  
\
RHA  
designator  
(see 1.2.1)  
Device  
type  
(see 1.2.2)  
Device  
class  
designator  
(see 1.2.3)  
Case  
outline  
(see 1.2.4)  
Lead  
finish  
(see 1.2.5)  
/
\/  
Drawing number  
1.2.1 RHA designator. Device classes Q, T and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and  
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A  
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.  
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:  
Device type  
01  
Generic number  
IS-1715ARH  
Circuit function  
Radiation hardened, complementary switch  
field effect transistor (FET) driver  
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as  
follows:  
Device class  
M
Device requirements documentation  
Vendor self-certification to the requirements for MIL-STD-883 compliant,  
non-JAN class level B microcircuits in accordance with MIL-PRF-38535,  
appendix A  
Q, V  
T
Certification and qualification to MIL-PRF-38535  
Certification and qualification to MIL-PRF-38535 with performance as specified  
in the device manufacturers approved quality management plan.  
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:  
Outline letter  
X
Descriptive designator  
CDFP4-F16  
Terminals  
16  
Package style  
Flat pack  
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q, T and V or MIL-PRF-38535,  
appendix A for device class M.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
2
DSCC FORM 2234  
APR 97  
1.3 Absolute maximum ratings. 1/  
Supply voltage range (V ) ..............................................................10 V dc to 20 V dc  
CC  
DC input voltage range (V ) ............................................................0 V to V  
IN  
CC  
Junction temperature (T ) .................................................................+175°C  
J
Storage temperature range ..............................................................-65°C to +150°C  
Lead temperature (soldering, 10 seconds) .......................................+265°C  
Thermal resistance, junction-to-case (θ ) .......................................18°C/W  
JC  
Thermal resistance, junction-to-ambient (θ ) ..................................90°C/W  
JA  
1.4 Recommended operating conditions.  
Supply voltage range (V ) ..............................................................10 V dc to 18 V dc  
CC  
Ambient operating temperature range (T ) ......................................-55°C to +125°C  
A
1.5 Radiation features  
2
SEP effective let number upsets .......................................................> 90 MeV/(cm /mg)  
Maximum total dose available (dose rate = 50 – 300 rads(Si) / s): 2/  
5
Device classes M, Q, or V .............................................................3 x 10 Rads  
5
Device class T ...............................................................................1 x 10 Rads  
Dose rate latch-up ............................................................................None 3/  
2. APPLICABLE DOCUMENTS  
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a  
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in  
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the  
solicitation.  
SPECIFICATION  
DEPARTMENT OF DEFENSE  
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.  
STANDARDS  
DEPARTMENT OF DEFENSE  
MIL-STD-883  
-
Test Method Standard Microcircuits.  
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.  
_____  
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the  
maximum levels may degrade performance and affect reliability.  
2/ These parts may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate effects.  
Radiation end point limits for the noted parameters are guaranteed only for the conditions specified in  
MIL-STD-883, method 1019, condition A.  
3/ Guaranteed by design or process but not tested.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
3
DSCC FORM 2234  
APR 97  
HANDBOOKS  
DEPARTMENT OF DEFENSE  
MIL-HDBK-103 - List of Standard Microcircuit Drawings.  
MIL-HDBK-780 - Standard Microcircuit Drawings.  
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization  
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)  
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text  
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a  
specific exemption has been obtained.  
3. REQUIREMENTS  
3.1 Item requirements. The individual item requirements for device classes Q, T and V shall be in accordance with  
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The  
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for  
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified  
herein.  
3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document.  
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified  
in MIL-PRF-38535 and herein for device classes Q, T and V or MIL-PRF-38535, appendix A and herein for device class M.  
3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein.  
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.  
3.2.3 Radiation exposure circuit. The radiation exposure circuit shall be as specified on figure 2.  
3.3 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the  
electrical performance characteristics and post irradiation parameter limits are as specified in table I and shall apply over the  
full ambient operating temperature range.  
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical  
tests for each subgroup are defined in table I.  
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be  
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space  
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the  
RHA designator shall still be marked. Marking for device classes Q, T and V shall be in accordance with MIL-PRF-38535.  
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.  
3.5.1 Certification/compliance mark. The certification mark for device classes Q, T and V shall be a "QML" or "Q" as  
required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535,  
appendix A.  
3.6 Certificate of compliance. For device classes Q, T and V, a certificate of compliance shall be required from a  
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a  
certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-  
HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of  
supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q, T and V, the requirements of  
MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
4
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
Conditions 1/  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
A
Test  
Symbol  
V
CC  
= 10 V to 18 V  
Min  
Max  
ENBL 3 V  
unless otherwise specified  
M,D,P,L,R,F 2/  
OVERALL section  
Operating voltage range  
1,2,3  
1
01  
01  
01  
01  
01  
01  
10  
10  
18  
18  
V
V
CC  
Input current, nominal  
1,2,3  
1
1.0  
1.0  
300  
300  
8.5  
8.5  
7.7  
7.7  
0
6.0  
6.0  
900  
900  
9.5  
9.5  
8.8  
8.8  
2.0  
2.0  
mA  
I
I
CC  
M,D,P,L,R,F 2/  
ENBLE = 0.8 V  
Input current, sleep mode  
1,2,3  
1
µA  
V
CCS  
M,D,P,L,R,F 2/  
Under voltage, rising  
threshold  
UV+  
UV-  
1,2,3  
1
M,D,P,L,R,F 2/  
M,D,P,L,R,F 2/  
M,D,P,L,R,F 2/  
Under voltage, falling  
threshold  
1,2,3  
1
V
Under voltage delta  
UVD  
1,2,3  
1
V
0
Power driver (PWR) section  
Pre turn-on PWR output,  
low  
1,2,3  
01  
01  
2.0  
V
V
V
V
V
= 0 V, ENBL 0.8 V,  
PPWR  
CC  
I
= 10 mA  
OUT  
M,D,P,L,R,F 2/  
1
2.0  
1.0  
PWR pin output low,  
saturation  
INPUT = 0.8 V,  
= 40 mA  
1,2,3  
PWR  
I
OUT  
M,D,P,L,R,F 2/  
1
1.0  
1.5  
INPUT = 0.8 V,  
= 100 mA  
1,2,3  
I
OUT  
M,D,P,L,R,F 2/  
1
1.5  
See footnotes at end of table.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-00521  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
5
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics – Continued.  
Conditions 1/  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
A
Test  
Symbol  
V
CC  
= 10 V to 18 V  
Min  
Max  
ENBL 3 V  
unless otherwise specified  
Power driver (PWR) section – continued.  
PWR pin output high,  
INPUT = 3.0 V,  
1,2,3  
01  
1.0  
V
V
V
-
CC  
saturation  
I
= -40 mA  
OUT  
PWR  
M,D,P,L,R,F 2/  
1
1.0  
1.5  
INPUT = 3.0 V,  
= -100 mA  
1,2,3  
I
OUT  
M,D,P,L,R,F 2/  
1
1.5  
50  
Rise time  
Fall time  
9,10,11  
9
01  
01  
01  
15  
15  
15  
15  
45  
ns  
ns  
ns  
T
T
C = 2200 pF  
RP  
L
M,D,P,L,R,F 2/  
C = 2200 pF  
50  
9,10,11  
9
50  
FP  
L
M,D,P,L,R,F 2/  
50  
T1 input pin delay,  
AUX to PWR  
INPUT rising edge, 3/  
= 10 kΩ  
9,10,11  
200  
t
T1  
R
T1  
M,D,P,L,R,F 2/  
9
45  
200  
INPUT rising edge, 3/  
= 100 kΩ  
9,10,11  
250  
1300  
R
T1  
M,D,P,L,R,F 2/  
9
250  
50  
1300  
300  
PWR propagation  
delay  
INPUT falling edge at 4/  
50 % points  
9,10,11  
01  
ns  
T
DP  
M,D,P,L,R,F 2/  
9
50  
300  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
6
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics – Continued.  
Conditions 1/  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
A
Test  
Symbol  
V
CC  
= 10 V to 18 V  
Min  
Max  
ENBL 3 V  
unless otherwise specified  
Auxiliary (AUX) section.  
AUX pre turn-on AUX  
output, low  
1,2,3  
01  
01  
2.0  
V
V
V
V
V
= 0 V, ENBL 0.8 V,  
PAUX  
CC  
I
= 10 mA  
OUT  
M,D,P,L,R,F 2/  
1
2.0  
1.0  
AUX pin output low,  
saturation  
INPUT = 3.0 V,  
= 40 mA  
1,2,3  
AUX  
I
OUT  
M,D,P,L,R,F 2/  
1
1.0  
1.5  
INPUT = 3.0 V,  
= 100 mA  
1,2,3  
I
OUT  
M,D,P,L,R,F 2/  
1
1.5  
1.0  
AUX pin output low,  
saturation  
INPUT = 0.8 V,  
= -40 mA  
1,2,3  
01  
V
V
V
-
CC  
I
OUT  
AUX  
M,D,P,L,R,F 2/  
1
1.0  
1.5  
INPUT = 0.8 V,  
= -100 mA  
1,2,3  
I
OUT  
M,D,P,L,R,F 2/  
1
1.5  
50  
Rise time  
Fall time  
9,10,11  
9
01  
01  
01  
15  
15  
15  
15  
50  
ns  
ns  
ns  
T
T
C = 2200 pF  
RP  
L
M,D,P,L,R,F 2/  
C = 2200 pF  
50  
9,10,11  
9
50  
FP  
L
M,D,P,L,R,F 2/  
50  
T2 input pin delay,  
PWR to AUX  
INPUT rising edge, 3/  
= 10 kΩ  
9,10,11  
130  
t
T2  
R
T2  
M,D,P,L,R,F 2/  
9
50  
130  
700  
INPUT rising edge, 3/  
= 100 kΩ  
9,10,11  
200  
R
T2  
M,D,P,L,R,F 2/  
9
200  
50  
700  
185  
AUX propagation  
delay  
INPUT falling edge at 4/  
50 % points  
9,10,11  
01  
ns  
T
DA  
M,D,P,L,R,F 2/  
9
50  
185  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
7
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics – Continued.  
Conditions 1/  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
A
Test  
Symbol  
V
CC  
= 10 V to 18 V  
Min  
Max  
ENBL 3 V  
unless otherwise specified  
ENABLE section  
Input threshold voltage  
1,2,3  
1
01  
01  
01  
2.8  
2.8  
10  
10  
15  
15  
V
V
IT  
M,D,P,L,R,F 2/  
ENABLE pin = 15 V  
M,D,P,L,R,F 2/  
Input current high  
Input current low  
1,2,3  
1
-10  
-10  
-15  
-15  
µA  
µA  
I
I
IH  
ENABLE pin = 0 V  
M,D,P,L,R,F 2/  
1,2,3  
1
IL  
T1 input section  
Current limit  
T1 input = 0 V  
M,D,P,L,R,F 2/  
1,2,3  
01  
01  
01  
-5.5  
-5.5  
2.7  
2.7  
25  
-1.6  
-1.6  
3.3  
mA  
V
T
1CL  
T
1NV  
T
1DM  
1
1,2,3  
1
Nominal voltage at T1 pin  
Minimum T1 pin delay  
M,D,P,L,R,F 2/  
T1 pin = 2.5 V 4/  
3.3  
9,10,11  
9
120  
120  
ns  
M,D,P,L,R,F 2/  
25  
T2 input section  
Current limit  
T2 input = 0 V  
M,D,P,L,R,F 2/  
1,2,3  
01  
01  
01  
-5.5  
-5.5  
2.7  
2.7  
20  
-2.1  
-2.1  
3.3  
3.3  
80  
mA  
V
T
2CL  
T
2NV  
T
2DM  
1
1,2,3  
1
Nominal voltage at T2 pin  
Minimum T2 pin delay  
M,D,P,L,R,F 2/  
T2 pin = 2.5 V 4/  
9,10,11  
9
ns  
M,D,P,L,R,F 2/  
20  
80  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
8
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics – Continued.  
Conditions 1/  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
A
Test  
Symbol  
V
CC  
= 10 V to 18 V  
Min  
Max  
ENBL 3 V  
unless otherwise specified  
INPUT section  
Input threshold voltage  
Input current high  
Input current low  
1,2,3  
1
01  
01  
01  
2.8  
2.8  
10  
10  
20  
20  
V
V
IT  
M,D,P,L,R,F 2/  
INPUT = 15 V  
1,2,3  
1
-10  
-10  
-20  
-20  
µA  
µA  
I
I
IH  
M,D,P,L,R,F 2/  
INPUT = 0 V  
1,2,3  
1
IL  
M,D,P,L,R,F 2/  
1/ Devices supplied to this drawing have been characterized through all levels M, D, P, L, R, F of irradiation  
(classes M, Q, and V) and levels M, D, P, L, R for class T. However, this device (classes M, Q, and V) is only tested at  
the F level and class T is only tested at the R level. Pre and Post irradiation values are identical unless otherwise  
specified in Table I. When performing post irradiation electrical measurements for any RHA level, T = +25°C  
A
(see 1.5 herein).  
2/ These parts may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate effects.  
Radiation end point limits for the noted parameters are guaranteed only for the conditions specified in  
MIL-STD-883, method 1019, condition A.  
3/ T1 and T2 delay is defined as the time between the 50 % transition point of AUX (PWR) and the 50 % transition point of  
PWR (AUX) with no capacitive load on either output.  
4/ Propagation delays are measured from the 50 % point of the input signal to the 50 % point of the output signal’s transition  
with no load on outputs.  
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q, T and V in MIL-PRF-38535 or  
for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.  
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2  
herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.  
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain  
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made  
available onshore at the option of the reviewer.  
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in  
microcircuit group number 53 (see MIL-PRF-38535, appendix A).  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
9
DSCC FORM 2234  
APR 97  
Device type  
Case outline  
01  
X
Terminal symbol  
NC  
Terminal  
number  
1
2
3
V
CC  
PWR  
GND  
GND  
AUX  
NC  
4
5
6
7
8
NC  
9
NC  
10  
11  
12  
13  
14  
15  
16  
V
CC  
T2  
GND  
GND  
INPUT  
T1  
ENABLE  
FIGURE 1. Terminal connections.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-00521  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
10  
DSCC FORM 2234  
APR 97  
Symbol  
NC  
Description  
No connection  
Chip positive supply (10 V – 20 V)  
V
CC  
PWR  
Output. PWR switches immediately (neglecting propagation delay)  
at INPUT’s falling edge but is delayed after the rising edge by the  
value of the resistance on T1. PWR is capable of sinking and  
sourcing 3.0 A of peak gate drive current. During sleep mode, PWR  
is active low.  
GND  
GND  
AUX  
Chip negative supply.  
Chip negative supply.  
Output. AUX switches immediately (neglecting propagation delay) at  
INPUT’s rising edge but is delayed after the falling edge before  
switching by the value of the resistance on T2. AUX is capable is  
sinking and sourcing 3.0 A of peak gate drive current. During sleep  
mode, AUX is active low.  
NC  
NC  
NC  
No connection  
No connection  
No connection  
Chip supply (10 V – 20 V)  
V
CC  
T2  
Input. A resistor to ground programs the time delay between PWR  
switch turn-off and AUX turn-on.  
GND  
GND  
Chip negative supply.  
Chip negative supply.  
INPUT  
Input. INPUT switches at TTL logic levels but the allowable range is  
from 0 V to V  
allowing direct connection to most common IN PWR  
CC  
controller outputs. The rising edge immediately switches the AUX  
output, and initiates a timing delay, T1, before switching on the PWR  
output. Similarly, the INPUT falling edge immediately turns off the  
PWR output and initiates a timing delay, T2, before switching the  
AUX output.  
T1  
Input. A resistor to ground programs the time delay between AUX  
switch turn-off and PWR turn-on.  
ENABLE  
Input. The ENABLE input switches at TTL logic levels, but the  
allowable range is from 0 to V . The ENABLE input will place the  
CC  
device into sleep mode when it is a logic low. The current into V  
CC  
during the sleep mode is typically 500 µA.  
FIGURE 1. Terminal connections – Continued.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
11  
DSCC FORM 2234  
APR 97  
NOTES: V  
= 20 V ±5 % and R = 10 kΩ  
CC  
1
FIGURE 2. Radiation exposure circuit.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-00521  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
12  
DSCC FORM 2234  
APR 97  
4. QUALITY ASSURANCE PROVISIONS  
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance  
with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan, including screening (4.2),  
qualification (4.3), and conformance inspection (4.4). The modification in the QM plan shall not affect the form, fit, or function  
as described herein.  
For device class T, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 and the device  
manufacturer’s QM plan, including screening, qualification, and conformance inspection. The performance envelope and  
reliability information shall be as specified in the manufacturer’s QM plan.  
For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A.  
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted  
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in  
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.  
For device class T, screening shall be in accordance with the device manufacturer’s Quality Management (QM) plan, and shall  
be conducted on all devices prior to qualification and technology conformance inspection.  
4.2.1 Additional criteria for device class M.  
a. Burn-in test, method 1015 of MIL-STD-883.  
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision  
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall  
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in  
test method 1015.  
(2) T = +125°C, minimum.  
A
b. Interim and final electrical test parameters shall be as specified in table IIA herein.  
4.2.2 Additional criteria for device classes Q, T and V.  
a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the  
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under  
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with  
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall  
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test  
method 1015 of MIL-STD-883.  
b. For device classes Q, T and V interim and final electrical test parameters shall be as specified in table IIA herein.  
c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in  
MIL-PRF-38535, appendix B.  
4.3 Qualification inspection for device classes Q, T and V. Qualification inspection for device classes Q and V shall be in  
accordance with MIL-PRF-38535. Qualification inspection for device class T shall be in accordance with the device  
manufacturer’s Quality Management (QM) plan. Inspections to be performed shall be those specified in MIL-PRF-38535 and  
herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).  
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-  
PRF-38535 or as specified in the QML plan including groups A, B, C, D, and E inspections and as specified herein. Quality  
conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein.  
Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups  
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
13  
DSCC FORM 2234  
APR 97  
TABLE IIA. Electrical test requirements.  
Test requirements  
Subgroups  
(in accordance with  
MIL-STD-883,  
Subgroups  
(in accordance with  
MIL-PRF-38535, table III)  
method 5005, table I)  
Device  
class M  
Device  
class Q  
Device  
class V  
Device  
class T  
Interim electrical  
parameters (see 4.2)  
---  
1,9  
1,9  
As specified  
in QM plan  
Final electrical  
parameters (see 4.2)  
1,2,3,9,10,11 1/  
1,2,3,9, 1/  
10,11  
1,2,3,9, 2/ 3/  
10,11  
Group A test  
requirements (see 4.4)  
1,2,3,9,10,11  
1,2,3,9,10,11  
1,2,3,9,10,11  
1,2,3,9,10,11  
Group C end-point electrical  
parameters (see 4.4)  
1,2,3,9,10,11  
1,2,3,9, 3/  
10,11  
Group D end-point electrical  
parameters (see 4.4)  
1,9  
1,9  
1,9  
1,9  
1,9  
Group E end-point electrical  
parameters (see 4.4)  
1,9  
1/ PDA applies to subgroup 1.  
2/ PDA applies to subgroups 1, 9, and deltas.  
3/ Delta limits (see table IIB) shall be required and the delta values shall be computed with reference to  
the zero hour electrical parameters (see table I).  
TABLE IIB. Burn-in delta parameters (+25°C).  
Parameters  
Input current, nominal  
Symbol  
Delta limits  
±100 µA  
I
CC  
Input current, low  
±1.0 µA  
I
IL  
4.4.1 Group A inspection.  
a. Tests shall be as specified in table IIA herein.  
b. Subgroups 4, 5, 6, 7 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted.  
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.  
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:  
a. Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level  
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify  
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method  
1005 of MIL-STD-883.  
b. TA = +125°C, minimum.  
c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
14  
DSCC FORM 2234  
APR 97  
4.4.2.2 Additional criteria for device classes Q, T and V. The steady-state life test duration, test condition and test  
temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-  
38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in  
accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test  
circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in  
test method 1005 of MIL-STD-883.  
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.  
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness  
assured (see 3.5 herein). RHA levels for device classes M, Q and V shall be as specified in MIL-PRF-38535. End-point  
electrical parameters shall be as specified in table IIA herein. For device class T, the RHA requirements shall be in accordance  
with the Class T Radiation Requirements of MIL-PRF-38535. The end-point electrical parameters for device class T shall be as  
specified in Table I, Group A subgroups, or as modified in the QM plan.  
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883  
method 1019, condition A and as specified herein. For device class T, the total dose requirements shall be in accordance with  
the class T radiation requirements of MIL-PRF-38535.  
4.4.4.1.1 Accelerated aging test. Accelerated aging tests shall be performed on all devices requiring a RHA level greater  
than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be the  
pre-irradiation end-point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and after any  
design or process changes which may affect the RHA response of the device.  
4.4.4.2 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with test  
method 1020 of MIL-STD-883 and as specified herein (see 1.5 herein). Tests shall be performed on devices, SEC, or approved  
test structures at technology qualification and after any design or process changes which may effect the RHA capability of the  
process.  
4.4.4.3 Single event phenomena (SEP). When specified in the purchase order or contract SEP testing shall be required on  
class T and V devices (see 1.5 herein). SEP testing shall be performed on a technology process on the Standard Evaluation  
Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or  
process changes which may affect the upset or latchup characteristics. The recommended test conditions for SEP are as  
follows:  
a. The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive  
(i.e. 0° ≤ angle 60°). No shadowing of the ion beam due to fixturing or package related effects is allowed.  
6
2
b. The fluence shall be 100 errors or 10 ions/cm .  
2
5
2
c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by  
measuring the cross-section at two flux rates which differ by at least an order of magnitude.  
d. The particle range shall be 20 micron in silicon.  
e. The test temperature shall be +25°C and the maximum rated operating temperature ±10°C.  
f. Bias conditions shall be defined by the manufacturer for the latchup measurements.  
g. Test four devices with zero failures.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
15  
DSCC FORM 2234  
APR 97  
5. PACKAGING  
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device  
classes Q, T and V or MIL-PRF-38535, appendix A for device class M.  
6. NOTES  
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications  
(original equipment), design applications, and logistics purposes.  
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor  
prepared specification or drawing.  
6.1.2 Substitutability. Device class Q devices will replace device class M devices.  
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for  
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.  
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system  
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users  
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering  
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.  
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone  
(614) 692-0547.  
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in  
MIL-PRF-38535 and MIL-HDBK-1331.  
6.6 Sources of supply.  
6.6.1 Sources of supply for device classes Q, T and V. Sources of supply for device classes Q, T and V are listed in  
QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and  
have agreed to this drawing.  
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.  
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been  
submitted to and accepted by DSCC-VA.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
16  
DSCC FORM 2234  
APR 97  
APPENDIX A  
APPENDIX A FORMS A PART OF SMD 5062-00521  
10. SCOPE  
10.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified  
Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers  
approved QML plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices  
using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes  
consisting of military high reliability (device class Q) and space application (device Class V) are reflected in the Part or  
Identification Number (PIN). When available a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN.  
10.2 PIN. The PIN is as shown in the following example:  
5962  
F
00521  
01  
V
9
A
Federal  
stock class  
designator  
\
RHA  
designator  
(see 10.2.1)  
Device  
type  
(see 10.2.2)  
Device  
class  
designator  
(see 10.2.3)  
Die  
code  
Die  
Details  
(see 10.2.4)  
/
\/  
Drawing number  
10.2.1 RHA designator. Device classes Q and V RHA identified die shall meet the MIL-PRF-38535 specified RHA levels. A  
dash (-) indicates a non-RHA die.  
10.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:  
Device type  
01  
Generic number  
IS-1715ARH  
Circuit function  
Radiation hardened complementary switch  
field effect transistor (FET) driver  
10.2.3 Device class designator.  
Device class  
Device requirements documentation  
Q or V  
Certification and qualification to the die requirements of MIL-PRF-38535  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-00521  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
17  
DSCC FORM 2234  
APR 97  
APPENDIX A  
APPENDIX A FORMS A PART OF SMD 5962-00521  
10.2.4. Die Details. The die details designation shall be a unique letter which designates the die’s physical dimensions,  
bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each  
product and variant supplied to this appendix.  
10.2.4.1 Die physical dimensions.  
Die type  
01  
Figure number  
A-1  
10.2.4.2. Die bonding pad locations and electrical functions.  
Die type  
Figure number  
A-1  
01  
10.2.4.3. Interface materials.  
Die type  
Figure number  
A-1  
01  
10.2.4.4. Assembly related information.  
Die type  
01  
Figure number  
A-1  
10.3. Absolute maximum ratings. See paragraph 1.3 within the body of this drawing for details.  
10.4 Recommended operating conditions. See paragraph 1.4 within the body of this drawing for details.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-00521  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
18  
DSCC FORM 2234  
APR 97  
APPENDIX A  
APPENDIX A FORMS A PART OF SMD 5962-00521  
20. APPLICABLE DOCUMENTS.  
20.1 Government specifications, standards, and handbooks. Unless otherwise specified, the following specification,  
standard, and handbook of the issue listed in that issue of the Department of Defense Index of Specifications and Standards  
specified in the solicitation, form a part of this drawing to the extent specified herein.  
SPECIFICATION  
DEPARTMENT OF DEFENSE  
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.  
STANDARDS  
DEPARTMENT OF DEFENSE  
MIL-STD-883 - Test Method Standard Microcircuits.  
HANDBOOK  
DEPARTMENT OF DEFENSE  
MIL-HDBK-103 - List of Standard Microcircuit Drawings.  
(Copies of the specification, standard, and handbook required by manufacturers in connection with specific acquisition  
functions should be obtained from the contracting activity or as directed by the contracting activity).  
20.2. Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the  
text of this drawing shall take precedence.  
30. REQUIREMENTS  
30.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with  
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The  
modification in the QM plan shall not effect the form, fit or function as described herein.  
30.2 Design, construction and physical dimensions. The design, construction and physical dimensions shall be as specified  
in MIL-PRF-38535 and the manufacturer’s QM plan, for device classes Q and V and herein.  
30.2.1 Die physical dimensions. The die physical dimensions shall be as specified in 10.2.4.1 and on figure A-1.  
30.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as  
specified in 10.2.4.2 and on figure A-1.  
30.2.3 Interface materials. The interface materials for the die shall be as specified in 10.2.4.3 and on figure A-1.  
30.2.4 Assembly related information. The assembly related information shall be as specified in 10.2.4.4 and figure A-1.  
30.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as defined within paragraph 3.2.3 of the body of  
this document.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
19  
DSCC FORM 2234  
APR 97  
APPENDIX A  
APPENDIX A FORMS A PART OF SMD 5962-00521  
30.3 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the  
electrical performance characteristics and post irradiation parameter limits are as specified in table I of the body of this  
document.  
30.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient  
to make the packaged die capable of meeting the electrical performance requirements in table I.  
30.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a  
customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN  
listed in 10.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.  
30.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-  
38535 listed manufacturer in order to supply to the requirements of this drawing (see 60.4 herein). The certificate of compliance  
submitted to DSCC-VA prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer’s  
product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein.  
30.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535  
shall be provided with each lot of microcircuit die delivered to this drawing.  
40. QUALITY ASSURANCE PROVISIONS  
40.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance  
with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM  
plan shall not effect the form, fit or function as described herein.  
40.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the  
manufacturer’s QM plan. As a minimum it shall consist of:  
a) Wafer lot acceptance for Class V product using the criteria defined within MIL-STD-883 test method 5007.  
b) 100% wafer probe (see paragraph 30.4).  
c) 100% internal visual inspection to the applicable class Q or V criteria defined within MIL-STD-883 test method 2010  
or the alternate procedures allowed within MIL-STD-883 test method 5004.  
40.3 Conformance inspection.  
40.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see  
30.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of  
packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified within paragraphs 4.4.4.1,  
4.4.4.1.1, 4.4.4.2, and 4.4.4.3.  
50. DIE CARRIER  
50.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or  
as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and  
electrostatic protection.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
20  
DSCC FORM 2234  
APR 97  
APPENDIX A  
APPENDIX A FORMS A PART OF SMD 5962-00521  
60 NOTES  
60.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with  
MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications and  
logistics purposes.  
60.2 Comments. Comments on this appendix should be directed to DSCC-VA, Columbus, Ohio, 43216-5000 or telephone  
(614) 692-0536.  
60.3 Abbreviations, symbols and definitions. The abbreviations, symbols, and definitions used herein are defined within  
MIL-PRF-38535 and MIL-STD-1331.  
60.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.  
The vendors listed within QML-38535 have submitted a certificate of compliance (see 30.6 herein) to DSCC-VA and have  
agreed to this drawing.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
21  
DSCC FORM 2234  
APR 97  
APPENDIX A  
APPENDIX A FORMS A PART OF SMD 5962-00521  
Die bonding pad locations and electrical functions  
Die physical dimensions.  
Die size: 129 mils x 174 mils  
Die thickness: 19 mils ±1 mil  
Interface materials.  
Top metallization: AL, Si, Cu 16.9 kÅ ±2 kÅ  
Backside metallization: NONE (Silicon)  
Glassivation.  
Type: Phosphorus silicon glass (PSG)  
Thickness: 8.0 ±1.0 kÅ  
Substrate: Single crystal silicon  
Assembly related information.  
Substrate potential: Unbiased (DI)  
Special assembly instructions: (1.) All double size pads are double bonded.  
(2.) All pin 2 and pin 10 V  
pads are bonded to V  
for power and  
CC  
CC  
noise considerations. (These are lead-frame connected in packaged  
devices.)  
FIGURE A-1. Die bonding pad locations and electrical functions.  
SIZE  
STANDARD  
5962-00521  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
D
22  
DSCC FORM 2234  
APR 97  
STANDARD MICROCIRCUIT DRAWING BULLETIN  
DATE: 03-06-19  
Approved sources of supply for SMD 5962-00521 are listed below for immediate acquisition information only and  
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be  
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a  
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next  
dated revision of MIL-HDBK-103 and QML-38535.  
Standard  
microcircuit drawing  
PIN 1/  
Vendor  
CAGE  
number  
Vendor  
similar  
PIN 2/  
5962F0052101QXC  
5962R0052101TXC  
5962F0052101VXC  
5962F0052101V9A  
34371  
34371  
34371  
34371  
IS9-1715ARH-8  
IS9-1715ARH-T  
IS9-1715ARH-Q  
IS0-1715ARH-Q  
1/ The lead finish shown for each PIN representing a  
hermetic package is the most readily available from the  
manufacturer listed for that part. If the desired lead finish  
is not listed contact the vendor to determine its availability.  
2/ Caution. Do not use this number for item acquisition.  
Items acquired to this number may not satisfy the  
performance requirements of this drawing.  
Vendor CAGE  
number  
Vendor name  
and address  
34371  
Intersil  
2401 Palm Bay Blvd  
PO Box 883  
Melbourne, FL 32902-0883  
The information contained herein is disseminated for convenience only and the  
Government assumes no liability whatsoever for any inaccuracies in the  
information bulletin.