转到网站首页
转为中文步骤：
1、请用电脑端360浏览器打开本页地址，如您电脑未安装360浏览器，请点这里下载;
2、点击360浏览器右上角的翻译插件，如右图红圈中所示:
3、点击所弹出窗口里的右下角的按钮 “翻译当前网页”;
4、弹窗提示翻译完毕后关闭弹窗即可；
November 1988  
Revised March 2005  
74AC540  
Octal Buffer/Line Driver with 3-STATE Outputs  
General Description  
The AC540 is an octal buffer/line drivers designed to be  
employed as memory and address drivers, clock drivers  
and bus oriented transmitter/receivers.  
Features  
■ ICC and IOZ reduced by 50%  
■ 3-STATE inverting outputs  
■ Inputs and outputs opposite side of package, allowing  
easier interface to microprocessors  
These devices are similar in function to the AC240 while  
providing flow-through architecture (inputs on opposite side  
from outputs). This pinout arrangement makes these  
devices especially useful as output ports for microproces-  
sors, allowing ease of layout and greater PC board density.  
■ Output source/sink 24 mA  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC540SC  
74AC540SJ  
74AC540MTC  
74AC540PC  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Truth Table  
Inputs  
OE2  
Outputs  
OE1  
I
L
H
X
L
L
X
H
L
H
X
X
L
L
Z
Z
H
H
L
HIGH Voltage Level  
LOW Voltage Level  
X
Z
Immaterial  
High Impedance  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 2005 Fairchild Semiconductor Corporation  
Ds009966  
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 1)  
Recommended Operating  
Conditions  
Supply Voltage (VCC  
DC Input Diode Current (IIK  
VI 0.5V  
)
0.5V to 7.0V  
)
Supply Voltage (VCC  
)
2.0V to 6.0V  
0V to VCC  
20 mA  
20 mA  
Input Voltage (VI)  
VI VCC 0.5V  
Output Voltage (VO)  
0V to VCC  
DC Input Voltage (VI)  
0.5V to VCC 0.5V  
Operating Temperature (TA)  
40 C to 85 C  
125 mV/ns  
DC Output Diode Current (IOK  
VO 0.5V  
)
Minimum Input Edge Rate ( V/ t)  
20 mA  
20 mA  
V
IN from 30% to 70% of VCC  
VO VCC 0.5V  
VCC @ 3.3V, 4.5V, 5.5V  
DC Output Voltage (VO)  
DC Output Source  
0.5V to VCC 0.5V  
or Sink Current (IO)  
50 mA  
DC VCC or Ground Current  
per Output Pin (ICC or IGND  
)
50 mA  
Note 1: Absolute maximum ratings are those values beyond which damage  
to the device may occur. The databook specifications should be met, with-  
out exception, to ensure that the system design is reliable over its power  
supply, temperature, and output/input loading variables. Fairchild does not  
recommend operation of FACT circuits outside databook specifications.  
Storage Temperature (TSTG  
Junction Temperature (TJ)  
PDIP  
)
65 C to 150 C  
140 C  
DC Electrical Characteristics  
V
T
25 C  
T
A
40 C to 85 C  
CC  
A
Symbol  
Parameter  
Units  
Conditions  
(V)  
3.0  
4.5  
5.5  
3.0  
4.5  
5.5  
3.0  
4.5  
5.5  
Typ  
Guaranteed Limits  
V
V
V
Minimum HIGH Level  
Input Voltage  
1.5  
2.1  
2.1  
3.15  
3.85  
0.9  
V
0.1V  
IH  
OUT  
2.25  
2.75  
1.5  
3.15  
3.85  
0.9  
V
or V  
0.1V  
CC  
Maximum LOW Level  
Input Voltage  
V
0.1V  
0.1V  
IL  
OUT  
2.25  
2.75  
2.99  
4.49  
5.49  
1.35  
1.65  
2.9  
1.35  
1.65  
2.9  
V
V
or V  
CC  
Minimum HIGH Level  
Output Voltage  
OH  
4.4  
4.4  
I
50 A  
OUT  
5.4  
5.4  
V
V or V  
IL IH  
IN  
OH  
OH  
OH  
3.0  
4.5  
5.5  
3.0  
4.5  
5.5  
2.56  
3.86  
4.86  
0.1  
2.46  
3.76  
4.76  
0.1  
I
I
I
12 mA  
24 mA  
V
V
24 mA (Note 2)  
V
Maximum LOW Level  
Output Voltage  
0.002  
0.001  
0.001  
OL  
0.1  
0.1  
I
50  
A
OUT  
0.1  
0.1  
V
V
or V  
IH  
IN  
OL  
OL  
OL  
IL  
3.0  
4.5  
5.5  
5.5  
0.36  
0.36  
0.36  
0.1  
0.44  
0.44  
0.44  
1.0  
I
I
I
12 mA  
24 mA  
V
A
24 mA (Note 2)  
V , GND  
CC  
I
Maximum Input  
Leakage Current  
Maximum 3-STATE  
Current  
V
IN  
I
(Note 4)  
I
V (OE)  
V , V  
IL IH  
OZ  
I
5.5  
0.25  
4.0  
2.5  
A
V
V
V
V
V
V
, GND  
I
CC  
V
, GND  
O
CC  
I
I
I
Minimum Dynamic  
Output Current (Note 3)  
Maximum Quiescent  
Supply Current  
5.5  
5.5  
5.5  
75  
75  
mA  
mA  
A
1.65V Max  
3.85V Min  
OLD  
OHD  
CC  
OLD  
OHD  
IN  
40.0  
V
CC  
(Note 4)  
or GND  
Note 2: All outputs loaded; thresholds on input associated with output under test.  
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.  
Note 4: I and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V .  
CC  
IN  
CC  
www.fairchildsemi.com  
2
AC Electrical Characteristics  
V
T
25 C  
T
40 C to 85 C  
50 pF  
Min Max  
CC  
A
A
C
50 pF  
C
L
Symbol  
Parameter  
(V)  
(Note 5)  
3.3  
Units  
L
Min  
1.5  
1.5  
1.5  
1.5  
3.0  
2.0  
2.5  
2.0  
2.5  
1.5  
2.5  
1.5  
Typ  
Max  
7.5  
t
t
t
t
t
t
Propagation Delay  
5.5  
4.0  
5.0  
4.0  
8.5  
6.5  
7.5  
6.0  
8.5  
7.5  
7.0  
6.0  
1.0  
1.0  
1.0  
1.0  
2.5  
2.0  
2.0  
1.5  
1.5  
1.0  
2.0  
1.5  
8.0  
6.5  
PLH  
ns  
ns  
ns  
ns  
ns  
ns  
Data to Output  
5.0  
6.0  
Propagation Delay  
Data to Output  
3.3  
7.0  
7.5  
PHL  
PZH  
PZL  
PHZ  
PLZ  
5.0  
5.5  
6.0  
Output Enable Time  
3.3  
11.0  
8.5  
12.0  
9.5  
5.0  
Output Enable Time  
Output Disable Time  
Output Disable Time  
3.3  
10.0  
7.5  
11.0  
8.5  
5.0  
3.3  
13.0  
10.5  
10.0  
8.0  
14.0  
11.0  
11.0  
9.0  
5.0  
3.3  
5.0  
Note 5: Voltage Range 3.3 is 3.3V 0.3V  
Voltage Range 5.0 is 5.0V 0.5V  
Capacitance  
Symbol  
Parameter  
Typ  
4.5  
Units  
pF  
Conditions  
C
C
Input Capacitance  
V
V
OPEN  
5.0V  
IN  
CC  
Power Dissipation Capacitance  
30.0  
pF  
PD  
CC  
3
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Package Number M20B  
www.fairchildsemi.com  
4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
Package Number M20D  
5
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Package Number MTC20  
www.fairchildsemi.com  
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Package Number N20A  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
7
www.fairchildsemi.com