AT28C256E-20SJ--Datasheet/数据表在线中文翻译

Features

• Fast Read Access Time – 150 ns

• Automatic Page Write Operation

– Internal Address and Data Latches for 64 Bytes

– Internal Control Timer

• Fast Write Cycle Times

– Page Write Cycle Time: 3 ms or 10 ms Maximum

– 1 to 64-byte Page Write Operation

• Low Power Dissipation

256K (32K x 8)

Paged Parallel

EEPROM

– 50 mA Active Current

– 200 µA CMOS Standby Current

• Hardware and Software Data Protection

• DATA Polling for End of Write Detection

• High Reliability CMOS Technology

– Endurance: 10⁴or 10⁵Cycles

– Data Retention: 10 Years

AT28C256

• Single 5V 10% Supply

• CMOS and TTL Compatible Inputs and Outputs

• JEDEC Approved Byte-wide Pinout

• Full Military, Commercial, and Industrial Temperature Ranges

• Green (Pb/Halide-free) Packaging Option

1. Description

The AT28C256 is a high-performance electrically erasable and programmable read-

only memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-

tured with Atmel’s advanced nonvolatile CMOS technology, the device offers access

times to 150 ns with power dissipation of just 440 mW. When the device is deselected,

the CMOS standby current is less than 200 µA.

The AT28C256 is accessed like a Static RAM for the read or write cycle without the

need for external components. The device contains a 64-byte page register to allow

writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to

64 bytes of data are internally latched, freeing the address and data bus for other

operations. Following the initiation of a write cycle, the device will automatically write

the latched data using an internal control timer. The end of a write cycle can be

detected by DATA Polling of I/O7. Once the end of a write cycle has been detected a

new access for a read or write can begin.

Atmel’s AT28C256 has additional features to ensure high quality and manufacturabil-

ity. The device utilizes internal error correction for extended endurance and improved

data retention characteristics. An optional software data protection mechanism is

available to guard against inadvertent writes. The device also includes an extra

64 bytes of EEPROM for device identification or tracking.

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2. Pin Configurations

Pin Name

A0 - A14

CE

Function

Addresses

Chip Enable

Output Enable

Write Enable

Data Inputs/Outputs

No Connect

OE

WE

I/O0 - I/O7

NC

DC

Don’t Connect

2.3

32-pad LCC, 28-lead PLCC Top View

2.1

28-lead TSOP Top View

OE

1

28

27

26

25

24

23

22

21

20

19

18

17

16

15

A10

A11

A9

2

CE

A6

A5

A4

A3

A2

5

6

7

8

9

29 A8

28 A9

27 A11

26 NC

25 OE

24 A10

23 CE

22 I/O7

21 I/O6

3

I/O7

I/O6

I/O5

I/O4

I/O3

GND

I/O2

I/O1

I/O0

A0

A8

4

A13

WE

VCC

A14

A12

A7

5

6

7

A1 10

A0 11

8

9

NC 12

I/O0 13

10

11

12

13

14

A6

A5

A4

A1

A3

A2

Note:

PLCC package pins 1 and 17 are Don’t Connect.

2.4

28-lead Cerdip/PDIP/Flatpack/SOIC –

Top View

2.2

28-lead PGA Top View

A14

A12

A7

1

28

27

26

25

24

23

22

21

20

19

18

17

16

15

VCC

WE

A13

A8

2

3

A6

4

A5

5

A9

A4

6

A11

OE

A3

7

A2

8

A10

CE

A1

9

A0

10

11

12

13

14

I/O7

I/O6

I/O5

I/O4

I/O3

I/O0

I/O1

I/O2

GND

2

AT28C256

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AT28C256

3. Block Diagram

4. Device Operation

4.1

Read

The AT28C256 is accessed like a Static RAM. When CE and OE are low and WE is high, the

data stored at the memory location determined by the address pins is asserted on the outputs.

The outputs are put in the high impedance state when either CE or OE is high. This dual-line

control gives designers flexibility in preventing bus contention in their system.

4.2

Byte Write

A low pulse on the WE or CE input with CE or WE low (respectively) and OE high initiates a write

cycle. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is

latched by the first rising edge of CE or WE. Once a byte write has been started it will automati-

cally time itself to completion. Once a programming operation has been initiated and for the

duration of t_WC, a read operation will effectively be a polling operation.

4.3

Page Write

The page write operation of the AT28C256 allows 1 to 64 bytes of data to be written into the

device during a single internal programming period. A page write operation is initiated in the

same manner as a byte write; the first byte written can then be followed by 1 to 63 additional

bytes. Each successive byte must be written within 150 µs (t_BLC) of the previous byte. If the t_BLC

limit is exceeded the AT28C256 will cease accepting data and commence the internal program-

ming operation. All bytes during a page write operation must reside on the same page as

defined by the state of the A6 - A14 inputs. For each WE high to low transition during the page

write operation, A6 - A14 must be the same.

The A0 to A5 inputs are used to specify which bytes within the page are to be written. The bytes

may be loaded in any order and may be altered within the same load period. Only bytes which

are specified for writing will be written; unnecessary cycling of other bytes within the page does

not occur.

4.4

DATA Polling

The AT28C256 features DATA Polling to indicate the end of a write cycle. During a byte or page

write cycle an attempted read of the last byte written will result in the complement of the written

data to be presented on I/O7. Once the write cycle has been completed, true data is valid on all

outputs, and the next write cycle may begin. DATA Polling may begin at anytime during the write

cycle.

3

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4.5

Toggle Bit

In addition to DATA Polling the AT28C256 provides another method for determining the end of a

write cycle. During the write operation, successive attempts to read data from the device will

result in I/O6 toggling between one and zero. Once the write has completed, I/O6 will stop tog-

gling and valid data will be read. Reading the toggle bit may begin at any time during the write

cycle.

4.6

Data Protection

If precautions are not taken, inadvertent writes may occur during transitions of the host system

power supply. Atmel has incorporated both hardware and software features that will protect the

memory against inadvertent writes.

4.6.1

Hardware Protection

Hardware features protect against inadvertent writes to the AT28C256 in the following ways: (a)

_CCsense – if V_CCis below 3.8V (typical) the write function is inhibited; (b) V_CCpower-on delay –

V

once V_CChas reached 3.8V the device will automatically time out 5 ms (typical) before allowing

a write; (c) write inhibit – holding any one of OE low, CE high or WE high inhibits write cycles;

and (d) noise filter – pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a

write cycle.

4.6.2

Software Data Protection

A software controlled data protection feature has been implemented on the AT28C256. When

enabled, the software data protection (SDP), will prevent inadvertent writes. The SDP feature

may be enabled or disabled by the user; the AT28C256 is shipped from Atmel with SDP

disabled.

SDP is enabled by the host system issuing a series of three write commands; three specific

bytes of data are written to three specific addresses (refer to “Software Data Protection” algo-

rithm). After writing the 3-byte command sequence and after t_WCthe entire AT28C256 will be

protected against inadvertent write operations. It should be noted, that once protected the host

may still perform a byte or page write to the AT28C256. This is done by preceding the data to be

written by the same 3-byte command sequence used to enable SDP.

Once set, SDP will remain active unless the disable command sequence is issued. Power transi-

tions do not disable SDP and SDP will protect the AT28C256 during power-up and power-down

conditions. All command sequences must conform to the page write timing specifications. The

data in the enable and disable command sequences is not written to the device and the memory

addresses used in the sequence may be written with data in either a byte or page write

operation.

After setting SDP, any attempt to write to the device without the 3-byte command sequence will

start the internal write timers. No data will be written to the device; however, for the duration of

t_WC, read operations will effectively be polling operations.

4.7

Device Identification

An extra 64 bytes of EEPROM memory are available to the user for device identification. By rais-

ing A9 to 12V 0.5V and using address locations 7FC0H to 7FFFH the additional bytes may be

written to or read from in the same manner as the regular memory array.

4.8

Optional Chip Erase Mode

The entire device can be erased using a 6-byte software code. Please see “Software Chip

Erase” application note for details.

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AT28C256

5. DC and AC Operating Range

AT28C256-15

AT28C256-20

0°C - 70°C

AT28C256-25

0°C - 70°C

AT28C256-35

Com.

Ind.

0°C - 70°C

-40°C - 85°C

-55°C - 125°C

5V 10%

Operating Temperature

(Case)

-40°C - 85°C

-55°C - 125°C

5V 10%

-40°C - 85°C

-55°C - 125°C

5V 10%

Mil.

-55°C - 125°C

5V 10%

V_CCPower Supply

6. Operating Modes

Mode

CE

V_IL

V_IH

X

OE

V_IL

V_IH

X⁽¹⁾

X

WE

V_IH

V_IL

X

I/O

D_OUT

D_IN

Read

Write⁽²⁾

Standby/Write Inhibit

Write Inhibit

Output Disable

High Z

V_IH

X

V_IL

V_IH

X

High Z

(3)

Chip Erase

V_IL

V_H

V_IL

Notes: 1. X can be V_ILor V_IH.

2. Refer to AC programming waveforms.

3. V_H= 12.0V 0.5V.

7. Absolute Maximum Ratings*

*NOTICE:

Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-

age to the device. This is a stress rating only and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect

device reliability

Temperature under Bias ................................ -55°C to +125°C

Storage Temperature..................................... -65°C to +150°C

All Input Voltages

(including NC Pins)

with Respect to Ground...................................-0.6V to +6.25V

All Output Voltages

with Respect to Ground.............................-0.6V to V_CC+ 0.6V

Voltage on OE and A9

with Respect to Ground...................................-0.6V to +13.5V

8. DC Characteristics

Symbol

Parameter

Condition

Min

Max

10

Units

µA

mA

V

I_LI

Input Load Current

Output Leakage Current

V_IN= 0V to V_CC+ 1V

V_I/O= 0V to V_CC

I_LO

10

Com., Ind.

Mil.

200

300

3

I_SB1

V_CCStandby Current CMOS

CE = V_CC- 0.3V to V_CC+ 1V

I_SB2

I_CC

V_CCStandby Current TTL

V_CCActive Current

Input Low Voltage

CE = 2.0V to V_CC+ 1V

f = 5 MHz; I_OUT= 0 mA

50

V_IL

0.8

V_IH

V_OL

V_OH

Input High Voltage

Output Low Voltage

Output High Voltage

2.0

2.4

V

I_OL= 2.1 mA

I_OH= -400 µA

0.45

V

5

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9. AC Read Characteristics

AT28C256-15

AT28C256-20

AT28C256-25

AT28C256-35

Symbol

Parameter

Min

Max

150

70

Min

Max

200

80

Min

Max

250

100

60

Min

Max

350

100

70

Units

ns

t_ACC

Address to Output Delay

CE to Output Delay

OE to Output Delay

CE or OE to Output Float

(1)

t_CE

ns

(2)

t_OE

0

ns

(3)(4)

t_DF

50

55

ns

Output Hold from OE, CE or

Address, whichever occurred

first

t_OH

0

ns

10. AC Read Waveforms^(1)(2)(3)(4)

Notes: 1. CE may be delayed up to t_ACC- t_CEafter the address transition without impact on t_ACC

2. OE may be delayed up to t_CE- t_OEafter the falling edge of CE without impact on t_CEor by t_ACC- t_OEafter an address change

without impact on t_ACC

.

3. t_DFis specified from OE or CE whichever occurs first (C_L= 5 pF).

4. This parameter is characterized and is not 100% tested.

6

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AT28C256

11. Input Test Waveforms and Measurement Level

t_R, t_F< 5 ns

12. Output Test Load

13. Pin Capacitance

f = 1 MHz, T = 25°C⁽¹⁾

Symbol

C_IN

Typ

4

Max

6

Units

pF

Conditions

V_IN= 0V

C_OUT

8

12

pF

V_OUT= 0V

Note:

1. This parameter is characterized and is not 100% tested.

7

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14. AC Write Characteristics

Symbol

Parameter

Min

0

Max

Units

ns

t

_AS, t_OES

Address, OE Setup Time

Address Hold Time

Chip Select Setup Time

Chip Select Hold Time

Write Pulse Width (WE or CE)

Data Setup Time

t_AH

t_CS

t_CH

t_WP

t_DS

50

0

ns

0

ns

100

50

0

ns

t

_DH, t_OEH

Data, OE Hold Time

Time to Data Valid

ns

t_DV

NR⁽¹⁾

Note:

1. NR = No Restriction

15. AC Write Waveforms

15.1 WE Controlled

15.2 CE Controlled

8

AT28C256

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AT28C256

16. Page Mode Characteristics

Symbol

Parameter

Min

Max

10

3

Units

ms

ns

AT28C256

t_WC

Write Cycle Time (option available)

AT28C256F

t_AS

Address Setup Time

Address Hold Time

Data Setup Time

0

50

0

t_AH

ns

t_DS

ns

t_DH

Data Hold Time

ns

t_WP

t_BLC

t_WPH

Write Pulse Width

Byte Load Cycle Time

Write Pulse Width High

100

ns

150

µs

50

ns

17. Page Mode Write Waveforms⁽¹⁾⁽²⁾

Notes: 1. A6 through A14 must specify the same page address during each high to low transition of WE (or CE).

2. OE must be high only when WE and CE are both low.

18. Chip Erase Waveforms

t_S= t_H= 5 µsec (min.)

t_W= 10 msec (min.)

V_H= 12.0V 0.5V

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19. Software Data Protection

Enable Algorithm⁽¹⁾

20. Software Data Protection

Disable Algorithm⁽¹⁾

LOAD DATA AA

TO

ADDRESS 5555

LOAD DATA 55

TO

LOAD DATA 55

TO

ADDRESS 2AAA

LOAD DATA 80

TO

LOAD DATA A0

TO

ADDRESS 5555

WRITES ENABLED⁽²⁾

LOAD DATA AA

TO

LOAD DATA XX

TO

ANY ADDRESS⁽⁴⁾

ADDRESS 5555

LOAD DATA 55

TO

LOAD LAST BYTE

TO

ADDRESS 2AAA

LAST ADDRESS

ENTER DATA

PROTECT STATE

LOAD DATA 20

TO

Notes: 1. Data Format: I/O7 - I/O0 (Hex);

Address Format: A14 - A0 (Hex).

ADDRESS 5555

EXIT DATA

PROTECT STATE⁽³⁾

2. Write Protect state will be activated at end of write

even if no other data is loaded.

LOAD DATA XX

TO

ANY ADDRESS⁽⁴⁾

3. Write Protect state will be deactivated at end of write

period even if no other data is loaded.

4. 1 to 64 bytes of data are loaded.

LOAD LAST BYTE

TO

LAST ADDRESS

21. Software Protected Write Cycle Waveforms⁽¹⁾⁽²⁾

Notes: 1. A6 through A14 must specify the same page address during each high to low transition of WE (or CE) after the software

code has been entered.

2. OE must be high only when WE and CE are both low.

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AT28C256

22. Data Polling Characteristics⁽¹⁾

Symbol

Parameter

Min

0

Typ

Max

Units

ns

t_DH

Data Hold Time

t_OEH

t_OE

OE Hold Time

0

ns

OE to Output Delay⁽²⁾

Write Recovery Time

ns

t_WR

0

ns

Notes: 1. These parameters are characterized and not 100% tested.

2. See“AC Read Characteristics” on page 6.

23. Data Polling Waveforms

24. Toggle Bit Characteristics⁽¹⁾

Symbol

Parameter

Min

10

Typ

Max

Units

ns

t_DH

Data Hold Time

t_OEH

t_OE

t_OEHP

t_WR

OE Hold Time

10

ns

OE to Output Delay⁽²⁾

OE High Pulse

ns

150

0

ns

Write Recovery Time

ns

Notes: 1. These parameters are characterized and not 100% tested.

2. See “AC Read Characteristics” on page 6.

25. Toggle Bit Waveforms^(1)(2)(3)

Notes: 1. Toggling either OE or CE or both OE and CE will operate toggle bit.

2. Beginning and ending state of I/O6 will vary.

3. Any address location may be used but the address should not vary.

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26. Normalized I_CCGraphs

12

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AT28C256

27. Ordering Information⁽²⁾

27.1 Standard Package

I

_CC(mA)

t_ACC

(ns)

Active

Standby

Ordering Code

Package

Operation Range

150

50

0.2

AT28C256(E,F)-15JC

AT28C256(E,F)-15PC

AT28C256(E,F)-15SC

AT28C256(E,F)-15TC

32J

Commercial

28P6

28S

28T

(0°C to 70°C)

AT28C256(E,F)-15JI

AT28C256(E,F)-15PI

AT28C256(E,F)-15SI

AT28C256(E,F)-15TI

32J

Industrial

28P6

28S

28T

(-40°C to 85°C)

50

0.3

0.2

AT28C256(E,F)-15DM/883

AT28C256(E,F)-15FM/883

AT28C256(E,F)-15LM/883

AT28C256(E,F)-15UM/883

28D6

28F

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

32L

28U

200

AT28C256(E,F)-20JC

AT28C256(E,F)-20PC

AT28C256(E,F)-20SC

AT28C256(E,F)-20TC

32J

Commercial

28P6

28S

28T

(0°C to 70°C)

AT28C256(E,F)-20JI

AT28C256(E,F)-20PI

AT28C256(E,F)-20SI

AT28C256(E,F)-20TI

32J

Industrial

28P6

28S

28T

(-40°C to 85°C)

50

0.3

AT28C256(E,F)-20DM/883

AT28C256(E,F)-20FM/883

AT28C256(E,F)-20LM/883

AT28C256(E,F)-20UM/883

28D6

28F

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

32L

28U

Package Type

28D6

28-lead, 0.600" Wide, Non-windowed, Ceramic Dual Inline Package (Cerdip)

28-lead, Non-windowed, Ceramic Bottom-brazed Flat Package (Flatpack)

32-lead, Plastic J-leaded Chip Carrier (PLCC)

32-pad, Non-windowed, Ceramic Leadless Chip Carrier (LCC)

28-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)

28-lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC)

28-lead, Plastic Thin Small Outline Package (TSOP)

28-pin, Ceramic Pin Grid Array (PGA)

28F

32J

32L

28P6

28S

28T

28U

W

Die

Options

Blank

Standard Device: Endurance = 10K Write Cycles; Write Time = 10 ms

High Endurance Option: Endurance = 100K Write Cycles

Fast Write Option: Write Time = 3 ms

E

F

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27.1 Standard Package (Continued)

I

_CC(mA)

t_ACC

(ns)

Active

Standby

Ordering Code

Package

Operation Range

250

50

0.2

AT28C256(E,F)-25JC

AT28C256(E,F)-25PC

AT28C256-W

32J

Commercial

28P6

DIE

(0°C to 70°C)

AT28C256(E,F)-25JI

AT28C256(E,F)-25PI

32J

Industrial

28P6

(-40°C to 85°C)

50

0.3

AT28C256(E,F)-25DM/883

AT28C256(E,F)-25FM/883

AT28C256(E,F)-25LM/883

AT28C256(E,F)-25UM/883

AT28C256(E,F)-35UM/883

28D6

28F

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28U

150⁽³⁾

5962-88525 16 UX

5962-88525 16 XX

5962-88525 16 YX

5962-88525 16 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 15 UX

5962-88525 15 XX

5962-88525 15 YX

5962-88525 15 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 14 UX

5962-88525 14 XX

5962-88525 14 YX

5962-88525 14 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

Package Type

28D6

28-lead, 0.600" Wide, Non-windowed, Ceramic Dual Inline Package (Cerdip)

28-lead, Non-windowed, Ceramic Bottom-brazed Flat Package (Flatpack)

32-lead, Plastic J-leaded Chip Carrier (PLCC)

32-pad, Non-windowed, Ceramic Leadless Chip Carrier (LCC)

28-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)

28-pin, Ceramic Pin Grid Array (PGA)

28F

32J

32L

28P6

28U

W

Die

Options

Blank

Standard Device: Endurance = 10K Write Cycles; Write Time = 10 ms

High Endurance Option: Endurance = 100K Write Cycles

Fast Write Option: Write Time = 3 ms

E

F

14

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AT28C256

27.1 Standard Package (Continued)

I

_CC(mA)

t_ACC

(ns)

Active

Standby

Ordering Code

Package

Operation Range

150⁽³⁾

50

0.3

5962-88525 08 UX

5962-88525 08 XX

5962-88525 08 YX

5962-88525 08 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 07 UX

5962-88525 07 XX

5962-88525 07 YX

5962-88525 07 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 06 UX

5962-88525 06 XX

5962-88525 06 YX

5962-88525 06 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

200⁽³⁾

50

0.3

5962-88525 12 UX

5962-88525 12 XX

5962-88525 12 YX

5962-88525 12 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 04 UX

5962-88525 04 XX

5962-88525 04 YX

5962-88525 04 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

250⁽³⁾

5962-88525 13 UX

5962-88525 13 XX

5962-88525 13 YX

5962-88525 13 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 11 UX

5962-88525 11 XX

5962-88525 11 YX

5962-88525 11 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

Package Type

28D6

28-lead, 0.600" Wide, Non-windowed, Ceramic Dual Inline Package (Cerdip)

28-lead, Non-windowed, Ceramic Bottom-brazed Flat Package (Flatpack)

32-pad, Non-windowed, Ceramic Leadless Chip Carrier (LCC)

28-pin, Ceramic Pin Grid Array (PGA)

28F

32L

28U

W

Die

Options

Blank

Standard Device: Endurance = 10K Write Cycles; Write Time = 10 ms

High Endurance Option: Endurance = 100K Write Cycles

Fast Write Option: Write Time = 3 ms

E

F

15

0006I–PEEPR–4/05

27.1 Standard Package (Continued)

I

_CC(mA)

t_ACC

(ns)

Active

Standby

Ordering Code

Package

Operation Range

250

300

350

50

0.3

5962-88525 05 UX

5962-88525 05 XX

5962-88525 05 YX

5962-88525 05 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 03 UX

5962-88525 03 XX

5962-88525 03 YX

5962-88525 03 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

50

0.3

5962-88525 10 UX

5962-88525 10 XX

5962-88525 10 YX

5962-88525 10 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 02 UX

5962-88525 02 XX

5962-88525 02 YX

5962-88525 02 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 09 UX

5962-88525 09 XX

5962-88525 09 YX

5962-88525 09 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

5962-88525 01 UX

5962-88525 01 XX

5962-88525 01 YX

5962-88525 01 ZX

28U

28D6

32L

Military/883C

Class B, Fully Compliant

(-55°C to 125°C)

28F

Notes: 1. Electrical specifications for these speeds are defined by Standard Microcircuit Drawing 5962-88525.

2. See “Valid Part Numbers” on page 18.

3. SMD specifies Software Data Protection feature for device type, although Atmel product supplied to every device type in the

SMD is 100% tested for this feature.

Package Type

28D6

28F

32L

28U

W

28-lead, 0.600" Wide, Non-windowed, Ceramic Dual Inline Package (Cerdip)

28-lead, Non-windowed, Ceramic Bottom-brazed Flat Package (Flatpack)

32-pad, Non-windowed, Ceramic Leadless Chip Carrier (LCC)

28-pin, Ceramic Pin Grid Array (PGA)

Die

Options

Blank

Standard Device: Endurance = 10K Write Cycles; Write Time = 10 ms

High Endurance Option: Endurance = 100K Write Cycles

Fast Write Option: Write Time = 3 ms

E

F

16

AT28C256

0006I–PEEPR–4/05

AT28C256

27.2 Green Package Option (Pb/Halide-free)

I

_CC(mA)

t_ACC

(ns)

Active

Standby

Ordering Code

Package

Operation Range

150

50

0.2

AT28C256(F)-15JU

AT28C256(F)-15PU

AT28C256(F)-15SU

AT28C256(F)-15TU

32J

Industrial

28P6

28S

28T

(-40°C to 85°C)

Package Type

32J

32-lead, Plastic J-leaded Chip Carrier (PLCC)

28-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)

28-lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC)

28-lead, Plastic Thin Small Outline Package (TSOP)

Options

28P6

28S

28T

Blank

F

Standard Device: Endurance = 10K Write Cycles; Write Time = 10 ms

Fast Write Option: Write Time = 3 ms

17

0006I–PEEPR–4/05

28. Valid Part Numbers

The following table lists standard and green Atmel products that can be ordered.

Device Numbers

AT28C256

Speed

15

Package and Temperature Combinations

JC, JI, JU, PC, PI, PU, SC, SI, SU, TC, TI, TU, DM/883, FM/883, LM/883, UM/883

JC, JI, PC, PI, SC, SI, TC, TI, DM/883, FM/883, LM/883, UM/883

JC, JI, JU, PC, PI, PU, SC, SI, SU, TC, TI, TU, DM/883, FM/883, LM/883, UM/883

JC, JI, PC, PI, SC, SI, TC, TI, DM/883, FM/883, LM/883, UM/883

W

AT28C256E

AT28C256F

AT28C256

15

20

AT28C256E

AT28C256F

AT28C256

20

25

AT28C256E

AT28C256F

AT28C256

25

–

29. Die Products

Reference Section: Parallel EEPROM Die Products

18

AT28C256

0006I–PEEPR–4/05

AT28C256

Packaging Information

29.1 28D6 – Cerdip

Dimensions in Millimeters and (Inches).

Controlling dimension: Inches.

MIL-STD 1835 D-10 Config A (Glass Sealed)

37.85(1.490)

36.58(1.440)

1

15.49(0.610)

12.95(0.510)

33.02(1.300) REF

5.72(0.225)

MAX

0.127(0.005)MIN

SEATING

PLANE

1.52(0.060)

0.38(0.015)

0.66(0.026)

0.36(0.014)

5.08(0.200)

3.18(0.125)

1.65(0.065)

1.14(0.045)

2.54(0.100)BSC

15.70(0.620)

15.00(0.590)

0º~ 15º REF

0.46(0.018)

0.20(0.008)

17.80(0.700) MAX

10/23/03

TITLE

DRAWING NO. REV.

2325 Orchard Parkway

San Jose, CA 95131

28D6, 28-lead, 0.600" Wide, Non-windowed,

Ceramic Dual Inline Package (Cerdip)

28D6

B

R

19

0006I–PEEPR–4/05

29.2 28F – Flatpack

Dimensions in Millimeters and (Inches).

Controlling dimension: Inches.

MIL-STD 1835 F-12 Config B

9.40(0.370)

6.35(0.250)

PIN #1 ID

0.56(0.022)

0.38(0.015)

1.27(0.050) BSC

18.49(0.728)

18.08(0.712)

1.14(0.045) MAX

10.57(0.416)

9.75(0.384)

0.23(0.009)

0.10(0.004)

3.02(0.119)

2.29(0.090)

1.96(0.077)

1.09(0.043)

1.14(0.045)

7.26(0.286)

6.96(0.274)

0.660(0.026)

10/21/03

DRAWING NO. REV.

TITLE

2325 Orchard Parkway

San Jose, CA 95131

28F, 28-lead, Non-windowed, Ceramic Bottom-brazed

Flat Package (FlatPack)

28F

B

R

20

AT28C256

0006I–PEEPR–4/05

AT28C256

29.3 32J – PLCC

1.14(0.045) X 45˚

PIN NO. 1

IDENTIFIER

1.14(0.045) X 45˚

0.318(0.0125)

0.191(0.0075)

E2

E1

E

B1

B

e

A2

A1

D1

D

A

0.51(0.020)MAX

45˚ MAX (3X)

COMMON DIMENSIONS

(Unit of Measure = mm)

MIN

3.175

1.524

0.381

12.319

11.354

9.906

14.859

13.894

12.471

0.660

0.330

MAX

3.556

2.413

–

NOM

NOTE

SYMBOL

A

–

D2

A1

A2

D

–

12.573

D1

D2

E

–

11.506 Note 2

10.922

–

Notes:

1. This package conforms to JEDEC reference MS-016, Variation AE.

2. Dimensions D1 and E1 do not include mold protrusion.

Allowable protrusion is .010"(0.254 mm) per side. Dimension D1

and E1 include mold mismatch and are measured at the extreme

material condition at the upper or lower parting line.

–

15.113

E1

E2

B

–

14.046 Note 2

13.487

–

0.813

3. Lead coplanarity is 0.004" (0.102 mm) maximum.

B1

e

0.533

1.270 TYP

10/04/01

TITLE

DRAWING NO.

REV.

2325 Orchard Parkway

San Jose, CA 95131

32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)

32J

B

R

21

0006I–PEEPR–4/05

29.4 32L – LCC

Dimensions in Millimeters and (Inches).

Controlling dimension: Inches.

MIL-STD 1835 C-12

11.63(0.458)

11.23(0.442)

2.54(0.100)

2.16(0.085)

14.22(0.560)

13.72(0.540)

1.91(0.075)

1.40(0.055)

PIN 1

1.40(0.055)

1.14(0.045)

INDEX CORNER

2.41(0.095)

1.91(0.075)

0.635(0.025)

X 45˚

0.381(0.015)

0.305(0.012)

0.178(0.007)

RADIUS

10.16(0.400) BSC

0.737(0.029)

0.533(0.021)

1.27(0.050) TYP

1.02(0.040) X 45˚

2.16(0.085)

1.65(0.065)

7.62(0.300) BSC

10/21/03

TITLE

DRAWING NO. REV.

2325 Orchard Parkway

San Jose, CA 95131

32L, 32-pad, Non-windowed, Ceramic Lid, Leadless Chip

Carrier (LCC)

32L

B

R

22

AT28C256

0006I–PEEPR–4/05

AT28C256

29.5 28P6 – PDIP

D

1

E1

A

SEATING PLANE

A1

L

B

B1

e

E

COMMON DIMENSIONS

(Unit of Measure = mm)

0º ~ 15º REF

C

MIN

–

MAX

4.826

–

NOM

NOTE

SYMBOL

A

–

eB

A1

D

0.381

36.703

15.240

13.462

0.356

1.041

3.048

0.203

15.494

–

37.338 Note 2

15.875

E

–

E1

B

–

13.970 Note 2

0.559

–

B1

L

–

1.651

Notes:

1. This package conforms to JEDEC reference MS-011, Variation AB.

2. Dimensions D and E1 do not include mold Flash or Protrusion.

Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").

–

3.556

C

–

0.381

eB

e

17.526

2.540 TYP

09/28/01

DRAWING NO. REV.

28P6

TITLE

2325 Orchard Parkway

San Jose, CA 95131

28P6, 28-lead (0.600"/15.24 mm Wide) Plastic Dual

Inline Package (PDIP)

B

R

23

0006I–PEEPR–4/05

29.6 28S – SOIC

Dimensions in Millimeters and (Inches).

Controlling dimension: Millimeters.

0.51(0.020)

0.33(0.013)

7.60(0.2992)

7.40(0.2914)

10.65(0.419)

10.00(0.394)

PIN 1

1.27(0.50) BSC

TOP VIEW

18.10(0.7125)

17.70(0.6969)

2.65(0.1043)

2.35(0.0926)

0.30(0.0118)

0.10(0.0040)

SIDE VIEWS

0.32(0.0125)

0.23(0.0091)

0º ~ 8º

1.27(0.050)

0.40(0.016)

8/4/03

TITLE

DRAWING NO. REV.

2325 Orchard Parkway

San Jose, CA 95131

28S, 28-lead, 0.300" Body, Plastic Gull Wing Small Outline (SOIC)

JEDEC Standard MS-013

28S

B

R

24

AT28C256

0006I–PEEPR–4/05

AT28C256

29.7 28T – TSOP

PIN 1

0º ~ 5º

c

Pin 1 Identifier Area

D1

D

L

b

L1

e

A2

E

GAGE PLANE

A

SEATING PLANE

COMMON DIMENSIONS

(Unit of Measure = mm)

A1

MIN

–

MAX

1.20

0.15

1.05

13.60

NOM

–

NOTE

SYMBOL

A

A1

A2

D

0.05

0.90

13.20

11.70

7.90

0.50

–

1.00

Notes:

1. This package conforms to JEDEC reference MO-183.

2. Dimensions D1 and E do not include mold protrusion. Allowable

protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.

3. Lead coplanarity is 0.10 mm maximum.

13.40

11.80

8.00

D1

E

11.90 Note 2

8.10

0.70

Note 2

L

0.60

L1

b

0.25 BASIC

0.22

0.17

0.10

0.27

0.21

c

–

e

0.55 BASIC

12/06/02

DRAWING NO. REV.

28T

TITLE

2325 Orchard Parkway

San Jose, CA 95131

28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline

Package, Type I (TSOP)

C

R

25

0006I–PEEPR–4/05

29.8 28U – PGA

Dimensions in Millimeters and (Inches).

Controlling dimension: Inches.

7.26(0.286)

6.50(0.256)

13.74(0.540)

13.36(0.526)

2.57(0.101)

2.06(0.081)

1.40(0.055)

1.14(0.045)

0.58(0.023)

0.43(0.017)

15.24(0.600)

14.88(0.586)

3.12(0.123)

2.62(0.103)

1.83(0.072)

1.57(0.062)

14.17(0.558)

13.77(0.542)

2.54(0.100) TYP

16.71(0.658)

16.31(0.642)

12.70(0.500) TYP

2.54(0.100) TYP

10.41(0.410)

9.91(0.390)

10/21/03

TITLE

DRAWING NO. REV.

2325 Orchard Parkway

San Jose, CA 95131

28U, 28-pin, Ceramic Pin Grid Array (PGA)

28U

B

R

26

AT28C256

0006I–PEEPR–4/05

Atmel Corporation

Atmel Operations

2325 Orchard Parkway

San Jose, CA 95131, USA

Tel: 1(408) 441-0311

Fax: 1(408) 487-2600

Memory

RF/Automotive

Theresienstrasse 2

Postfach 3535

74025 Heilbronn, Germany

Tel: (49) 71-31-67-0

Fax: (49) 71-31-67-2340

2325 Orchard Parkway

San Jose, CA 95131, USA

Tel: 1(408) 441-0311

Fax: 1(408) 436-4314

Regional Headquarters

Microcontrollers

2325 Orchard Parkway

San Jose, CA 95131, USA

Tel: 1(408) 441-0311

Fax: 1(408) 436-4314

1150 East Cheyenne Mtn. Blvd.

Colorado Springs, CO 80906, USA

Tel: 1(719) 576-3300

Europe

Atmel Sarl

Route des Arsenaux 41

Case Postale 80

CH-1705 Fribourg

Switzerland

Tel: (41) 26-426-5555

Fax: (41) 26-426-5500

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Tel: (33) 2-40-18-18-18

Fax: (33) 2-40-18-19-60

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38521 Saint-Egreve Cedex, France

Tel: (33) 4-76-58-30-00

Fax: (33) 4-76-58-34-80

Asia

Room 1219

Chinachem Golden Plaza

77 Mody Road Tsimshatsui

East Kowloon

Hong Kong

Tel: (852) 2721-9778

Fax: (852) 2722-1369

ASIC/ASSP/Smart Cards

Zone Industrielle

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Tel: (33) 4-42-53-60-00

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9F, Tonetsu Shinkawa Bldg.

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Chuo-ku, Tokyo 104-0033

Japan

Tel: (81) 3-3523-3551

Fax: (81) 3-3523-7581

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Tel: (44) 1355-803-000

Fax: (44) 1355-242-743

Literature Requests

www.atmel.com/literature

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0006I–PEEPR–4/05