ASDL-3023-021--Datasheet/数据表在线中文翻译

ASDL-3023

IrDA Data Compliant Low Power 4Mbit/s

with Remote Control Infrared Transceiver

Data Sheet

Description

Features

General Features

• Operating temperature from -25° C ~ 85°C

The ASDL-3023 is a new generation low proﬁle high

speed enhanced infrared (IR) transceiver module that

provides the capability of (1) interface between logic

and IR signals for through-air, serial, half-duplex IR data

link, and (2) IR remote control transmission for universal

remote control applications. The ASDL-3023 can be used

for IrDA as well as remote control application without the

need of any additional external components for multi-

plexing.

-

Critical parameters are guaranteed over

temperature and supply voltage

• Vcc Supply 2.4 to 3.6 V

• Interface to Various Super I/O and Controller Devices

- Input/Output Interface Voltage of 1.5 V

• Miniature Package

Height : 1.75 mm

Width : 7.5 mm

Depth : 2.75 mm

• Moisture Level 3

Miniature Package (shielded)

Height : 1.95 mm

Width : 8.0 mm

The ASDL-3023 is fully compliant to IrDA Physical Layer

speciﬁcation version 1.4 low power from 9.6 kbit/s to 4.0

Mbit/s (FIR) and IEC825 Class 1 eye safety standards.

Depth : 3.00 mm

The ASDL-3023 can be shutdown completely to achieve

very low power consumption. In the shutdown mode, the

PIN diode will be inactive and thus producing very little

photocurrent even under very bright ambient light. It is

also designed to interface to input/output logic circuits as

low as 1.5V. These features are ideal for battery operated

mobile devices such as PDAs and mobile phones that

require low power consumption.

• Power Saving using 3 ILED range (SIR, MIR/FIR, RC

mode)

• LED stuck high protection

• High EMI Performance

• High ESD Performance

• Designed to Accommodate Light Loss with Cosmetic

Windows

• IEC 825-Class 1 Eye Safe

Applications

IrDA Features

• Fully Compliant to IrDA 1.4 Physical Layer Low Power

Mobile data communication and universal remote control

• Mobile Phones

• PDAs

Speciﬁcations from 9.6 kbit/s to 4.0 Mb/s

-

Link distance up to 30cm (minimum)

• Complete shutdown

• Low Power Consumption

• Digital Still Camera

• Printer

-

Low shutdown current

Low idle current

• Handy Terminal

• Industrial and Medical Instrument

Remote Control Features

• Wide angle and high radiant intensity

Application Support Information

The Application Engineering Group is available to assist

you with the application design associated with ASDL-

3023 infrared transceiver module. You can contact them

through your local sales representatives for additional

details.

• Spectrally suited to remote control transmission

function

• Minimum peak wavelength of 880nm

• 2 RC Transmission Mode

-

Single TXD (Programmable Mode)

Dual TXD (Direct)

ꢀ

Vdd

R1

GND

CX2

CX1

Vdd

(7)

GND (8)

ASDL-3023 TRANSCEIVER

MODULE

TRANSCEIVER

IC

IOVCC(5)

Regulated

Voltage &

Current

Photodetector

Source

SD(4)

CX5

RECEIVER

Low Pass

Filter

RXD(3)

R2

AGC & Signal

Reference

Processor

VLED

CX3

LEDA (1)

CX4

TRANSMITTER

TXD_RC

Input

Switched

Current

Source

Eye

Safety-RC

TxD_RC(6)

LED

TXD_IR

Input

Eye

Safety-IR

TxD_IR(2)

TRANSMIT

TER

Figure 1a. Functional Block Diagram of ASDL-3023

ꢁ

Vdd

R1

GND

CX2

CX1

Vdd

(7)

GND (8)

ASDL-3023 TRANSCEIVER

MODULE

TRANSCEIVER

IC

IOVCC(5)

Regulated

Voltage &

Current

Photodetector

Source

SD(4)

CX5

RECEIVER

Low Pass

Filter

RXD(3)

R2

AGC & Signal

Reference

Processor

VLED

CX3

LEDA (1)

CX4

TRANSMITTER

TXD_RC

Input

Switched

Current

Source

Eye

Safety-RC

TxD_RC(6)

TxD_IR(2)

LED

TXD_IR

Input

Eye

Safety-IR

TRANSMIT

TER

Figure 1b. Functional Block Diagram of ASDL-3023-S21

ꢂ

Order Information

Part Number

Packaging Type

Tape and Reel

Package

Quantity

ꢁ500

ASDL-ꢂ0ꢁꢂ-0ꢁꢀ

Front Option

Top Option

Front Option

ASDL-ꢂ0ꢁꢂ-008

ꢁ500

ASDL-ꢂ0ꢁꢂ–Sꢁꢀ (Shielded)

ꢁ500

Marking Information

The unit is marked with ‘XYWLL’on the shield

Y = year

W = work week

LL = lot number

ASDL-3023-021, ASDL-3023-008 and ASDL-3023-S21

Pinout, Rear View

I/O Pins Conﬁguration Table

Rear View

ꢀ

Symbol

LEDA

TxD_IR

RxD

Description

I/O Type

Notes

Note ꢀ

Note ꢁ

Note ꢂ

Note 4

Note 5

Note 6

Note 7

Note 8

LED Anode

ꢁ

IrDA transmitter data input.

IrDA receive data

Shutdown

Input. Active High

Output. Active Low

Input. Active High

ꢂ

8

7

6

5

4

3

2

1

4

SD

Figure 2a. Pin out for ASDL-3023-021 and ASDL-3023-008,

5

IOVCC

TxD_RC

VCC

Input/Output ASIC voltage

RC transmitter data input.

Supply Voltage

Rear View

6

Input. Active High

7

8

GND

Ground

8

7

6

5

4

3

2

1

(Shielded)

Figure 2b. Pin out for ASDL-3023-S21

Notes:

1. Tied through external resistor, R2, to Vled. Refer to the table below for recommended series resistor value.

2. This pin is used to transmit serial data when SD pin is low. If held high for longer than 50 ms, the LED is turned oﬀ. Do NOT ﬂoat this pin.

3. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down resistor is required. The pin is in tri-state when the

transceiver is in shutdown mode

4. Complete shutdown of IC and PIN diode. The pin is used for setting IR receiver bandwidth, range of IR LED current and RC drive programming

mode. Refer to section on “Bandwidth Selection Timing”and “Remote Control Drive Modes”for more information. Do NOT ﬂoat this pin. ***

5. Connect to ASIC logic controller supply voltage or Vcc. The voltage at this pin should be equal to or less than Vcc.

6. Logic high turns on the RC LED. If held high longer than 50 ms, the RC LED is turned oﬀ. Do NOT ﬂoat the pin.

7. (i) Regulated, 2.4V to 3.6V

(ii) This pin recommended to turn on before other pin.

8. Connect to system ground.

4

Recommended Application Circuit Components

Component

Recommended Value

Note

Rꢀ

Rꢁ

4.7W, 5%, 0.ꢁ5 watt for Vcc ≤ ꢂ.0V

ꢁ.7W, for ꢁ.4 ≤ VLED ≤ ꢁ.7V;

ꢂ.ꢂW, for ꢁ.7 <VLED ≤ ꢂ.0V

ꢂ.9W, for ꢂ.0 <VLED ≤ ꢂ.ꢂV

4.7W, for ꢂ.ꢂ <VLED ≤ ꢂ.6V

5.6W, for ꢂ.6 <VLED ≤ 4.ꢁV

ꢀ0W, for 4.ꢁ <VLED ≤ 5V

CXꢀ, CXꢂ, CX5

CXꢁ, CX4

ꢀ00 nF, ꢁ0%, X7R Ceramic

ꢀ

4.7mF, ꢁ0%, Tantalum

Notes: CX1, CX2, CX3 & CX4 must be placed within 0.7cm of ASDL-3023

to obtain optimum noise immunity

Absolute Maximum Ratings

For implementations where case to ambient thermal resistance is 50°C/W.

Parameter

Symbol

Min.

-40

Max.

+ꢀ00

+85

6.5

Units

°C

Conditions

Ref

Storage Temperature

Operating Temperature

LED Anode Voltage

Supply Voltage

T

S

T

A

-ꢁ5

°C

V

LEDA

-0.ꢂ

V

6

V

CC

Input Voltage : TXD, SD/Mode

Output Voltage : RXD

Peak IR LED Current

Peak RC LED Current

5.5

V

I

5.5

V

O

I

ꢁ00

ꢂ00

mA

≤ ꢁ5% duty cycle, ≤ 90 ms pulse width

≤ ꢀ0% duty cycle, ≤ 90 ms pulse width

Fig ꢂ

Fig 4

IRLED (PK)

RCLED(PK)

CAUTION: The CMOS INhereNT TO The deSIgN Of ThIS COMpONeNT INCreASeS The COMpONeNT’S SUSCepTIbIlITy TO

dAMAge frOM eleCTrOSTATIC dISChArge (eSd). IT IS AdvISed ThAT NOrMAl STATIC preCAUTIONS be TAkeN IN hANdlINg

ANd ASSeMbly Of ThIS COMpONeNT TO preveNT dAMAge ANd/Or degrAdATION whICh MAy be INdUCed by eSd

5

Recommended Operating Conditions

Parameter

Symbol Min.

Typ.

Max.

+85

ꢂ.6

Units

Conditions

Operating Temperature

Supply Voltage

T

A

-ꢁ5

°C

V

CC

ꢁ.4

V

Input/Output Voltage

Logic Input Voltage for TXD, SD/Mode Logic High

Logic Low

IOV

ꢀ.5

ꢂ.6

V

CC

V

IOVcc-0.5

0

IOVcc

0.4

V

IH

V

IL

ꢁ

[ꢂ]

Receiver Input Irradiance

Logic High EI

0.0090

500

mW/cm

For in-band signals ≤ ꢀꢀ5.ꢁkbit/s

H

0.576 Mbit/s ≤ in-band signals ≤ 4.0

Mbit/s

[ꢂ]

0.0ꢁꢁ5

500

0.ꢂ

ꢁ

[ꢂ]

Logic Low

EI

L

mW/cm

For in-band signals

IR LED (Logic High) Current Pulse

Amplitude – SIR Mode

I

65

mA

LEDA

IR LED (Logic High) Current Pulse

Amplitude – MIR/FIR Mode

mA

ꢀ50

ꢁ50

RC LED (Logic High) Current Pulse

Amplitude

mA

Receiver Data Rate

Ambient Light

0.0096

4.0

Mbit/s

See IrDA Serial Infrared Physical Layer

Link Speciﬁcation, Appendix A for

ambient levels

Note :

3. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is deﬁned as 850 ≤ lp ≤ 900 nm, and the pulse characteristics are

compliant with the IrDA Serial Infrared Physical Layer Link Speciﬁcation v1.4.

6

Electrical and Optical Speciﬁcations

Speciﬁcations (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted. Unspeci-

ﬁed test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25°C, Vcc set to 3.0V and

IOVcc set to 1.5V unless otherwise noted.

Receiver

Parameter

Viewing Angle

Symbol

ꢁq

Min.

ꢂ0

Typ.

Max.

Units

°

Conditions

ꢀ/ꢁ

Peak Sensitivity Wavelength

RxD_IrDA Output Voltage

l

875

nm

V

P

ꢁ

Logic High V

Logic Low V

IOVcc – 0.5

0

IOVCC

0.4

I = -ꢁ00 mA, EI ≤ 0.ꢂ mW/cm

OH

OL

[4, 5]

[4, 6]

RxD_IrDA Pulse Width (SIR)

RxD_IrDA Pulse Width (MIR)

t

ꢀ

4

ms

ns

q

≤ ꢀ5°, C =9pF

L

≤ ꢀ5°, C =9pF

L

≤ ꢀ5°, C =9pF

L

≤ ꢀ5°, C =9pF

L

RPW(SIR)

RPW(MIR)

RPW(FIR)

ꢀ/ꢁ

ꢀ00

80

ꢁ00

500

ꢀ75

ꢁ90

[4, 7]

RxD_IrDA Pulse Width (Single) (FIR)

RxD_IrDA Pulse Width (Double) (FIR)

RxD_IrDA Rise & Fall Times

t , t

60

C =9pF

r f

L

[8]

ꢁ

Receiver Latency Time

t

ꢀ00

ꢁ00

ms

EI = 9.0 mW/cm

EI = ꢀ0 mW/cm

L

[9]

ꢁ

Receiver Wake Up Time

RW

Infrared (IR) Transmitter

Parameter

Symbol

Min.

Typ.

Max.

Units

Conditions

IR Radiant Intensity

(SIR Mode)

I

EH

4

ꢁ0

mW/sr

IR_I = 65mA,

LEDA

q

≤ ꢀ5°, TxD_IR ≥V , T = ꢁ5°C

IH A

ꢀ/ꢁ

IR Radiant Intensity (MIR/FIR Mode)

I

EH

ꢀ0

50

mW/sr

IR_I = ꢀ50mA,

LEDA

q

≤ ꢀ5°, TxD_IR ≥V , T = ꢁ5°C

IH A

ꢀ/ꢁ

IR Viewing Angle

ꢁq

ꢂ0

60

°

ꢀ/ꢁ

IR Peak Wavelength

TxD_IrDA Logic Levels

l

850

IOVcc-0.5

0

885

900

IOVCC

0.5

nm

V

P

High

Low

High

Low

V

IH

IL

TxD_IrDA Input Current

I

0.0ꢁ

-0.0ꢁ

ꢀ80

ꢁ5

ꢀ.6

ꢁꢀ7

ꢀꢁ5

mA

ns

ms

ns

V ≥V

I IH

H

0 ≤V ≤V

IL

L

I

[ꢀ0]

Wake Up Time

t

TW

[ꢀꢀ]

Maximum Optical Pulse Width

TXD Pulse Width (SIR)

TXD Pulse Width (MIR)

TXD Pulse Width (FIR)

TxD Rise & Fall Times (Optical)

ꢀꢁ0

PW(Max)

PW(SIR)

PW(MIR)

PW(FIR)

t (TXD_IR)=ꢀ.6ms at ꢀꢀ5.ꢁ kbit/s

PW

t (TXD_IR)=ꢁꢀ7ns at ꢀ.ꢀ5ꢁ Mbit/s

PW

t (TXD_IR)=ꢀꢁ5ns at 4.0 Mbit/s

PW

t , t

r f

600

40

t (TXD_IR)=ꢀ.6ms at ꢀꢀ5.ꢁ kbit/s

PW

t (TXD_IR)=ꢀꢁ5ns at 4.0 Mbit/s

PW

ns

V

IR LED Anode On-State Voltage

(SIR Mode)

V

ꢁ.ꢁ

ꢁ.ꢀ

IR_I =65mA,

ON

(IR_LEDA)

LEDA

IR VLED = ꢂ.6V,

R = 4.7W, VI(TxD) ≥VIH

IR LED Anode On-State Voltage

(MIR/FIR Mode)

V

IR_I =ꢀ50mA,

ON

(IR_LEDA)

LEDA

IR VLED = ꢂ.6V,

R = 4.7W,

VI(TxD_IR) ≥VIH

7

Remote Control (RC) Transmitter

Parameter

RC Radiant Intensity

Symbol

Min.

Typ.

80

Max.

Units

mW/sr

Conditions

RC_I = ꢁ50mA,

I

EH

LEDA

q

≤ ꢀ5°, TxD_RC ≥V , T = ꢁ5 °C

ꢀ/ꢁ

IH A

RC Viewing Angle

RC Peak Wavelength

TxD_RC Logic Levels

ꢁq

P

ꢂ0

880

IOVcc-0.5

0

60

°

nm

V

ꢀ/ꢁ

l

885

900

IOVCC

0.5

ꢀ

High

V

IH

V

IL

Low

High

Low

V

TxD_RC Input Current

I

0.0ꢁ

-0.0ꢁ

ꢁ

mA

V

V ≥V

I IH

0 ≤V ≤V

RC_I =ꢁ50mA, RC VLED = ꢂ.6V,

LEDA

H

ꢀ

L

I IL

RC LED Anode On-State Voltage

V

ON

R = 4.7W, V

≥V

(RC_LEDA)

I(TxD_RC)

IH

Transceiver

Parameters

Input Current

Symbol

Min.

Typ.

0.0ꢀ

-0.0ꢁ

Max.

Units

mA

Conditions

High

I

ꢀ

VI ≥VIH

H

Low

-ꢀ

ꢀ

mA

0 ≤VI ≤VIL

VSD ≥ IOV -0.5, TA=ꢁ5°C

L

Supply Current

Shutdown

ꢀ

mA

CCꢀ

CCꢁ

CC

Idle

(Standby)

ꢁ.0

ꢂ.5

ꢁ.9

mA

V

I(TxD)

≤V , EI=0

IL

ꢁ

Active

I

mA

V

I(TxD)

≥V , EI=ꢀ0mW/cm

IL

CCꢂ

Note:

[4] An in-band optical signal is a pulse/sequence where the peak wavelength, l , is deﬁned as 850 nm ≤ l ≤ 900 nm, and the pulse characteristics

P

are compliant with the IrDA Serial Infrared Physical Layer Link Speciﬁcation version 1.4.

[5] For in-band signals 115.2 kbit/s where 9 mW/cm2 ≤ EI ≤ 500 mW/cm2.

[6] For in-band signals 1.152 Mbit/s where 22 mW/cm2 ≤ EI ≤ 500 mW/cm2.

[7] For in-band signals 4 Mbit/s where 22 mW/cm2 ≤ EI ≤ 500 mW/cm2.

[8] Latency is deﬁned as the time from the last TxD_IrDA light output pulse until the receiver has recovered full sensitivity.

[9] Receiver Wake Up Time is measured from Vcc power ON to valid RxD_IrDA output.

[10] Transmitter Wake Up Time is measured from Vcc power ON to valid light output in response to a TxD_IrDA pulse.

[11] The Max Optical PW is deﬁned as the maximum time which the IR LED will turn on, this, is to prevent the long Turn On time for the IR LED.

Max. Permissible DC LED Current

Max. Permissible Peak LED Current

350

300

250

200

150

100

50

70

60

50

40

30

20

10

0

Rθja = 400degC/W

0

-40

-20

0

20

40

60

80

100

-40

-20

0

20

40

60

80

100

T_A- Ambient Temperature - ^oC

o

T_A- Ambient Temperature - C

Figure 3. Maximum Peak IR LED current vs. ambient temperature. Derated

based on TJMAX = 100°C.

Figure 4. Maximum Peak RC LED current vs. ambient temperature. Derated

based on TJMAX = 100°C.

8

Figure 5a. Timing Waveform - RXD Output Waveform

Figure 5b. Timing Waveform - LED Optical Waveform

Figure 5d. Timing Waveform – Receiver Wakeup Time Waveform

Figure 5c. Timing Waveform – TXD “Stuck-on” Protection Waveform

Figure 5e. Timing Waveform – TXD Wakeup Time Waveform

9

Package Dimension: ASDL-3023-021 (Shieldless, Front) and ASDL-3023-008 (Shieldless, Top)

ꢀ0

Package Dimension: ASDL-3023-S21 (Shielded, Front)

ꢀꢀ

Tape & Reel Dimensions

ASDL-3023-021 (Shieldless, Front)

ASDL-3023-008 (Shieldless, Top)

ꢀꢁ

ASDL-3023-S21 (Shielded, Front)

Progressive Direction

Empty

Parts Mounted

Leader

(400mm min)

(40mm min)

Empty

(40mm min)

Option #

"B" "C" Quantity

021

S21

008

330

80

2500

330 80

Unit: mm

Detail A

2.0 ± 0.5

∅13.0 ± 0.5

B

C

R1.0

LABEL

21 ± 0.8

Detail A

+2

16.4

2.0 ± 0.5

0

ꢀꢂ

ASDL-3023 Moisture Proof Packaging

All ASDL-3023 options are shipped in moisture proof package. Once opened, moisture absorption begins.

This part is compliant to JEDEC Level 3.

UNITS IN A SEALED

MOISTURE-PROOF

PACKAGE

PACKAGE IS OPENED

(UNSEALED)

ENVIRONMENT

PARTS ARE NOT

RECOMMENDED TO

BE USED

NO

LESS THAN 30 ^o

AND LESS THAN

60% RH

C

YES

PACKAGE IS

OPENED LESS

THAN 168

HOURS

YES

NO BAKING IS

NECESSARY

NO

PACKAGE IS

OPENED LESS

THAN 15 DAYS

YES

PERFORM

RECOMMENDED

BAKING CONDITIONS

Figure 6. Baking Conditions Chart

Recommended Storage Conditions

Baking Conditions

Storage Temperature

Relative Humidity

ꢀ0°C to ꢂ0°C

Package

In reels

In bulk

Temp

60 °C

Time

below 60% RH

≥ 48hours

≥ 4hours

ꢀ00 °C

Time from unsealing to soldering

After removal from the bag, the parts should be soldered

within 7 days if stored at the recommended storage con-

ditions. When MBB (Moisture Barrier Bag) is opened and

the parts are exposed to the recommended storage con-

ditions more than 7 days but less than 15 days the parts

must be baked before reﬂow to prevent damage to the

parts.

Baking should only be done once.

Note: To use the parts that exposed for more than 15 days is not

recommended.

ꢀ4

Recommended Reﬂow Proﬁle

MAX 260°C

255

R3

R4

230

217

200

180

R2

60 sec to 90 sec

Above 217°C

150

R5

R1

120

80

25

0

100

150

200

P3

SOLDER

REFLOW

250

P4

COOL DOWN

300

t-TIME

(SECONDS)

50

P1

HEAT

UP

P2

SOLDER PASTE DRY

Maximum DT/Dtime

or Duration

Process Zone

Heat Up

Symbol

DT

Pꢀ, Rꢀ

Pꢁ, Rꢁ

ꢁ5°C to ꢀ50°C

ꢀ50°C to ꢁ00°C

ꢂ°C/s

Solder Paste Dry

Solder Reﬂow

ꢀ00s to ꢀ80s

Pꢂ, Rꢂ

Pꢂ, R4

ꢁ00°C to ꢁ60°C

ꢁ60°C to ꢁ00°C

ꢂ°C/s

-6°C/s

Cool Down

P4, R5

ꢁ00°C to ꢁ5°C

> ꢁꢀ7°C

ꢁ60°C

-6°C/s

60s to 90s

-

Time maintained above liquidus point , ꢁꢀ7°C

Peak Temperature

Time within 5°C of actual Peak Temperature

Time ꢁ5°C to Peak Temperature

-

ꢁ0s to 40s

8mins

ꢁ5°C to ꢁ60°C

Process zone P3 is the solder reﬂow zone. In zone P3,

the temperature is quickly raised above the liquidus

point of solder to 260°C (500°F) for optimum results. The

dwell time above the liquidus point of solder should be

between 60 and 90 seconds. This is to assure proper co-

alescing of the solder paste into liquid solder and the

formation of good solder connections. Beyond the rec-

ommended dwell time the intermetallic growth within

the solder connections becomes excessive, resulting in

the formation of weak and unreliable connections. The

temperature is then rapidly reduced to a point below

the solidus temperature of the solder to allow the solder

within the connections to freeze solid.

The reﬂow proﬁle is a straight-line representation of

a nominal temperature proﬁle for a convective reﬂow

solder process. The temperature proﬁle is divided into

four process zones, each with diﬀerent DT/Dtime tem-

perature change rates or duration. The DT/Dtime rates or

duration are detailed in the above table. The tempera-

tures are measured at the component to printed circuit

board connections.

In process zone P1, the PC board and ASDL-3023 pins

are heated to a temperature of 150°C to activate the ﬂux

in the solder paste. The temperature ramp up rate, R1,

is limited to 3°C per second to allow for even heating of

both the PC board and ASDL-3023 pins.

Process zone P4 is the cool down after solder freeze.

The cool down rate, R5, from the liquidus point of the

solder to 25°C (77°F) should not exceed 6°C per second

maximum. This limitation is necessary to allow the PC

board and ASDL-3023 pins to change dimensions evenly,

putting minimal stresses on the ASDL-3023.

Process zone P2 should be of suﬃcient time duration

(100 to 180 seconds) to dry the solder paste. The temper-

ature is raised to a level just below the liquidus point of

the solder.

It is recommended to perform reﬂow soldering no more

than twice.

ꢀ5

Appendix A: ASDL-3023 SMT Assembly Application Note

Solder Pad, Mask and Metal Stencil

Figure A1. Stencil and PCBA

Recommended land pattern for ASDL-3023-021

Recommended land pattern for ASDL-3023- 008

Mounting

Centre

Mounting

Centre

0.44

0.7

0.4

1.74

1.55

1.05

0.17

0.1

0.775

FIDUCIAL

1.75

1.60

0.55

1.05

1.35

1.05

1.35

3.75

7.5

UNIT: mm

Figure A2a. Recommended land pattern, ASDL-3023-021

UNIT: mm

Figure A2c. Recommended land pattern, ASDL-3023-008

Recommended land pattern for ASDL-3023- S21

1.3

Mounting

Centre

1.5

0.3

1.55

0.1

0.775

1.75

0.55

1.05

1.35

3.75

7.5

UNIT: mm

Figure A2b. Recommended land pattern, ASDL-3023-S21

ꢀ6

Adjacent Land Keepout and Solder Mask Areas

Recommended Metal solder Stencil Aperture

Adjacent land keepout is the maximum space occupied

by the unit relative to the land pattern. There should be

no other SMD components within this area. The minimum

solder resist strip width required to avoid solder bridging

adjacent pads is 0.2mm.It is recommended that two ﬁdu-

cially crosses be placed at mid length of the pads for unit

alignment.

It is recommended that only a 0.11 mm (0.004 inch) or

a 0.127 mm (0.005 inch) thick stencil be used for solder

paste printing. This is to ensure adequate printed solder

paste volume and no shorting. See the Table 1 below the

drawing for combinations of metal stencil aperture and

metal stencil thickness that should be used. Aperture

opening for shield pad is 2.6 mm x 1.5 mm(for ASDL-

3023-S1) as per land pattern. Compared to 0.127mm

stencil thickness 0.11mm stencil thickness has longer

length in land pattern. It is extended outwardly from

transceiver to capture more solder paste volume.

Note: Wet/Liquid Photo-imaginable solder resist/mask is recommended

j

k

h

l

Solder Mask

Figure A3. Solder stencil aperture

Table 1.

Dimension

mm

0.ꢁ

Stencil thickness,

t(mm)

Aperture size(mm)

Length,l

h

l

Width,w

ꢂ.0

0.ꢀꢁ7mm

0.ꢀꢀmm

ꢀ.75+/-0.05

ꢁ.4+/-0.05

0.55+/-0.05

k

j

ꢂ.85

ꢀ0.ꢀ

ꢀ7

Appendix B: PCB Layout Suggestion

The eﬀects of EMI and power supply noise can potentially

reduce the sensitivity of the receiver, resulting in reduced

link distance. The PCB layout played an important role to

obtain a good PSRR and EM immunity resulting in good

electrical performance. Things to note:

6. Preferably a multi-layered board should be used

to provide suﬃcient ground plane. Use the layer

underneath and near the transceiver module as Vcc,

and sandwich that layer between ground connected

board layers. The diagram below demonstrate an

example of a 4 layer board :

1. The ground plane should be continuous under the

part, but should not extend under the shield trace.

•

Top Layer:

Connect the metal shield and

module ground pin to bottom

ground layer;

2. The shield trace is a wide, low inductance trace back

to the system ground. CX1, CX2, CX3, CX4 and CX5 are

optional supply ﬁlter capacitors; they may be left out if

a clean power supply is used.

Place the bypass capacitors within

0.5cm from the VCC and ground

pin of the module.

3. VLED can be connected to either unﬁltered or

unregulated power supply. The bypass capacitors

should be connection before the current limiting

resistor R2 respectively. In a noisy environment,

including capacitor CX3and CX4 can enhance supply

rejection. CX3 that is generally a ceramic capacitor of

low inductance providing a wide frequency response

while CX4 is tantalum capacitor of big volume and fast

frequency response. The use of a tantalum capacitor

is more critical on the VLED line, which carries a high

current.

•

Layer 2:

Critical ground plane zone. 3

cm in all direction around the

module. Connect to a clean,

noiseless ground node (eg

bottom layer).

•

Layer 3:

Keep data bus away from critical

ground plane zone.

Ground layer. Ground noise <75

mVp-p. Should be separated from

ground used by noisy sources.

Bottom layer:

4. VCC pin can be connected to either unﬁltered or

unregulated power supply. The Resistor, R1 together

with the capacitors, CX 1and CX2 acts as the low pass

ﬁlter.

The area underneath the module at the second layer, and

3cm in all direction around the module is deﬁned as the

critical ground plane zone. The ground plane should be

maximized in this zone. Refer to application note AN1114

or the Avago Technologies IrDA Data Link Design Guide

for details. The layout below is based on a 2-layer PCB.

5. IOVCC is connected to the ASIC voltage supply or

the VCC supply. The capacitor, CX5 acts as the bypass

capacitor.

Noise sources to be placed as far away from the transceiver as possible

Top Layer

CX1

CX2

CX3

CX4

R

1

R

2

CX5

Bottom Layer

Top Layer

Layer 3

Layer 2

Legend: ground via

Bottom Layer (GND)

ꢀ8

Appendix C: General Application Guide for the ASDL-3023 infrared IrDA Compliant 4 Mb/s Transceiver.

Description Interface to the Recommended I/O chip

The ASDL-3023, a wide-voltage operating range infrared The ASDL-3023’s TXD data input is buﬀered to allow

transceiver is a low-cost and small form factor device for CMOS drive levels. No peaking circuit or capacitor is

that is designed to address the mobile computing required. Data rate from 9.6kb/s to 4Mb/s is available at

market such as PDAs, as well as small embedded mobile RXD pin. The TXD_RC, pin6 together with LEDA, pin1 is

products such as digital cameras and cellular phones. It is used to selected the remote control transmit mode. Al-

spectrally suited to universal remote control transmission ternatively, the TXD_IR, pin2 together with LEDA, pin1 is

function at 940 nm typically. It is fully compliant to IrDA used for infrared transmit selection.

1.4 low power speciﬁcation

Following shows the hardware reference design with

up 4Mb/s and support most remote control codes The ASDL-3023

design of ASDL-3023 also includes the following unique

*Detail conﬁguration of ASDL-3023 with the controller

features :

chip is shown in Figure 3.

• Spectrally suited to universal remote control

The use of the infrared techniques for data communica-

transmission function at 940nm typically;

tion has increase rapidly lately and almost all mobile ap-

• Low passive component count;

plication processors have built in the IR port. This does

away with the external Endec and simpliﬁes the interfac-

ing to a direct connection between the processor and the

transceiver. The next section discusses interfacing conﬁg-

uration with a general processor.

• Shutdown mode for low power consumption

requirement;

• Direct interface with I/O logic circuit.

Selection of Resistor R2

Resistor R2 should be selected to provide the appropriate

peak pulse IR and RC LED current respectively at diﬀerent

ranges of Vcc as shown on page 3 under “Recommended

Application circuit components”.

STN/TFT LCD Panel

Key Pad

LCD Control

Peripherial

interface

PWM

IrDA

LCD Backlight Contrast

*ASDL-3023

Touch Panel

A/D

Mobile Application

chipset

interface

AC97

sound

PCM Sound

Audio Input

Memory I/F

Logic Bus Driver

Memory Expansion

I2S

Baseband

controller

ROM

FLASH

SDRAM

Power Management

Antenna

Figure 2. Mobile Application Platform

ꢀ9

General mobile application processor

Remote Control Operation

The transceiver is directly interface with the micropro- The ASDL-3023 is spectrally suited to universal remote

cessor provided its support infrared communication control transmission function at 940nm typically. Remote

commonly known as Infrared Communications Port

(ICP). The ICP supports both SIR data rates up to 115.2kps

and sometimes FIR data with data rates up to 4Mbps.

control applications are not governed by any standards,

owing to which there are numerous remote codes

in market. Each of those standards results in receiver

The remote control commands can be sent one of the modules with diﬀerent sensitivities, depending on the

available General Purpose IO pins or the UART block

with IrDA functionality. It should be should be observed

that although both IrDA data transmission and Remote

control transmission is possible simultaneously by the

carries frequencies and responsively to the incident light

wavelength. Remote control carrier frequencies are in

the range of 30KHz to 60KHz (for details of some the fre-

quently used carrier frequencies, please refer to AN1314).

hardware, hence the software is required to resolve this Some common carrier frequencies and the correspond-

issue to prevent the mixing and corruption of data while ing SA-1110 UART frequency and baud rate divisor are

being transmitted over the free air. The above Figure 3

illustrates a reference interfacing to implement both IR

and RC functionality with ASDL-3023.

shown in Table 3.

Table 3.

Remote Control Carrier

Frequency (KHz)

SA-1110 UART

Frequency (KHz)

Baud Rate

Divisor

ꢂ0

ꢁ8.8

ꢂꢁ.9

ꢂ8.4

57.6

8

7

6

4

ꢂꢁ,ꢂꢂ

ꢂ6,ꢂ6.7,ꢂ8,ꢂ9.ꢁ,40

56

VCC

R1

CX1

CX2

IOVCC

GND

VCC

IOVCC

CX5

GND

GPIO

TXD_RC

RXD

IR_RXD

GPIO

SD

IR_TXD

100Kohm

VLED

TXD_IR

R3

VLEDA

HSDL3021

GND

100Kohm

CX3

CX4

GND

Figure 3. ASDL-3023 conﬁguration with general mobile architecture processor

ꢁ0

Appendix E: Window Design for ASDL-3023.

OPAQUE MATERIAL

IR TRANSPARENT WINDOW

Y

X

Z

OPAQUE WINDOW

T

IR TRANSPARENT

WINDOW

Z

To ensure IrDA compliance, some constraints on the

height and width of the window exist. The minimum

dimensions ensure that the IrDA cones angles are met

without vignetting. The maximum dimensions minimize

the eﬀects of stray light. The minimum size corresponds

to a cone angle of 300 and the maximum size corre-

sponds to a cone angle of 600.

Depth(Z) Y(Min)

X(Min)

Y(Max)

ꢂ.66+W

4.8ꢁ+W

5.97+W

7.ꢀꢁ+W

8.ꢁ8+W

9.4ꢂ+W

X(Max)

0

ꢀ

ꢁ

ꢂ

4

5

6

7

8

9

ꢀ0

ꢀ.70+W

ꢁ.ꢁꢂ+W

ꢁ.77+W

ꢂ.ꢂꢀ+W

ꢂ.84+W

4.ꢂ8+W

4.9ꢀ+W

5.45+W

5.99+W

6.5ꢁ+W

7.06+W

7.ꢁ0+W

7.7ꢂ+W

8.ꢁ7+W

8.8ꢀ+W

9.ꢂ4+W

9.88+W

9.ꢁ6+W

ꢁ

ꢀ

ꢁ

ꢀ0.ꢂꢁ+W

ꢀꢀ.47+W

ꢀꢁ.6ꢁ+W

ꢀꢂ.78+W

ꢀ4.9ꢂ+W

ꢀ6.09+W

ꢀ7.ꢁ4+W

ꢀ8.40+W

ꢀ9.55+W

ꢁ0.7ꢀ+W

ꢁ

In the ﬁgure above, X is the width of the window, Y is the

height of window, Z is the distance from the ASDL-3023

to the back of the window and T is the thickness of the IR

transparent window.

ꢀ0.4ꢀ+W

ꢀ0.95+W

ꢀꢀ.49+W

ꢀꢁ.0ꢁ+W

ꢀꢁ.56+W

ꢀ0.59+W

ꢀꢀ.74+W

ꢀꢁ.90+W

ꢀ4.05+W

ꢀ5.ꢁꢀ+W

ꢀ

ꢁ

W = 0.3456*T, W = 0.6967*T, where T is the window

ꢀ

2

thickness

For the modules depth values that are not shown on the

tables above, the minimum X and Y values can be inter-

polated.

ꢁꢀ

Window Material

Shape of the Window

Almost any plastic material will work as a window From an optics standpoint, the window should be ﬂat.

material. Polycarbonate is recommended. The surface

ﬁnish of the plastic should be smooth, without any

texture. An IR ﬁlter dye may be used in the window to

make it look black to the eye, but the total optical loss

of the window should be 10% or less for best optical

This ensures that the window will not alter either the

radiation pattern of the LED, or the receive pattern of the

photodiode. If the window must be curved for mechani-

cal or industrial design reasons, place the same curve on

the backside of the window that has an identical radius as

performance. Light loss should be measured at 875 nm. the front side. While this will not completely eliminate the

The recommended plastic materials for use as a cosmetic

window are available from General Electric Plastics.

lens eﬀect of the front curved surface, it will signiﬁcantly

reduce the eﬀects. The amount of change in the radiation

pattern is dependent upon the material chosen for the

window, the radius of the front and back curves, and the

distance from the back surface to the transceiver. Once

these items are known, a lens design can be made which

will eliminate the eﬀect of the front surface curve. The

following drawings show the eﬀects of a curved window

on the radiation pattern. In all cases, the center thickness

of the window is 1.5 mm, the window is made of polycar-

bonate plastic, and the distance from the transceiver to

the back surface of the window is 3 mm.

Recommended Plastic Materials:

Material #

Lexan ꢀ4ꢀ

Light Transmission Haze

Refractive Index

ꢀ.586

88%

85%

ꢀ%

Lexan 9ꢁ0A

Lexan 940A

ꢀ.586

Note: 920A and 940A are more ﬂame retardant than 141.

Recommended Dye: Violet #21051

(IR transmissant above 625mm)

Curved Front and Back, (Second Choice)

Curved Front, Flat Back, (Do not use)

Flat Window, (First Choice)

ꢁꢁ

Appendix F: General Application Guide for the ASDL-3023

Remote Control Drive Modes

Two-TxD Direct Transmission Mode

In the two-TxD direct transmission mode, the LED can

be driven separately for IrDA and RC mode of operation

through the TxD_IR and TxD_RC pins respectively. This

mode can be used when the external controller utilizes

separate transmit pins for IrDA and RC operation modes,

thereby eliminating the need for external multiplexing.

The ASDL-3023 can operate in the single-TxD program-

mable mode or the two-TxD direct transmission mode.

Single-TxD Programmable Mode

In the single-TxD programmable mode, only one input

pin (TxD_IR input pin) is used to drive the LED in both

IrDA mode as well as Remote Control mode of operation.

This mode can be used when the external controller uses

only one transmit pin for both IrDA as well RC mode of

operation.

Please refer to the Transceiver I/O truth table for more

detail.

Transceiver Control I/O Truth Table for Two-TxD Direct

Transmission Mode

SD

0

TxIR

TxRC

LED

OFF

ON

-

Remarks

transceiver is in default mode (IrDA-SIR) when powered

up. The user needs to apply the following programming

sequence to both the TxD_IR and SD inputs to enable the

transceiver to operate in either the IrDA or remote control

mode.

0

ꢀ

0

ꢀ

0

ꢀ

IR Rx enabled. Idle mode

Remote control operation

IrDA Tx operation

0

Not recommended

(Both Transmitters oﬀ)

ꢀ

0

OFF

Shutdown mode*

*

The shutdown condition will set the transceiver to the default mode

(IrDA-SIR)

tC

tA

tB

tC

tTL

SHUTDOWN

(ACTIVE HIGH)

tH

TxIR

(ACTIVE HIGH)

DRIVE

IrDA LED

DRIVE

RC LED

DRIVE

IrDA LED

RC

MODE

SHUTDOWN

RESET

TxRC

(GND)

Mode Programming Timing Table

The following timings describe input constraints required using the active serial interface for mode programming with

pins SD, TxIR, and TxRC:

Parameter

Symbol

Min

Typ

Max

Unit

Notes

Shutdown input pulse width, at pin SD

t

ꢂ0

-

∞

µs

Will activate

complete shutdown

SDPW

SD mode setup time

ꢁ00

-

Ns

µs

Ns

Setup for mode

programming

A

B

C

S

TxIR pulse width for RC mode

-

RC drive enabled

with pin TxIR

SD programming pulse width

Note: ( tA + tB ) < tC < tSDPW

5.0

-

Pulse width mode

programming

TxIR setup time for

SIR or MIR/FIR mode

50

Setup time for IrDA

bandwidth selection

TxIR or SD hold time to latch

SIR, MIR/FIR or RC mode

-

Hold time for IrDA or RC modes

H

ꢁꢂ

Bandwidth Selection Timing

Setting to the LOW Bandwidth SIR Mode

(2.4kbits/s to 115.2kbits/s)

The power on state should be the IrDA SIR mode.

The data transfer rate must be set by a programming

sequence using the TxD_IR and SD inputs as described

below.

1. Set SD input to logic “HIGH”.

2. Set TxIR input to logic “LOW”. Wait t ≥ 50ns.

S

3. Set SD to logic “LOW” (this negative edge latches state

of TxIR, which determines speed setting).

Note: SD should not exceed the maximum, t ≤ 5µs, to

prevent shutdown.

C

4. TxIR must be held for t ≥ 50ns. TxIR is now re-enabled

S

as normal IrDA transmit input for the Low Bandwidth

SIR mode.

Setting to the High Bandwidth MIR/FIR Mode

(0.576Mbits/s to 4Mbits/s)

1. Set SD input to logic “HIGH”. Wait t ≥ 200ns

A

2. Set TxD_IR input to logic “HIGH”. Wait t ≥ 50ns.

S

3. Set SD to logic “LOW” (this negative edge latches state

of TxD_IR, which determines speed setting).

4. After waiting t ≥ 50ns TxD_IR can be set to logic

H

“LOW”. TxD_IR is now re-enabled as normal IrDA

transmit input for the High Bandwidth MIR/FIR mode.

50%

t_H

t_C

SD

t_A

t_S

High: MIR/FIR

50%

TxI R

Low: SIR

ꢁ4

Power-Up Sequencing

To have a proper operation for ASDL-3023, the following power-up sequencing must be followed.

(a) It’s strongly recommended that Vcc must come prior to IOVcc.

V

CC

>

t_IOVccDL0us

−

IOV

CC

>

t_SDDL30us

−

>

t_SDPW30us

−

SD

(b) It is not recommended to turn on IOVcc before Vcc while SD is low.

However, for application that IOVcc come prior to Vcc while SD is low, SD pin has to set high to assure proper function-

ality.

V _CC

IOV_CC

t_SDDL> 30us

−

>

t_SDPW30us

−

SD

(c) Setting IOVcc high before Vcc while SD is high is forbidden.

V_CC

Note:

IOV_CC

SD

t_IOVccDL: IOVcc delay time

t_SDDL: SD delay time

t_SDPW: Shutdown Input Pulse Width

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AV0ꢁ-0054EN - May ꢀ7, ꢁ007