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Document Number: MC34704  
Rev. 4.0, 6/2009  
Freescale Semiconductor  
Technical Data  
Multiple Channel DC-DC Power  
Management IC  
34704  
The 34704 is a multi-channel Power Management IC (PMIC) used  
to address power management needs for various multimedia  
application microprocessors. Its ability to provide either 5 or 8  
independent output voltages with a single input power supply (2.7  
and 5.5V) together with its high efficiency, make it ideal for portable  
devices powered up by Li-Ion/polymer batteries or for USB powered  
devices as well.  
MULTI-CHANNEL IC  
The 34704 is housed in a 7x7mm, Pb-free, QFN56 and is capable  
of operating at a switching frequency of up to 2MHz. This makes it  
possible to reduce external component size and to implement full  
space efficient power management solutions.  
EP SUFFIX (PB-FREE)  
98ASA10751D  
Features  
• 8 DC/DC (34704A) or 5 DC/DC (34704B) switching regulators with  
up to ±2% output voltage accuracy  
56-PIN QFN  
• Dynamic voltage scaling on all regulators.  
• Selectable voltage mode control or current mode control on REG8  
• I2C programmability  
• Output under-voltage and over-voltage detection for each  
regulator  
ORDERING INFORMATION  
Temperature  
Package  
Device  
Range (T )  
A
MC34704AEP/R2  
MC34704BEP/R2  
-20°C to 85°C  
56 QFN EP  
• Over-current limit detection and short-circuit protection for each  
regulator  
• Thermal limit detection for each regulator, except REG7  
• Integrated compensation for REG1, REG3, REG6, and REG8  
• 5.0µA maximum shutdown current (All regulators are off, 5.5V VIN)  
• True cutoff on all of the boost and buck-boost regulators  
• Pb-free packaging designated by suffix code EP  
34704A/B  
V
V
BKL  
REG 8  
REG 4  
DDR  
DDR  
MEMORY  
I2C COMM  
GND  
V
CORE  
REG 3  
V
V
IO1  
REG 2  
REG 5  
LCD  
MPU  
IO2  
GND  
+5V  
PGND  
*REG 1  
VREF+ (5 to 16V)  
VREF- (-5 to -9V)  
*REG 6  
*REG 7  
* Available only in 34704A device  
Figure 1. 34704 Simplified Application Diagram  
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,  
as may be required, to permit improvements in the design of its products.  
© Freescale Semiconductor, Inc., 2008 - 2009. All rights reserved.  
Table 1. Device Variations  
Orderable Part Number  
No. of Regulators  
Regulator Number  
Reg 1 - 8  
MC34704AEP/R2  
MC34704BEP/R2  
8
5
Reg 2, 3, 4, 5, 8  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
2
INTERNAL BLOCK DIAGRAM  
INTERNAL BLOCK DIAGRAM  
REG8  
voltage data  
Control  
voltage data  
Control  
REG1/VG  
VOUT1 (34704A)  
OUT8  
SW8  
L
Error Amp  
Error Amp  
VG  
Error Amp  
SW1  
PWM  
P-skip  
PWM  
VG  
VG  
Start-Up  
Ipeak-det  
and blanking  
SW control  
BT1  
BT8  
FB8  
VG  
REG2  
REG7 (34704A)  
BT2D  
PVIN2  
voltage data  
Control  
voltage data  
Control  
OUT7  
SW2D  
Error Amp  
DRV7  
FB7  
PWM  
VOUT2  
SW2U  
Error Amp  
PWM  
P-skip  
Amp  
VG  
VREF7  
COMP7  
BT2U  
COMP2  
FB2  
voltage data  
Control  
REG6 (34704A)  
REG3  
VG  
voltage data  
Control  
BT3  
PVIN3  
VOUT6  
SW6  
BT6  
L
Error Amp  
SW3  
PWM  
VG  
Error Amp  
VOUT3  
FB3  
Error Amp  
PWM  
P-skip  
FB6  
VG  
REG4  
BT4D  
VG  
PVIN4  
REG5  
voltage data  
Control  
BT5D  
PVIN5  
SW4D  
voltage data  
Control  
SW5D  
VOUT4  
SW4U  
Error Amp  
VOUT5  
SW5U  
Error Amp  
PWM  
P-skip  
VG  
PWM  
P-skip  
BT4U  
VG  
VG  
FB4  
COMP4  
BT5U  
COMP5  
FB5  
VIN  
ONOFF  
LION  
Startup Control  
ADC  
UVLO  
Detection  
VDDI  
VDDI (2.5V) VDDIMON (VDDIdet)  
SCL  
SDA  
FREQ  
SS  
2
Registers  
I C  
Thermal  
Detection  
To Reg 1-8  
RST  
Reset Driver  
Sequencer  
OSC/Divider  
PGND (EXPAD)  
VIN  
AGND  
Soft Start  
Figure 2. 34704 Internal Block Diagram  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
3
PIN CONNECTIONS  
PIN CONNECTIONS  
56 55 54 53 52 51 50 49 48 47 46 45 44 43  
56 55 54 53 52 51 50 49 48 47 46 45 44 43  
1
1
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
BT5U  
BT4D  
PVIN4  
SW4D  
VOUT4  
SW4U  
BT4U  
FB4  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
BT5U  
BT4D  
PVIN4  
SW4D  
VOUT4  
SW4U  
BT4U  
FB4  
BT2U  
ONOFF  
LION  
BT2U  
ONOFF  
LION  
VDDI  
VIN  
2
2
3
57  
57  
3
4
4
VDDI  
5
5
VIN  
6
6
AGND  
VOUT6  
SW6  
AGND  
PGND5  
Exposed Pad  
PGND  
Exposed Pad  
PGND  
7
7
8
8
PGND4  
NC4  
BT6  
COMP4  
BT3  
COMP4  
BT3  
9
9
10  
11  
12  
13  
14  
10  
11  
12  
13  
14  
FB6  
AGND3  
PGND2  
NC3  
PVIN3  
SW3  
PVIN3  
SW3  
VOUT7  
DRV7  
FB7  
VOUT3  
FB3  
VOUT3  
FB3  
AGND1  
NC2  
VREF7  
15 16 17 18 19 20 21 22 23 24 25 26 27 28  
15 16 17 18 19 20 21 22 23 24 25 26 27 28  
34704A  
34704B  
Figure 3. 34704 Pin Connections  
Table 2. 34704 Pin Definitions  
A functional description of each pin can be found in the Functional Pin Description section beginning on page 17.  
Pin Number Device Pin Name Pin Function  
Formal Name  
Definition  
1
2
A/B  
A/B  
BT5U  
BT4D  
REG5 Boost Stage  
Connect a 1μF capacitor between this pin and SW5U pin to  
Passive  
Passive  
bootstrap capacitor input enhance the gate of the Switch Power MOSFET.  
pin  
REG4 Buck Stage  
Connect a 0.01μF capacitor between this pin and SW4D pin to  
bootstrap capacitor input enhance the gate of the Switch Power MOSFET.  
pin  
3
4
5
6
7
A/B  
A/B  
A/B  
A/B  
A/B  
PVIN4  
SW4D  
VOUT4  
SW4U  
BT4U  
REG4 power supply input This is the connection to the drain of the high side switch FET.  
Power  
Input/Output  
Output  
voltage  
Input decoupling /filtering is required for proper REG4 operation.  
REG4 Buck Stage  
switching node  
The inductor is connected between this pin and the SW4U pin.  
REG4 regulated output  
voltage pin  
Connect this pin to the load and to the output filter as close to  
the pin as possible.  
REG4 Boost Stage  
switching node  
The inductor is connected between this pin and the SW4D pin.  
Input/Output  
Passive  
REG4 Boost Stage  
Connect a 0.01μF capacitor between this pin and SW4U pin to  
bootstrap capacitor input enhance the gate of the Switch Power MOSFET.  
pin  
8
A/B  
FB4  
REG4 voltage feedback  
input for voltage  
regulation/programming  
Connect the feedback resistor divider to this pin.  
REG4 compensation network connection.  
Input  
9
A/B  
A/B  
COMP4  
BT3  
REG4 compensation  
network connection  
Passive  
Passive  
10  
REG3 bootstrap capacitor Connect a 0.01μF capacitor between this pin and SW3 pin to  
input pin enhance the gate of the Switch Power MOSFET.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
4
PIN CONNECTIONS  
Table 2. 34704 Pin Definitions (continued)  
A functional description of each pin can be found in the Functional Pin Description section beginning on page 17.  
Pin Number Device Pin Name Pin Function  
Formal Name  
Definition  
11  
12  
13  
14  
A/B  
A/B  
A/B  
A/B  
PVIN3  
REG3 power supply input This is the connection to the drain of the high side switch FET.  
Power  
Output  
Output  
Input  
voltage  
Input decoupling /filtering is required for proper REG3 operation.  
SW3  
REG3 switching node  
The inductor is connected between this pin and the regulated  
REG3 output.  
VOUT3  
FB3  
REG3 output voltage  
return pin  
This is the discharge path of REG3 output voltage.  
REG3 voltage feedback  
input for voltage  
Connect the feedback resistor divider to this pin.  
regulation/programming  
15  
16  
17  
A/B  
A/B  
A/B  
SS  
FREQ  
FB8  
Soft start time  
The soft start time for all regulators can be adjusted by  
connecting this pin to an external resistor divider between VDDI  
and AGND pins.  
Input  
Input  
Input  
Oscillator frequency  
The oscillator frequency can be adjusted by connecting this pin  
to an external resistor divider between VDDI and AGND pins.  
This pin sets FSW1 value.  
REG8 voltage feedback  
input for voltage  
Connect the feedback resistor divider to this pin.  
regulation/programming  
18  
19  
A/B  
A/B  
BT8  
REG8 bootstrap capacitor Connect a 0.01μF capacitor between this pin and SW8 pin to  
Passive  
Output  
input pin  
enhance the gate of the Synchronous Power MOSFET.  
VOUT8  
REG8 regulated output  
voltage pin  
Connect this pin directly to the load directly and to the output  
filter as close to the pin as possible.  
20  
21  
22  
A/B  
A/B  
A/B  
SW8  
SW1  
VG  
REG8 switching node  
REG1 switching node  
The inductor is connected between this pin and VIN pin.  
The inductor is connected between this pin and VIN Pin.  
Output  
Output  
Passive  
REG1 regulated output  
voltage before the cutoff  
switch  
REG1 regulated output voltage before the cut-off switch. This  
supplies the internal circuits and the gate drive  
REG1 regulated output  
voltage pin.  
Connect this pin directly to the load directly and to the output  
filter as close to the pin as possible.  
23  
A
VOUT1  
Output  
-
Pin 23 is not connected.  
B
NC0  
BT1  
No Connect  
Passive  
24  
25  
26  
27  
28  
A/B  
REG1 bootstrap capacitor Connect a 1μF capacitor between this pin and SW1 pin to  
input pin  
enhance the gate of the Switch Power MOSFET.  
A/B  
A/B  
A/B  
A
SCL  
SDA  
I2C serial interface clock  
input  
I2C serial interface clock input.  
Input/Output  
Input/Output  
Open Drain  
Passive  
I2C serial interface data  
input  
I2C serial interface data input.  
RST  
Power reset output signal This is an open drain output and must be pulled up by an  
(Microprocessor Reset)  
external resistor to a supply voltage like VIN  
.
REG7 compensation  
network connection  
REG7 compensation network connection.  
COMP7  
B
A
-
Pin 28 is not connected  
NC1  
No Connect  
Output  
29  
VREF7  
REG7 resistor feedback  
network reference voltage  
Connect this pin to the bottom of the feedback resistor divider.  
B
NC2  
-
Pin 29 is not connected  
No Connect  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
5
PIN CONNECTIONS  
Table 2. 34704 Pin Definitions (continued)  
A functional description of each pin can be found in the Functional Pin Description section beginning on page 17.  
Pin Number Device Pin Name Pin Function  
Formal Name  
Definition  
30  
A
FB7  
REG7 voltage feedback  
input for voltage  
Connect the feedback resistor divider to this pin.  
Input  
regulation/programming  
B
A
AGND1  
DRV7  
-
Pin 30 is connected to AGND  
-
31  
32  
33  
REG7 external Power  
MOSFET gate drive  
REG7 external Power MOSFET gate drive.  
Output  
-
Pin 31 is not connected  
B
A
NC3  
No Connect  
Output  
REG7 output voltage  
return pin.  
This is the discharge path of REG7 output voltage.  
VOUT7  
-
Pin 32 is connected to PGND  
B
A
PGND1  
FB6  
-
REG6 voltage feedback  
input for voltage  
Connect the feedback resistor divider to this pin.  
Input  
regulation/programming  
-
Pin 33 is connected to AGND  
B
A
AGND2  
BT6  
-
34  
35  
REG6 bootstrap capacitor Connect a 0.01μF capacitor between this pin and SW6 pin to  
Passive  
input pin.  
enhance the gate of the Synchronous Power MOSFET.  
-
Pin 34 is not connected  
B
A
NC4  
SW6  
No Connect  
Output  
REG6 switching node  
The inductor is connected between this pin and the VIN pin.  
B
B
A
-
-
Pin 35 is connected to PGND  
PGND2  
VOUT6  
-
36  
REG6 regulated output  
voltage pin  
Connect this pin directly to the load directly and to the output  
filter as close to the pin as possible.  
Output  
-
Pin 36 is connected to PGND  
Analog ground of the IC.  
B
PGND3  
AGND  
VIN  
-
37  
38  
Analog ground of the IC  
A/B  
A/B  
Ground  
Power  
Battery voltage  
connection  
Input decoupling /filtering is required for the device to operate  
properly.  
39  
40  
41  
42  
Internal supply voltage  
Connect a 1μF low ESR decoupling filter capacitor between this  
pin and GND.  
A/B  
A/B  
A/B  
A/B  
VDDI  
LION  
Output  
Input  
Battery Detection  
Pull this pin high to VIN to indicate a connection to a Li-Ion  
battery  
Dual function IC turn On/ This is a hardware enable/disable for the 34704A/B. It can be  
Off  
ONOFF  
BT2U  
Input  
connected to a mechanical switch to turn the power On or Off.  
REG2 Boost Stage  
Connect a 1μF capacitor between this pin and SW2U pin to  
Passive  
bootstrap capacitor input enhance the gate of the Switch Power MOSFET.  
pin  
43  
44  
REG2 compensation  
network connection  
REG2 compensation network connection.  
A/B  
A/B  
COMP2  
FB2  
Passive  
Input  
REG2 voltage feedback  
input for voltage  
Connect the feedback resistor divider to this pin.  
regulation/programming  
45  
REG2 Buck Stage  
Connect a 1μF capacitor between this pin and SW2D pin to  
A/B  
BT2D  
Passive  
bootstrap capacitor input enhance the gate of the Switch Power MOSFET.  
pin  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
6
PIN CONNECTIONS  
Table 2. 34704 Pin Definitions (continued)  
A functional description of each pin can be found in the Functional Pin Description section beginning on page 17.  
Pin Number Device Pin Name Pin Function  
Formal Name  
Definition  
46  
47  
48  
49  
50  
51  
52  
53  
54  
REG2 power supply input This is the connection to the drain of the high side switch FET.  
A/B  
A/B  
A/B  
A/B  
A/B  
A/B  
A/B  
A/B  
A/B  
PVIN2  
SW2D  
VOUT2  
SW2U  
SW5U  
VOUT5  
SW5D  
PVIN5  
BT5D  
Power  
Input/Output  
Output  
voltage  
Input decoupling /filtering is required for proper REG2 operation.  
The inductor is connected between this pin and the SW2U pin.  
REG2 Buck Stage  
switching node  
REG2 regulated output  
voltage pin  
Connect this pin to the load and to the output filter as close to  
the pin as possible.  
REG2 Boost Stage  
switching node  
The inductor is connected between this pin and the SW2D pin.  
Input/Output  
Input/Output  
Output  
REG5 Boost Stage  
switching node  
The inductor is connected between this pin and the SW5D pin.  
REG5 regulated output  
voltage pin  
Connect this pin to the load and to the output filter as close to  
the pin as possible.  
REG5 Buck Stage  
switching node  
The inductor is connected between this pin and the SW5U pin.  
Input/Output  
Power  
REG5 power supply input This is the connection to the drain of the high side switch FET.  
voltage  
Input decoupling /filtering is required for proper REG5 operation.  
REG5 Buck Stage  
Connect a 1μF capacitor between this pin and SW5D pin to  
Passive  
bootstrap capacitor input enhance the gate of the Switch Power MOSFET.  
pin  
55  
56  
REG5 voltage feedback  
input for voltage  
regulation/programming  
Connect the feedback resistor divider to this pin.  
REG5 compensation network connection.  
A/B  
FB5  
Input  
REG5 compensation  
network connection  
A/B  
A/B  
COMP5  
PGND  
Passive  
Ground  
Exposed  
Pad  
Power Ground  
Connection for all of the  
regulators except REG7  
Power Ground Connection for all of the regulators except  
REG7. This pad is provided to enhance thermal performance.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
7
ELECTRICAL CHARACTERISTICS  
MAXIMUM RATINGS  
ELECTRICAL CHARACTERISTICS  
MAXIMUM RATINGS  
Table 3. Maximum Ratings  
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or  
permanent damage to the device.  
Ratings  
Symbol  
Value  
Unit  
ELECTRICAL RATINGS  
Battery Input Supply Voltage (VIN) Pin  
VIN  
-0.3 to 6.0  
-0.3 to 6.0  
-0.3 to 3.0  
V
PVINx, RST, ONOFF, LION, DRV7(5), VG, SCL, SDA and VOUT1-5 Pins  
VDDI, COMPx, FBx, VREF7(5), FREQ, and SS Pins  
SW1-5 Pins  
VSW-LOW  
VSW-HIGH  
VBT-VSW  
VBT  
-1.0 to 6.0  
-1.0 to 27  
-0.3 to 6.0  
-0.3 to 27  
-0.3 to 27  
-10.0 to 0.3  
V
V
SW8, SW6(5) Pins  
BTx Pins (Referenced to switch node)  
BTx Pins to GND  
V
V
VOUT8, VOUT6(5) Pins  
VOUT7 Pin(5)  
VOUT-HIGH  
VOUT-NEG  
V
V
Continuous Output Current  
mA  
REG1(5)  
REG2,5  
500  
500  
REG3  
REG4  
REG6,7(5)  
REG8  
550  
300  
60  
30  
ESD Voltage  
Human Body Model  
Charge Device Model  
VESD1  
VESD2  
±1000  
±500  
V
THERMAL RATINGS  
Maximum Junction Temperature  
Storage Temperature  
TJ(MAX)  
TSTG  
PD  
+150  
-65 to +150  
2.5  
°C  
°C  
W
Maximum Power Dissipation (TA = 85°C)  
THERMAL RESISTANCE(4)  
Thermal Resistance  
°C/W  
°C  
Junction to Ambient  
Junction to Board  
RΘJA  
RΘJB  
26  
10  
Peak Package Reflow Temperature During Reflow(2),(3)  
TPPRT  
Note 3  
Notes  
1. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 Ω), and the Charge Device  
Model (CDM), Robotic (CZAP = 4.0pF).  
2. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may  
cause malfunction or permanent damage to the device.  
3. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow  
Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes  
and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.  
4. Thermal Resistance is based on a four-layer board (2s2p)  
5. Available only on the 34704A  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
8
ELECTRICAL CHARACTERISTICS  
STATIC ELECTRICAL CHARACTERISTICS  
STATIC ELECTRICAL CHARACTERISTICS  
Table 4. Static Electrical Characteristics  
Characteristics noted under conditions 2.7V ≤ VIN ≤ 5.5V, -20°C ≤ TA ≤ 85°C, GND = 0V, unless otherwise noted. Typical  
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.  
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
POWER INPUT  
Input Supply Voltage Typical Range  
VIN  
IIN  
2.7  
-
5.5  
V
Input DC Supply Current(6)  
mA  
VIN Pin Only  
-
-
-
-
-
-
All regulators are ON, no load; Vin = 3.6V, FSW =1Mhz  
Regulators 1 - 5 On, Reg 6, 7 and 8 Off; Vin = 3.6V, FSW = 1Mhz  
86  
32  
Input DC Shutdown Supply Current(6)  
IOFF  
μA  
(Shutdown, All regulators are OFF and VIN = 5.5V)  
This includes any pin connected to the battery  
-
-
-
5.0  
Rising UVLO Threshold (Li-Ion Battery)  
Falling UVLO Threshold (Li-Ion Battery)  
RST  
UVLOR  
UVLOF  
-
-
3.0  
2.7  
V
V
RST Low Level Output Voltage  
IOL = 1.0mA  
VRST-OL  
V
-
-
-
-
0.4  
1
RST Leakage Current, Off-state @ 25°C  
Current Limit Monitoring  
IRST-LKG  
mA  
Over and Short-circuit Current Limit Accuracy  
REGULATOR 1 & VG  
-
-20  
-
20  
%
VG Output Voltage  
VVG  
VOUT  
-
5.0  
5.0  
-
-
V
V
REG1 Output Voltage(7)  
-
-
Output Accuracy  
-
-4.0  
4.0  
%
Line/Load Regulation(6)  
REGLN/LD  
VDYN  
-1.0  
-
1.0  
%
Dynamic Voltage Scaling Range  
-10  
-
10  
%
Dynamic Voltage Scaling Step Size  
Continuous Output Current(6)  
VDYN_STEP  
IOUT  
-
2.5  
100  
2.7  
4.0  
-
-
%
-
500  
mA  
A
Li-Ion Battery Over-current Limit (Detected in Low Side FET)  
Li-Ion Battery Short-circuit Current Limit (Detected in the Blocking FET)  
Li-Ion Battery Over-current Limit Accuracy  
N-CH Switch Power MOSFET RDS(ON)  
N-CH Synch. Power MOSFET RDS(ON)  
N-CH Shutdown Power MOSFET RDS(ON)  
Discharge MOSFET RDS(ON)  
ILIM_ION  
ISHORT_ION  
-
-
-
-
-
A
-20  
20  
%
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) SH  
RDS(ON) DIS  
-
-
-
-
-
-
-
-
-
100  
150  
100  
70  
170  
25  
-
-
mΩ  
mΩ  
mΩ  
Ω
-
-
-
-
-
-
Thermal Shutdown Threshold(6)  
TSD  
-
-
°C  
°C  
μA  
mA  
Thermal Shutdown Hysteresis(6)  
TSD-HYS  
ISW1_LKG  
IPEAK  
SW1 Leakage Current (Off State) @ 25°C  
Peak Current Detection Threshold at Power Up(6)  
1.0  
-
300  
Notes:  
6. Guaranteed by Design  
7. Available only on the 34704A  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
9
ELECTRICAL CHARACTERISTICS  
STATIC ELECTRICAL CHARACTERISTICS  
Table 4. Static Electrical Characteristics (continued)  
Characteristics noted under conditions 2.7V ≤ VIN ≤ 5.5V, -20°C ≤ TA ≤ 85°C, GND = 0V, unless otherwise noted. Typical  
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.  
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
REGULATOR 2  
Output Voltage Range  
Output Accuracy  
VOUT  
-
0.6  
3.3  
-
3.6  
V
%
-2.0  
2.0  
Line/Load Regulation(8)  
REGLN/LD  
VDYN  
-1.0  
-
1.0  
%
Dynamic Voltage Scaling Range  
-17.5  
-
17.5  
%
Dynamic Voltage Scaling Step Size  
VDYN_STEP  
IOUT  
-
2.5  
200  
1.4  
2.1  
-
-
%
Continuous Output Current(8)  
-
500  
mA  
A
Li-Ion Battery Over-current Limit (Detected in buck high side FET)  
Li-Ion Battery Short-circuit Current Limit (Detected in buck high side FET)  
Li-Ion Battery Over-current Limit Accuracy  
N-CH Buck Switch Power MOSFET RDS(ON)  
N-CH Buck Synch. Power MOSFET RDS(ON)  
N-CH Boost Switch Power MOSFET RDS(ON)  
N-CH Boost Synch. Power MOSFET RDS(ON)  
Discharge MOSFET RDS(ON)  
ILIM_ION  
ISHORT_ION  
-
-
-
-
-
A
-20  
20  
%
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) DIS  
-
-
-
-
-
-
-
-
-
-
-
120  
1000  
120  
120  
70  
170  
25  
-
-
mΩ  
mΩ  
mΩ  
mΩ  
Ω
-
-
-
-
-
-
-
-
Thermal Shutdown Threshold(8)  
TSD  
-
°C  
°C  
μA  
μA  
μA  
Thermal Shutdown Hysteresis(8)  
TSD-HYS  
-
PVIN2 Leakage Current (Off State) @25°C  
SW2D Leakage Current (Off State) @25°C  
SW2U Leakage Current (Off State) @25°C  
REGULATOR 3  
IPVIN2G_LKG  
ISW2D_LKG  
ISW2U_LKG  
1.0  
1.0  
1.0  
-
-
Output Voltage Range (Li-Ion Battery)  
Output Accuracy  
VOUT  
-
0.6  
1.2  
-
1.8  
V
%
-4.0  
4.0  
Line/Load Regulation(8)  
REGLN/LD  
VDYN  
-1.0  
-
1.0  
%
Dynamic Voltage Scaling Range  
-17.5  
-
17.5  
%
Dynamic Voltage Scaling Step Size  
VDYN_STEP  
IOUT  
-
2.5  
150  
1.0  
1.5  
-
-
%
Continuous Output Current(8)  
-
550  
mA  
A
Li-Ion Battery Over-current Limit (Detected in buck high side FET)  
Li-Ion Battery Short-circuit Current Limit (Detected in buck high side FET)  
Li-Ion Battery Over-current Limit Accuracy  
N-CH Switch Power MOSFET RDS(ON)  
N-CH Synch. Power MOSFET RDS(ON)  
Discharge MOSFET RDS(ON)  
ILIM_ION  
ISHORT_ION  
-
-
-
-
-
20  
-
A
-20  
%
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) DIS  
-
-
-
-
-
-
-
-
500  
500  
70  
170  
25  
-
mΩ  
mΩ  
Ω
-
-
-
-
Thermal Shutdown Threshold (8)  
TSD  
-
°C  
°C  
μA  
μA  
Thermal Shutdown Hysteresis(8)  
TSD-HYS  
IPVIN3_LKG  
ISW3_LKG  
-
PVIN3 Leakage Current (Off State) @25°C  
SW3 Leakage Current (Off State) @25°C  
1.0  
1.0  
-
Notes:  
8. Guaranteed by Design  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
10  
ELECTRICAL CHARACTERISTICS  
STATIC ELECTRICAL CHARACTERISTICS  
Table 4. Static Electrical Characteristics (continued)  
Characteristics noted under conditions 2.7V ≤ VIN ≤ 5.5V, -20°C ≤ TA ≤ 85°C, GND = 0V, unless otherwise noted. Typical  
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.  
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
REGULATOR 4  
Output Voltage Range  
Output Accuracy  
VOUT  
-
0.6  
1.8  
-
3.6  
2.0  
1.0  
10  
-
V
%
-2.0  
Line/Load Regulation(9)  
REGLN/LD  
VDYN  
-1.0  
-
%
Dynamic Voltage Scaling Range  
-10  
-
%
Dynamic Voltage Scaling Step Size  
VDYN_STEP  
IOUT  
-
1.0  
100  
1.5  
2.25  
-
%
Continuous Output Current(9)  
-
300  
-
mA  
A
Li-Ion Battery Over-current Limit (Detected in buck high side FET)  
Li-Ion Battery Short-circuit Current Limit (Detected in buck high side FET)  
Li-Ion Battery Over-current Limit Accuracy  
N-CH Buck Switch Power MOSFET RDS(ON)  
N-CH Buck Synch. Power MOSFET RDS(ON)  
N-CH Boost Switch Power MOSFET RDS(ON)  
N-CH Boost Synch. Power MOSFET RDS(ON)  
Discharge MOSFET RDS(ON)  
ILIM_ION  
ISHORT_ION  
-
-
-
-
A
-20  
20  
-
%
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) DIS  
-
-
-
-
-
-
-
-
-
-
-
200  
600  
200  
600  
70  
170  
25  
-
mΩ  
mΩ  
mΩ  
mΩ  
Ω
-
-
-
-
-
-
-
-
Thermal Shutdown Threshold(9)  
TSD  
-
°C  
°C  
μA  
μA  
μA  
Thermal Shutdown Hysteresis(9)  
TSD-HYS  
-
PVIN4 Leakage Current (Off State) @25°C  
SW4D Leakage Current (Off State) @25°C  
SW4U Leakage Current (Off State) @25°C  
REGULATOR 5  
IPVIN4_LKG  
ISW4D_LKG  
ISW4U_LKG  
1.0  
1.0  
1.0  
-
-
Output Voltage Range  
VOUT  
-
0.6  
3.3  
-
3.6  
V
%
Output Accuracy  
-2.0  
2.0  
Line/Load Regulation(9)  
REGLN/LD  
VDYN  
-1.0  
-
1.0  
%
Dynamic Voltage Scaling Range  
-17.5  
-
17.5  
%
Dynamic Voltage Scaling Step Size  
VDYN_STEP  
IOUT  
-
2.5  
150  
1.4  
2.1  
-
-
%
Continuous Output Current(9)  
-
500  
mA  
A
Li-Ion Battery Over-current Limit (Detected in buck high side FET)  
Li-Ion Battery Short-circuit Current Limit (Detected in buck high side FET)  
Li-Ion Battery Over-current Limit Accuracy  
N-CH Buck Switch Power MOSFET RDS(ON)  
N-CH Buck Synch. Power MOSFET RDS(ON)  
N-CH Boost Switch Power MOSFET RDS(ON)  
N-CH Boost Synch. Power MOSFET RDS(ON)  
Discharge MOSFET RDS(ON)  
ILIM_ION  
ISHORT_ION  
-
-
-
-
-
A
-20  
20  
-
%
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) DIS  
-
-
-
-
-
-
-
-
120  
1000  
120  
120  
70  
mΩ  
mΩ  
mΩ  
mΩ  
Ω
-
-
-
-
-
-
-
-
Thermal Shutdown Threshold(9)  
TSD  
170  
25  
-
°C  
°C  
Thermal Shutdown Hysteresis(9)  
TSD-HYS  
-
Notes:  
9. Guaranteed by Design  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
11  
ELECTRICAL CHARACTERISTICS  
STATIC ELECTRICAL CHARACTERISTICS  
Table 4. Static Electrical Characteristics (continued)  
Characteristics noted under conditions 2.7V ≤ VIN ≤ 5.5V, -20°C ≤ TA ≤ 85°C, GND = 0V, unless otherwise noted. Typical  
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.  
Characteristic  
PVIN5 Leakage Current (Off State) @25°C  
SW5D Leakage Current (Off State) @25°C  
SW5U Leakage Current (Off State) @25°C  
REGULATOR 6(11)  
Symbol  
Min  
Typ  
Max  
Unit  
IPVIN5_LKG  
ISW5D_LKG  
ISW5U_LKG  
-
-
-
-
-
-
1.0  
1.0  
1.0  
μA  
μA  
μA  
Output Voltage Range  
VOUT  
-
5.0(12)  
15  
-
15  
4.0  
1.0  
10  
-
V
%
Output Accuracy  
-4.0  
Line/Load Regulation(10)  
REGLN/LD  
VDYN  
-1.0  
-
%
Dynamic Voltage Scaling Range  
-10  
-
%
Dynamic Voltage Scaling Step Size  
Continuous Output Current(10)  
VDYN_STEP  
IOUT  
-
2.5  
50  
3.0  
4.5  
-
%
-
60  
-
mA  
A
Li-Ion Battery Over-current Limit (Detected in low side FET)  
Li-Ion Battery Short-circuit Current Limit (Detected in the Blocking FET)  
Li-Ion Battery Over-current Limit Accuracy  
N-CH Switch Power MOSFET RDS(ON)  
N-CH Synch. Power MOSFET RDS(ON)  
N-CH Shutdown Power MOSFET RDS(ON)  
Discharge MOSFET RDS(ON)  
ILIM_ION  
ISHORT_ION  
-
-
-
-
A
-20  
20  
-
%
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) SH  
RDS(ON) DIS  
-
-
-
-
-
-
-
-
200  
600  
200  
70  
170  
25  
-
mΩ  
mΩ  
mΩ  
Ω
-
-
-
-
-
-
Thermal Shutdown Threshold(10)  
Thermal Shutdown Hysteresis(10)  
SW6 Leakage Current (Off State) @25°C  
REGULATOR 7(11)  
TSD  
-
°C  
°C  
μA  
TSD-HYS  
ISW6_LKG  
-
1.0  
Output Voltage Range (Li-Ion Battery)  
Output Accuracy  
VOUT  
-
-5.0  
-7.0  
-
-9.0  
2.0  
1.0  
60  
V
%
%
mA  
Ω
-2.0  
Line/Load Regulation(10)  
REGLN/LD  
IOUT  
-1.0  
-
Continuous Output Current(10)  
-
50  
55  
0.8  
1.1  
1.5  
-
Discharge MOSFET RDS(ON)  
RDS(ON) DIS  
-
-
-
Gate Drive Voltage High Level (@ -50mA, VIN=3.6V)  
Gate Drive Voltage Low Level (@ 50mA, VIN=3.6V)  
VREF7 Output Voltage  
VIN-VOH  
VOL  
-
-
1.4  
1.8  
-
V
V
VREF7  
-
-
V
VREF7 Voltage Accuracy  
1.43  
1.43  
1.57  
1.57  
V
VREF7 Output Load Regulation (10μA to 1.0mA)  
REGLD  
-
V
Notes  
10. Guaranteed by Design  
11. Available only on the 34704A  
12. When battery voltage is higher than 5.0V, a diode implementation like the one displayed on VG is necessary.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
12  
ELECTRICAL CHARACTERISTICS  
STATIC ELECTRICAL CHARACTERISTICS  
Table 4. Static Electrical Characteristics (continued)  
Characteristics noted under conditions 2.7V ≤ VIN ≤ 5.5V, -20°C ≤ TA ≤ 85°C, GND = 0V, unless otherwise noted. Typical  
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.  
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
REGULATOR 8  
Output Voltage Range (Li-Ion Battery)  
Output Accuracy  
VOUT  
-
5.0(14)  
15  
-
15  
4.0  
10  
-
V
%
-4.0  
Dynamic Voltage Scaling Range  
VDYN  
-10  
-
%
Dynamic Voltage Scaling Step Size  
Line/Load Regulation(13)  
VDYN_STEP  
REGLN/LD  
IOUT  
-
2.5  
-
%
-1.0  
1.0  
30  
-
%
Continuous Output Current(13)  
-
15  
1.0  
1.5  
-
mA  
A
Li-Ion Battery Over-current Limit (Detected in low side FET)  
Li-Ion Battery Short-circuit Current Limit (Detected in the Blocking FET)  
Li-Ion Battery Over-current Limit Accuracy  
N-CH Switch Power MOSFET RDS(ON)  
N-CH Synch. Power MOSFET RDS(ON)  
N-CH Shutdown Power MOSFET RDS(ON)  
Discharge MOSFET RDS(ON)  
ILIM_ION  
ISHORT_ION  
-
-
-
-
A
-20  
20  
-
%
RDS(ON) SW  
RDS(ON) SY  
RDS(ON) SH  
RDS(ON) DIS  
-
-
-
-
-
-
-
-
450  
1000  
450  
70  
170  
25  
-
mΩ  
mΩ  
mΩ  
Ω
-
-
-
-
-
-
Thermal Shutdown Threshold(13)  
TSD  
-
°C  
°C  
μA  
Thermal Shutdown Hysteresis(13)  
TSD-HYS  
ISW8_LKG  
-
SW8 Leakage Current (Off State) @25°C  
1.0  
Notes  
13. Guaranteed by Design  
14. When battery voltage is higher than 5.0V, a diode implementation like the one displayed on VG is necessary.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
13  
ELECTRICAL CHARACTERISTICS  
DYNAMIC ELECTRICAL CHARACTERISTICS  
DYNAMIC ELECTRICAL CHARACTERISTICS  
Table 5. Dynamic Electrical Characteristics  
Characteristics noted under conditions 2.7V ≤ VIN ≤ 5.5V, -20°C ≤ TA ≤ 85°C, GND = 0V, unless otherwise noted. Typical  
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.  
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
FREQ  
Selectable Switching Frequency 1  
Selectable Switching Frequency 2  
Selectable Switching Frequency Step Size  
Switching Frequency Accuracy  
Retry Time-out Period(16)  
FSW1  
FSW2  
FSTEP  
750  
250  
-
-
-
2000  
kHz  
kHz  
kHz  
%
1000  
250  
-
-
10  
-
-10  
-
tTIMEOUT  
10  
ms  
CURRENT LIMIT MONITORING  
Over-current Limit Timer(16)  
tLIMIT  
-
-
10  
10  
-
-
ms  
ms  
Retry Time-out Period(16)  
tRETRY  
OUTPUT OVER-VOLTAGE/UNDER-VOLTAGE MONITORING  
Under-voltage Threshold (Response A)  
Over-voltage Threshold (Response A)  
Under-voltage Threshold (Response B)  
Over-voltage Threshold (Response B)  
Filter Delay Timer(16)  
VUV-R  
VOV-R  
VUV-R  
VOV-R  
tFILTER  
-
-
-
-
-
-20  
20  
-
-
-
-
-
%
%
%
%
μs  
-20  
20  
20  
RST  
RST Reset Delay(16)  
tRST-DELAY  
-
10  
ms  
REGULATOR 1 & VG  
Li-Ion Battery Operating Frequency(15), (16)  
Operating Frequency Selection Step Size  
Constant Time Off Value(16)  
FSW1  
FSTEP  
tOFF  
750  
-
1500  
kHz  
kHz  
μs  
-
-
-
250  
1.0  
15  
-
-
-
Low Side Time Out(16)  
tTIMEOUT  
μs  
REGULATOR 2  
Li-Ion Battery Operating Frequency(16)  
Operating Frequency Selection Step Size  
Notes  
FSW1  
750  
-
-
2000  
-
kHz  
kHz  
FSTEP  
250  
15. When REG1 is used, the maximum FSW1 Frequency programed with external components should be 1500KHz  
16. Guaranteed by design.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
14  
ELECTRICAL CHARACTERISTICS  
DYNAMIC ELECTRICAL CHARACTERISTICS  
Table 5. Dynamic Electrical Characteristics  
Characteristics noted under conditions 2.7V ≤ VIN ≤ 5.5V, -20°C ≤ TA ≤ 85°C, GND = 0V, unless otherwise noted. Typical  
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.  
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
REGULATOR 3  
Li-Ion Battery Operating Frequency  
Operating Frequency Selection Step Size  
REGULATOR 4  
FSW1  
750  
-
-
2000  
-
kHz  
kHz  
FSTEP  
250  
Li-Ion Battery Operating Frequency  
Operating Frequency Selection Step Size  
REGULATOR 5  
FSW1  
750  
-
-
2000  
-
kHz  
kHz  
FSTEP  
250  
Li-Ion Battery Operating Frequency  
Operating Frequency Selection Step Size  
REGULATOR 6  
FSW1  
750  
-
-
2000  
-
kHz  
kHz  
FSTEP  
250  
Li-Ion Battery Operating Frequency  
Operating Frequency Selection Step Size  
REGULATOR 7  
FSW2  
250  
-
-
1000  
-
kHz  
kHz  
FSTEP  
250  
Operating Frequency Selections  
Operating Frequency Selection Step Size  
REGULATOR 8  
FSW2  
250  
-
-
1000  
-
kHz  
kHz  
FSTEP  
250  
Li-Ion Battery Operating Frequency  
Operating Frequency Selection Step Size  
FSW2  
250  
-
-
1000  
-
kHz  
kHz  
FSTEP  
250  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
15  
FUNCTIONAL DESCRIPTION  
INTRODUCTION  
FUNCTIONAL DESCRIPTION  
INTRODUCTION  
The 34704 is an multi-channel power management IC  
(PMIC) meant to address power management needs for  
various multimedia applications microprocessors in various  
configurations with a target overall efficiency of > 80% at  
typical loads.  
The 34704 accepts an input voltage from various sources:  
•1 cell Li-Ion/Polymer (2.7V to 4.2V)  
•5.0V USB supply or AC wall adapter  
The different channels are:  
IOUT TYP  
IOUT MAX  
(MA)  
REGULATOR  
REGULATOR TYPE  
VOUT TYP (V)  
TARGET APPLICATION  
(MA)  
100  
200  
150  
100  
150  
20  
REG1(18)  
REG2  
Synchronous Boost  
Synchronous Buck-Boost  
Synchronous Buck  
5.0  
2.8 / 3.3  
1.2 / 1.5 / 1.8  
1.8 / 2.5  
3.3  
500  
500  
550  
300  
500  
60  
+5V REF  
µP I/O  
REG3  
µP Core  
DDR  
REG4  
Synchronous Buck-Boost  
Synchronous Buck-Boost  
Synchronous Boost  
REG5  
µP I/O  
REG6(18)  
REG7(18)  
REG8  
15.0  
REF+  
Inverter Controller  
-7.0  
20  
60  
REF -  
Synchronous Boost  
15.0  
15  
30  
Backlight Display  
Notes  
17. Synchronous Buck-Boost: These regulators can work as pure BUCK regulator when the output voltage is lower than the input  
voltage; and work as pure BOOST regulator when the input voltage is lower than the output voltage. Compensation should be done  
for the worst case scenario, which is in most of the cases when the device is working as a boost converter, after compensating for  
this scenario it is recommended to verify the buck operation to assure stability in the whole operating range.  
18. Available only on the 34704A  
REG1, REG3, REG6, and REG8 use internal  
compensation, while REG2, REG4, REG5, and REG7 use  
external compensation.  
EMI performance and reduction in the input filter  
requirements.  
Each regulator except REG1 uses an external feedback  
resistor divider to set the output voltage. All output voltages  
can be adjusted dynamically (Dynamic Voltage Scaling) on  
the fly through an I²C serial interface. All converters, except  
REG1, utilize automatic soft-start by ramping the reference  
voltage to the error amplifier to prevent sudden change in  
duty cycle and output current/voltage at power up. REG1  
(VG) will limit the inrush current by implementing a peak  
current detect and a constant off time.  
The switching frequency of all regulators except REG6, 7,  
& 8 can be selected through the FREQ pin between 750kHz  
and 2.0MHz in 250kHz steps, when operating from a Li-Ion  
battery. The high frequency operation is meant to minimize  
the size of external components while lower operating  
frequencies will allow for higher efficiency. REG7 is limited to  
operate at a lower frequency to minimize switching noise  
induced by driving the external switching MOSFET, but also  
can operate at the 1.0MHz value with proper board layout.  
REG 6, 7, and 8 switching frequency can be selected  
between 250kHz and 1.0MHz in 250kHz steps through I2C.  
The 34704 is equipped with a dual function Power On/Off  
pin (ONOFF). This pin can be controlled by a mechanical  
switch to turn the device on or off. Pressing and releasing the  
mechanical switch turns the 34704 on while pressing and  
holding the switch for a time period (programmable through  
I2C) turns the 34704 off. Enable/disable control is also  
granted through I2C for groups of regulators and the whole  
IC.  
For all regulators and at lower loads, a pulse skipping  
mode is implemented to maintain high efficiency. The 34704  
uses 4 different phases of switching for all regulators except  
REG6, 7, and 8, to spread out the current draw by the  
individual converters from the input supply over time, to  
reduce the peak input current demand. This allows for better  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
16  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL PIN DESCRIPTION  
FUNCTIONAL PIN DESCRIPTION  
REG5 BOOST STAGE BOOTSTRAP CAPACITOR REG3 SWITCHING NODE (SW3)  
INPUT PIN (BT5U)  
The inductor is connected between this pin and the  
regulated REG3 output.  
Connect a 1μF capacitor between this pin and SW5U pin  
to enhance the gate of the Switch Power MOSFET.  
REG3 OUTPUT VOLTAGE RETURN PIN (VOUT3)  
REG4 BUCK STAGE BOOTSTRAP CAPACITOR  
INPUT PIN (BT4D)  
This is the discharge path of REG3 output voltage.  
REG3 VOLTAGE FEEDBACK INPUT FOR  
VOLTAGE REGULATION/PROGRAMMING (FB3)  
Connect a 0.01μF capacitor between this pin and SW4D  
pin to enhance the gate of the Switch Power MOSFET.  
Connect the feedback resistor divider to this pin.  
REG4 POWER SUPPLY INPUT VOLTAGE (PVIN4)  
This is the connection to the drain of the high side switch  
FET. Input decoupling /filtering is required for proper REG4  
operation.  
SOFT START TIME (SS)  
The soft start time for all regulators can be adjusted by  
connecting this pin to an external resistor divider between  
VDDI and AGND pins.  
REG4 BUCK STAGE SWITCHING NODE (SW4D)  
The inductor is connected between this pin and the SW4U  
pin.  
OSCILLATOR FREQUENCY (FREQ)  
The oscillator frequency can be adjusted by connecting  
this pin to an external resistor divider between VDDI and  
AGND pins. This pin sets FSW1 value.  
REG4 REGULATED OUTPUT VOLTAGE PIN  
(VOUT4)  
REG8 VOLTAGE FEEDBACK INPUT FOR  
VOLTAGE REGULATION/PROGRAMMING (FB8)  
Connect this pin to the load and to the output filter as close  
to the pin as possible.  
Connect the feedback resistor divider to this pin, when  
voltage mode control is used. When current mode control is  
used, connect this pin between the LED string and an ISET  
resistor to GND to force the operating current. Refer to  
Figure 7 and Figure 8. Exclude the components not used.  
REG4 BOOST STAGE SWITCHING NODE (SW4U)  
The inductor is connected between this pin and the SW4D  
pin.  
REG4 BOOST STAGE BOOTSTRAP CAPACITOR  
INPUT PIN (BT4U)  
REG8 BOOTSTRAP CAPACITOR INPUT PIN (BT8)  
Connect a 0.01μF capacitor between this pin and SW8 pin  
to enhance the gate of the Synchronous Power MOSFET.  
Connect a 0.01μF capacitor between this pin and SW4U  
pin to enhance the gate of the Switch Power MOSFET.  
REG8 REGULATED OUTPUT VOLTAGE PIN  
(VOUT8)  
REG4 VOLTAGE FEEDBACK INPUT FOR  
VOLTAGE REGULATION/PROGRAMMING (FB4)  
Connect this pin directly to the load directly and to the  
output filter as close to the pin as possible.  
Connect the feedback resistor divider to this pin.  
REG4 COMPENSATION NETWORK CONNECTION  
(COMP4)  
REG8 SWITCHING NODE (SW8)  
The inductor is connected between this pin and VIN pin.  
REG4 compensation network connection.  
REG1 SWITCHING NODE (SW1)  
REG3 BOOTSTRAP CAPACITOR INPUT PIN (BT3)  
The inductor is connected between this pin and VIN pin.  
Connect a 0.01μF capacitor between this pin and SW3 pin  
to enhance the gate of the Switch Power MOSFET.  
REG1 REGULATED OUTPUT VOLTAGE BEFORE  
THE CUT-OFF SWITCH (VG)  
REG3 POWER SUPPLY INPUT VOLTAGE (PVIN3)  
REG1 regulated output voltage before the cutoff switch.  
This supplies the internal circuits and the gate drive.  
This is the connection to the drain of the high side switch  
FET. Input decoupling /filtering is required for proper REG3  
operation.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
17  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL PIN DESCRIPTION  
REG1 REGULATED OUTPUT VOLTAGE PIN  
(VOUT1) (34704A ONLY)  
REG6 SWITCHING NODE (SW6) (34704A ONLY)  
The inductor is connected between this pin and the VIN  
pin.  
Connect this pin directly to the load directly and to the  
output filter as close to the pin as possible.  
REG6 REGULATED OUTPUT VOLTAGE PIN  
(VOUT6) (34704A ONLY)  
REG1 BOOTSTRAP CAPACITOR INPUT PIN (BT1)  
Connect a 1μF capacitor between this pin and SW1 pin to  
enhance the gate of the Switch Power MOSFET.  
Connect this pin directly to the load directly and to the  
output filter as close to the pin as possible.  
2
I C SERIAL INTERFACE CLOCK INPUT (SCL)  
ANALOG GROUND (AGND)  
I2C serial interface clock input.  
Analog ground of the IC.  
2
I C SERIAL INTERFACE DATA INPUT (SDA)  
BATTERY VOLTAGE CONNECTION (VIN)  
I2C serial interface data input  
Input decoupling /filtering is required for the device to  
operate properly.  
POWER RESET OUTPUT SIGNAL  
(MICROPROCESSOR RESET) (RST)  
INTERNAL SUPPLY VOLTAGE (VDDI)  
Connect a 1μF low ESR decoupling filter capacitor  
between this pin and GND.  
This is an open drain output and must be pulled up by an  
external resistor to a supply voltage like VIN.  
BATTERY DETECTION (LION)  
REG7 COMPENSATION NETWORK CONNECTION  
(COMP7)  
Pull this pin high to VIN to indicate a connection to a Li-Ion  
battery.  
REG7 compensation network connection.  
DUAL FUNCTION IC TURN ON/OFF (ONOFF)  
REG7 RESISTOR FEEDBACK NETWORK  
This is a hardware enable/disable for the 34704. It can be  
connected to a mechanical switch to turn the power On or Off.  
REFERENCE VOLTAGE (VREF7) (34704A ONLY)  
Connect this pin to the bottom of the feedback resistor  
divider.  
REG2 BOOST STAGE BOOTSTRAP CAPACITOR  
INPUT PIN (BT2U)  
REG7 VOLTAGE FEEDBACK INPUT FOR  
VOLTAGE REGULATION/PROGRAMMING (FB7)  
(34704A ONLY)  
Connect a 1μF capacitor between this pin and SW2U pin  
to enhance the gate of the Switch Power MOSFET.  
Connect the feedback resistor divider to this pin.  
REG2 COMPENSATION NETWORK CONNECTION  
(COMP2)  
REG7 EXTERNAL POWER MOSFET GATE DRIVE  
(DRV7) (34704A ONLY)  
REG2 compensation network connection.  
REG7 external Power MOSFET gate drive.  
REG2 VOLTAGE FEEDBACK INPUT FOR  
VOLTAGE REGULATION/PROGRAMMING (FB2)  
REG7 OUTPUT VOLTAGE RETURN PIN (VOUT7)  
(34704A ONLY)  
Connect the feedback resistor divider to this pin.  
This is the discharge path of REG7 output voltage.  
REG2 BUCK STAGE BOOTSTRAP CAPACITOR  
INPUT PIN (BT2D)  
REG6 VOLTAGE FEEDBACK INPUT FOR  
VOLTAGE REGULATION/PROGRAMMING (FB6)  
(34704A ONLY)  
Connect a 1μF capacitor between this pin and SW2D pin  
to enhance the gate of the Switch Power MOSFET.  
Connect the feedback resistor divider to this pin.  
REG2 POWER SUPPLY INPUT VOLTAGE (PVIN2)  
This is the connection to the drain of the high side switch  
FET. Input decoupling /filtering is required for proper REG2  
operation.  
REG6 BOOTSTRAP CAPACITOR INPUT PIN (BT6)  
(34704A ONLY)  
Connect a 0.01μF capacitor between this pin and SW6 pin  
to enhance the gate of the Synchronous Power MOSFET.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
18  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL PIN DESCRIPTION  
REG2 BUCK STAGE SWITCHING NODE (SW2D)  
REG5 POWER SUPPLY INPUT VOLTAGE (PVIN5)  
The inductor is connected between this pin and the SW2U  
pin.  
This is the connection to the drain of the high side switch  
FET. Input decoupling /filtering is required for proper REG5  
operation.  
REG2 REGULATED OUTPUT VOLTAGE PIN  
(VOUT2)  
REG5 BUCK STAGE BOOTSTRAP CAPACITOR  
INPUT PIN (BT5D)  
Connect this pin to the load and to the output filter as close  
to the pin as possible.  
Connect a 1μF capacitor between this pin and SW5D pin  
to enhance the gate of the Switch Power MOSFET.  
REG2 BOOST STAGE SWITCHING NODE (SW2U)  
REG5 VOLTAGE FEEDBACK INPUT FOR  
VOLTAGE REGULATION/PROGRAMMING (FB5)  
The inductor is connected between this pin and the SW2D  
pin.  
Connect the feedback resistor divider to this pin.  
REG5 BOOST STAGE SWITCHING NODE (SW5U)  
REG5 COMPENSATION NETWORK CONNECTION  
(COMP5)  
The inductor is connected between this pin and the SW5D  
pin.  
REG5 compensation network connection.  
REG5 REGULATED OUTPUT VOLTAGE PIN  
(VOUT5)  
POWER GROUND CONNECTION FOR ALL OF THE  
REGULATORS EXCEPT REG7 (PGND)  
Connect this pin to the load and to the output filter as close  
to the pin as possible.  
Power Ground Connection for all of the regulators except  
REG7.  
REG5 BUCK STAGE SWITCHING NODE (SW5D)  
The inductor is connected between this pin and the SW5U  
pin.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
19  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL INTERNAL BLOCK DESCRIPTION  
FUNCTIONAL INTERNAL BLOCK DESCRIPTION  
MC34704 - Functional Block Diagram  
Internal Bias Circuit  
Output Groups  
VREF Generator  
VDDI Reference  
Regulator 1*  
A
B
C
Gate Driver Voltage VG  
Regulator 2  
Regulator 3  
Regulator 4  
Fault Detection & Protection  
Over-Voltage  
Thermal Limit  
Under-Voltage  
Short Circuit  
Regulator 5  
Regulator 6*  
Regulator 7*  
Over-Current  
Regulator 8  
D
E
Logic & Control  
Startup Sequencing  
Phase Control  
Soft Start Control  
Fault Register  
Regulator 5  
I2C Communication & Registers  
* 34704A 8-CH only  
Internal Bias Circuit  
Logic & Control  
Output Groups  
Fault Detection & Protection  
Figure 4. MC34704 Functional Internal Block Diagram  
VDDI Reference Voltage  
INTERNAL BIAS CIRCUIT  
Gate Driver Voltage (VG)  
The 34704 uses the internal VG voltage to provide a  
precise low current 2.5V voltage that is meant to serve as  
reference voltage to derive the FREQ and SS voltage needed  
to set the switching frequency 1 (FSW1) and the soft start,  
respectively.  
REG1/VG is the main regulator of the 34704 IC and will be  
used to supply internal circuitry and voltage biases through  
the VG output. It also provides the gate drive voltage for the  
rest of the regulators and itself.  
FAULT DETECTION AND PROTECTION  
Thermal Limit Detection  
See Power-Up Sequence on page 27 for more details on  
how REG1 is a critical part of powering up the 34704. Based  
on this, REG1 will need extra circuitry to help it boot up until  
its output voltage is high enough that it can supply internal  
circuitry for the main control loop to take over.  
There is a thermal sensor for each regulator except REG7.  
All regulators of the corresponding group will shutdown if at  
least one of them reaches the thermal limit. If either REG2,  
REG3 or REG4 reaches its thermal limit, the whole part will  
shutdown immediately.  
REG1 VG starts up in peak current detect PFM mode and  
REG1 VG output starts rising. When the appropriate internal  
circuitry is alive and the switching frequency FSW1 is  
selected, the PWM control of REG1 can take over.  
Over-Current & Short Circuit Monitoring  
VREF Generator - Internal Reference  
The current limit circuitry has two levels of current limiting:  
Each one of the regulators in the 34704 uses a DAC which  
is controlled by the I2C interface to generate a dynamic VREF  
voltage for setting the output voltage on each regulator.  
• A soft over-current limit (over-current limit): If the peak  
current reaches the typical over-current limit, the switcher  
will start a cycle-by-cycle operation to limit the current and  
a 10ms current limit timer starts. The switcher will stay in  
this mode of operation until the part regains normal  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
20  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL INTERNAL BLOCK DESCRIPTION  
operation, or shuts down after a failure to regain normal  
operation.  
Phase Control  
REG1 to REG5 use the main Switching frequency FSW1,  
which is configured through the FREQ terminal at power up.  
FSW1 uses 4 different phases of switching (clock is 80  
degrees out of phase) to spread out the current draw by the  
individual converters from the input supply over time to  
reduce the peak input current demand. The remaining  
regulators use FSW2 which can be programmed at any time  
via I2C after a successful power up sequence.  
• A hard over-current limit (short-circuit limit) that is higher  
than the cycle by cycle limit at which the device reacts by  
shutting down the output immediately. This is necessary to  
prevent damage in case of a short-circuit. After that, only  
GrpB will attempt a one time retry after a time-out period of  
10ms and will go through a new soft start cycle  
Output Over-voltage/Under-voltage Monitoring  
Fault Register  
In the case of an output over-voltage/under-voltage, the  
user has two options that can be programmed through the  
I2C interface:  
The 34704 has a dedicate fault register accessible via I2C  
which indicate which regulator is detecting a fault situation. In  
addition to this, each channel has its own fault register which  
indicates the type of fault detected in that regulator.  
Response A: The output will switch off automatically and  
the 34704 would alert the processor through I2C that such an  
event happened.  
I2C communication and Registers  
Response B: The output will not switch off. Rather the  
34704 communicates to the processor that an over-voltage/  
under-voltage condition has occurred and waits for the  
processor decision to either shutoff or not; in the mean time  
the control loop will try to fix itself.  
The 34704 can communicate using a standard I2C,  
communication protocol or an accurate I2C protocol. During  
the first one, the device processes the given command as  
soon as it has received it. During the accurate data  
communication, the device requires that each read/write  
command be sent twice to validate the data. The 34704  
provides a user accessible register map that allows various  
general IC configurations as well as independent control of  
each regulator, including fault flag registers and all  
configurable features for each regulator.  
LOGIC AND CONTROL  
Startup Sequencing  
At power up, the VG regulator starts ramping up in peak  
detect mode. Meanwhile, VDDI is tracking VG until it reaches  
regulation and releases a POR signal that enables the  
internal circuitry and reads the FREQ and SS configuration to  
ramp up REG2, REG3 and REG4, that serve as the MPU  
main power supplies. Once the MPU is up, I2C  
OUTPUT GROUPS - REGULATORS  
The 34704 is divided in 5 different groups which are  
arranged as follows:  
• GrpA: Includes REG1(1) (VOUT1)  
communication is available to enable or disable GrpA, GrpC,  
GrpD and GrpE. An extra sequence can be configured for  
REG5, REG6 and REG7, changing the order in which they  
ramp up when enabled. See Power-Up Sequence on page  
27.  
• GrpB: Includes REG2, REG3, and REG4  
• GrpC: Includes REG5, REG6(1), and REG7(1)  
• GrpD: Includes REG8  
• GrpE: This is a special group. It includes REG5 when  
GrpC/E power sequencing option#1 is chosen  
Soft Start Control  
Turning on/off each group would cause all contained  
regulators to turn on/off.  
During power up the 34704 reads the SS terminal to  
configure a default soft start timing for all regulators when  
these are enabled. Soft start for REG5 to REG8 can be  
changed via I2C at any time after power up has successfully  
completed.  
Notes  
1. Only on 34704A  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
21  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL INTERNAL BLOCK DESCRIPTION  
REGUALATOR OVERVIEW WITH EFFICIENCY ANALYSIS  
REG1 (34704A Only)  
• No faults exist that would cause the 34704 to shutdown  
The VOUT1 output will be active when:  
REG1 is a synchronous boost PWM voltage-mode control  
DC/DC regulator available only in the 34704A. Even though  
REG1 is a synchronous regulator, it is recommended to have  
a diode connected externally across its synchronous  
• VG output is available AND  
• There is no GrpA shutdown command through the I2C  
interface AND  
MOSFET. When the battery voltage is above REG1’s output  
(>5.0V) as the case might be when connected to the USB  
supply or wall adaptor, the REG1 power MOSFETs will be tri-  
stated and the voltage on the output will be Battery minus the  
diode drop. This will help maintain REG1’s output to a  
maximum of 5.2V and not allow it to drift all the way to 5.5V.  
• No faults exist that would cause the VOUT1 to shut down  
REG2  
This is a 4-switch synchronous buck-boost PWM voltage-  
mode control DC/DC regulator.  
See Power-Up Sequence on page 27 for more details on  
when REG2 is powered up in the sequence.  
The switcher will operate in DCM at very light loads to  
allow pulse skipping.  
The switcher will operate in DCM at very light loads to  
allow pulse skipping.  
On the 34704A, when the appropriate command is  
received from the processor to turn on VOUT1, then the  
isolation FET of REG1 would turn on gradually to avoid any  
inrush current out of VG and to ramp the VOUT1 voltage in a  
controlled manner.  
VOUT2 will be discharged every time the regulator is  
shutting down and it will be held low by the discharge FET as  
long as possible.  
REG1 VOUT1 will be discharged every time GrpA is  
shutting down and it will be held low by the discharge FET as  
long as possible.  
Characteristics  
• It powers up directly from the battery  
• Operates at a switching frequency equals to FSW1  
• Drives integrated low RDS(ON) N-channel power  
MOSFETs (NHV_HC) as its output stage  
• The output is ±2% accuracy  
• Output voltage is adjustable by means of an external  
resistor divider  
• The output can be adjusted up or down at 2.5% steps for  
a total of +17.5% to -20.0% on each direction allowing  
Dynamic Voltage Scaling  
Characteristics  
• It powers up directly from the battery  
• Operates at a switching frequency equals to FSW1  
• Drives integrated low RDS(ON) N-channel power  
MOSFETs (NHV_HC) as its output stage  
• It offers load disconnect from the input battery when the  
output is off (True Cutoff)  
• The output is ±4% accuracy  
• Output voltage is set to 5.0V by means of an internal  
resistor divider  
• Uses bootstrap networks with an internal diode to power  
its high side MOSFETs  
• All gate drive circuits are supplied from VG  
• Uses external compensation  
• The output is monitored for under-voltage and over-  
voltage conditions  
• The output is monitored for over-current and short-circuit  
conditions  
• The regulator is monitored for over-temperature conditions  
• The output can be adjusted up or down at 2.5% for a total  
of 10% on each direction allowing Dynamic Voltage  
Scaling  
• Uses a bootstrap network with an internal diode to power  
its synchronous MOSFET  
• All gate drive circuits are supplied from REG1’s own VG  
output.  
• Uses integrated compensation  
• The output is monitored for under-voltage and over-  
voltage conditions  
Operation Modes  
The switcher will be active when:  
• The output is monitored for over-current and short-circuit  
conditions  
• The regulator is monitored for over-temperature conditions  
• VG is in regulation AND  
• There is no GrpB shutdown command through the I2C  
interface AND  
• No faults exist that would cause GrpB to shut down  
Operation Modes  
REG3  
The VG output is always active as long as:  
• The IC is not in an under-voltage lockout AND  
• No shutdown signal through the ONOFF pin is present  
AND  
• There is no ALLOFF shutdown command through the I2C  
interface AND  
This is a synchronous buck PWM voltage-mode control  
DC/DC regulator.  
See Power-Up Sequence on page 27 for more details on  
when REG3 is powered up in the sequence.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
22  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL INTERNAL BLOCK DESCRIPTION  
The switcher will operate in DCM at very light loads to  
allow pulse skipping.  
• Output voltage is adjustable by means of an external  
resistor divider  
• The output can be adjusted up or down at 2.5% steps for  
a total of +17.5% to -20.0% on each direction allowing  
Dynamic Voltage Scaling.  
VOUT3 will be discharged every time the regulator is  
shutting down and it will be held low by the discharge FET as  
long as possible.  
• Uses bootstrap networks with an internal diode to power  
its high side MOSFETs  
Characteristics  
• All gate drive circuits are supplied from VG.  
• Uses external compensation  
• The output is monitored for under-voltage and over-  
voltage conditions  
• The output is monitored for over-current and short-circuit  
conditions  
• It powers up directly from the battery  
• Operates at a switching frequency equals to FSW1  
• Drives integrated low RDS(ON) N-channel power  
MOSFETs (NHV_HC) as its output stage  
• The output is ±4% accuracy  
• Output voltage is adjustable by means of an external  
resistor divider  
• The regulator is monitored for over-temperature  
conditions  
• The output can be adjusted up or down at 2.5% steps to  
achieve from +17.5% to -20.0% on each direction allowing  
Dynamic Voltage Scaling using the I2C DVS register.  
• An extra fine voltage scaling in 0.5% steps helps to adjust  
down the output voltage as low as -XX%.  
• Uses a bootstrap network with an internal diode to power  
its switch MOSFET  
Operation Modes  
The switcher will be active when:  
• VG is in regulation AND  
• There is no GrpB shutdown command through the I2C  
interface AND  
• All gate drive circuits are supplied from VG.  
• Uses integrated compensation.  
• No faults exist that would cause GrpB to shut down  
• The output is monitored for under-voltage and over-  
voltage conditions  
• The output is monitored for over-current and short-circuit  
conditions  
REG5  
This is a 4-switch synchronous buck-boost PWM voltage-  
mode control DC/DC regulator.  
See Power-Up Sequence on page 27 on for more details  
on when REG5 is powered up in the sequence.  
• The regulator is monitored for over-temperature  
conditions  
The switcher will operate in DCM at very light loads to  
allow pulse skipping.  
Operation Modes  
VOUT5 will be discharged every time the regulator is  
shutting down and it will be held low by the discharge FET as  
long as possible.  
The switcher will be active when:  
• VG is in regulation AND  
• There is no GrpB shutdown command through the I2C  
interface AND  
Characteristics  
• No faults exist that would cause GrpB to shut down  
• It powers up directly from the battery  
• Operates at a switching frequency equals to FSW1  
• Drives integrated low RDS(ON) N-channel power  
MOSFETs (NHV_HC) as its output stage  
• The output is ±2% accuracy  
REG4  
This is a 4-switch synchronous buck-boost PWM voltage-  
mode control DC/DC regulator.  
See Power-Up Sequence on page 27 for more details on  
when REG4 is powered up in the sequence.  
• Output voltage is adjustable by means of an external  
resistor divider  
The switcher will operate in DCM at very light loads to  
allow pulse skipping.  
• The output can be adjusted up or down at 2.5% steps for  
a total of +17.5% to -20.0% on each direction allowing  
Dynamic Voltage Scaling.  
• Uses bootstrap networks with an internal diodes to power  
its high side MOSFETs  
VOUT4 will be discharged every time the regulator is  
shutting down and it will be held low by the discharge FET as  
long as possible.  
• All gate drive circuits are supplied from VG.  
• Uses external compensation  
Characteristics  
• The output is monitored for under-voltage and over-  
voltage conditions  
• The output is monitored for over-current and short-circuit  
conditions  
• It powers up directly from the battery  
• Operates at a switching frequency equals to FSW1  
• Drives integrated low RDS(ON) N-channel power  
MOSFETs (NHV_HC) as its output stage  
• The output is ±2% accuracy  
• The regulator is monitored for over-temperature conditions  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
23  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL INTERNAL BLOCK DESCRIPTION  
Operation Modes  
The switcher will operate in DCM at very light loads to  
allow pulse skipping.  
The switcher will be active when:  
VOUT7 will be discharged every time the regulator is  
shutting down and it will be held high to ground by the  
discharge FET as long as possible.  
• VG is in regulation AND  
• There is no GrpC (OR GrpE) shutdown command through  
the I2C interface AND  
• No faults exist that would cause GrpC (OR GrpE) to shut  
down  
Characteristics  
• It powers up directly from the battery  
• Operates at a switching frequency equals to FSW2  
• Drives an external P-channel power MOSFET  
• The output is ±2% accuracy  
REG6 (Only 34704A)  
This is a synchronous boost PWM voltage-mode control  
DC/DC regulator.  
• Output voltage is adjustable by means of an external  
resistor divider  
• The output can be adjusted up or down at 2.5% steps for  
a total of 10% on each direction allowing Dynamic Voltage  
Scaling.  
See Power-Up Sequence on page 27 for more details on  
when REG6 is powered up in the sequence.  
The switcher will operate in DCM at very light loads to  
allow pulse skipping.  
VOUT6 will be discharged every time the regulator is  
shutting down and it will be held low by the discharge FET as  
long as possible.  
• All gate drive circuits are supplied from VG  
• Uses external compensation, the type is up to the designer  
• The output is monitored for under-voltage and over-  
voltage conditions  
Characteristics  
• It powers up directly from the battery  
• Operates at a switching frequency equals to FSW2  
• Drives integrated low RDS(ON) N-channel power  
MOSFETs (NVHV_LC) as its output stage  
• It offers load disconnect from the input battery when the  
output is off (True Cut-Off)  
Operation Modes  
The switcher will be active when:  
• VG is in regulation AND  
• There is no GrpC shutdown command through the I2C  
interface AND  
• No faults exist that would cause GrpC to shut down  
• The output is ±4% accuracy  
• Output voltage is adjustable by means of an internal  
resistor divider  
• The output can be adjusted up or down at 2.5% steps for  
a total of 10% on each direction allowing Dynamic Voltage  
Scaling  
• Uses a bootstrap network with an internal diode to power  
its synchronous MOSFET  
• All gate drive circuits are supplied from VG.  
• Uses integrated compensation.  
REG8  
This is a synchronous boost PWM voltage-mode control  
DC/DC regulator.  
See Power-Up Sequence on page 27 for more details on  
when REG8 is powered up in the sequence.  
VOUT8 will be discharged every time the regulator is  
shutting down and it will be held to ground by the discharge  
FET as long as possible.  
• The output is monitored for under-voltage and over-  
voltage conditions  
• The output is monitored for over-current and short-circuit  
conditions  
This regulator offers either voltage regulation for organic  
LEDs or current regulation for LCD backlighting LEDs. It  
provides either voltage or current feedback for these  
purposes through the same feedback pin.  
• The regulator is monitored for over-temperature conditions  
The regulator cannot drive only 1LED with a forward  
voltage drop of less than the battery input voltage.  
The processor would set the REG8 register through I2C  
before enabling REG8 to indicate if voltage regulation or  
current regulation will be used.  
Operation Modes  
The switcher will be active when:  
• VG is in regulation AND  
• There is no GrpC shutdown command through the I2C  
interface AND  
Characteristics  
• It powers up directly from the battery  
• Operates at a switching frequency equals to FSW2  
• Drives integrated low RDS(ON) N-channel power  
MOSFETs (NVHV_LC) as its output stage  
• It offers load disconnect from the input battery when the  
output is off (True Cut-Off)  
• No faults exist that would cause GrpC to shut down  
REG7 (Only 34704A)  
This is a none-synchronous buck-boost inverting PWM  
voltage-mode control DC/DC regulator.  
See Power-Up Sequence on page 27 for more details on  
when REG7 is powered up in the sequence.  
• The output is ±4% accuracy  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
24  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL INTERNAL BLOCK DESCRIPTION  
• Output voltage is adjustable by means of an external  
resistor divider when in voltage regulation mode  
• A 240mV current limit comparator will be used to program/  
sense the voltage drop across the current setting resistor  
at the bottom of the LED string connected to the REG8  
output when the current regulation mode is selected.  
This will be used to program the maximum current flowing  
and will regulate it  
• Uses a bootstrap network with an internal diode to power  
its synchronous MOSFET  
• All gate drive circuits are supplied from VG.  
• Uses integrated compensation  
• The output is monitored for over-current and short-circuit  
conditions  
• The regulator is monitored for over-temperature conditions  
• The output is monitored for under-voltage and over-  
voltage conditions  
• The output can be adjusted up or down at 2.5% steps for  
a total of 10% on each direction allowing Dynamic Voltage  
Scaling  
Operation Modes  
• Maximum output current is adjustable by means of an  
external resistor connected to the FB8 pin and then the  
output current can be scaled down from the set maximum  
in 16 steps through I2C interface  
The switchers will be active when:  
• VG is in regulation AND  
• There is no GrpD shutdown command through the I2C  
interface AND  
• No faults exist that would cause GrpD to shut down  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
25  
FUNCTIONAL DESCRIPTION  
FUNCTIONAL INTERNAL BLOCK DESCRIPTION  
• MOSFET Switching Losses (Except for REG7 due to  
external MOSFET and board layout dependence)  
• MOSFET Gate Charging Losses  
• MOSFET Deadtime Losses  
OVERALL EFFICIENCY ANALYSIS  
In battery applications, it is highly recommended to power  
every single regulator directly from the battery to obtain full  
output capability:  
• External Diode Losses (Only for REG7)  
• Inductor Winding DC Losses  
• Inductor Core Losses (Assumed to be 20% of DC Losses  
as a rule of thumb)  
VBAT  
VBAT  
VBAT  
VBAT  
VBAT  
VBAT  
VBAT  
VBAT  
REG1  
REG2  
REG3  
REG4  
REG5  
REG6  
REG7  
REG8  
V1 (5.0V)  
V2 (2.8 / 3.3V)  
V3 (1.2V / 1.5V / 1.8V)  
V4 (1.8V / 2.5V)  
V5 (3.3V)  
• Output AC Losses  
Li-Ion Efficiency Analysis  
In this configuration, all of the regulators are supplied or  
powered directly with 3.6V nominal, battery voltage.  
V6 (15V)  
Efficiency was calculated using the maximum allowed  
V7 (-7.0V)  
frequency of 1.5MHz and 1.0MHz for F  
and F  
,
SW1  
SW2  
respectively, in this configuration. As a result, the following  
numbers are valid for worst case operation conditions.  
V8 (15V)  
Figure 5. Overall Efficiency Analysis  
Efficiency analysis includes the following losses:  
• MOSFET Conduction Losses  
The following table shows the detailed analysis for each  
regulator with V2 at 3.3V, V3 at 1.2V, and V4 at 1.8V. This is  
taken at the specified typical loads on Page15:  
REG1  
REG2  
REG3  
REG4  
REG5  
REG6  
REG7  
REG8  
Vin (V)  
3.60  
5.00  
3.60  
3.30  
3.60  
1.20  
3.60  
1.80  
3.60  
3.30  
3.60  
15  
3.60  
-7  
3.60  
15  
Vout (V)  
Iout_typ (A)  
Iout_max (A)  
DCR(mΩ)  
Cout (μF)  
0.100  
0.500  
230  
0.200  
0.500  
230  
0.150  
0.550  
230  
0.100  
0.300  
310  
0.150  
0.500  
230  
0.050  
0.060  
230  
0.050  
0.060  
230  
0.015  
0.030  
230  
22  
22  
22  
22  
22  
22  
22  
22  
ESR (mΩ)  
Fsw (kHz)  
Lout (μH)  
9.00  
9.00  
9.00  
9.00  
9.00  
9.00  
9.00  
9.00  
1500  
1.50  
1500  
1.50  
1500  
1.50  
1500  
1.50  
1500  
1.50  
1000  
4.70  
1000  
4.70  
1000  
4.70  
Iin_typ (A)  
Iin_max (A)  
ILout_peak (A)  
ICout_RMS (A)  
Pout (W)  
0.154  
0.540  
0.724  
0.212  
0.500  
0.042  
0.044  
0.544  
0.201  
0.502  
0.510  
0.005  
0.660  
0.047  
0.049  
0.709  
0.063  
0.209  
0.649  
0.074  
0.180  
0.038  
0.041  
0.221  
0.059  
0.178  
0.444  
0.076  
0.180  
0.028  
0.030  
0.210  
0.150  
0.501  
0.512  
0.0006  
0.495  
0.034  
0.035  
0.530  
0.254  
0.304  
0.444  
0.071  
0.750  
0.135  
0.145  
0.895  
0.107  
0.128  
0.443  
0.129  
0.350  
0.000  
0.027  
0.377  
0.077  
0.154  
0.297  
0.043  
0.225  
0.045  
0.047  
0.272  
Ploss On Chip (W)  
Ploss Total (W)  
Pin (W)  
n (%)  
91.90% 93.12% 81.48% 85.91% 93.33% 60.00% 69.00% 64.00%  
34704A overall system efficiency 84%  
Overall System  
34704B overall system efficiency 89%  
Overall System  
Pout (W)  
Pout (W)  
3.340  
0.369  
0.41  
1.74  
0.192  
0.202  
1.942  
89.6%  
Ploss On Chip (W)  
Ploss Total (W)  
Pin (W)  
Ploss On Chip (W)  
Ploss Total (W)  
Pin (W)  
3.75  
n (%)  
n (%)  
84.00%  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
26  
FUNCTIONAL DEVICE OPERATION  
OPERATIONAL MODES  
FUNCTIONAL DEVICE OPERATION  
OPERATIONAL MODES  
other and the entire system. This makes power sequencing  
control a much easier task for the user where most of the  
group internal sequencing in now handled by the PMIC. All  
the processor has to do is to command the group and not  
each regulator.  
POWER-UP SEQUENCE  
Following is the power up sequence from a battery  
connection or a Power On signal through the ONOFF pin.  
1. Battery initially connected to VIN.  
2. LION pin is used to determine if a battery is being used  
(High for Li-Ion battery).  
The regulators groups are as follows:  
• GrpA: Includes REG1 (VOUT1)  
3. At initial power up from a cold start like the above with  
the battery first connected, the status of the ONOFF  
pin is ignored and 34704A moves forward to step (5).  
• GrpB: Includes REG2, REG3, and REG4  
• GrpC: Includes REG5, REG6, and REG7  
• GrpD: Includes REG8  
4. After the cold start or battery insertion power up,  
activity on the ONOFF pin is used to determine if the  
device is enabled or disabled. If the device is disabled,  
then nothing happens. If the device is enabled then,  
34704 moves forward to step (5).  
• GrpE: This is a special group. It includes REG5 when  
GrpC/E power sequencing option#1 is chosen  
SHUTDOWN SEQUENCES  
• Processor can disable VOUT1 (GrpA) at any point it  
desires  
• Processor can disable REG8 (GrpD) at any point it desires  
• Processor can disable REG5 (GrpE) at any point it desires  
ONLY IF CCD sequencing option#1 is picked  
• Processor can shutdown GrpC according to the CCD  
power sequencing options 1, 2, 3, or 4 (see section “I2C  
Programmability”)  
5. The input battery UVLO signal de-asserts if the input  
voltage is above the UVLO rising threshold.  
6. REG1 VG starts up in peak detect PFM and REG1 VG  
output starts rising.  
7. VDDI output voltage will start tracking REG1 VG output.  
8. When REG1 VG output rises high enough such that  
VDDI voltage is in regulation a POR signal is released  
• If any regulator in GrpC is shutting down due to a fault, the  
other regulators in GrpC will also shutdown by following  
the CCD power sequencing options 1, 2, 3, or 4 (see  
section “I2C Programmability”)  
and all internal circuitry can be enabled. I2C  
communication will remain disabled for normal power  
up sequence. The values of the FREQ and SS pins are  
read at this point.  
• If any regulator in GrpB is shutting down due to a fault, the  
other regulators in GrpB will also shutdown by following  
the processor supplies shutdown sequence. Then, GrpA,  
GrpC, GrpD, and GrpE (if applicable) will simultaneously  
shutdown keeping any sequencing within each group as  
necessary. VG will stay alive to perform a power up retry  
for GrpB but only for one time. If the power up cycle is  
successful, then normal operation is back. If the fault  
returns, then the shutdown sequence is repeated and then  
VG shuts down  
• Processor can shutdown the 34704 by sending an  
“ALLOFF” command, then GrpA, GrpC, GrpD, and GrpE  
(if applicable) will simultaneously shutdown keeping any  
sequencing within each group as necessary. Then, GrpB  
will shutdown according to the processor supply shutdown  
sequence. Then, VG will shut down.  
9. REG1 PWM control loop can take over control of  
REG1 output once the VG voltage reaches a certain  
threshold set internally.  
10. When REG1 is in regulation, it will be used to supply  
the Power MOSFET gate voltage for all of the other  
regulators except REG7.  
11. REG3 is enabled, then when REG3 is in regulation.  
12. REG2 is enabled, then when REG2 is in regulation.  
13. REG4 is enabled, then when REG4 is in regulation.  
14. I2C communication is enabled now since the processor  
supplies are up.  
15. 34704A will de-assert the RST signal to indicate a  
“Power Good” after 10ms of wait time. This output will  
be connected to the reset pin of the microprocessor.  
• The previous shutdown event can also happen through the  
ONOFF pin by pressing and holding the pin for a time  
period (programmable through I2C with a default of 1sec)  
• During battery depletion and when the input voltage  
passes the UVLO falling threshold, all of the outputs will be  
disabled without honouring the power down sequence  
This is to guarantee that the outputs are off and battery is  
not depleted further.  
16. The microprocessor then takes over and can enable  
REG1 VOUT1 and REG5 through REG8. The  
processor needs to send a command for REG8 mode  
of operation. The processor can also change REG5-8  
soft start time before enabling them. The processor can  
also power down the system with an ALLOFF  
command.  
For power sequencing needs, the different regulators are  
grouped based on their function and how they relate to each  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
27  
FUNCTIONAL DEVICE OPERATION  
OPERATIONAL MODES  
• In any of the previous shutdown sequences, VG output will  
stay alive to maintain internal circuitry and logic until all  
other regulators are off, then it will shut off.  
The switching frequency will be selectable for all of the  
regulators. REG6, 7 & 8 switching frequency (FSW2) will be  
selectable through I2C to be between 250 kHz and 1.0 MHz  
in 250 kHz steps. The rest of the regulators switching  
frequency (FSW1) will be selectable through the FREQ pin  
and can be selected between 750 kHz and 2.0 MHz, in 250  
kHz steps.  
POWER SUPPLY  
The battery voltage range is the following depending on  
the application:  
FSW1 default value is 2.0MHz. This value is obtained by  
tying the FREQ pin to VDDI. FSW2 default value is 500 kHz  
• 1-cell Li-Ion/Polymer: 2.7V to 4.2V. Typ value is 3.6V  
• USB supply or AC wall adapter: 4.5V to 5.5V. Typ value is  
5.0V. This gives a total input voltage supply range of 2.7V  
to 5.5V  
FSW1 will be selectable through programming the FREQ  
pin with an external resistor divider connected between VDDI  
and AGND pins. FSW2 will only be selectable through I2C.  
Please refer to the “I2C Programmability” section.  
For the regulators, each one will be supplied separately  
through its own power input.  
The 34704 uses 4 different phases of switching (clock is  
80 degrees out of phase) for FSW1 to spread out the current  
draw by the individual converters from the input supply over  
time to reduce the peak input current demand. This allows for  
better EMI performance and reduction in the input filter  
requirements. FSW1 has no phase relation with FSW2. The  
following distribution is shown for FSW1 of 2.0MHz. The  
regulators grouping is based on their maximum current draw  
and attempts to reduce the effect on the input current draw.  
LION PIN  
LION pin is always tied to VIN level.  
FREQUENCY SETTING PIN (FREQ PIN)  
There are two switching frequencies on board the 34704,  
one for REG6, 7 & 8, and the other for the rest of the  
regulators. To avoid any jitter or interference problems by  
having two oscillators on board, the switching frequency will  
be derived from the main oscillator using a frequency divider.  
500ns  
500ns  
500ns  
500ns  
REG1/VG  
REG1/VG  
REG1/VG  
REG1/VG  
REG2  
REG2  
REG2  
REG2  
REG5, REG3  
REG4  
REG5, REG3  
REG4  
REG5, REG3  
REG4  
• If and only if the device is on and the ONOFF pin is pulled  
down for a time period (1s as a default and selectable to  
2.0sec, 1.5sec, 1.0sec or 0.5sec via the I2C interface),  
then the device powers off after a second time period  
elapses unless it is masked by a command via the I2C  
interface:  
SOFT START PIN (SS PIN)  
Initially at power up, the soft start time will be set for all of  
the regulators through programming the SS pin with an  
external resistor divider connected between VDDI and AGND  
pins (see the 34704A Typical Application Diagram).  
After power up, the soft start value for REG5 through  
REG8 can be changed and programmed through I2C. REG2  
through REG4 soft start value is only set by the SS pin and  
cannot be programmed through I2C.  
• The second period is the same amount of time as the  
first period so that the counter can be shared  
• When the first period elapses a shutdown flag is set to  
alert the processor that a shutdown signal has been  
activated. The ONOFF pin can be released after this  
flag is set without affecting what will happen next  
• A CPU can read out the shutdown flag to determine  
what to do  
• Power off the device immediately by a command via I2C  
interface (ALLOFF command)  
• Ignore the power off by sending a command via I2C  
interface to clear the shutdown flag  
See section “I2C Programmability” for more details.  
ONOFF PIN  
This is a hardware enable/disable feature OR pin for  
the 34704:  
• It can be connected to a mechanical switch to turn the  
power On or Off  
• The device is power off by a command via the I2C interface  
as well  
• The power off by hardware can be masked by a command  
via the I2C interface  
• If the device is off and a falling edge is detected at the  
ONOFF pin, the device starts up  
• Do nothing until the second time period expires and let  
the device power off by itself  
The ONOFF pin is edge sensitive and activates on a falling  
edge. It is normally pulled high.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
28  
FUNCTIONAL DEVICE OPERATION  
OPERATIONAL MODES  
Shutdown Flag Asserted  
Shutdown if No Processor Communication  
st  
nd  
2 Period  
1
Period  
1
0
Programmable  
Programmable  
Shutdown Delay  
Shutdown Delay  
st  
st  
1
Period  
2 Period  
Turn On  
During this time, the processor can abort the shutdown  
process or shutdown immediately before the 2nd period  
elapses with an I2C command  
ON/OFF Pin can be released during this  
period without affecting the device response process  
Figure 6. Hardware Power Up/Down Timing  
• The current is reduced back to the normal level inside  
the 10ms timer and in this case normal operation is  
gained back  
• The output reaches the thermal shutdown limit and  
turns off  
RST OUTPUT SIGNAL PIN  
This is a power reset output signal. It is an open drain  
output that should be connected to the reset input of the  
microprocessor. An external pull up resistor should be  
connected to this output and is recommended to be pulled up  
to V2 for best performance (If this pin is pulled up to the VIN  
pin, then the 1µA shutdown current budget is not guaranteed)  
• The current limit timer expires without gaining normal  
operation at which point the output turns off. Then only  
for GrpB, at the end of a timeout period of 10ms, the  
output will attempt to restart again but for one time only.  
• The output current keeps increasing until it reaches the  
second over-current limit, see below for more details  
• A hard over-current limit (short circuit limit) that is higher  
than the cycle by cycle limit at which the device reacts by  
shutting down the output immediately. This is necessary to  
prevent damage in case of a short-circuit. After that, only  
GrpB will attempt a one time retry after a timeout period of  
10ms and will go through a new soft start cycle  
At power up, the RST pin is asserted (low) to keep the  
processor in “reset”. When VG, REG2, REG3, and REG4 are  
all in regulation (both OV and UV flags for each regulator are  
de-asserted) and no faults exist, the RST output is de-  
asserted after a 10ms delay to take the processor out of  
reset. Then the processor can go through its own internal  
power up sequence and can start communicating to the rest  
of the system.  
If ANY of the above four regulators has any of the following  
faults: over-temperature, short-circuit, over-current for more  
than 10ms, over-voltage in response A, under-voltage in  
response A, or is shutting down normally, the RST output is  
asserted to put the processor back in reset. If ANY of the  
above four regulators has an over-voltage response B fault or  
an under-voltage response B fault, the RST output will not be  
asserted (only the OV and UV flags will be available for the  
microprocessor to read).  
OUTPUT OVER-VOLTAGE/UNDER-VOLTAGE  
MONITORING  
In the case of an output over-voltage/under-voltage, the  
user has two options that can be programmed through the  
I2C interface:  
Response A: The output will switch off automatically and  
the 34704 would alert the processor through I2C that such an  
event happened.  
THERMAL LIMIT DETECTION  
Response B: The output will not switch off. Rather the  
34704 communicates to the processor that an over-voltage/  
under-voltage condition has occurred and wait for the  
processor decision to either shutoff or not, in the mean time  
the control loop will try to fix itself.  
There is a thermal sensor for each regulator except REG7.  
It uses an external MOSFET.  
CURRENT LIMIT MONITORING  
The current limit circuitry has two levels of current limiting:  
To avoid erroneous conditions, a 20μs filter will be  
implemented.  
• A soft over-current limit (over-current limit): If the peak  
current reaches the typical over-current limit, the switcher  
will start a cycle-by-cycle operation to limit the current and  
a 10ms current limit timer starts. The switcher will stay in  
this mode of operation until one of the following occurs:  
The OV/UV fault flag is masked during DVS until  
DVSSTAT flag is asserted “Done”.  
To keep the RST output low during ramp up and until the  
soft start is done, the OV/UV protection is masked from  
reporting that the output is in regulation.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
29  
FUNCTIONAL DEVICE OPERATION  
LOGIC COMMANDS AND REGISTERS  
LOGIC COMMANDS AND REGISTERS  
2
I C USER INTERFACE  
The 34704 communicates via I2C using a default device  
address $54 to access all user registers and program all  
regulators features independently.  
voltage supply (REG6), and negative voltage supply (REG7).  
For 3 of the sequencing options, REG5 supply is controlled  
and tied with REG6 and REG7 in a preset power sequence.  
For one sequencing option, only REG6 and REG7 are  
involved in the power sequence and REG5 is independent.  
USER PROGRAMMABLE REGISTERS  
34704A assigns a 2-bit register to program the GrpC/E  
power sequencing options (CCDSEQ Register). This register  
value is latched in at GrpC power up and will not be allowed  
to change unless a power recycle happens.  
GrpC/E power sequencing setting (34704A Only)  
The microprocessor can choose one of several voltage  
sequence options for the GrpC/E supply (REG5), high  
OPTION  
MSB  
LSB  
GRPC/E ENABLED  
GRPC/E DISABLED  
1
0
0
REG5 is independently controlled  
REG5 is independently controlled  
(Default)  
REG6 and REG7 ramp up together.  
REG6 and REG7 ramp down together  
2
0
1
REG5 ramps up first  
REG5, REG6 and REG7 ramp down together  
Then REG6 and REG7 ramp up together  
3
4
1
1
0
1
REG5, REG6, and REG7 ramp up together  
REG5, REG6, and REG7 ramp down together  
REG5 and REG6 ramp up together first.  
Then ramp up REG7  
REG7 ramps down first.  
Then REG5 and REG6 ramp down together  
Switching frequency for REG6, 7 & 8  
Please refer to the /ONOFF pin description for more  
details  
FSW2 can be selected to be between 250kHz and 1.0MHz  
in 250kHz steps. On the 34704B, FSW2 is just for REG8  
since REG6 and 7 do not exist in this device.  
Programming 34704 response to under-voltage/over-  
voltage conditions on each regulator  
34704 assigns a 2-bit register to program FSW2 (FSW2  
Register)  
There are two responses that can be programmed for an  
over-voltage/under-voltage condition:  
Response A: When an over-voltage (under-voltage) event  
is detected, the concerned output shuts down and a register  
is flagged to alert the processor.  
FSW2  
500kHz (Default)  
250kHz  
MSB  
LSB  
0
0
0
1
1
Response B: When an over-voltage/under-voltage event  
is detected, the concerned output will not shutdown, but the  
register is flagged to alert the processor. Then, the processor  
can decide whether to shutdown the output or not. In the  
mean time, the concerned output control loop will be  
attempting to correct the error.  
1
750kHz  
0
1000kHz  
1
Shutdown Hold (Delay) Time  
See Output Over-voltage/Under-voltage Monitoring on  
page 29 for more details.  
The 34704 assigns a 2-bit register (SDDELAY Register)  
for the processor to program the shutdown delay time period  
Response A and Response B share the same flag register  
34704 assigns a 1-bit register for this function  
(OVUVSETx Register) where x corresponds to each  
regulator  
Shutdown Delay  
1.0sec (Default)  
0.5sec  
MSB  
LSB  
0
0
0
1
1
1
1.5sec  
0
2.0sec  
1
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
30  
FUNCTIONAL DEVICE OPERATION  
LOGIC COMMANDS AND REGISTERS  
On/Off Control for each group of regulators as defined  
previously and for the whole IC  
OV/UV Response  
bit  
0
34704 assigns a 1-bit register for each group to turn each  
group on/off (ONOFFA, C, D, or E register). Please note that  
GrpB does not have a dedicated enable register which is  
enabled by default.  
A (Default)  
B
1
Dynamic Voltage Scaling for each regulator  
GrpA, C, D, or E ONOFF  
OFF (Default)  
ON  
bit  
0
The customer can adjust each regulator’s output  
dynamically with 2.5% step size. The total range of  
adjustability will vary depending on each regulator to  
accommodate different operating environments. Some  
regulators will utilize the full range of -20.00% to +17.50%  
and some regulators will only use the range of ±10.00%. For  
details, see each regulator’s section. Each 2.5% step takes  
50μs before moving to the next step. REG8 only performs  
DVS when in voltage regulation mode.  
1
Also, 34704 assigns a 1-bit register for disabling the whole  
IC through the I2C. (ALLOFF register)  
ALL OFF  
False (Default)  
True  
bit  
0
During DVS, the Over-voltage and Under-voltage  
monitoring will not be active. In addition to that, these faults  
will be masked and not active for a DVS settling time period  
equal to 1ms. This DVS settling time will start after the  
DVSSTAT register is flagged indicating that the DVS cycle is  
done. This is to ensure that during DVS and soft start alike  
the output will not be tripped due to a momentary over-  
voltage or under-voltage fault. This is the same for Response  
A and Response B of the over-voltage/under-voltage fault  
monitoring.  
1
Soft Start Time  
There are two registers for setting the soft start value for  
all of the regulators except REG1. The SSTIME register  
reads the soft start value set by the SS pin and is used to  
initially set the soft start value for all of the regulators except  
REG1. Then, the SSSET registers for REG5 through REG8  
can be used to change the soft start value for these  
regulators from the value set by the SSTIME register.  
34704 assigns a 4-bit register to program the Dynamic  
Voltage Scaling for each regulator (DVSSETx Register)  
where x corresponds to each regulator.  
Here is how the SSTIME register interacts with the  
SSSETx register:  
1. SSTIME register is set by a value read through the SS  
pin.  
Percentage Change  
0.00% (Default)  
+2.50%  
MSB  
0
LSB  
0
2. SSTIME register is copied into the registers SSSET5,  
SSSET6, SSSET7, and SSSET8.  
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
3. The soft start time of REG2, REG3, and REG4 are only  
affected by the value of SSTIME register.  
+5.00%  
0
0
+7.50%  
0
1
4. The soft start time of REG5, REG6, REG7, and REG8  
are affected by the value of registers SSSET5,  
SSSET6, SSSET7, and SSSET8 respectively.  
+10.00%  
+12.50%  
+15.00%  
+17.50%  
-20.00%  
0
0
0
1
34704 assigns a 2-bit register to store the value  
programmed by the SS pin. The register is called SSTIME  
And can only be read by the user.  
0
0
0
1
1
0
Soft Start  
0.5ms  
2ms  
MSB  
LSB  
0
-17.50%  
1
1
0
0
1
1
-15.00%  
1
0
1
-12.50%  
1
1
8ms  
0
-10.00%  
1
0
32ms  
1
-7.50%  
1
1
34704 assigns a 2-bit register for REG5 through REG8 to  
program the soft start times for these regulators (SSSETx  
register) where x corresponds to each regulator from REG5  
through REG8.  
-5.00%  
1
0
-2.50%  
1
1
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
31  
FUNCTIONAL DEVICE OPERATION  
LOGIC COMMANDS AND REGISTERS  
USER ACCESSIBLE FLAG REGISTERS  
Cold Start Flag  
Soft Start  
0.5ms  
2ms  
MSB  
LSB  
0
0
0
1
1
The 34704 assigns a 1-bit register (COLDF Register) to  
flag the processor that the power up was a result of battery  
insertion and not through ONOFF pin. This flag should be  
cleared after power up by the processor.  
1
8ms  
0
32ms  
1
REG8 Regulation Mode  
Cold Start Flag  
/ONOFF (Default)  
Battery Insertion  
bit  
0
The 34704 assigns a 1-bit register to indicate REG8’s  
regulation mode (REG8MODE Register). The processor  
assigns this register to either regulation mode before  
enabling the REG8 output.  
1
Shutdown Flag  
The 34704 assigns a 1-bit register (SHUTDOWN Register)  
to flag the processor if a shutdown signal is received through  
the ONOFF pin and a programmable time period with a  
default of 1sec has elapsed.  
REG8 Regulation  
Current (Default)  
Voltage  
bit  
0
1
When REG8 is current regulated, LED backlight current  
can be reduced from the maximum in 16 steps through  
the I2C interface  
/ONOFF Status  
Normal (Default)  
Shutdown  
bit  
0
1
The maximum LED current can be set using the external  
resistor at the bottom of the LED string, then through I2C  
programming, this current value can be reduced in 16 steps.  
Dynamic Voltage Scaling Status Flag  
In addition and for each regulator, 34704 assigns a 1-bit  
register (DVSSTATx register) to flag to the processor that the  
desired output voltage level set with the (DVSSETx register)  
has been reached.  
34704 assigns a 4-bit register for this function (ILED  
register)  
The ILED setting is not a guaranteed characteristic from  
IMAX* (1/16) to IMAX* (9/16), due to an error amp common  
mode limitation.  
DVS STATUS  
DVS Not Done  
DVS Done  
bit  
0
LED Current  
IMAX * (1/16)  
IMAX * (2/16)  
IMAX * (3/16)  
IMAX * (4/16)  
IMAX * (5/16)  
IMAX * (6/16)  
IMAX * (7/16)  
IMAX * (8/16)  
IMAX * (9/16)  
IMAX * (10/16)  
IMAX * (11/16)  
IMAX * (12/16)  
IMAX * (13/16)  
IMAX * (14/16)  
IMAX * (15/16)  
IMAX (Default)  
MSB  
0
LSB  
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
USER ACCESSIBLE FAULT REGISTERS  
Over-current Fault Register  
0
0
0
1
The 34704 assigns a 1-bit register for each regulator  
(ILIMFx Register) to indicate a fault due to over-current limit,  
where x corresponds to each regulator from REG1 to REG8,  
except REG7  
0
0
0
1
0
0
0
1
ILIMF  
False  
True  
bit  
0
1
0
1
1
1
1
0
1
1
Short-circuit Fault Register  
1
0
The 34704 assigns a 1-bit register for each regulator  
(SCFx Register) to indicate a fault due to short-circuit current  
limit, where x corresponds to each regulator from REG1 to  
REG8, except REG7  
1
1
1
0
1
1
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
32  
FUNCTIONAL DEVICE OPERATION  
LOGIC COMMANDS AND REGISTERS  
SPECIAL REGISTERS  
SCF  
False  
True  
bit  
0
REG3 Fine Voltage Scaling Register  
Regulator 3 has an additional fine output voltage scaling  
that enables to lower the output voltage in 0.5% steps. The  
34704 assigns an 8-bit register (REG3DAC) to the REG3  
Digital to analog converter for the FB3 voltage generation.  
Output votlage must be reduced gradually to avoid a OV/UV  
fault to occur.  
1
Over-voltage Fault Register  
The 34704 assigns a 1-bit register for each regulator  
(OVFx Register) to indicate a fault due to over-voltage limit,  
where x corresponds to each regulator from REG1 to REG8  
REG7 Independent ON/OFF Control (Only on 34704A)  
The 34704B provide two register to independently turn on  
REG7 when REG6 is not needed. Care must be taken when  
turning on REG7 to avoid inrush currents during regulator  
ramp-up. Following Process must be followed to assure  
successful turn on of REG7.  
OVF  
False  
True  
bit  
0
1
Under-voltage Fault Register  
1. Set EN0 and clear DISCHR_B on REG7CR0 register  
2. After 1ms or more, set EN1 on REG7CR0 register  
3. Set REG7DAC register to $00  
The 34704 assigns a 1-bit register for each regulator  
(UVFx Register) to indicate a fault due to under-voltage limit,  
where x corresponds to each regulator from REG1 to REG8.  
4. Gradually shift up REG7DAC register from $00 to $D9  
to ramp-up the output voltage in a soft-start like wave.  
Soft start timing is dependant of I2C communication  
speed and number of bit you change per writing, for  
instance use 4,8 or 16 bits increase to ramp up the  
output voltage.  
UVF  
bit  
0
False  
True  
1
Thermal Shutdown Fault Register  
Register Address  
Code  
$50  
$D0  
$00  
$04  
$08  
$0C  
...  
The 34704 assigns a 1-bit register for each regulator  
(TSDFx Register) to indicate a fault due to thermal limit,  
where x corresponds to each regulator from REG1 to REG8,  
except REG7  
1
2
$58  
$58  
$59  
$59  
$59  
$59  
...  
3
4
TSDF  
False  
True  
bit  
0
5
6
1
...  
Regulator Fault Register  
55  
$59  
$D9  
The 34704 assigns a 1-bit register for each regulator  
(FAULTx Register) to indicate that a fault had occurred on  
each regulator. The processor can just access this register  
periodically to determine system status. This reduces the  
access cycles. If a regulator fault register asserted, then the  
processor can access that regulator’s registers to see what  
kind of fault had occurred.  
REG7 independent start up example  
FAULT  
False  
True  
bit  
0
1
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
33  
FUNCTIONAL DEVICE OPERATION  
LOGIC COMMANDS AND REGISTERS  
2
There are also the IC general use registers. Those  
registers are also split between status reporting registers and  
processor programmable registers.  
I C REGISTER DISTRIBUTION  
Each regulator has a fault register that records any fault  
that occurs in that regulator. Then there is a regulator fault  
reporting register that the processor can access at all times  
to see if any fault had occurred.  
This distribution keeps each regulator’s registers bundled  
together which makes it easier for the user to access one  
regulator at a time.  
Addr  
Name  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
-
$00  
$01  
$02  
$03  
$04  
$05  
$06  
$07  
$08  
$09  
$0A  
$0B  
$0C  
$0D  
$0E  
$0F  
$10  
$11  
$12  
$13  
$14  
$15  
$16  
$17  
$18  
Reserved  
GENERAL1  
GENERAL2  
GENERAL3  
VGSET1  
-
SDDELAY[1:0]  
CCDSEQ[1:0]  
-
-
-
ALLOFF  
SHTD  
ONOFFA  
COLDF  
ONOFFC  
BATTYPE  
ONOFFD  
ONOFFE  
SSTIME[1:0]  
DVSSET1[3:0]  
OVUVSET1  
DVSSTAT1  
OVUVSET2  
DVSSTAT2  
OVUVSET3  
DVSSTAT3  
OVUVSET4  
DVSSTAT4  
OVUVSET5  
-
-
-
-
TSDF1  
TSDF2  
TSDF3  
TSDF4  
SCF1  
SCF2  
SCF3  
SCF4  
ILIMF1  
ILIMF2  
UVF1  
OVF1  
OVF2  
OVF3  
OVF4  
VGSET2  
-
-
-
-
DVSSET2[3:0]  
REG2SET1  
REG2SET2  
REG3SET1  
REG3SET2  
REG4SET1  
REG4SET2  
REG5SET1  
REG5SET2  
REG5SET3  
REG6SET1  
REG6SET2  
REG6SET3  
REG7SET1  
REG7SET2  
REG7SET3  
REG8SET1  
REG8SET2  
REG8SET3  
FAULTS  
UVF2  
UVF3  
DVSSET3[3:0]  
ILIMF3  
DVSSET4[3:0]  
ILIMF4  
UVF4  
DVSSET5[3:0]  
-
SSSET5[1:0]  
-
-
TSDF5  
TSDF6  
SCF5  
ILIMF5  
UVF5  
OVF5  
OVF6  
DVSSTAT5  
OVUVSET6  
-
-
-
DVSSET6[3:0]  
-
SSSET6[1:0]  
SCF6  
ILIMF6  
UVF6  
DVSSTAT6  
OVUVSET7  
DVSSET7[3:0]  
FSW2[1:0]  
UVF7  
DVSSET8[3:0]  
REG8MODE  
-
SSSET7[1:0]  
-
OVF7  
DVSSTAT7  
OVUVSET8  
-
ILED[3:0]  
SSSET8[1:0]  
-
TSDF8  
FLT6  
SCF8  
FLT5  
ILIMF8  
FLT4  
UVF8  
FLT3  
OVF8  
FLT2  
DVSSTAT8  
FLT8  
FLT7  
FLT1  
ACCURATE  
3DAC0  
-
$19  
$49  
$58  
$59  
I2CSET1  
REG3DAC  
REG7CR0  
REG7DAC  
3DAC7  
3DAC6  
3DAC5  
-
3DAC4  
DISCHG_B  
7DAC4  
3DAC3  
7DAC3  
3DAC2  
7DAC2  
3DAC1  
7DAC1  
EN[1:0]  
7DAC7 7DAC6  
-
7DAC5  
7DAC0  
34704A Register Distribution Map  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
34  
FUNCTIONAL DEVICE OPERATION  
LOGIC COMMANDS AND REGISTERS  
Addr  
Name  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
-
$00  
$01  
$02  
$03  
$04  
$05  
$06  
$07  
$08  
$09  
$0A  
$0B  
$0C  
$0D  
Reserved  
GENERAL1  
GENERAL2  
-
SDDELAY[1:0]  
-
-
-
ALLOFF  
SHTD  
-
ONOFFD  
ONOFFE  
-
COLDF  
BATTYPE  
SSTIME[1:0]  
GENERAL3  
Reserved  
-
-
-
-
-
-
-
-
UVF1  
OVF1  
OVF2  
OVF3  
OVF4  
-
VGSET2  
-
-
-
-
DVSSET2[3:0]  
OVUVSET2  
DVSSTAT2  
OVUVSET3  
DVSSTAT3  
OVUVSET4  
DVSSTAT4  
OVUVSET5  
REG2SET1  
REG2SET2  
REG3SET1  
REG3SET2  
REG4SET1  
REG4SET2  
REG5SET1  
REG5SET2  
REG5SET3  
Reserved  
TSDF2  
TSDF3  
TSDF4  
SCF2  
SCF3  
SCF4  
ILIMF2  
UVF2  
DVSSET3[3:0]  
ILIMF3  
UVF3  
UVF4  
DVSSET4[3:0]  
ILIMF4  
DVSSET5[3:0]  
-
SSSET5[1:0]  
-
TSDF5  
-
SCF5  
ILIMF5  
-
UVF5  
OVF5  
DVSSTAT5  
$0E  
$0F-  
$12  
FSW2SET  
Reserved  
FSW2[1:2]  
-
$13  
$14  
$15  
$16  
$17  
$18  
-
-
DVSSET8[3:0]  
OVUVSET8  
REG8SET1  
REG8SET2  
REG8SET3  
FAULTS  
-
ILED[3:0]  
REG8MODE  
UVF8  
SSSET8[1:0]  
-
TSDF8  
-
SCF8  
FLT5  
ILIMF8  
FLT4  
OVF8  
DVSSTAT8  
FLT1  
FLT8  
DAC7  
-
FLT3  
FLT2  
-
ACCURATE  
DAC0  
$19  
$49  
I2CSET1  
REG3DAC  
DAC6  
DAC5  
DAC4  
DAC3  
DAC2  
DAC1  
34704B Register Distribution Map  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
35  
FUNCTIONAL DEVICE OPERATION  
COMPONENT CALCULATION  
COMPONENT CALCULATION  
F
AND GENERAL SOFT START  
SW1  
CONFIGURATION  
RSS2  
RSS1 + RSS2  
⎛
⎝
⎞
⎠
-----------------------------------  
VSS = VDDI  
VDDI  
The 34704 uses FSW1 as the switching frequency for  
REG1(VG) thru REG5, and this can be changed by applying  
a voltage between 0 to 2.5V to the FREQ pin. If the FREQ pin  
is left unconnected, the 34704 starts up with a default  
frequency of 750KHz. To configure the FSW1, use a 2  
resistors voltage divider from VDDI to ground to set the  
voltage on the FREQ pin as indicated bellow:  
RSS1  
RSS1, RSS2 tolerance ±±10%  
V
SS  
SS  
RSS2  
GND  
FSW1  
REGULATORS POWER STAGE AND  
COMPENSATION CALCULATION  
Ratio  
[KHz]  
0
750  
Regulator 1 and 6 (Synchronous Boost - internally  
compensated - REG1 is VG supply).  
9/32  
1000  
1250  
1500  
1750  
2000  
REG1 is a Synchronous Boost converter set to 5V and  
Maximum current of 500mA while REG6 is set to 15V at  
60ma(on the 34704B, REG1 does not exist but similar  
circuitry is used to provide the internal VG voltage). They do  
not need an external compensation network, thus, the only  
components that need to be calculated are:  
13/32  
17/32  
21/32  
VDDI  
• L: A boost power stage can be designed to operate in  
CCM for load currents above a certain level usually 5 to  
15% of full load. The minimum value of inductor to  
maintain CCM can be determined by using the following  
procedure:  
1. If an external voltage is used, FSW1 can only be set during  
device startup.  
1. Define IOB as the minimum current to maintain CCM as  
15% of full load.  
RF2  
RF1 + RF2  
⎛
⎝
⎞
⎠
---------------------------  
VFREQ = VDDI  
VDDI  
Vo(D)(1 – D)2T  
(H)  
-----------------------------------------  
≥
Lmin  
RF1  
2IOB  
RF1, RF2 tolerance ±±10%  
V
FREQ  
FREQ  
GND  
2. However the worst case condition for the boost power  
stage is when the input voltage is equal to one half of  
RF2  
the output voltage, which results in the Maximum ΔIL,  
then:  
Initially at power up, the soft start time will be set for all of  
the regulators through programming the SS pin with an  
external resistor divider connected between VDDI and AGND  
as follows:  
Vo(T)  
(H)  
---------------  
≥
Lmin  
16IOB  
Note: On the 34704B Use the recommended 3.0uH  
inductor rated between 50 to 100mA in order to have this  
regulator working in DCM. Rising the inductor value will make  
the regulator to begin working in CCM.  
Soft Start timing  
Ratio  
[ms]  
0
11/32  
0.5  
2.0  
• COUT: The three elements of output capacitor that  
contribute to its impedance and output voltage ripple are  
the ESR, the ESL and the capacitance C. The minimum  
capacitor value is approximately:  
19/32  
8.0  
IomaxDmax  
(F)  
---------------------------  
≥
COUT  
VDDI  
32.0  
FswΔVor  
• Where ΔVOr is the desired output voltage ripple.  
IDD max = 100μΑ  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
36  
FUNCTIONAL DEVICE OPERATION  
COMPONENT CALCULATION  
• Now calculate the maximum allowed ESR to reach the  
1. Define IOB as the minimum current to maintain CCM as  
15% of full load.  
desired ΔVOr.  
ΔVor  
------------------------------------------  
ESR ≤  
[Ω]  
Iomax  
⎛
⎞
--------------------- + IOB  
⎝
⎠
(Vo + Iomax(RDSONLSFET + RL)D′min )T  
1 – Dmax  
Vo  
-----------  
--------------------------------------------------------------------------------------------------------  
Lmin  
≥
≈ D′MAXT  
2IOB  
2IOB  
[H]  
• 1CVG: Use a 47uF capacitor from Ground to VG.  
• D1: Use a fast recovery schottky diode rated to 10V at 1A.  
• COUT: The three elements of output capacitor that contribute  
to its impedance and output voltage ripple are the ESR, the  
ESL and the capacitance C. A good approach to calculate the  
minimum real capacitance needed is to include the transient  
response analysis to control the maximum overshoot as  
desired.  
Regulator 2, 4 and 5 (Synchronous Buck-Boost regulator  
with external compensation)  
These three regulators are 4-Switch synchronous buck-boost  
voltage mode control DC-DC regulator that can operate at  
various output voltage levels. Since each of the regulators may  
work as a buck or a boost depending on the operating voltages,  
they need to be compensated in different ways for each  
situation.  
1. First calculate the dt_I (inductor current rising time) given  
by:  
IomaxT  
dtI = -------------------  
ΔIostep  
[s]  
Since the 34704 is meant to work using a LiIon battery, the  
operating input voltage range is set from 2.7 - 4.2 V, then the  
following scenarios are possible:  
Where the parameter ΔIo_step is the maximum current step  
during the current rising time and is define as:  
Input voltage  
Regulator  
Vo  
Operation  
range  
[A]  
Dmax Vinmin – Vo  
⎞ ⎛  
⎛
⎝
⎞
⎠
------------ -------------------------------  
ΔIostep =  
⎠ ⎝  
Fsw  
L
2
2.8 V  
3.3 V  
3.3 V  
1.8 V  
2.5 V  
3.3 V  
3.3 V  
3.0 - 4.2  
2.7 - 3.0  
3.5 - 4.2  
2.7 - 4.2  
2.7 - 4.2  
2.7 - 3.0  
3.5 - 4.2  
Buck  
Boost  
Buck  
Buck  
Buck  
Boost  
Buck  
2. Then the output capacitor can be chosen as follow:  
IomaxdtI  
---------------------  
ΔVomax  
[A]  
COUT  
≤
4
5
• Where ΔVOmax is the maximum allowed transient  
overshoot expressed as a percentage of the output  
voltage, typically from 3 to 5% of Vo.  
3. Finally find the maximum allowed ESR to allow the  
desired transient response:  
• NOTE: Since these 3 regulators can work as a buck or a  
boost in a single application, a good practice to configure  
these regulators is to compensate for a boost scenario and  
then verify that the regulator is working in buck mode using  
that same compensation.  
ΔVor(Fsw)(L)  
ESRmax = -------------------------------------  
[Ω]  
Vo(1 – Dmin  
)
NOTE: Do not use the parameters ΔVOr and ΔVOmax  
indistinctly, the first one indicates the output voltage ripple, while  
the second one is the maximum output voltage overshoot  
(transient response).  
Compensating for Buck operation:  
• R1 and RB: These two resistors help to set the output voltage  
to the desire value using a Vref=0.6V, select R1 between 10k  
and 100K and then calculate RB as follows:  
• L: A buck power stage can be designed to operate in CCM for  
load currents above a certain level usually 5 to 15% of full  
load. The minimum value of inductor to maintain CCM can be  
determined by using the following procedure:  
R1  
RB = --------------------  
[Ω]  
Vo  
----------- – 1  
Vref  
• Compensation network. (C1,C2,C3, R2, R3): For  
compensating a buck converter, 3 important frequencies  
referring to the plant are:  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
37  
FUNCTIONAL DEVICE OPERATION  
COMPONENT CALCULATION  
1. Output LC filter cutoff frequency (FLC):  
FSW  
FBW = ----------  
10  
[Hz]  
1
[Hz]  
The Type 3 external compensation network will be in  
charge of canceling some of these poles and zeros to  
achieve stability in the system. The following poles and  
zeroes frequencies are provided by the type 3 compensation.  
FLC = -------------------------  
2π  
LCOUT  
2. Cutoff frequency due to capacitor ESR:  
FPO = FBW  
FZ1 = 0.9FLC  
F22 = 1.1FLC  
1
[Hz]  
FESR = -------------------------------------  
2π(COUT)ESR  
3. Crossover frequency (or bandwidth):  
FSW  
F2P = ----------  
FP1 = FESR  
2
The passive components associated to these frequencies are calculated with the following formulas.  
Vinmin  
⎛
⎞
1
1
⎛
⎞
⎠
------------------ ---------------- ----------------------------  
C1 =  
C2 =  
R2 =  
R3 =  
C3 =  
⎜
⎝
⎟
2 ⎝  
⎠
VRAMP  
2π(FPOR1)  
D′min  
1
⎛
⎝
⎞
⎠
----------------------------  
2π(FZ2R1)  
1
⎛
⎝
⎞
⎠
----------------------------  
2π(FZ1C1)  
1
⎛
⎝
⎞
⎠
---------------------------  
2π(FP1C2)  
1
⎛
⎝
⎞
⎠
---------------------------  
2π(FP2R2)  
On the 34704 VRAMP is half of 1.2V since each operation mode spends only half the ramp.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
38  
FUNCTIONAL DEVICE OPERATION  
COMPONENT CALCULATION  
Compensating for boost operation:  
• Compensation network. (C1,C2,C3, R2, R3)  
For compensating a buck converter, 4 important  
frequencies referring to the plant are:  
• L: A boost power stage can be designed to operate in  
CCM for load currents above a certain level usually 5 to  
15% of full load. The minimum value of inductor to  
maintain CCM can be determined by using the following  
procedure:  
1. Output LC filter cutoff frequency (FLC):  
1. Define IOB as the minimum current to maintain CCM as  
15% of full load:  
D′min  
FLC = -------------------------  
[Hz]  
2π  
LCOUT  
• Where D’min is the minimum off time percentage given  
by:  
Vo(D)(1 – D)2T  
[H]  
-----------------------------------------  
≥
Lmin  
2IOB  
However the worst case condition for the boost power  
stage is when the input voltage is equal to one half of the  
output voltage, which results in the Maximum ΔIL, then:  
Vin  
D′min = ------------m----i--n---  
Voutmax  
2. Cutoff frequency due to capacitor ESR:  
Vo(T)  
[H]  
----------------  
≥
Lmin  
16IOB  
1
[Hz]  
[Hz]  
FESR = -------------------------------------  
• COUT: The three elements of output capacitor that  
contribute to its impedance and output voltage ripple are  
the ESR, the ESL and the capacitance C. The minimum  
capacitor value is approximately:  
2π(COUT)ESR  
3. The right plane zero frequency:  
(D′min)2RLOAD  
RHPZ = ---------------------------------------  
2πL  
IomaxDmax  
[F]  
---------------------------  
≥
COUT  
FswΔVor  
4. Crossover frequency (or bandwidth): select this  
frequency as far away form the RHPZ as much as  
• Where ΔVOr is the desired output voltage ripple.  
• Now calculate the maximum allowed ESR to reach the  
desired ΔVOr:  
possible:  
RHPZ  
[Hz]  
FBW « --------------  
ΔVor  
6
------------------------------------------  
ESR ≤  
Iomax  
[Ω]  
⎛
⎞
The Type 3 external compensation network will be in  
charge of canceling some of these poles and zeros to  
achieve stability in the system. The following poles and  
zeroes frequencies are provided by the type 3 compensation:  
--------------------- + IOB  
⎝
⎠
1 – Dmax  
• R1 and RB:  
These two resistors help to set the output voltage to the  
desire value using a Vref=0.6V, select R1 between 10k and  
100K and then calculate RB as follows:  
FPO = FBW  
FP1 = FESR  
FZ1 = 0.9FLC  
F22 = 1.1FLC  
FSW  
F2P = ----------  
2
R1  
RB = ----------------------  
[Ω]  
Vo  
------------- – 1  
VREF  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
39  
FUNCTIONAL DEVICE OPERATION  
COMPONENT CALCULATION  
The passive components associated to these frequencies are calculated with the following formulas  
Vinmin  
⎛
⎞
1
1
⎛
⎞
⎠
------------------ ---------------- ----------------------------  
C1 =  
C2 =  
R2 =  
R3 =  
C3 =  
⎜
⎝
⎟
2 ⎝  
⎠
VRAMP  
2π(FPOR1)  
D′min  
1
⎛
⎝
⎞
⎠
----------------------------  
2π(FZ2R1)  
1
⎛
⎝
⎞
⎠
----------------------------  
2π(FZ1C1)  
1
⎛
⎝
⎞
⎠
---------------------------  
2π(FP1C2)  
1
⎛
⎝
⎞
⎠
---------------------------  
2π(FP2R2)  
On the 34704 VRAMP is half of 1.2V since each operation mode spends only half the ramp.  
Regulator 3 (Synchronous Buck - internally  
compensated)  
[F]  
IomaxdtI  
---------------------  
ΔVomax  
COUT  
≤
• L: A buck power stage can be designed to operate in CCM  
for load currents above a certain level usually 5 to 15% of  
full load. The minimum value of inductor to maintain CCM  
can be determined by using the following procedure:  
Where ΔVOmax is the maximum allowed transient  
overshoot expressed as a percentage of the output voltage,  
typically from 3 to 5% of Vo.  
1. Define IOB as the minimum current to maintain CCM as  
15% of full load.  
• Finally find the maximum allowed ESR to allow the  
desired transient response:  
(Vo + Iomax (RDSONLSFET + RL)(D′min)T  
[Ω]  
ΔVor(Fsw)(L)  
ESRmax = -------------------------------------  
Vo(1 – Dmin  
----------------------------------------------------------------------------------------------------------  
≥
Lmin  
2IOB  
)
Vo  
2IOB  
[H]  
-----------  
NOTE: do not use the parameters ΔVOR and ΔVOmax  
Lmin ≥ D′T  
indistinctly, the first one indicates the output voltage rip-  
ple, while the second one is the maximum output volt-  
age overshoot (transient response).  
• COUT: The three elements of output capacitor that  
contribute to its impedance and output voltage ripple are  
the ESR, the ESL and the capacitance C. A good  
approach to calculate the minimum real capacitance  
needed is to include the transient response analysis to  
control the maximum overshoot as desired.  
• First calculate the dt_I (inductor current rising time)  
given by:  
• R1 and RB: These two resistors help to set the output  
voltage to the desire value using a VREF=0.6V, select R1  
between 10k and 100K and then calculate RB as follows:  
[Ω]  
R1  
RB = --------------------  
Vo  
----------- – 1  
Vref  
IomaxT  
dtI = -------------------  
ΔIostep  
[s]  
Regulator 8 (Synchronous Boost - internally  
compensated -Voltage or current feedback)  
Where the parameter ΔIO_step is the maximum current  
step during the current rising time and is define as:  
REG8 is a Synchronous Boost converter set to 15V with a  
maximum current of 30mA and can be used with voltage  
feedback using the standard voltage divider configuration, or  
can be programmed to work with a current feedback  
configuration to control the current flowing through a LED  
Dmax Vinmin – Vo  
⎞ ⎛  
[A]  
⎛
⎝
⎞
⎠
------------ -------------------------------  
ΔIostep =  
⎠ ⎝  
Fsw  
L
• Then the output capacitor can be chosen as follow:  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
40  
FUNCTIONAL DEVICE OPERATION  
COMPONENT CALCULATION  
string. It does not need external compensation network, thus  
the only components that need to be calculated are:  
Where Vref=230mV is the maximum internal reference  
voltage in current mode control that is reflected on the FB8  
pin.  
• L: A boost power stage can be designed to operate in  
CCM for load currents above a certain level usually 5 to  
15% of full load. The minimum value of inductor to  
maintain CCM can be determined by using the following  
procedure:  
Regulator 7 (Inverter controller - external compensation  
needed)  
REG7 is a non-synchronous buck/boost inverting PWM  
voltage-mode control DC-DC regulator that drive an external  
P-MOSFET to supply a typical voltage of -7V at a maximum  
current of 60 mA.  
• Define IOB as the minimum current to maintain CCM as  
15% of full load:  
• P-MOSFET: The peak current of the MOSFET is assumed  
to be ID, which is obtained by the following formula, define  
IOB from 5 to 15% of maximum current rating.  
Vo(D)(1 – D)2T  
[H]  
-----------------------------------------  
≥
Lmin  
2IOB  
However the worst case condition for the boost power  
stage is when the input voltage is equal to one half of the  
output voltage, which results in the Maximum ÄIL, then:  
–(Io + IOB  
)
IQ ≥ ILpeak = ----------------------------  
1 – D  
And the voltage rating is given by:  
Vo(T)  
[H]  
----------------  
≥
Lmin  
16IOB  
VQ = Vin – Vo  
• COUT: The three elements of output capacitor that  
contribute to its impedance and output voltage ripple are  
the ESR, the ESL and the capacitance C. The minimum  
capacitor value is approximately:  
• Diode D7: The peak value of the diode current is IFSM  
which should also be higher than ILpeak. The average  
current rating should be higher than the output current low  
and the repetition reverse voltage VRRM is given by:  
IomaxDmax  
---------------------------  
FswΔVor  
[F]  
VRRM ≥ Vin – Vo  
COUT  
≥
• L: The minimum value of inductor to maintain CCM can be  
• Where ΔVOr is the desired output voltage ripple.  
• Now calculate ΔVOr the maximum allowed ESR to  
reach the desired.  
determined by using the following procedure:  
2
Vinmin  
----------------- -------------------------------  
≥
–VoT  
2Iomax Vo – Vinmin  
⎛
⎞
⎠
[H]  
Lmin  
⎝
ΔVor  
------------------------------------------  
Iomax  
[Ω]  
ESR ≤  
• COUT: The three elements of output capacitor that  
contribute to its impedance and output voltage ripple are  
the ESR, the ESL and the capacitance C. The minimum  
capacitor value is approximately:  
⎛
⎝
⎞
--------------------- + IOB  
⎠
1 – Dmax  
• R1 and RB (for Voltage feedback control): These two  
resistors help to set the output voltage to the desire value  
using a VREF=0.6V, select R1 between 10k and 100K and  
then calculate RB as follows:  
IomaxDmax  
[F]  
---------------------------  
≥
COUT  
FSWΔVor  
• Where ΔVOr is the desired output voltage ripple.  
• Now calculate the maximum allowed ESR to reach the  
desired.  
[Ω]  
R1  
RB = --------------------  
Vo  
----------- – 1  
Vref  
• RS (For current feedback control with LED string):  
This resistor is attached at the end of the LED string and it  
controls the amount of current flowing through it. To  
calculate this resistor, set the maximum current you want  
to flow though the string and use the following formula:  
•
ΔVor  
[Ω]  
-----------------------------------------------  
ESR ≤  
Iomax  
IOB  
⎛
⎞
--------------------- + ------------  
1 – Dmax 1 – D  
⎝
⎠
• R1 and RB: These two resistors help to set the output  
voltage to the desire value using a VFB7=0.6V, select R1  
between 10k and 150K and then calculate RB as follows:  
Vref  
RS = ---------  
Io  
[Ω]  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
41  
FUNCTIONAL DEVICE OPERATION  
COMPONENT CALCULATION  
• Cutoff frequency due to capacitor ESR:  
0.9  
----------------------------------  
RB =  
R1  
[Ω]  
1.5 – Vo – 0.9  
1
[Hz]  
FESR = -------------------------------------  
NOTE: RB is not grounded, instead is connected to  
VREF7 pin (VREF7=1.5V) which provide a positive voltage to  
assure a positive voltage at the FB7 pin.  
2π(COUT)ESR  
• The right plane zero frequency:  
• Compensation network. (C1,C2,C3, R2, R3)  
(D′min)2RLOAD  
RHPZ = ---------------------------------------  
D • 2πL  
For compensating a buck converter, 4 important  
frequencies referring to the plant are:  
[Hz]  
• Output LC filter cutoff frequency (FLC):  
• Crossover frequency (or bandwidth): select this  
frequency as far away form the RHPZ as much as  
possible:  
D′min  
[Hz]  
FLC = -------------------------  
2π  
LCOUT  
RHPZ  
[Hz]  
FBW « --------------  
6
Where D’min is the minimum off time percentage given by:  
The Type 3 external compensation network will be in  
charge of canceling some of these poles and zeros to  
achieve stability in the system. The following poles and  
zeroes frequencies are provided by the type 3 compensation:  
Vinmin  
D′min = ------------------------  
Voutmax  
FPO = FBW  
FP1 = FESR  
FZ1 = 0.9FLC  
F22 = 1.1FLC  
FSW  
F2P = ----------  
2
The passive components associated to these frequencies are calculated with the following formulas.  
Vinmin  
⎛
⎞
1
1
⎛
⎞
⎠
------------------ ---------------- ----------------------------  
C1 =  
C2 =  
R2 =  
R3 =  
C3 =  
⎜
⎝
⎟
2 ⎝  
⎠
VRAMP  
2π(FPOR1)  
D′min  
1
⎛
⎝
⎞
⎠
----------------------------  
2π(FZ2R1)  
1
⎛
⎝
⎞
⎠
----------------------------  
2π(FZ1C1)  
1
⎛
⎝
⎞
⎠
---------------------------  
2π(FP1C2)  
1
⎛
⎝
⎞
⎠
---------------------------  
2π(FP2R2)  
On the 34704 VRAMP is half of 1.2V since each operation mode spends only half the ramp.  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
42  
TYPICAL APPLICATIONS  
TYPICAL APPLICATIONS  
VIN  
VIN  
34704A  
(19)  
VOUT1  
VG  
V1  
REG8  
V8  
VG  
SW8  
BT8  
SW1  
BT1  
REG8  
BT2D  
VIN  
FB8  
PVIN2  
VIN  
SW2D  
VOUT7  
DRV7  
VOUT2  
V2  
V7  
REG2  
SW2U  
REG7  
BT2U  
FB2  
FB7  
COMP2  
VREF7  
BT3  
COMP7  
VIN  
PVIN3  
VIN  
VOUT6  
SW3  
V6  
REG3  
VOUT3  
FB3  
REG6  
SW6  
V3  
BT6  
FB6  
VIN  
VIN  
BT4D  
PVIN4  
SW4D  
BT5D  
PVIN5  
SW5D  
VOUT4  
SW4U  
VOUT5  
SW5U  
V4  
V5  
REG4  
REG5  
BT4U  
FB4  
BT5U  
FB5  
COMP4  
COMP5  
VDDI  
VIN  
VBUS  
ONOFF  
SCL  
SDA  
VIN  
VDDI  
VIN  
FREQ  
V2  
RST  
SS  
VIN  
VIN  
PGND  
AGND  
(EXPAD)  
Notes  
(18)  
18. AGND(S) & PGND(S) SHOULD BE CONNECTED TOGETHER AS CLOSE TO THE IC AS POSSIBLE  
19. REFER TO THE FB8 FUNCTIONAL PIN DESCRIPTION ON PAGE 17.  
Figure 7. 34704A Typical Application Diagram  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
43  
TYPICAL APPLICATIONS  
VIN  
VIN  
34704B  
(21)  
REG8  
VG  
SW8  
BT8  
SW1  
BT1  
VG  
REG8  
VIN  
FB8  
PVIN2  
BT2D  
VIN  
PVIN5  
BT5D  
SW2D  
VOUT2  
V2  
SW5D  
VOUT5  
V5  
REG2  
SW2U  
REG5  
BT2U  
FB2  
SW5U  
BT5U  
FB5  
COMP2  
VIN  
COMP5  
PVIN3  
BT3  
VIN  
PVIN4  
BT4D  
SW3  
SW4D  
REG3  
VOUT4  
V4  
VOUT3  
FB3  
V3  
REG4  
SW4U  
BT4U  
FB4  
VIN  
COMP4  
ONOFF  
VIN  
VDDI  
VIN  
VBUS  
VIN  
SCL  
SDA  
FREQ  
V2  
SS  
RST  
VIN  
VIN  
AGND  
PGND  
(EXPAD)  
(20)  
Notes  
20. AGND(S) & PGND(S) SHOULD BE CONNECTED TOGETHER AS CLOSE TO THE IC AS POSSIBLE  
21. REFER TO THE FB8 FUNCTIONAL PIN DESCRIPTION ON PAGE 17.  
Figure 8. 34704B Typical Application Diagram  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
44  
PACKAGING  
PACKAGE DIMENSIONS  
PACKAGING  
PACKAGE DIMENSIONS  
For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below.  
EP SUFFIX  
56-PIN  
98ASA10751D  
REVISION A  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
45  
PACKAGING  
PACKAGE DIMENSIONS (CONTINUED)  
PACKAGE DIMENSIONS (CONTINUED)  
EP SUFFIX  
56-PIN  
98ASA10751D  
REVISION A  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
46  
PACKAGING  
PACKAGE DIMENSIONS (CONTINUED)  
PACKAGE DIMENSIONS (CONTINUED)  
EP SUFFIX  
56-PIN  
98ASA10751D  
REVISION A  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
47  
REVISION HISTORY  
REVISION HISTORY  
REVISION  
2.0  
DATE  
4/2008  
6/2008  
DESCRIPTION OF CHANGES  
•
Initial Release  
•
•
•
•
Revised 34704 Simplified Application Diagram on page 1  
Revised 34704 Internal Block Diagram on page 3  
Revised 34704 Pin Definitions on page 4  
Revised 34704A Typical Application Diagram on page 43 and 34704B Typical Application Diagram  
on page 44  
3.0  
6/2009  
•
Updated category from Advance Information to Technical Data.  
4.0  
34704  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
48  
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MC34704  
Rev. 4.0  
6/2009