转到网站首页
转为中文步骤:
1、请用电脑端360浏览器打开本页地址,如您电脑未安装360浏览器,请点这里下载;
2、点击360浏览器右上角的翻译插件,如右图红圈中所示:
3、点击所弹出窗口里的右下角的按钮 “翻译当前网页”;
4、弹窗提示翻译完毕后关闭弹窗即可;
aSM121  
SIMISTOR™ TEMPERATURE SENSOR  
ULTRA-LOW-POWER SILICON THERMISTOR  
PRODUCT SPECIFICATION  
New Release Specification  
General Description  
Pin Configuration  
The aSM121 is a high-precision, 3-lead CMOS silicon  
thermistor in an ultra-small leadless package that provides  
a cost-effective solution for applications requiring high-  
accuracy low-power temperature monitoring. The aSM121  
functions in a way that is similar to a PTC thermistor.  
However, it is linear-calibrated, enabling application  
developers to directly interpret output voltage as  
temperature without complex compensation for non-  
linearity.  
QFN-3  
1
2
VDD  
3
GND  
aSM121  
The aSM121 output voltage ramp has a positive slope of  
10mV/°C that is independent of supply voltage. The  
aSM121 has a guaranteed room temperature (25°C)  
accuracy of ±1°C. The aSM121 does not require external  
calibration - each device is calibrated at the factory.  
VOUT  
Top view, contacts underneath,  
actual part marking below  
Features  
Precision Calibrated to ±1°C at 25°C  
Temperature Range: -30°C to 125°C  
Extremely Linear Output Ramp: 10mV/°C  
0°C Output: 0.50V  
Output Ramp is Calibrated to Degrees Celsius  
Low Operating Current: 14μA  
Accuracy vs Temperature  
Operating Voltage Range: +2.7 V to +3.6V  
Non-linearity: 0.8°C  
1.2mm x 1.5mm QFN Package  
4
3
2
Applications  
Mobile Phones  
1
upper spec limits  
lower spec limits  
Mobile Communications Terminals  
Computers  
0
-1  
-2  
Battery Management  
FAX Machines/Printers/Copiers  
Portable Medical Instruments  
HVAC, Power Supply Modules  
Disk Drives  
-3  
-4  
125  
25  
-40 -20  
0
20  
40  
60  
80 100 120  
Temperature (°C)  
Automotive Control Circuits  
Ordering Information  
Part Number  
Package  
Temperature Range  
Part Marking  
How Supplied  
aSM121Q3  
3-Lead QFN  
-30˚C to +125˚C  
Jm  
3000 units on T&R  
m – month / year code  
© Andigilog, Inc. 2004  
www.andigilog.com  
July 2005 - 70A04006  
aSM121  
Absolute Maximum Ratings1  
Parameter  
Supply Voltage  
Rating  
+7V  
Notes:  
1. Absolute maximum ratings are limits beyond  
which operation may cause permanent damage to  
the device. These are stress ratings only;  
functional operations at or above these limits is  
not implied.  
2. Human Body Model: 100pF capacitor discharged  
through a 1.5kΩ resistor into each pin. Machine  
Model: 200pF capacitor discharged directly into  
each pin.  
Output Voltage  
VDD + 0.5V  
10mA  
Continuous Current, any terminal  
Storage Temperature Range  
-60°C to +150°C  
4000V  
Human Body Model  
ESD2  
Machine Model  
400V  
Thermal  
QFN-3  
3. These specifications are guaranteed only for the  
test conditions listed.  
TBD  
Resistance - ΘJA  
Lead Temp  
260°C  
Recommended Operating Ratings  
Symbol  
VDD  
Parameter  
Min  
+2.7  
0
Max  
+3.6  
1.8  
Units  
V
Supply Voltage  
Output Voltage  
VOUT  
TA  
V
Operating Temperature Range  
-30  
+125  
°C  
Electrical Characteristics3  
Limits apply for -  
40°CTA +125°C and VD D =+3.0V unless otherwise noted.  
Parameter  
Symbol  
Conditions  
Min  
-1  
Typ  
±0.5  
±1  
Max  
+1  
Units  
°C  
TA=+25°C  
Accuracy4  
TA=-30°C (TMIN  
)
-4  
+4  
°C  
TA=+125°C (TMAX  
)
-3  
±1  
+3  
°C  
Non-linearity5  
±0.8  
14  
°C  
TA=+25°C  
Supply Current - Output floating  
IDD  
-
30°CTA+125°C  
15  
μA  
μA  
Output Sink Capability6  
IOL  
IOH  
+2.7V < VDD < +3.6V  
+2.7V < VDD < +3.6V  
25  
Output Source Capability6  
200  
μA  
Average Output Slope  
(Sensor Gain)  
AOUT  
10  
mV/°C  
Zero-Degree Output Voltage  
Room Temp Output Voltage  
Self Heating7  
VOUT0  
TA=+0°C  
TA=+25°C  
QFN-3  
500  
750  
mV  
mV  
°C  
VOUT25  
0.025  
Notes:  
4. Accuracy (expressed in °C) = Difference between calculated output voltage and measured output voltage.  
Calculated output voltage = 10mV/°C multiplied by device’s case temperature at specified conditions of temperature,  
voltage and power supply with an offset of 500mV (see Fig. 1).  
5. Non-linearity is defined as the deviation of the output-voltage-versus-temperature curve from the best-fit straight  
line, over the device’s rated temperature range.  
6. Lowest output current should be targeted; higher currents result in more self-heating of the device.  
7. Max Self Heating = ΘJA x (VDD x IDD). Assumes a capacitive load.  
- 2 -  
© Andigilog, Inc. 2004  
www.andigilog.com  
July 2005 - 70A04006  
aSM121  
VOUT (mV)  
1750  
1500  
1350  
900  
750  
500  
300  
200  
-30  
0
25  
50  
75  
100  
125  
Temperature (ºC)  
Temp (ºC) = (VOUT – 500mV) / 10mV/ºC)  
Figure 1. aSM121 Output Voltage vs. Temperature  
whose temperature is being measured. These printed  
circuit board lands and traces will not cause the  
aSM121’s temperature to deviate from the desired  
temperature.  
Mounting  
The aSM121 package provides good thermal  
conductivity to the surface to which it is soldered. It’s  
low mass allows it to respond quickly to changes in  
board temperature. In this case, its temperature will be  
within about 0.02°C of the temperature of the surface it  
is attached to if the ambient air temperature is almost  
the same as the surface temperature. If the air  
temperature is much higher or lower than the surface  
temperature, the actual temperature of the aSM121  
die will be at an intermediate temperature between the  
surface temperature and the air temperature.  
Alternatively, the aSM121 can be mounted inside a  
sealed-end metal tube, and can then be dipped into a  
bath or screwed into a threaded hole in a tank. As  
with any IC, the aSM121 and accompanying wiring  
and circuits must be kept insulated and dry to avoid  
leakage and corrosion. This is especially true if the  
circuit may operate at cold temperatures where  
condensation can occur. Printed-circuit coatings and  
varnishes such as Humiseal and epoxy paint or dips  
can be used to ensure that moisture cannot corrode  
the aSM121 or its connections.  
To ensure good thermal conductivity, the backside of  
the aSM121 die is directly attached to the GND pin.  
The lands and traces to the aSM121 will, of course, be  
part of the printed circuit board, which is the object  
- 3 -  
www.andigilog.com  
© Andigilog, Inc. 2004  
July 2005 - 70A04006  
aSM121  
Typical Performance Characteristics  
16  
15  
14  
13  
12  
11  
10  
9
8
VDD =+3V  
100  
7
-50  
-25  
0
25  
50  
75  
125  
Temperature (°C)  
Figure 2. aSM121 Current vs Temperature  
Typical Applications  
3.3V  
3.9K  
VTemp  
IN  
Serial  
Analog-to-Digital  
Converter  
aSM121  
SERIAL  
DATA OUT  
REF  
1.75V  
U1  
U3  
+
100K  
10K  
Adjustable  
Shunt Voltage  
Reference  
CLOCK  
FB  
U2  
ENABLE  
Figure 3. Serial Output Temperature to Digital Converter (Full Scale = +125˚C)  
- 4 -  
© Andigilog, Inc. 2004  
www.andigilog.com  
July 2005 - 70A04006  
aSM121  
Typical Applications (cont.)  
3.3V  
15K  
8
PARALLEL  
DATA  
IN  
aSM121  
OUTPUT  
U1  
Parallel Output  
Analog-to-Digital  
Converter  
_
+
VREF  
U2  
INTR  
1.75V  
5K  
U3  
CS  
RD  
WR  
15K  
Figure 4. Parallel Output Temperature to Digital Converter (Full Scale = +125˚C)  
3.3  
R3  
R4  
R1  
VT  
2.5V  
+
Shunt  
Voltage  
Reference  
U1  
VOUT  
U3  
0.1μF  
R2  
3.3  
aSM121  
VTemp  
U2  
Figure 5. Thermostat / Fan Controller  
- 5 -  
© Andigilog, Inc. 2004  
www.andigilog.com  
July 2005 - 70A04006  
aSM121  
QFN-3 Package Dimensions and PC Layout Pattern  
0.2 mm  
+ 0.10  
-0.0  
0.350  
± 0.050  
0.203  
± 0.025  
Ref. Package  
Outline  
0.350  
± 0.050  
Pin 1 Dot  
Marking  
0.500  
± 0.050 2-PL  
1.000 ± 0.050  
Exposed Pad  
0.2 mm  
+ 0.10  
-0.0  
0.5 mm  
+ 0.10  
-0.0  
1
QFN 3L  
1.000  
± 0.050  
1.500  
± 0.050  
0.6 mm  
+ 0.10  
-0.0  
3
(1.2mm x 1.5mm)  
2
0.5 mm  
+ 0.10  
-0.0  
0.200  
± 0.050  
0.200  
± 0.050  
0.250  
± 0.050  
0.000  
± 0.050  
1.1 mm  
+ 0.10  
-0.0  
1.200  
± 0.050  
1.050  
± 0.050  
0.750  
± 0.025  
0.2 mm  
+ 0.10  
-0.0  
Top View  
Bottom View  
Side View  
PC Layout Pattern  
Note: Solder mask is recommended to be 0.07mm larger than PC lands.  
Figure 6. Package Outline  
Tape and Reel Data  
2.00 ± 0.05  
4.00 ± 0.10  
4.00 ± 0.10  
Æ1.50 + 0.10  
1.75 ± 0.10  
8.00 + 0.30  
- 0.10  
3.50 ± 0.05  
SEC - BB  
SEC - AA  
Æ1.00 + 0.25  
0.254 ± 0.013  
SEC - AA  
SEC - BB  
10 MAX  
1.02 ± 0.10  
10 MAX  
Part  
Orientation  
1.35 ± 0.10  
1.75 ± 0.10  
Figure 7. Tape Dimensions and Part Orientation  
- 6 -  
© Andigilog, Inc. 2004  
www.andigilog.com  
July 2005 - 70A04006  
aSM121  
Data Sheet Classifications  
Preliminary Specification  
This classification is shown on the heading of each page of a specification for products that are either under  
development(design and qualification), or in the formative planning stages. Andigilog reserves the right to change or  
discontinue these products without notice.  
New Release Specification  
This classification is shown on the heading of the first page only of a specification for products that are either under  
the later stages of development(characterization and qualification), or in the early weeks of release to production.  
Andigilog reserves the right to change the specification and information for these products without notice.  
Fully Released Specification  
Fully released datasheets do not contain any classification in the first page header. These documents contain  
specification on products that are in full production. Andigilog will not change any guaranteed limits without written  
notice to the customers. Obsolete datasheets that were written prior to January 1, 2001 without any header  
classification information should be considered as obsolete and non-active specifications, or in the best case as  
Preliminary Specifications.  
Andigilog, Inc.  
8380 S. Kyrene Rd., Suite 101  
Tempe, Arizona 85284-2120  
Tel: (480) 940-6200  
Fax: (480) 940-4255  
- 7 -  
© Andigilog, Inc. 2004  
www.andigilog.com  
July 2005 - 70A04006  
aSM121  
Notes:  
Andigilog, Inc.  
8380 S. Kyrene Rd., Suite 101  
Tempe, Arizona 85284-2120  
Tel: (480) 940-6200  
Fax: (480) 940-4255  
- 8 -  
© Andigilog, Inc. 2004  
www.andigilog.com  
July 2005 - 70A04006