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October 2006  
rev 1.6  
ASM1832  
3.3V µP Power Supply Monitor and Reset Circuit  
Devices are available in 8-pin PDIP, 8-pin SO and compact 8-  
pin MicroSO packages.  
General Description  
The ASM1832 is a fully integrated microprocessor supervisor. It  
can halt and restart a “hung-up” microprocessor, restart a  
microprocessor after a power failure. It has a watchdog timer  
and external reset override. RESET and RESET outputs are  
push-pull.  
Key Features  
•
•
•
•
•
3.3V supply monitor  
Push-pull output  
Selectable watchdog period  
Debounce manual push-button reset input  
Precision temperature-compensated voltage reference  
and comparator.  
A
precision temperature-compensated reference and  
comparator circuits monitor the 3.3V, VCC input voltage status.  
During power-up or when the VCC power supply falls outside  
•
•
•
•
•
•
Power-up, power-down and brown out detection  
250ms minimum reset time  
selectable tolerance limits, both RESET and RESET become  
active. When VCC rises above the threshold voltage, the reset  
Active LOW and HIGH reset signal  
Selectable trip point tolerance: 10% or 20%  
Low-cost 8-pin DIP/SO and 8-pin Micro SO packages  
Wide operating temperature -40°C to +85°C  
signals remain active for an additional 250ms minimum,  
allowing the power supply and system microprocessor to  
stabilize. The trip point tolerance signal, TOL, selects the trip  
level tolerance to be either 10% or 20%.  
A debounced manual reset input, PBRST, activates the reset  
outputs for a minimum period of 250ms. There is a watchdog  
timer to stop and restart a microprocessor that is “hung-up”.  
The watchdog timeouts periods are selectable: 150ms, 610ms,  
and 1200ms. If the ST input is not strobed LOW before the  
time-out period expires, a reset is generated.  
Applications  
•
•
•
•
•
Microprocessor systems  
Computers  
Controllers  
Portable instruments  
Automotive systems  
Typical Operating Circuit  
Block Diagram  
V
CC  
3.3V  
ASM1832  
V
CC  
TOL  
Tolerance Selection  
RESET  
+
µP  
ASM1832  
-
V
I/O  
CC  
ST  
Reference  
V
CC  
40KΩ  
RESET  
Push Button  
Debounce  
RESET  
TOL  
PBRST  
TD  
Reset &  
Watchdog Timer  
Voltage Sense  
Comparator  
GND  
TD  
RESET  
Watchdog  
Transition Detector  
ST  
GND  
PulseCore Semiconductor Corporation  
1715 S, Boscom Ave Suit 200,Campbell, CA 95008. Tel:408-879-9077. Fax:408-879-9018.  
www.pulsecoresemi.com  
Notice: The information in this document is subject to change without notice  
October 2006  
rev 1.6  
ASM1832  
Pin Configuration  
1
8
7
6
5
VCC  
PBRST  
2
3
ST  
TD  
ASM1832  
TOL  
RESET  
RESET  
4
GND  
Pin Description  
Pin #  
8-Pin Package  
Pin Name  
PBRST  
TD  
Function  
Debounced manual pushbutton reset input.  
1
2
Watchdog time delay selection. (tTD = 150ms for TD = GND, tTD = 610ms for  
TD=Open, and tTD = 1200ms for TD = VCC).  
Selects 10% (TOL connected to GND) or 20% (TOL connected to VCC) trip point  
tolerance.  
3
4
TOL  
GND  
Ground.  
Active HIGH reset output. RESET is active:  
1. If VCC falls below the reset voltage trip point.  
5
RESET  
2. If PBRST is LOW.  
3. If ST is not strobed LOW before the timeout period set by TD expires.  
4. During power-up.  
6
7
8
RESET  
ST  
Active LOW reset output. (See RESET).  
Strobe input.  
VCC  
3.3V power.  
3.3V µP Power Supply Monitor and Reset Circuit  
2 of 9  
Notice: The information in this document is subject to change without notice  
October 2006  
ASM1832  
rev 1.6  
.
Detailed Description  
The  
ASM1832  
monitors  
the  
microprocessor  
or  
TRIP Point Voltage  
(V)  
microcontroller power supply and issues reset signals, both  
active HIGH and active LOW, that halt processor operation  
whenever the power supply voltage levels are outside a  
predetermined tolerance.  
Tolerance  
Select  
Tolerance  
Min  
Nom  
Max  
TOL = VCC  
TOL = GND  
20%  
10%  
2.47  
2.80  
2.55  
2.88  
2.64  
2.97  
RESET and RESET outputs  
RESET and RESET signals are active for a minimum of  
250ms after the supply has returned to in-tolerance level.  
This allows the power supply and monitored processor to  
stabilize before instruction execution is allowed to begin.  
t
R
V
(MAX)  
CCTP  
Trip Point Tolerance Selection  
V
CCTP  
V
(MIN)  
CCTP  
The TOL input is used to determine the level VCC can vary  
t
below 3.3V without asserting a reset. With TOL conected to  
RPU  
V
CC  
RESET  
RESET  
V
CC, RESET and RESET become active whenever VCC falls  
below 2.64V. RESET and RESET become active when the  
CC falls below 2.98V if TOL is connected to ground.  
V
OH  
V
V
OL  
After VCC has risen above the trip point set by TOL, RESET  
Figure 1: Timing Diagram : Power Up  
and RESET remain active for a minimum time period of  
250ms. On power-down, once VCC falls below the reset  
threshold RESET stays LOW and is guaranteed to be 0.4V or  
less until VCC drops below 1.2V. The reset output on the  
t
F
V
CC  
V
(MAX)  
ASM1832 uses a push-pull drive stage that can maintain a  
valid output below 1.2V. To sink current with VCC below 1.2V,  
CCTP  
V
CCTP  
V
(MIN)  
CCTP  
a resistor can be connected from the reset pin (RESET) to  
Ground. This configuration will give a valid value on the reset  
output with VCC approaching 0V. During both power up and  
RESET  
RESET  
t
RPD  
down, the configuration will draw current when the RESET is  
in the high state. The value of 100KΩ should be adequate to  
maintain a valid condition. The active HIGH reset signal is  
valid down to a VCC level of 1.2V also.  
V
OH  
V
OL  
Figure 2: Timing Diagram : Power Down  
Microprocessor  
ASM1832  
Application Information  
RESET  
RESET  
Manual Reset Operation  
Push-button switch input, PBRST, allows the user to override  
the internal trip point detection circuits and issue reset  
100kΩ  
3.3V µP Power Supply Monitor and Reset Circuit  
3 of 9  
Notice: The information in this document is subject to change without notice  
October 2006  
rev 1.6  
ASM1832  
signals. The pushbutton input is debounced and is pulled  
minimum timeout period, reset signals become active. On  
power-up after the supply voltage returns to an in-tolerance  
condition, the reset signal remains active for 250ms  
minimum, allowing the power supply and system  
microprocessor to stabilize.  
HIGH through an internal 40kΩ resistor.  
When PBRST is held LOW for the minimum time tPB, both  
resets become active and remain active for a minimum time  
period of 250ms after PBRST returns HIGH.  
ST Pulses as short as 20ns can be detected.  
The debounced input is guaranteed to recognize pulses  
greater than 20ms. No external pull-up resistor is required,  
since PBRST is pulled HIGH by an internal 40kΩ resistor.  
Valid  
Strobe  
Valid  
Strobe  
Invalid  
Strobe  
ST  
tST  
tRST  
The PBRST can be driven from a TTL or CMOS logic line or  
shorted to ground with a mechanical switch.  
tTD (min)  
tTD (max)  
RESET  
t
PB  
Note: ST is ignored whenever a reset is active  
PBRST  
Figure 5: Timing Diagram: Strobe Input  
V
IH  
t
PDLY  
Timeouts periods of approximately 150ms, 610ms or  
1,200ms are selected through the TD pin.  
V
IL  
t
RST  
Watchdog Time-out Period  
TD Voltage level  
(ms)  
RESET  
RESET  
VOH  
VOL  
Min  
Nom  
Max  
GND  
Floating  
VCC  
62.5  
250  
500  
150  
610  
250  
1000  
2000  
Figure 3: Timing Diagram: Pushbutton Reset  
1200  
Supply  
Voltage  
The watchdog timer can not be disabled. It must be strobed  
with a high-to-low transition to avoid watchdog timeout and  
reset.  
ASM1832  
1
2
8
7
V
CC  
PBRST  
T
D
I/O  
ST  
µP  
3
4
6
Supply  
Voltage  
TOL  
RESET  
5
GND RESET  
RESET  
ASM1832  
MREQ  
1
2
8
7
V
CC  
PBRST  
Figure 4: Application Circuit: Pushbutton Reset  
T
D
ST  
µP  
Decoder  
3
4
6
Watchdog Timer and ST Input  
TOL  
RESET  
RESET  
Address  
Bus  
RESET  
A watchdog timer stops and restarts a microprocessor that is  
“hung-up”. The µP must toggle the ST input within a set  
period (as selectable through TD input) to verify proper  
software execution. If the ST is not toggled low within the  
5
GND  
Figure 6: Application Circuit: Watchdog Timer  
3.3V µP Power Supply Monitor and Reset Circuit  
4 of 9  
Notice: The information in this document is subject to change without notice  
October 2006  
ASM1832  
rev 1.6  
Absolute Maximum Ratings  
Parameter  
Voltage on VCC  
Min  
-0.5  
-0.5  
-0.5  
-40  
Max  
Unit  
V
7
VCC + 0.5  
Voltage on ST, TD  
V
V
CC + 0.5  
Voltage on PBRST, RESET, RESET  
Operating Temperature Range  
Soldering Temperature (for 10 sec)  
Storage Temperature  
V
+85  
+260  
+125  
°C  
°C  
°C  
-55  
ESD rating  
HBM  
MM  
2
200  
KV  
V
Note:  
1. Voltages are measured with respect to ground  
2. These are stress ratings only and functional implication is not implied. Exposure to absolute maxi-  
mum ratings for extended periods may affect device reliability.  
DC Electrical Characteristics  
Unless otherwise stated, 1.2 <= VCC<=5.5V and over the operating temperature range of -40°C to +85°C. All voltages are  
referenced to ground.  
Parameter  
Supply Voltage  
Symbol  
Conditions  
Min  
Typ  
Max  
Unit  
VCC  
1.0  
5.5  
V
ST and PBRST Input High  
Level  
VIH  
VIH  
VIL  
VCC >=2.7V  
VCC + 0.3  
2
V
V
V
ST and PBRST Input High  
Level  
VCC<2.7V  
VCC - 0.4V  
ST and PBRST Input Low  
Level  
-0.3  
0.5  
V
CC Trip Point (TOL = GND)  
VCCTP  
VCCTP  
tTD  
2.80  
2.47  
62.5  
2.88  
2.55  
150  
2.97  
2.64  
250  
V
V
VCC Trip Point (TOL = VCC  
Watchdog Timeout Period  
)
TD = GND  
ms  
3.3V µP Power Supply Monitor and Reset Circuit  
5 of 9  
Notice: The information in this document is subject to change without notice  
October 2006  
rev 1.6  
ASM1832  
Parameter  
Symbol  
tTD  
Conditions  
TD = VCC  
Min  
500  
250  
Typ  
1200  
610  
Max  
2000  
1000  
Unit  
ms  
Watchdog Timeout Period  
Watchdog Timeout Period  
tTD  
TD Floating  
ms  
I=-500µA, VCC < 2.7.V Note  
1
VOH  
VCC - 0.3V  
VCC - 0.1V  
350  
Output Voltage  
V
IOH  
IOL  
IIL  
Output = 2.4V, VCC >=2.7V  
Output = 0.4V, VCC >=2.7V  
Output Current  
µA  
mA  
µA  
V
Output Current  
10  
Input Leakage  
-1.0  
1.0  
0.4  
VOL  
RESET Low Level  
Internal Pull-up Resistor  
Note 1  
PBRST pin  
40  
kΩ  
Outputs open, VCC <= 3.6V  
and all inputs at VCC or GND  
ICC1  
Operating Current  
20  
µA  
CIN  
Input Capacitance  
Output Capacitance  
5
7
pF  
pF  
COUT  
PBRST Manual Reset  
Minimum Low Time  
tPB  
PBRST = VIL  
20  
ms  
ms  
tRST  
Reset Active Time  
250  
610  
1000  
Must not exceed tRD mini-  
tST  
ST Pulse Width  
20  
20  
ns  
mum. Watchdog cannot be  
disabled.  
VCC Fail Detect to RESET or  
Pulses < 2 µs at VCCTP min-  
imum will not cause reset  
tRPD  
tF  
5
8
µs  
µs  
RESET  
VCC Slew Rate  
PBRST Stable LOW to  
RESET and RESET Active  
tPDLY  
20  
ms  
V
CC Detect to RESET or  
tRPU  
tR  
trise=5µs  
250  
0
610  
1000  
ms  
ns  
RESET inactive  
VCC Slew Rate  
Notes  
1. RESET remains within 0.5V of VCC on power-down until VCC falls below 2V. RESET remains within 0.5V of ground on power-down until VCC  
falls below 2.0V.  
3.3V µP Power Supply Monitor and Reset Circuit  
6 of 9  
Notice: The information in this document is subject to change without notice  
October 2006  
ASM1832  
rev 1.6  
Package Information  
MicroSO (8-Pin)  
Inches  
Millimeteres  
Min  
Max  
Min  
Max  
MicroSO (8-Pin)  
0.044  
A
A1  
A2  
b
0.032  
0.002  
0.030  
0.81  
0.05  
0.76  
1.10  
0.15  
0.97  
0.006  
0.038  
0.012 BSC  
0.30 BSC  
0.65 BSC  
C
0.004  
0.114  
0.008  
0.122  
0.10  
2.90  
0.20  
3.10  
D
e
0.0256 BSC  
E
0.184  
0.114  
0.016  
0.200  
0.122  
0.026  
4.67  
2.90  
0.41  
5.08  
3.10  
0.66  
E1  
L
S
0.0206 BSC  
0.52 BSC  
a
0°  
6°  
0°  
6°  
SO (8-Pin)  
0.069  
0.010  
0.059  
0.020  
0.010  
SO (8-Pin)  
A
A1  
A2  
B
0.053  
0.004  
0.049  
0.012  
0.007  
1.35  
0.10  
1.25  
0.31  
0.18  
1.75  
0.25  
1.50  
0.51  
0.25  
H
E
C
D
E
0.193 BSC  
4.90 BSC  
3.91 BSC  
1.27 BSC  
6.00 BSC  
0.154 BSC  
0.050 BSC  
0.236 BSC  
D
e
A2  
A
H
L
C
θ
0.016  
0.050  
0.41  
0°  
1.27  
8°  
e
A1  
L
B
θ
0°  
8°  
Plastic DIP (8-Pin)  
0.210  
A
A1  
A2  
b
-
-
5.33  
-
Plastic DIP (8-Pin)  
0.015  
0.115  
0.014  
0.045  
0.008  
0.355  
0.300  
0.240  
-
0.38  
2.92  
0.36  
1.14  
0.20  
9.02  
7.62  
6.10  
0.195  
4.95  
0.56  
1.78  
0.36  
10.16  
8.26  
7.11  
0.022  
b2  
C
0.070  
0.014  
D
0.400  
E
0.325  
E1  
e
0.280  
0.100 BSC  
2.54 BSC  
eB  
L
-
0.430  
0.150  
-
10.92  
3.81  
0.115  
2.92  
3.3V µP Power Supply Monitor and Reset Circuit  
7 of 9  
Notice: The information in this document is subject to change without notice  
October 2006  
rev 1.6  
ASM1832  
Ordering Information  
Maximum  
Supply Current  
(µA)  
Operating  
Temperature Range  
Voltage Monitoring  
Application  
Part Number  
Package  
Package Marking  
TIN - LEAD DEVICES  
ASM1832  
ASM1832S  
ASM1832U  
8-Pin PDIP  
-40°C to 85°C  
-40°C to 85°C  
-40°C to 85°C  
20  
20  
20  
3.3 V  
3.3 V  
3.3 V  
ASM1832  
ASM1832S  
ASM1832  
8-SO  
8-MicroSO  
LEAD FREE DEVICES  
ASM1832F  
ASM1832SF  
ASM1832UF  
8-Pin PDIP  
-40°C to 85°C  
-40°C to 85°C  
-40°C to 85°C  
20  
20  
20  
3.3 V  
3.3 V  
3.3 V  
ASM1832F  
ASM1832SF  
ASM1832F  
8-SO  
8-MicroSO  
3.3V µP Power Supply Monitor and Reset Circuit  
8 of 9  
Notice: The information in this document is subject to change without notice  
October 2006  
ASM1832  
PulseCore Semiconductor Corporation  
1715 S, Bascom Ave Suit 200,  
Campbell, CA 95008  
Tel:408-879-9077  
Fax:408-879-9018  
Copyright © PulseCore Semiconductor  
All Rights Reserved  
Part Number: ASM1832  
Document Version: 1.6  
www.pulsecoresemi.com  
© Copyright 2006 Pulsecore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered  
trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies.  
PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no  
responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or  
estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the  
product described herein is under development, significant changes to these specifications are possible. The information in this  
product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate  
as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising  
out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale  
and/or use of PulseCOre products including liability or warranties related to fitness for a particular purpose, merchantability, or  
infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are  
available from PulseCore.) All sales of PulseCOre products are made exclusively according to PulseCore's Terms and Conditions of  
Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights,  
trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use  
as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant  
injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all  
risk of such use and agrees to indemnify PulseCore against all claims arising from such use.  
3.3V µP Power Supply Monitor and Reset Circuit  
9 of 9