19MT050XFAPBF--Datasheet/数据表在线中文翻译

19MT050XFAPbF

Vishay Semiconductors

"Full Bridge" FREDFET MTP (Power MOSFET), 31 A

FEATURES

• Low on-resistance

• High performance optimized built-in fast

recovery diodes

• Fully characterized capacitance and avalanche voltage

and current

• Al₂O₃DBC

• Very low stray inductance design for high speed operation

• UL approved file E78996

MTP

• Compliant to RoHS directive 2002/95/EC

BENEFITS

• Low gate charge Q_gresults in simple drive requirement

• Improved gate, avalanche and dynamic dV/dt ruggedness

• Low t_rrand soft diode reverse recovery

• Optimized for welding, UPS and SMPS applications

• Outstanding ZVS and high frequency operation

• Direct mounting to heatsink

PRODUCT SUMMARY

V_DSS

500 V

R_DS(on)

0.25 Ω

I_D

31 A

Modules - MOSFET

MTP

Type

Package

• PCB solderable terminals

• Very low junction to case thermal resistance

ABSOLUTE MAXIMUM RATINGS

PARAMETER

SYMBOL

TEST CONDITIONS

MAX.

UNITS

T_C= 25 °C

31

Continuous drain current at V_GS10 V

Pulsed drain current

I_D

T_C= 100 °C

19

124

A

(1)

I_DM

T_C= 25 °C

1140

Maximum power dissipation

P_D

W

V

T

_C= 100 °C

456

Gate to source voltage

V_GS

V_ISOL

dV/dt ⁽²⁾

T_J

30

RMS isolation voltage

Any terminal to case, t = 1 min

2500

Peak diode recovery dV/dt

Operating junction temperature range

Operating storage temperature range

15

V/ns

°C

- 55 to + 150

- 55 to + 125

T_Stg

°C

Notes

(1)

Repetitive rating; pulse width limited by maximum junction temperature

I_SD≤ 31 A, dI/dt ≤ 340 A/μs, V_DD≤ V_(BR)DSS, T_J≤ 150 °C

(2)

Document Number: 94546

Revision: 12-May-10

For technical questions within your region, please contact one of the following:

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19MT050XFAPbF

Vishay Semiconductors

"Full Bridge" FREDFET MTP

(Power MOSFET), 31 A

ELECTRICAL CHARACTERISTICS (T_J= 25 °C unless otherwise noted)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN.

TYP.

MAX. UNITS

Drain to source breakdown voltage

V_(BR)DSS

V_GS= 0 V, I_D= 250 μA

500

-

V

Temperature coefficient of breakdown voltage ΔV_(BR)DSS/ΔT_J

I_D= 4 mA, reference to T_J= 25 °C

V_GS= 10 V, I_D= 19 A

-

0.48

V/°C

0.19

0.22

0.25

6.0

50

(1)

Static drain to source on-resistance

Gate threshold voltage

R_DS(on)

Ω

V_GS= 10 V, I_D= 31 A

-

0.21

V_GS(th)

V_DS= V_GS, I_D= 250 μA

V_DS= 500 V, V_GS= 0 V

V_DS= 400 V, V_GS= 0 V, T_J= 125 °C

V_GS= 30 V

3.0

-

V

μA

mA

(2)

Drain to source leakage current

I_DSS

-

2

Gate to source forward leakage

Gate to source reverse leakage

-

150

- 150

I_GSS

nA

V

_GS= - 30 V

-

Notes

(1)

Pulse width ≤ 400 μs, duty cycle ≤ 2 %

I_CESincludes also opposite leg overall leakage

(2)

DYNAMIC CHARACTERISTICS (T_J= 25 °C unless otherwise noted)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN.

TYP.

26

MAX. UNITS

Forward transconductance

Total gate charge

g_fs

V_DS= 50 V, I_D= 19 A

-

S

(1)

Q_g

105

36

160

55

I_D= 31 A

_DS= 400 V

V_GS= 10 V

(1)

Gate to source charge

Gate to drain ("Miller") charge

Turn-on delay time

Turn-off delay time

Rise time

Q_gs

V

nC

(1)

Q_gd

46

70

t_d(on)

t_d(off)

t_r

49

74

I_D= 31 A

_DS= 250 V

V_GS= 10 V

R_g= 4.3 Ω

80

120

250

115

7210

1750

60

V

ns

pF

165

76

Fall time

t_f

Input capacitance

Output capacitance

Reverse transfer capacitance

C_iss

C_oss

C_rss

4808

1165

40

V_GS= 0 V

_DS= 25 V

f = 1.0 MHz

V

Note

(1)

Pulse width ≤ 400 μs, duty cycle ≤ 2 %

DIODE CHARACTERISTICS (T_J= 25 °C unless otherwise noted)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN.

TYP.

MAX. UNITS

Continuous source current

(body diode)

D

S

MOSFET symbol

showing the

integral reverse

p-n junction diode

I_S

-

31

A

G

(1)

Pulsed source current (body diode)

I_SM

-

124

(2)

Diode forward voltage

Reverse recovery time

Reverse recovery charge

V_SD

T_J= 25 °C, I_S= 31 A, V_GS= 0 V

-

1.01

252

1.1

378

V

t_rr

ns

nC

T_J= 125 °C, I_F= 31 A;

dI/dt = 100 A/μs ⁽²⁾

Q_rr

1619

2428

Notes

(1)

Repetitive rating; pulse width limited by maximum junction temperature

Pulse width ≤ 400 μs, duty cycle ≤ 2 %

(2)

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Document Number: 94546

Revision: 12-May-10

19MT050XFAPbF

Vishay Semiconductors

"Full Bridge" FREDFET MTP

(Power MOSFET), 31 A

AVALANCHE CHARACTERISTICS

PARAMETER

SYMBOL

MIN.

TYP.

MAX.

493

31

UNITS

mJ

(1)

(2)

Single pulse avalanche energy

Avalanche current

E_AS

-

I_AR

A

Repetitive avalanche energy

E_AR

114

mJ

Notes

(1)

Starting T_J= 25 °C, L = 1.0 mH, R_g= 25 Ω, I_AS= 31 A

Repetitive rating; pulse width limited by maximum junction temperature

(2)

THERMAL - MECHANICAL SPECIFICATIONS

PARAMETER

SYMBOL

TEST CONDITIONS

MIN.

- 40

-

TYP.

MAX.

150

UNITS

Operating junction temperature range

Storage temperature range

Junction to case per MOSFET

T_J

-

°C

T_Stg

125

R_thJC

0.44

°C/W

Heatsink compound thermal

conductivity = 1 W/mK

Case to sink

Clearance ⁽¹⁾

R_thCS

-

0.06

-

External shortest distance in air

between 2 terminals

5.5

mm

g

Shortest distance along external

surface of the insulating material

between 2 terminals

Creepage ⁽¹⁾

Weight

8

-

66

Note

(1)

Standard version only i.e. without optional thermistor

Document Number: 94546

Revision: 12-May-10

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19MT050XFAPbF

Vishay Semiconductors

"Full Bridge" FREDFET MTP

(Power MOSFET), 31 A

1000

VGS

2.5

I

= 31A

TOP

15V

D

10V

V

= 10V

8.0V

7.0V

6.0V

5.5V

GS

100

10

2.0

1.5

1.0

0.5

BOTTOM 5.0V

1

5.0V

0.1

0.01

20µs PULSE WIDTH

Tj = 25°C

0.1

1

10

100

-60 -40 -20

T

0

20 40 60 80 100 120 140 160

V

, Drain-to-Source Voltage (V)

, Junction Temperature (°C)

DS

J

Fig. 1 - Typical Output Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

100000

10000

1000

100

10

1

V

C

= 0V,

f = 1 MHZ

VGS

GS

TOP

15V

= C + C , C SHORTED

iss

gs gd ds

10V

8.0V

7.0V

6.0V

5.5V

C

= C

gd

rss

C

= C + C

oss

ds gd

BOTTOM 5.0V

Ciss

Coss

5.0V

20µs PULSE WIDTH

Tj = 150°C

Crss

0.1

10

0.1

1

10

100

1

10

100

1000

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig. 2 - Typical Output Characteristics

Fig. 5 - Typical Capacitance vs.

Drain to Source Voltage

1000

100

10

16

12

8

I

= 31A

D

V

= 400V

DS

VDS= 250V

VDS= 100V

T

= 150°C

J

1

4

T

= 25°C

V

J

= 50V

DS

FOR TEST CIRCUIT

20µs PULSE WIDTH

7.0 8.0

, Gate-to-Source Voltage (V)

SEE FIGURE 13

0

4.0

5.0

6.0

9.0

0

40

G

80

120

160

V

GS

Q

Total Gate Charge (nC)

Fig. 3 - Typical Transfer Characteristics

Fig. 6 - Typical Gate Charge vs.

Gate to Source Voltage

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Document Number: 94546

Revision: 12-May-10

19MT050XFAPbF

Vishay Semiconductors

"Full Bridge" FREDFET MTP

(Power MOSFET), 31 A

1000.0

100.0

10.0

1.0

1000

100

10

OPERATION IN THIS AREA

LIMITED BY R

(on)

DS

T

= 150°C

J

100µsec

1msec

1

T

= 25°C

0.8

J

Tc = 25°C

10msec

Tj = 150°C

V

= 0V

GS

Single Pulse

0.1

0.2

0.4

V

0.6

1.0

1.2

1.4

1

10

100

1000

10000

, Source-toDrain Voltage (V)

SD

V

, Drain-toSource Voltage (V)

DS

Fig. 7 - Typical Source Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

32

28

24

20

16

12

8

4

0

15

25

50

75

100

125

Fig. 9 - Maximum Drain Current vs. Case Temperature

R_D

V_DS

90 %

V_GS

D.U.T.

R_g

+

-

V_DD

10 %

V_GS

10 V

Pulse width ≤ 1 μs

t_d(on)

t_r

t_d(off)t_f

Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

Document Number: 94546

Revision: 12-May-10

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19MT050XFAPbF

Vishay Semiconductors

"Full Bridge" FREDFET MTP

(Power MOSFET), 31 A

1

D = 0.50

0.1

0.01

0.20

0.10

0.05

0.02

0.01

R₁

R₂

R₃

τ

^Jτ_J

τ

^Cτ

¹τ₁

Ci= τi/Ri

τ

²τ₂

³τ₃

0.001

Notes:

1. Duty Factor D = t1/t2

SINGLE PULSE

( THERMAL RESPONSE )

2. Peak Tj = P dm x Zthjc + Tc

0.0001

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

t

, Rectangular Pulse Duration (sec)

1

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction to Case

1000

I

D

14A

19A

31A

TOP

800

600

400

200

0

BOTTOM

25

50

75

100

125

150

Starting T , Junction Temperature (°C)

J

Fig. 12a - Maximum Avalanche Energy vs. Drain Current

15 V

Driver

+

V_(BR)DSS

t_p

L

V_DS

D.U.T

R_g

V_DD

-

I_AS

A

20 V

0.01 Ω

t_p

I_AS

Fig. 12b - Unclamped Inductive Test Circuit

Fig. 12c - Unclamped Inductive Waveforms

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Document Number: 94546

Revision: 12-May-10

19MT050XFAPbF

Vishay Semiconductors

"Full Bridge" FREDFET MTP

(Power MOSFET), 31 A

Current regulator

Same type as D.U.T.

50 kΩ

12 V

0.2 μF

0.3 μF

Q_G

V_GS

+

-

V_DS

D.U.T.

Q_GS

Q_GD

V_GS

V_G

3 mA

I_G

I_D

Charge

Current sampling resistors

Fig. 13a - Gate Charge Test Circuit

Fig. 13b - Basic Gate Charge Waveform

+

Circuit layout considerations

• Low stray inductance

• Ground plane

D.U.T.

3

• Low leakage inductance

current transformer

-

+

2

-

4

-

+

1

R_g

• dV/dt controlled by R_g

+

-

V_DD

• Driver same type as D.U.T.

• I_SDcontrolled by duty factor “D”

• D.U.T. - Device Under Test

Fig. 14 - Peak Diode Recovery dV/dt Test Circuit

1

2

Driver gate drive

P.W.

Period

D =

V_GS= 10 V ⁽¹⁾

D.U.T. I_SDwaveform

Reverse

recovery

current

Body diode forward

current

dI/dt

D.U.T. V_DSwaveform

3

Diode recovery

dV/dt

V_DD

Reapplied

voltage

Body diode forward drop

4

Inductor current

I_SD

Ripple ≤ 5 %

(1)

V

= 5 V for logic level devices

GS

Fig. 15 - For N-Channel Power MOSFETs

Document Number: 94546

Revision: 12-May-10

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DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com

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19MT050XFAPbF

Vishay Semiconductors

"Full Bridge" FREDFET MTP

(Power MOSFET), 31 A

9, 10

5

6

4

3

15, 16

13, 14

2

1

7

8

11, 12

Fig. 16 - Electrical diagram

ORDERING INFORMATION TABLE

Device code

19

MT 050

X

F

A

PbF

1

2

3

4

5

6

7

-

Current rating

Essential part number

Voltage code (050 = 500 V)

1

2

3

4

5

Speed/type (X = Power MOSFET)

Circuit configuration

(F = Full bridge - see Circuit Configuration table)

A = Al₂O₃DBC substrate

-

6

7

PbF = Lead (Pb)-free

CIRCUIT CONFIGURATION

CIRCUIT

CONFIGURATION CODE

CIRCUIT

CIRCUIT DRAWING

Full bridge

F

LINKS TO RELATED DOCUMENTS

Dimensions

www.vishay.com/doc?95245

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Document Number: 94546

Revision: 12-May-10

Outline Dimensions

Vishay Semiconductors

MTP MOSFET/IGBT Full-Bridge

DIMENSIONS in millimeters

Ø 5

Ø 1.1

4

2ꢀ.5

12 ꢀ.5

2.5

31.8

33

3

2

13

4

9

1

8

14

15

11

1ꢀ

12

5

16

6

7

ꢀ.3 ꢀ.1

7

6.6 ꢀ.1

Ø 5.2 x 3

8

ꢀ.1

7.4 ꢀ.1

3

ꢀ.1

8

ꢀ.1

7.4 ꢀ.1

7

ꢀ.1

R5.75 (x 2)

4.9 ꢀ.1

6.6 ꢀ.1

39.5

44.5

48.7

ꢀ.6 x h1.2

1.3

63.5 ꢀ.25

Document Number: 95245

Revision: 24-Sep-08

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Document Number: 91000

Revision: 11-Mar-11

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