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ASM3P2182A  
LCD Panel EMI Reduction IC  
Features  
FCC approved method of EMI attenuation.  
Provides up to 15dB EMI reduction.  
The ASM3P2182A reduces electromagnetic interference  
(EMI) at the clock source, allowing system wide  
reduction of EMI of down stream clock and data  
dependent signals. The ASM3P2182A allows significant  
Generates a 1X low EMI spread spectrum clock of  
the input frequency.  
system cost savings by reducing the number of circuit  
board layers ferrite beads, shielding and other passive  
components that are traditionally required to pass EMI  
regulations.  
Input frequency range: 25MHz to 210MHz.  
Internal loop filter minimizes external components  
and board space.  
The ASM3P2182A uses the most efficient and optimized  
modulation profile approved by the FCC and is  
implemented in a proprietary all digital method.  
Center spread.  
4 spread frequency deviation selections: ± 0.13% to  
± 1.24%.  
Low inherent Cycle-to-cycle jitter.  
3.3V Operating Voltage.  
The ASM3P2182A modulates the output of a single PLL  
in order to “spread” the bandwidth of a synthesized  
clock, and more importantly, decreases the peak  
amplitudes of its harmonics. This results in significantly  
lower system EMI compared to the typical narrow band  
signal produced by oscillators and most frequency  
generators. Lowering EMI by increasing a signal’s  
bandwidth is called ‘spread spectrum clock generation.’  
TTL or CMOS compatible inputs and outputs.  
Low power CMOS design.  
Supports notebook VGA and other LCD timing  
controller applications.  
Available in 8-pin SOIC Package.  
Product Description  
Applications  
The ASM3P2182A is a versatile spread spectrum  
frequency modulator designed specifically for a wide  
range of input clock frequencies from 25MHz to 210MHz.  
(Refer to Input Frequency and Modulation Rate Table).  
The ASM3P2182A can generate an EMI reduced clock  
from an OSC or a system generated clock. The  
ASM3P2182A offers a Center Spread clock and with a  
percentage deviation from ± 0.13% or ± 1.24%.  
The ASM3P2182A is targeted towards EMI management  
for memory and LVDS interfaces in mobile graphic  
chipsets and high-speed digital applications such as PC  
peripheral  
devices,  
consumer  
electronics,  
and  
embedded controller systems.  
VDD  
S0  
FS0 FS1  
PLL  
Modulation  
CLKIN  
Crystal  
Oscillato  
r
Frequency  
Divider  
Output  
Divider  
Phase  
Detector  
Loop  
VCO  
Filter  
Feedback  
Divider  
ModOUT  
VSS  
©2010 SCILLC. All rights reserved.  
JANUARY 2010 – Rev. 2  
Publication Order Number:  
ASM3P2182/D  
ASM3P2182A  
Pin Configuration  
CLKIN  
FS1  
FS0  
VDD  
1
2
3
4
8
GND  
S1  
7
6
ASM3P2182A  
ModOUT  
5
S0  
Pin Description  
Pin#  
Pin Name  
CLKIN  
Type  
Description  
1
2
I
Connect to externally generated clock signal.  
Ground to entire chip.  
GND  
P
Spread range select. Digital logic input used to select frequency deviation  
(Refer to Spread Deviation Table). This pin has an internal pull-up resistor.  
Spread range select. Digital logic input used to select frequency deviation  
(Refer to Spread Deviation Table). This pin has an internal pull-up resistor.  
3
4
S1  
S0  
I
I
5
6
ModOUT  
VDD  
O
P
Spread spectrum low EMI output.  
Power supply for the entire chip (3.3V).  
Frequency range select. Digital logic input used to select frequency range  
(Refer to Input Frequency and Modulation Rate Table).  
This pin has an internal pull-up resistor.  
Frequency range select. Digital logic input used to select frequency range  
(Refer to Input Frequency and Modulation Rate Table).  
This pin has an internal pull-up resistor.  
7
8
FS0  
FS1  
I
I
Input Frequency and Modulation Rate table  
FS1 (pin 8)  
FS0 (pin 7)  
Frequency Range  
0
0
1
1
0
1
0
1
25MHz to 50MHz  
50MHz to 103MHz  
75MHz to 150MHz  
160MHz to 210MHz  
Rev. 2 | Page 2 of 6 | www.onsemi.com  
ASM3P2182A  
Spread Deviation Selection table  
Spreading Range (± %)  
811  
812  
108  
120  
162  
200  
S1  
S0  
25  
40  
65  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
0
0
1
1
0
1
0
1
0.28  
0.19  
0.15  
0.12  
0.18  
0.15  
0.1  
0.1  
0.3  
1.0  
1.9  
0.06  
0.8  
0.3  
0.3  
0.2  
0.5  
0.3  
0.19  
0.36  
0.75  
0.1  
1.2  
0.54  
1.0  
0.45  
1.1  
0.4  
0.8  
0.6  
0.6  
2.1  
0.9  
1.4  
1.1  
1.2  
Notes: 1. Frequency Range- 50MHz to 103MHz  
2. Frequency Range- 75MHz to 150MHz  
Absolute Maximum Ratings  
Symbol  
Parameter  
Rating  
-0.5 to +4.6  
Unit  
V
VDD  
VIN  
Supply Voltage pin with respect to Ground  
Input Voltage pin with respect to Ground  
Output Voltage pin with respect to Ground  
VSS-0.5 to VDD+0.5  
VSS-0.5 to VDD+0.5  
V
VOUT  
V
TSTG  
Ts  
Storage temperature  
-55 to +125  
°C  
°C  
Max. Soldering Temperature (10 sec)  
Junction Temperature  
260  
150  
2
TJ  
°C  
TDV  
Static Discharge Voltage (As per JEDEC STD22-A114-B)  
KV  
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect  
device reliability.  
Recommended Operating Conditions  
Parameter  
Description  
Min  
2.7  
Typ  
Max  
3.7  
Unit  
V
VDD  
TA  
Operating Voltage  
3.3  
Operating Temperature (Ambient Temperature)  
Load Capacitance  
-40  
+85  
15  
°C  
CL  
pF  
pF  
CIN  
Input Capacitance  
5
Rev. 2 | Page 3 of 6 | www.onsemi.com  
ASM3P2182A  
DC Electrical Characteristics  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit  
VIL  
VIH  
IIL  
Input low voltage  
Input high voltage  
Input low current  
Input high current  
GND – 0.3  
0.8  
V
2.0  
VDD + 0.3  
-35  
V
µA  
µA  
V
IIH  
35  
VOL  
VOH  
ICC  
Output low voltage (VDD = 3.3V, IOL = 20mA)  
Output high voltage (VDD = 3.3V, IOH = 20mA)  
0.4  
2.5  
V
Dynamic supply current  
Normal mode (3.3V and 10pF loading)  
Static supply current  
8.46  
12  
17.78  
3.7  
mA  
IDD  
0.6  
3.3  
mA  
V
Standby mode1  
VDD  
Operating voltage  
2.7  
Power up time  
(first locked clock cycle after power up)  
tON  
0.18  
50  
mS  
ZOUT  
Clock out impedance  
Note: 1. CLKIN pin is pulled low.  
AC Electrical Characteristics  
Symbol  
Parameter  
Min  
25  
Typ  
Max  
210  
210  
1.4  
Unit  
CLKIN  
Input frequency  
Output frequency  
MHz  
MHz  
nS  
ModOUT  
25  
1
tLH  
Output rise time (measured at 0.8V to 2.0V)  
Output fall time (measured at 2.0V to 0.8V)  
Jitter (cycle to cycle)  
1.2  
0.8  
1.32  
0.9  
1
tHL  
1.0  
nS  
tJC  
TD  
±360  
55  
pS  
Output duty cycle  
45  
50  
%
Note: 1. tLH and tHL are measured into a capacitive load of 15pF.  
Rev. 2 | Page 4 of 6 | www.onsemi.com  
ASM3P2182A  
Package Information  
8-lead (150-mil) SOIC Package  
H
E
D
A2  
A
C
θ
e
A1  
L
B
Dimensions  
Symbol  
Inches  
Millimeters  
Min  
Max  
0.010  
0.069  
0.059  
0.020  
0.010  
Min  
0.10  
1.35  
1.25  
0.31  
0.18  
Max  
0.25  
1.75  
1.50  
0.51  
0.25  
A1  
A
0.004  
0.053  
0.049  
0.012  
0.007  
A2  
B
C
D
E
0.193 BSC  
0.154 BSC  
0.050 BSC  
0.236 BSC  
4.90 BSC  
3.91 BSC  
1.27 BSC  
6.00 BSC  
e
H
L
0.016  
0°  
0.050  
8°  
0.41  
0°  
1.27  
8°  
θ
Rev. 2 | Page 5 of 6 | www.onsemi.com  
ASM3P2182A  
Ordering Information  
Package  
Part Number  
ASM3P2182AF-08ST  
ASM3P2182AF-08SR  
Marking  
ACV  
Temperature  
0°C to +70°C  
0°C to +70°C  
8-Pin SOIC, TUBE, Pb Free  
ACV  
8-Pin SOIC, TAPE & REEL, Pb Free  
A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free.  
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.  
Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes  
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,  
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death  
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and  
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising  
out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC  
was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. U.S Patent Pending; Timing-Safe  
and Active Bead are trademarks of PulseCore Semiconductor, a wholly owned subsidiary of ON Semiconductor. This literature is subject to all applicable  
copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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Europe, Middle East and Africa Technical  
Support:  
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For additional information, please contact your  
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