TP5532-VR [3PEAK]
1.8V, 34μA, RRIO, Zero Drift Op-amps;
| 型号： | TP5532-VR |
| 厂家： | 
3PEAK |
| 描述： | 1.8V, 34μA, RRIO, Zero Drift Op-amps |
| 文件： | 总16页 (文件大小：657K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Description
Features
The 3PEAK TP5531/2/4 low-power chopper stabilized
operational amplifiers provide input offset voltage
correction for very low offset and offset drift over time
and temperature. The devices operate with a single
supply voltage as low as 1.8V, while drawing 34μA per
amplifier of quiescent current with a gain bandwidth
product of 350kHz. They are unity gain stable, have no
1/f noise, have good Power Supply Rejection Ratio
(PSRR) and Common Mode Rejection Ratio (CMRR),
and feature rail-to-rail input and output swing.
LOW OFFSET VOLTAGE: 10 μV (Max)
ZERO DRIFT: 0.008 µV/°C
0.1Hz to 10Hz Noise: 1.1 µVPP
Low Supply Current: 34µA per Amplifier
Bandwidth: 350 kHz
Slew Rate: 0.16 V/μs
High Gain, 130 dB High CMRR and PSRR
Rail-to-rail Input and Output Swing
–40°C to 125°C Operation Range
Small Packages: SC70 and SOT23 (TP5531)
The devices were designed using an advanced CMOS
process. The TP5531 (single version) is available in
SC70-5, SOT23-5 and SO-8 packages. The TP5532
(dual version) is offered in MSOP-8 and SO-8 package.
The TP5534 (quad version) is available in TSSOP-14
and SOIC-14 package. All versions are specified for
operation from -40°C to 125°C.
Applications
3PEAK and the 3PEAK logo are registered trademarks of
3PEAK INCORPORATED. All other trademarks are the property of
their respective owners.
Transducer Amplifier
Bidirectional Current Sense
DC Offset Correction
Temperature Measurement
Remote Located Sensors
Battery-Powered Instruments
Electronic Weigh Scales
Related Zero-Drift Op-amps
VOS (Max.)
GBWP
10 μV
5 μV
5 μV
350 kHz
34 μA
1.5 MHz
220 μA
3.5 MHz
500 μA
Supply Current
eN at 1 kHz
Single
55 nV/√Hz
TP5531
TP5532
TP5534
25 nV/√Hz
TP5541
TP5542
TP5544
15 nV/√Hz
TP5551
TP5552
TP5554
Dual
Quad
Pin Configuration (Top View)
0.1Hz to 10Hz NOISE
5s/div
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Pin Configuration (Top View, continued)
TP5532
8-Pin SOIC/MSOP
(-S and -V Suffixes)
TP5531
8-Pin SOIC
(-S Suffix)
TP5534
14-Pin SOIC/TSSOP
(-S and -T Suffixes)
1
2
3
4
5
6
7
14
13 ﹣In D
Out A
﹣In A
﹢In A
﹢Vs
Out D
1
2
3
4
8
7
6
5
Out A
﹢Vs
1
2
3
4
8
7
6
5
NC
﹣In
﹢In
﹣Vs
NC
﹣In A
Out B
﹣In B
﹢In B
A
﹢Vs
Out
NC
A
B
D
C
12
11
﹢In D
﹣Vs
﹢In A
﹣Vs
B
10 ﹢In C
﹢In B
﹣In B
Out B
9
8
﹣In C
Out C
Order Information
Marking
Information
Model Name
Order Number
Package
Transport Media, Quantity
TP5531-TR
TP5531-CR
TP5531-SR
TP5531U-TR
TP5531U-CR
TP5532-SR
TP5532-VR
TP5534-SR
TP5534-TR
SOT23-5
SC70-5 (SOT353)
SOIC-8
E31T
E31C
E31S
E31U
E31V
E32S
E32V
E34S
E34T
Tape and Reel, 3,000
Tape and Reel, 3,000
Tape and Reel, 4,000
Tape and Reel, 3,000
TP5531
SOT23-5
SC70-5
TP5531U
TP5532
TP5534
Tape and Reel, 3,000
Tape and Reel, 4,000
Tape and Reel, 3,000
Tape and Reel, 2,500
Tape and Reel, 3,000
SOIC-8
MSOP-8
SOIC-14
TSSOP-14
Absolute Maximum Ratings Note 1
Supply Voltage: .....................................................6V
Input Voltage: ....................... ……V– – 0.2 to V+ + 0.2
Input Current: +IN, –IN Note 2........................... ±20mA
Output Current: OUT...................................... ±60mA
Output Short-Circuit Duration Note 3…....... Indefinite
Current at Supply Pins……………............... ±50mA
Operating Temperature Range.......–40°C to 125°C
Maximum Junction Temperature................... 150°C
Storage Temperature Range.......... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ......... 260°C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to
any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the
power supply, the input current should be limited to less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power
supply voltage and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to
the package. The specified values are for short traces connected to the leads.
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
ESD, Electrostatic Discharge Protection
Symbol
Parameter
Condition
Minimum Level
Unit
HBM
CDM
Human Body Model ESD
MIL-STD-883H Method 3015.8
JEDEC-EIA/JESD22-C101E
7
2
kV
kV
Charged Device Model ESD
Electrical Characteristics
The boldface denotes the specifications which apply over the full operating temperature range, TA = -40°C to +125°C.
At TA = 27°C, VDD = 5V, RL = 10kΩ, VCM = VDD/2, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VDD
IQ
Supply Voltage Range
1.8
5.5
40
V
Quiescent current per amplifier
Over temperature
IO = 0
34
μA
55
μA
VOS
Input Offset Voltage
Input grounded, unity gain.
Vs = +1.8V to +5.5V
2
0.008
0.5
10
μV
dVOS/dT
PSRR
Vn
vs temperature
0.05
μV/°C
μV/V
μVpp
μVpp
nV/√Hz
vs power supply
input voltage noise, f=0.01Hz to 1Hz
input voltage noise, f=0.1Hz to 10Hz
Input voltage noise density, f=1kHz
0.4
1.1
en
55
CIN
Input capacitor, Differential
Input capacitor, Common-Mode
Input Bias Current
Over temperature
Input offset current
3
2
pF
pF
IB
±50
±200
800
±400
pA
pA
pA
V
dB
mV
mV
mA
pF
IOS
±100
VCM
CMRR
VO
Common-mode voltage range
Common-mode rejection ratio
Output Voltage Swing from rail
Over temperature
(V-)–0.1
(V+)+0.1
110
130
RL=10kΩ
RL=10kΩ
5
10
10
±60
ISC
CL
Short-circuit current
Maximum Capacitive Load
Unity Gain Bandwidth
Slew rate
Overload recovery time
Settling time to 0.01%
1,000
350
0.16
60
GBWP
SR
tOR
CL=100pF
G=+1, CL=100pF
G=-10
kHz
V/μs
μs
tS
CL=100pF
40
μs
(V-)+100mV<VO<(V+)-100mV,
RL = 100kΩ
AVOL
Open-Loop Voltage Gain
100
120
dB
SC70-5 (SOT353)
SOT23-5
250
200
210
158
83
MSOP-8
Thermal Resistance Junction to
Ambient
θJA
°C/W
SOIC-8
SOIC-14
TSSOP-14
100
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Typical Performance Characteristics
Offset Voltage Distribution
Offset Voltage vs TEMPERATURE
18
16
14
12
10
8
10
8
6
4
2
0
-2
-4
-6
-8
-10
6
4
2
0
-50 -25
0
25
50
75
100 125
Temperature(°C)
Offset Voltage (μV)
CMRR vs FREQUENCY
OPEN-LOOP GAIN vs FRENQUENCY
120
140
120
100
80
140
100
80
90
60
40
40
20
60
0
40
-10
-60
-20
-40
-60
20
0
1
100
10k
1M
1
10
100
1k
10k
100k
1M
Frequency(Hz)
Frequency(Hz)
PSRR vs FREQUENCY
OUTPUT SWING vs LOAD CURRENT
140
120
100
80
3
+PSRR
V = ±2.5V
。
2
1
25 C
。
125 C
-PSRR
0
60
。
-1
-2
-3
125 C
40
。
20
。
-40 C
25 C
0
1
10
100
1k
10k
100k
1M
0
5
10 15 20 25 30 35 40 45 50 55 60
Frequency(Hz)
Output current(mA)
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Typical Performance Characteristics(continue)
IB vs COMMON-MODE VOLTAGE
INPUT BIAS vs TEMPERATURE
100
80
60
40
20
10000
1000
100
0
-20
-40
-60
-80
-100
10
0
1
2
3
4
5
-50 -25
0
25
50
75
100 125
Temperature(
°C)
Common-Mode Voltage(V)
Vosvs COMMON-MODE VOLTAGE
QUIESCENT CURRENT vs TEMPERATURE
45
2
1.5
1
40
35
30
25
20
15
10
5
0.5
0
-0.5
-1
-1.5
-2
0
‐50
‐25
0
25
50
75
100
125
150
0
1
2
3
4
5
Temperature(°C)
Common-Mode Voltage(V)
Quiescent Current Distribution
160
140
120
100
80
60
40
20
0
Iq (μA)
Typical Performance Characteristics(continue)
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
VOLTAGE NOISE SPECTRAL DENSITY vs
FREQUENCY
100
10
0.01
0.1
1
10
100
1k
10k
Frequency (Hz)
Typical Applications
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Bi-Directional Current Sense Amplifier
Thermistor Measurement
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Pin Functions
-IN: Inverting Input of the Amplifier.
+IN: Non-Inverting Input of Amplifier.
possible should be used between power supply pins or
between supply pins and ground.
V- or -Vs: Negative Power Supply. It is normally tied to
ground. It can also be tied to a voltage other than
ground as long as the voltage between V+ and V– is from
1.8V to 5.5V. If it is not connected to ground, bypass it
with a capacitor of 0.1μF as close to the part as
possible.
OUT: Amplifier Output. The voltage range extends to
within mV of each supply rail.
V+ or +Vs: Positive Power Supply. Typically the voltage
is from 1.8V to 5.5V. Split supplies are possible as long
as the voltage between V+ and V– is between 1.8V and
5.5V. A bypass capacitor of 0.1μF as close to the part as
Operation
The TP553x series op amps are zero drift, rail-to-rail operation amplifiers that can be run from a single-supply voltage.
They use an auto-calibration technique with a time-continuous 350 kHz op amp in the signal path while consuming
only 34 μA of supply current per channel. This amplifier is zero-corrected with an 120 kHz clock. Upon power-up, the
amplifier requires approximately 100 μs to achieve specified VOS accuracy. This design has no aliasing or flicker noise.
Applications Information
Rail-To-Rail Input And Output
The TP553x series op amps feature rail-to-rail input and output with a supply voltage from 1.8V to 5.5 V. This allows
the amplifier inputs to have a wide common mode range (50mV beyond supply rails) while maintaining high CMRR
(130dB) and maximizes the signal to noise ratio of the amplifier by having the VOH and VOL levels be at the V+ and V-
rails, respectively.
Input Protection
The TP553x series op amps have internal ESD protection diodes that are connect between the inputs and supply rail.
When either input exceeds one of the supply rails by more than 300mV, the ESD diodes become forward biased and
large amounts of current begin to flow through them. Without current limiting, this excessive fault current causes
permanent damage to the device. Thus an external series resistor must be used to ensure the input currents never
exceed 10mA.
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Low Input Referred Noise
Flicker noise, as known as 1/f noise, is inherent in semiconductor devices and increases as frequency decreases. So
at lower frequencies, flicker noise dominates, causing higher degrees of error for sub-Hertz frequencies or dc precision
application.
The TP553x series amplifiers are chopper stabilized amplifiers, the flicker noise is reduced greatly because of this
technique. This reduction in 1/f noise allows the TP553x to have much lower noise at dc and low frequency compared
to standard low noise amplifier.
Residual Voltage Ripple
The chopping technique can be used in amplifier design due to the internal notch filter. Although the chopping related
voltage ripple is suppressed, higher noise spectrum exists at the chopping frequency and its harmonics due to residual
ripple.
So if the frequency of input signal is nearby the chopping frequency, the signal maybe interfered by the residue ripple.
To further suppress the noise at the chopping frequency, it is recommended that a post filter be placed at the output of
the amplifier.
Broad Band and External Resistor Noise Considerations
The total broadband noise output from any amplifier is primarily a function of three types of noise: input voltage noise
from the amplifier, input current noise from the amplifier, and thermal (Johnson) noise from the external resistors used
around the amplifier. These noise sources are not correlated with each other and their combined noise can be
summed in a root sum squared manner. The full equation is given as:
en total [en2 4kTRs (in Rs )2 ]1/2
Where:
en= the input voltage noise density of the amplifier.
in= the input current noise of the amplifier.
RS= source resistance connected to the noninverting terminal.
k= Boltzmann’s constant (1.38x10-23J/K). T= ambient temperature in Kelvin (K).
The total equivalent rms noise over a specific bandwidth is expressed as:
en,rms en total BW
The input voltage noise density (en) of the TP553x is 55 nV/√Hz, and the input current noise can be neglected. When
the source resistance is 190 kΩ, the voltage noise contribution from the source resistor and the amplifier are equal.
With source resistance greater than 190 kΩ, the overall noise of the system is dominated by the Johnson noise of the
resistor itself.
High Source Impedance Application
The TP553x series op amps use switches at the chopper amplifier input, the input signal is chopped at 125 kHz to
reduce input offset voltage down to 10µV. The dynamic behavior of these switches induces a charge injection current
to the input terminals of the amplifier. The charge injection current has a DC path to ground through the resistances
seen at the input terminals of the amplifier. Higher input impedance causes an apparent shift in the input bias current
of the amplifier.
Because the chopper amplifier has charge injection currents at each terminal, the input offset current will be larger
than standard amplifiers. The IOS of TP553x are 150pA under the typical condition. So the input impedance should be
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
balanced across each input. The input impedance of the amplifier should be matched between the IN+ and IN-
terminals to minimize total input offset current. Input offset currents show up as an additional output offset voltage, as
shown in the following equation:
vos,total vos Rf Ios
For a gain configure using 1Mꢀ feedback resistor, a 150pA total input offset current will have an additional output
offset voltage of 0.15mV. By keeping the input impedance low and balanced across the amplifier inputs, the input
offset current effect will be suppressed efficiently.
Circuit Implication for reducing Input offset current effect
PCB Surface Leakage
In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be
considered. Surface leakage is caused by humidity, dust or other contamination on the board. It is recommended to
use multi-layer PCB layout and route the OPA’s -IN and +IN signal under the PCB surface.
The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is
biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 2 for Inverting
Gain application.
1. For Non-Inverting Gain and Unity-Gain Buffer:
a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface.
b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the Common Mode input voltage.
2. For Inverting Gain and Trans-impedance Gain Amplifiers (convert current to voltage, such as photo detectors):
a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the
op-amp (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface.
The Layout of Guard Ring
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Package Outline Dimensions
SOT23-5 / SOT23-6
Dimensions
Dimensions
In Inches
In Millimeters
Symbol
Min
Max
Min
Max
A1
A2
b
0.000
1.050
0.300
2.820
1.500
2.650
0.100
1.150
0.400
3.020
1.700
2.950
0.000
0.041
0.012
0.111
0.059
0.104
0.004
0.045
0.016
0.119
0.067
0.116
D
E
E1
e
0.950TYP
0.037TYP
e1
L1
θ
1.800
0.300
0°
2.000
0.460
8°
0.071
0.012
0°
0.079
0.024
8°
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Package Outline Dimensions
SC-70-5 (SOT353)
Dimensions
Dimensions In
Inches
In Millimeters
Symbol
Min
Max
Min
Max
A1
A2
b
0.000
0.900
0.150
0.080
2.000
1.150
2.150
0.100
1.000
0.350
0.150
2.200
1.350
2.450
0.000
0.035
0.006
0.003
0.079
0.045
0.085
0.004
0.039
0.014
0.006
0.087
0.053
0.096
C
D
E
E1
e
0.650TYP
0.026TYP
e1
L1
θ
1.200
0.260
0°
1.400
0.460
8°
0.047
0.010
0°
0.055
0.018
8°
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Package Outline Dimensions
SOP-8 (SOIC-8)
A2
C
θ
L1
A1
e
E
D
Dimensions
Dimensions In
Inches
In Millimeters
Symbol
Min
Max
Min
Max
A1
A2
b
0.100
1.350
0.330
0.190
4.780
3.800
5.800
0.250
1.550
0.510
0.250
5.000
4.000
6.300
0.004
0.053
0.013
0.007
0.188
0.150
0.228
0.010
0.061
0.020
0.010
0.197
0.157
0.248
E1
C
D
E
E1
e
1.270 TYP
0.050 TYP
L1
θ
0.400
0°
1.270
8°
0.016
0°
0.050
8°
b
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Package Outline Dimensions
MSOP-8
Dimensions
Dimensions In
Inches
In Millimeters
Symbol
Min
Max
Min
Max
A
0.800
0.000
0.760
0.30 TYP
0.15 TYP
2.900
0.65 TYP
2.900
4.700
0.410
0°
1.200
0.200
0.970
0.031
0.000
0.030
0.012 TYP
0.006 TYP
0.114
0.026
0.114
0.185
0.016
0°
0.047
0.008
0.038
E
E1
A1
A2
b
C
D
3.100
0.122
e
b
e
E
3.100
5.100
0.650
6°
0.122
0.201
0.026
6°
D
E1
L1
θ
A1
R1
R
θ
L
L1
L2
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Package Outline Dimensions
TSSOP-14
Dimensions
In Millimeters
E1
E
Symbol
MIN
-
TYP
MAX
1.20
0.15
1.05
0.28
0.19
5.06
6.60
4.50
A
A1
A2
b
-
0.05
0.90
0.20
0.10
4.86
6.20
4.30
-
1.00
-
e
c
c
-
4.96
D
D
E
6.40
E1
e
4.40
0.65 BSC
0.60
L
0.45
0.75
A1
L1
L2
R
1.00 REF
0.25 BSC
-
0.09
0°
-
R1
θ
-
8°
R
θ
L
L1
L2
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TP5531/TP5532/TP5534
1.8V, 34μA, RRIO, Zero Drift Op-amps
Package Outline Dimensions
SOP-14 (SOIC-14)
Dimensions
In Millimeters
TYP
Symbol
MIN
1.35
0.10
1.25
0.36
8.53
5.80
3.80
MAX
1.75
0.25
1.65
0.49
8.73
6.20
4.00
A
A1
A2
b
1.60
0.15
1.45
D
8.63
6.00
E
E1
e
3.90
1.27 BSC
0.60
L
0.45
0°
0.80
8°
L1
L2
θ
1.04 REF
0.25 BSC
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