S-1740A18-A6T2U4 [ABLIC]
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT;
| 型号： | S-1740A18-A6T2U4 |
| 厂家： | 
ABLIC |
| 描述： | 5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT 输入元件 输出元件 |
| 文件： | 总47页 (文件大小：1622K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
S-1740/1741 Series
5.5 V INPUT, 100 mA VOLTAGE REGULATOR
WITH SUPPLY VOLTAGE DIVIDED OUTPUT
www.ablic.com
© ABLIC Inc., 2016-2018
Rev.1.3_00
The S-1740/1741 Series, developed using CMOS technology, is a positive voltage regulator with the supply voltage divided
output, which features super low current consumption and low dropout voltage.
The regulator block has low current consumption of 0.35 μA typ. and high-accuracy output voltage of 1.0%.
The function of the supply voltage divided output is prepared in the S-1740/1741 Series. The supply voltage divided output is
a function that divides the input voltage (VIN) of the regulator into VIN/2 or VIN/3 and outputs the voltage. For example, this
function makes it possible that the IC connects to a low voltage microcontroller A/D converter directly and the microcontroller
monitors a battery voltage.
Features
Regulator block
• Output voltage:
• Input voltage:
VOUT = 1.0 V to 3.5 V, selectable in 0.05 V step
IN = 1.5 V to 5.5 V
V
• Output voltage accuracy:
• Dropout voltage:
1.0% (1.0 V to 1.45 V output product: 15 mV) (Ta = +25°C)
20 mV typ. (2.5 V output product, at IOUT = 10 mA) (Ta = +25°C)
• Current consumption during operation:
• Output current:
• Input capacitor:
• Output capacitor:
• Built-in overcurrent protection circuit:
ISS1 = 0.35 μA typ. (Ta = +25°C)
Possible to output 100 mA ( at VIN ≥ VOUT(S) + 1.0 V)*1
A ceramic capacitor can be used. (1.0 μF or more)
A ceramic capacitor can be used. (1.0 μF to 100 μF)
Limits overcurrent of output transistor.
Supply voltage divider block
• Output voltage:
V
V
PMOUT = VIN/2 (S-1740 Series)
PMOUT = VIN/3 (S-1741 Series)
•
Current consumption during operation
:
ISS1P = 0.15 μA typ. (Ta = +25°C)
• Output capacitor:
A ceramic capacitor can be used. (100 nF to 220 nF)
• Built-in enable circuit:
Ensures long battery life.
Overall
• Operation temperature range:
• Lead-free (Sn 100%), halogen-free
Ta = −40°C to +85°C
*1. Please make sure that the loss of the IC will not exceed the power dissipation when the output current is large.
Applications
• Constant-voltage power supply and battery voltage monitoring support for battery-powered device
• Constant-voltage power supply for portable communication device, digital camera, and digital audio player
• Constant-voltage power supply for home electric appliance
Packages
• SOT-23-5
• HSNT-6(1212)
• HSNT-4(1010)
1
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Block Diagram
1. S-1740/1741 Series A / C type (SOT-23-5, HSNT-6(1212))
*1
VOUT
VIN
SW
Overcurrent
protection circuit
+
−
PMOUT
+
PMEN
VSS
Enable circuit
−
Reference
voltage circuit
Product Type
Output Voltage (VPMOUT
VIN/2
)
PMEN Pin Logic
Active "H"
S-1740 Series A type
S-1740 Series C type
S-1741 Series A type
S-1741 Series C type
Active "L"
Active "H"
VIN/3
Active "L"
*1. Parasitic diode
Figure 1
2
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
2. S-1740/1741 Series G type (HSNT-4(1010))
*1
VOUT
VIN
Overcurrent
protection circuit
+
−
PMOUT
+
−
Reference
voltage circuit
VSS
Product Type
Output Voltage (VPMOUT
)
PMEN Pin Logic
Without PMEN pin
S-1740 Series G type
S-1741 Series G type
VIN/2
VIN/3
*1. Parasitic diode
Figure 2
3
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Product Name Structure
Users can select supply voltage divider block output voltage, product type, regulator block output voltage, and
package type for the S-1740/1741 Series. Refer to "1. Product name" regarding the contents of product name, "2.
Function list of product type" regarding the product type, "3. Packages" regarding the package drawings and "4.
Product name list" for details of product names.
1. Product name
S-174x
x
xx
-
xxxx
U
4
Environmental code
U:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
M5T1: SOT-23-5, Tape
A6T2: HSNT-6(1212), Tape
A4T2: HSNT-4(1010), Tape*2
Regulator block output voltage*3
10 to 35
(e.g., when the output voltage is 1.0 V, it is expressed as 10.)
Product type*4
A, C, G
Supply voltage divider block output voltage*4
0: VIN/2
1: VIN/3
*1. Refer to the tape drawing.
*2. Only S-1740/1741 Series G type
*2. Contact our sales office when the product which has 0.05 V step is necessary.
*3. Refer to "2. Function list of product type" and "2. 2 PMEN pin" in "2. Supply voltage divider
block" in " Operation".
2. Function list of product type
Table 1
Product Type
Output Voltage (VPMOUT
)
PMEN Pin Logic
Active "H"
Package
S-1740 Series A type
S-1740 Series C type
S-1740 Series G type
S-1741 Series A type
S-1741 Series C type
S-1741 Series G type
HSNT-6(1212),
SOT-23-5
VIN/2
Active "L"
Without PMEN pin
Active "H"
HSNT-4(1010)
HSNT-6(1212),
SOT-23-5
VIN/3
Active "L"
Without PMEN pin
HSNT-4(1010)
3. Packages
Table 2 Package Drawing Codes
Package Name
SOT-23-5
Dimension
Tape
Reel
Land
MP005-A-P-SD
PM006-A-P-SD
PL004-A-P-SD
MP005-A-C-SD
PM006-A-C-SD
PL004-A-C-SD
MP005-A-R-SD
PM006-A-R-SD
PL004-A-R-SD
−
HSNT-6(1212)
HSNT-4(1010)
PM006-A-L-SD
PL004-A-L-SD
4
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
4. Product name list
4. 1 S-1740 Series
4. 1. 1 A type
PMEN pin logic:
Active "H"
Output Voltage (VPMOUT):
VIN/2
Table 3
SOT-23-5
Output Voltage (VOUT
)
HSNT-6(1212)
1.0 V 15 mV
1.7 V 1.0%
1.8 V 1.0%
2.0 V 1.0%
2.1 V 1.0%
3.0 V 1.0%
S-1740A10-M5T1U4
S-1740A17-M5T1U4
S-1740A18-M5T1U4
S-1740A20-M5T1U4
S-1740A21-M5T1U4
S-1740A30-M5T1U4
S-1740A10-A6T2U4
S-1740A17-A6T2U4
S-1740A18-A6T2U4
S-1740A20-A6T2U4
S-1740A21-A6T2U4
S-1740A30-A6T2U4
Remark Please contact our sales office for products with specifications other than the above.
4. 1. 2 C type
PMEN pin logic:
Active "L"
Output Voltage (VPMOUT):
VIN/2
Table 4
SOT-23-5
Output Voltage (VOUT
1.0 V 15 mV
1.7 V 1.0%
)
HSNT-6(1212)
S-1740C10-M5T1U4
S-1740C17-M5T1U4
S-1740C18-M5T1U4
S-1740C20-M5T1U4
S-1740C21-M5T1U4
S-1740C30-M5T1U4
S-1740C10-A6T2U4
S-1740C17-A6T2U4
S-1740C18-A6T2U4
S-1740C20-A6T2U4
S-1740C21-A6T2U4
S-1740C30-A6T2U4
1.8 V 1.0%
2.0 V 1.0%
2.1 V 1.0%
3.0 V 1.0%
Remark Please contact our sales office for products with specifications other than the above.
4. 1. 3 G type
PMEN pin logic:
Without PMEN pin
Output Voltage (VPMOUT):
VIN/2
Table 5
Output Voltage (VOUT
1.0 V 15 mV
)
HSNT-4(1010)
S-1740G10-A4T2U4
S-1740G17-A4T2U4
S-1740G18-A4T2U4
S-1740G20-A4T2U4
S-1740G21-A4T2U4
S-1740G30-A4T2U4
1.7 V 1.0%
1.8 V 1.0%
2.0 V 1.0%
2.1 V 1.0%
3.0 V 1.0%
Remark Please contact our sales office for products with specifications other than the above.
5
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
4. 2 S-1741 Series
4. 2. 1 A type
PMEN pin logic:
Active "H"
Output Voltage (VPMOUT):
VIN/3
Table 6
SOT-23-5
Output Voltage (VOUT
)
HSNT-6(1212)
1.0 V 15 mV
1.7 V 1.0%
1.8 V 1.0%
2.0 V 1.0%
2.1 V 1.0%
3.0 V 1.0%
S-1741A10-M5T1U4
S-1741A17-M5T1U4
S-1741A18-M5T1U4
S-1741A20-M5T1U4
S-1741A21-M5T1U4
S-1741A30-M5T1U4
S-1741A10-A6T2U4
S-1741A17-A6T2U4
S-1741A18-A6T2U4
S-1741A20-A6T2U4
S-1741A21-A6T2U4
S-1741A30-A6T2U4
Remark Please contact our sales office for products with specifications other than the above.
4. 2. 2 C type
PMEN pin logic:
Active "L"
Output Voltage (VPMOUT):
VIN/3
Table 7
SOT-23-5
Output Voltage (VOUT
1.0 V 15 mV
1.7 V 1.0%
)
HSNT-6(1212)
S-1741C10-M5T1U4
S-1741C17-M5T1U4
S-1741C18-M5T1U4
S-1741C20-M5T1U4
S-1741C21-M5T1U4
S-1741C30-M5T1U4
S-1741C10-A6T2U4
S-1741C17-A6T2U4
S-1741C18-A6T2U4
S-1741C20-A6T2U4
S-1741C21-A6T2U4
S-1741C30-A6T2U4
1.8 V 1.0%
2.0 V 1.0%
2.1 V 1.0%
3.0 V 1.0%
Remark Please contact our sales office for products with specifications other than the above.
4. 2. 3 G type
PMEN pin logic:
Without PMEN pin
Output Voltage (VPMOUT):
VIN/3
Table 8
Output Voltage (VOUT
1.0 V 15 mV
)
HSNT-4(1010)
S-1741G10-A4T2U4
S-1741G17-A4T2U4
S-1741G18-A4T2U4
S-1741G20-A4T2U4
S-1741G21-A4T2U4
S-1741G30-A4T2U4
1.7 V 1.0%
1.8 V 1.0%
2.0 V 1.0%
2.1 V 1.0%
3.0 V 1.0%
Remark Please contact our sales office for products with specifications other than the above.
6
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Pin Configurations
1. SOT-23-5
Table 9 S-1740/1741 Series A / C type
Symbol Description
VIN
Top view
Pin No.
1
2
3
4
5
Input voltage pin
GND pin
5
4
VSS
PMEN
PMOUT
VOUT
Supply voltage divided output enable pin
Supply voltage divided output pin
Output voltage pin
1
2
3
Figure 3
2. HSNT-6(1212)
Table 10 S-1740/1741 Series A / C type
Symbol Description
VOUT Output voltage pin
Pin No.
Top view
1
2
3
4
5
6
1
2
3
6
5
4
VSS
GND pin
PMOUT
PMEN
NC*2
Supply voltage divided output pin
Supply voltage divided output enable pin
No connection
Bottom view
VIN
Input voltage pin
6
5
4
1
2
3
*1
Figure 4
*1. Connect the heat sink of backside at shadowed area to the board, and set electric potential GND.
However, do not use it as the function of electrode.
*2. The NC pin is electrically open.
The NC pin can be connected to the VIN pin or the VSS pin.
3. HSNT-4(1010)
Table 11 S-1740/1741 Series G type
Top view
Pin No.
Symbol
VOUT
Description
Output voltage pin
1
2
3
4
1
2
4
3
VSS
GND pin
PMOUT
VIN
Supply voltage divided output pin
Input voltage pin
Bottom view
4
3
1
2
*1
Figure 5
*1. Connect the heat sink of backside at shadowed area to the board, and set electric potential GND.
However, do not use it as the function of electrode.
7
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Absolute Maximum Ratings
Table 12
(Ta = +25°C unless otherwise specified)
Item
Symbol
VIN
Absolute Maximum Rating
VSS − 0.3 to VSS + 6.0
VSS − 0.3 to VSS + 6.0
VSS − 0.3 to VIN + 0.3
VSS − 0.3 to VIN + 0.3
120
Unit
V
Regulator block
Input voltage
Supply voltage divider block
VPMEN
VOUT
V
Regulator block
V
Output voltage
Output current
Supply voltage divider block
VPMOUT
IOUT
V
mA
°C
°C
Operation ambient temperature
Storage temperature
Topr
−40 to +85
−40 to +125
Tstg
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Thermal Resistance Value
Table 13
Item
Symbol
Condition
Board A
Min.
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Typ.
192
160
−
−
−
234
193
−
−
−
378
317
−
−
−
Max.
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Board B
Board C
Board D
Board E
Board A
Board B
Board C
Board D
Board E
Board A
Board B
Board C
Board D
Board E
SOT-23-5
Junction-to-ambient thermal resistance*1 θJA
HSNT-6(1212)
HSNT-4(1010)
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark Refer to " Power Dissipation" and "Test Board" for details.
8
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Electrical Characteristics
1. Regulator block
Table 14
(Ta = +25°C unless otherwise specified)
Test
Circuit
Item
Symbol
Condition
1.0 V
Min.
Typ.
Max.
Unit
VOUT(S)
0.015
VOUT(S)
VOUT(S)
0.015
VOUT(S)
≤
≤
VOUT(S) < 1.5 V
VOUT(S) 3.5 V
VOUT(S)
VOUT(S)
V
1
−
+
V
IN = VOUT(S)
+ 1.0 V,
Output voltage*1
Output current*2
VOUT(E)
IOUT = 10 mA
1.5 V
≤
V
1
×
0.99
×
1.01
IOUT
VIN
≥
VOUT(S)
+
1.0 V
100*5
0.50
0.40
0.30
0.20
0.10
−
−
−
−
−
−
−
−
−
−
−
−
mA
V
V
V
V
V
V
V
V
V
V
V
V
3
1
1
1
1
1
1
1
1
1
1
1
1
1.0 V
1.1 V
1.2 V
1.3 V
1.4 V
1.5 V
1.7 V
1.8 V
2.0 V
2.5 V
2.8 V
3.0 V
≤
≤
≤
≤
≤
≤
≤
≤
≤
≤
≤
≤
VOUT(S) < 1.1 V
VOUT(S) < 1.2 V
VOUT(S) < 1.3 V
VOUT(S) < 1.4 V
VOUT(S) < 1.5 V
VOUT(S) < 1.7 V
VOUT(S) < 1.8 V
VOUT(S) < 2.0 V
VOUT(S) < 2.5 V
VOUT(S) < 2.8 V
VOUT(S) < 3.0 V
−
0.050
0.040
0.040
0.030
0.020
0.019
0.018
0.080
0.060
0.050
0.040
0.030
0.021
0.020
Dropout voltage*3
Vdrop
IOUT = 10 mA
−
−
−
−
−
−
VOUT(S)
≤
3.5 V
Δ
VOUT1
Line regulation
Load regulation
VOUT(S) + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 10 mA
−
0.05
0.2
%/V
mV
1
Δ
Δ
VIN
•VOUT
VOUT2
VIN = VOUT(S)
VIN = VOUT(S)
+
+
1.0 V, 1
μA ≤ IOUT ≤ 50 mA
−
−
20
40
1
1
Δ
Ta
VOUT
•VOUT
Output voltage
1.0 V, IOUT = 10 mA,
130
−
ppm/°C
temperature coefficient*4
−40°C ≤ Ta ≤ +85°C
Δ
Current consumption
during operation
ISS1
VIN = VOUT(S)
+
1.0 V, no load
−
0.35
0.53
μ
A
2
Input voltage
VIN
−
1.5
−
5.5
V
−
Short-circuit current
Ishort
VIN = VOUT(S)
+
1.0 V, VOUT = 0 V
−
60
−
mA
3
*1. VOUT(S): Set output voltage
VOUT(E): Actual output voltage
Output voltage when fixing IOUT (= 10 mA) and inputting VOUT(S) + 1.0 V
*2. The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output current.
*3. Vdrop = VIN1 − (VOUT3 × 0.98)
VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input
voltage.
VOUT3 is the output voltage when VIN = VOUT(S) + 1.0 V and IOUT = 10 mA.
*4. A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
ΔVOUT
ΔTa
ΔVOUT
ΔTa•VOUT
mV/°C *1 = VOUT(S) V *2
×
ppm/°C *3 ÷ 1000
[ ]
[
]
[ ]
*1. Change in temperature of output voltage
*2. Set output voltage
*3. Output voltage temperature coefficient
*5. Due to limitation of the power dissipation, this value may not be satisfied. Attention should be paid to the power
dissipation when the output current is large.
This specification is guaranteed by design.
9
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
2. Supply voltage divider block
Table 15
(Ta = +25°C unless otherwise specified)
Test
Circuit
Item
Output voltage*1
Symbol
VPMOUT
Condition
Min.
Typ.
Max.
Unit
S-1740 Series
S-1741 Series
−
−
VIN/2
−
−
10
V
V
4
4
−
4
4
V
IN = 3.6 V,
(S)
−10 IPMOUT
μ
A
≤
≤
10 μA
VIN/3
Load current
IPMOUT
VPOF
RPS
VIN = 3.6 V
VIN = 3.6 V,
VIN = 3.6 V,
−
−
10
30
−
−
−
−
μA
mV
Output offset voltage
Output impedance
−
−
10
10
μ
μ
A
A
≤
≤
IPMOUT
IPMOUT
≤
≤
10
10
μ
μ
A
A
30
1000
Ω
S-1740/1741 Series A / C type,
Set-up time
tPU
−
−
5
10
ms
4
V
IN = 3.6 V, CPM = 220 nF, no load
IN = 3.6 V, when supply voltage divided output is
Current consumption
during operation*2
Input voltage
V
ISS1P
VIN
0.15
−
0.23
5.5
−
μ
A
5
−
6
enabled, no load
−
1.5
1.0
V
VIN = 3.6 V, determined by
PMEN pin input voltage "H"
PMEN pin input voltage "L"
VPSH
−
V
V
VPMOUT output level
IN = 3.6 V, determined by
V
S-1740/1741
VPSL
−
−
0.25
6
VPMOUT output level
Series A / C type
PMEN pin input current "H"
PMEN pin input current "L"
IPSH
IPSL
VIN = 3.6 V, VPMEN = VIN
VIN = 3.6 V, VPMEN = 0 V
−
0.1
−
−
0.1
0.1
μ
μ
A
A
6
6
−0.1
S-1740/1741 Series A / C type,
VIN = 3.6 V, when supply voltage divided output is
disabled, VPMOUT = 0.1 V
Discharge shunt resistance
during power-off
RPLOW
−
2.8
−
k
Ω
7
*1. VPMOUT(S): Set output voltage
VPMOUT(S) + VPOF: Actual output voltage
*2. Increased current value from the current consumption during operation (ISS1) of the regulator block when the supply
voltage divided output is enabled.
10
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Test Circuits
+
VOUT
VIN
A
+
PMEN*1
PMOUT
VSS
V
Set to Disable
Figure 6 Test Circuit 1
+
A
VOUT
VIN
PMEN*1
PMOUT
VSS
Set to Disable
Figure 7 Test Circuit 2
+
VOUT
A
VIN
+
PMEN*1
PMOUT
VSS
V
Set to Disable
Figure 8 Test Circuit 3
VIN
VOUT
+
PMEN*1
A
PMOUT
VSS
+
V
Set to Enable
Figure 9 Test Circuit 4
+
A
VIN
VOUT
PMEN*1
PMOUT
VSS
Set to Enable
Figure 10 Test Circuit 5
*1. Only S-1740/1741 Series A / C type
11
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
VOUT
VIN
+
PMEN*1
PMOUT
VSS
A
+
V
Figure 11 Test Circuit 6
VOUT
VIN
+
PMEN*1
PMOUT
VSS
A
+
V
Set to Enable
Figure 12 Test Circuit 7
*1. Only S-1740/1741 Series A / C type
Standard Circuit
Input
CIN
Output for regulator block
VIN
VOUT
*2
CL
*1
PMEN*4 PMOUT
VSS
Output for supply voltage
divider block
*3
CPM
Single GND
GND
*1. CIN is a capacitor for stabilizing the input.
*2. CL is a capacitor for stabilizing the output.
*3. CPM is a capacitor for stabilizing the output.
*4. Only S-1740/1741 Series A / C type
Figure 13
Caution The above connection diagram and constants will not guarantee successful operation. Perform
thorough evaluation including the temperature characteristics with an actual application to set the
constants.
12
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Condition of Application
Input capacitor (CIN):
Output capacitor (CL):
Output capacitor (CPM):
A ceramic capacitor with capacitance of 1.0 μF or more is recommended.
A ceramic capacitor with capacitance of 1.0 μF to 100 μF is recommended.
A ceramic capacitor with capacitance of 100 nF to 220 nF is recommended.
Caution Generally, in a voltage regulator, an oscillation may occur depending on the selection of the external
parts. Perform thorough evaluation including the temperature characteristics with an actual
application using the above capacitors to confirm no oscillation occurs.
Selection of Regulator Block Input Capacitor (CIN) and Output Capacitor (CL)
The S-1740/1741 Series requires CL between the VOUT pin and the VSS pin for regulator phase compensation.
The operation is stabilized by a ceramic capacitor with capacitance of 1.0 μF to 100 μF. When using an OS capacitor, a
tantalum capacitor or an aluminum electrolytic capacitor, the capacitance must also be 1.0 μF to 100 μF. However, an
oscillation may occur depending on the equivalent series resistance (ESR).
Moreover, the S-1740/1741 Series requires CIN between the VIN pin and the VSS pin for a stable operation.
Generally, an oscillaiton may occur when a voltage regulator is used under the conditon that the impedance of the power
supply is high. Note that the output voltage transient characteristics vary depending on the capacitance of CIN and CL and
the value of ESR.
Caution Perform thorough evaluation including the temperature characteristics with an actual application to
select CIN, CL.
Selection of Supply Voltage Divider Block Output Capacitor (CPM)
The S-1740/1741 Series requires CPM between the PMOUT pin and the VSS pin for supply voltage divider phase
compensation.
The operation is stabilized by a ceramic capacitor with capacitance of 100 nF to 220 nF. When using an OS capacitor, a
tantalum capacitor or an aluminum electrolytic capacitor, the capacitance must also be 100 nF to 220 nF. However, an
oscillation may occur depending on ESR.
Note that the output voltage transient characteristics vary depending on the capacitance of CPM and the value of ESR.
Caution Perform thorough evaluation including the temperature characteristics with an actual application to
select CPM
.
13
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Explanation of Terms
1. Regulator block
1. 1 Output voltage (VOUT
)
This voltage is output at an accuracy of 1.0% or 15 mV*2 when the input voltage, the output current and the
temperature are in a certain condition*1.
*1. Differs depending on the product.
*2. When VOUT < 1.5 V: 15 mV, when VOUT ≥ 1.5 V: 1.0%
Caution If the certain condition is not satisfied, the output voltage may exceed the accuracy range of
1.0% or 15 mV. Refer to Table 14 in " Electrical Characteristics" for details.
ΔVOUT1
ΔV •V
1. 2 Line regulation
OUT
IN
Indicates the dependency of the output voltage against the input voltage. The value shows how much the
output voltage changes due to a change in the input voltage after fixing output current constant.
1. 3 Load regulation (ΔVOUT2
)
Indicates the dependency of the output voltage against the output current. The value shows how much the
output voltage changes due to a change in the output current after fixing input voltage constant.
1. 4 Dropout voltage (Vdrop
)
Indicates the difference between input voltage (VIN1) and the output voltage when the output voltage becomes
98% of the output voltage value (VOUT3) at VIN = VOUT(S) + 1.0 V after the input voltage (VIN) is decreased
gradually.
Vdrop = VIN1 − (VOUT3 × 0.98)
14
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
ΔVOUT
ΔTa•V
1. 5 Output voltage temperature coefficient
OUT
The shaded area in Figure 14 is the range where VOUT varies in the operation temperature range when the
output voltage temperature coefficient is 130 ppm/°C.
Example of S-1740/1741A10 typ. product
VOUT
[V]
+0.13 mV/°C
*1
VOUT(E)
−0.13 mV/°C
−40
+25
+85
Ta [°C]
*1.
V
OUT(E) is the value of the output voltage measured at Ta = +25°C.
Figure 14
A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
ΔVOUT
ΔTa
ΔVOUT
ΔTa•VOUT
mV/°C *1 = VOUT(S) V *2
×
ppm/°C *3 ÷ 1000
[ ]
[
]
[ ]
*1. Change in temperature of output voltage
*2. Set output voltage
*3. Output voltage temperature coefficient
15
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
2. Supply voltage divider block
2. 1 Supply voltage divided output
This is a function that divides the input voltage (VIN) of the regulator into VIN/2 or VIN/3 and outputs the voltage.
For example, a microcontroller can monitor a battery voltage by inputting output voltage (VPMOUT) to the microcontroller
A/D converter.
2. 2 Output voltage (VPMOUT
This is the voltage of the divided VIN, which is VIN/2 in the S-1740 Series and VIN/3 in the S-1741 Series.
2. 3 Output offset voltage (VPOF
)
)
This is the supply voltage divider block offset voltage when VIN, the load current and the temperature are in a certain
condition.
Caution If the certain condition is not satisfied, the output voltage may exceed the accuracy range of
30 mV. Refer to " Electrical Characteristics" for details.
2. 4 Output impedance (RPS
)
This is the supply voltage divider block impedance. It shows how much VPMOUT changes when the load current
changes.
For example, the output impedance can be used in sampling rate calculation as signal source impedance when
VPMOUT from the PMOUT pin is input to the A/D converter as a microcontroller input signal.
2. 5 Set-up time (tPU) (S-1740/1741 Series A / C type)
This is the time from when the supply voltage divided output is enabled until VPMOUT stabilizes.
V
PMOUT, VPOF and RPS are not guaranteed until the set-up time elapses.
2. 6 Discharge shunt resistance during power-off (RPLOW) (S-1740/1741 Series A / C type)
The ON resistance of the N-channel transistor built into the supply voltage divider block.
When the supply voltage divided output is disabled, VPMOUT is set to the VSS level by the built-in N-channel
transistor.
16
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Operation
1. Regulator block
1. 1 Basic operation
Figure 15 shows the block diagram of the regulator block to describe the basic operation.
The error amplifier compares the feedback voltage (Vfb) whose output voltage (VOUT) is divided by the feedback
resistors (Rs and Rf) with the reference voltage (Vref). The error amplifier controls the output transistor,
consequently, the regulator starts the operation that holds VOUT constant without the influence of the input
voltage (VIN).
VIN
*1
Current
Supply
Error amplifier
VOUT
Vref
−
+
Rf
Vfb
Reference voltage
circuit
Rs
VSS
*1. Parasitic diode
Figure 15
1. 2 Output transistor
In the S-1740/1741 Series, a low on-resistance P-channel MOS FET is used between the VIN pin and the
VOUT pin as the output transistor. In order to keep VOUT constant, the ON resistance of the output transistor
varies appropriately according to the output current (IOUT).
Caution Since a parasitic diode exists between the VIN pin and the VOUT pin due to the structure of
the transistor, the IC may be damaged by a reverse current if VOUT becomes higher than VIN.
Therefore, be sure that VOUT does not exceed VIN + 0.3 V.
1. 3 Overcurrent protection circuit
The S-1740/1741 Series has a built-in overcurrent protection circuit to limit the overcurrent of the output
transistor. When the VOUT pin is shorted to the VSS pin, that is, at the time of the output short-circuit, the
output current is limited to 60 mA typ. due to the overcurrent protection circuit operation. The S-1740/1741
Series restarts regulating when the output transistor is released from the overcurrent status.
Caution This overcurrent protection circuit does not work as for thermal protection. For example,
when the output transistor keeps the overcurrent status long at the time of output short-
circuit or due to other reasons, pay attention to the conditions of the input voltage and the
load current so as not to exceed the power dissipation.
17
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
2. Supply voltage divider block
2. 1 Basic operation
2. 1. 1 S-1740/1741 Series A / C type
Figure 16 shows the block diagram of the S-1740/1741 Series A / C type to describe basic operation.
Reference voltage (Vrefpm) is generated by dividing the input voltage (VIN) to VIN/2 or VIN/3 using the dividing
resistance (Rpm1 and Rpm2). Since the buffer amplifier constitutes a voltage follower, it can perform the
feedback control so that the output voltage (VPMOUT) and Vrefpm are the same. Low output impedance is
realized by the buffer amplifier, while outputting VPMOUT according to VIN.
When "L" is input to the PMEN pin in the S-1740/1741 Series A type, or "H" is input to the PMEN pin in the C
type, the current which flows to Rpm1 and Rpm2 and the current which flows to the buffer amplifier can be
stopped. The buffer amplifier output is pulled down to VSS by the built-in N-channel transistor, and VPMOUT is
set to the VSS level.
VIN
SW
Buffer amplifier
Rpm1
Vrefpm
+
−
PMOUT
Rpm2
PMEN
VSS
Enable circuit
Figure 16
2. 1. 2 S-1740/1741 Series G type
Figure 17 shows the block diagram of the S-1740/1741 Series G type to describe basic operation.
Vrefpm is made by dividing VIN to VIN/2 or VIN/3 using Rpm1 and Rpm2. Since the buffer amplifier constitutes a
voltage follower, it can perform the feedback control so that VPMOUT and Vrefpm are the same. Low output
impedance is realized by the buffer amplifier, while outputting VPMOUT according to VIN.
VIN
Buffer amplifier
Rpm1
Vrefpm
+
−
PMOUT
Rpm2
VSS
Figure 17
18
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
2. 2 PMEN pin
2. 2. 1 S-1740/1741 Series A / C type
The PMEN pin controls the enable circuit.
When "H" is input to the PMEN pin in the S-1740/1741 Series A type, or "L" is input to the PMEN pin in the C
type, the enable circuit operates. This enables the supply voltage divided output and allows for monitoring of the
power supply voltage. When "L" is input to the PMEN pin in the S-1740/1741 Series A type, or "H" is input to the
PMEN pin in the C type, the enable circuit stops. This disables the supply voltage divided output, reducing the
IC current consumption.
In addition, the PMEN pin has absolutely no effect on the operation of the regulator block.
Table 16
Output Voltage
Current
Consumption
VOUT Pin
Voltage
Product Type PMEN Pin Supply Voltage Divided Output
(VPMOUT
)
*1
A
A
C
C
"H"
"L"
"L"
"H"
Enable
Disable
Enable
Disable
VPMOUT
ISS1 + ISS1P
ISS1
ISS1 + ISS1P
ISS1
VOUT
VOUT
VOUT
VOUT
VSS level
*1
VPMOUT
VSS level
*1. Refer to *1 in Table 15 in " Electrical Characteristics".
Figure 18 shows the internal equivalent circuit structure in relation to the PMEN pin. The PMEN pin is neither
pulled up nor pulled down, so do not use it in the floating status. When not using the PMEN pin, connect it to the
VIN pin. Note that the current consumption increases when a voltage of 0.25 V to VIN − 0.3 V is applied to the
PMEN pin.
VIN
PMEN
VSS
Figure 18
19
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
2. 3 PMEN pin voltage and output voltage (VPMOUT
)
2. 3. 1 S-1740/1741 Series A / C type
Figure 19 shows the relation between the PMEN pin voltage and the supply voltage divided output.
When "H" is input to the PMEN pin in the S-1740/1741 Series A type, or "L" is input to the PMEN pin in the C
type, the supply voltage divided output is enabled. Once set-up time (tPU) = 10 ms max.*1 elapses, the output
voltage (VPMOUT) will settle and the power supply voltage can be monitored.
When "L" is input to the PMEN pin in the S-1740/1741 Series A type, or "H" is input to the PMEN pin in the C
type, the supply voltage divided output is disabled. VPMOUT is set to the VSS level by the built-in N-channel
transistor.
By inputting "H" and "L" alternately to the PMEN pin, allowing for minimization of current consumption during
the period when the power supply voltage is not monitored.
*1. When Ta = +25°C, VIN = 3.6 V, CPM = 220 nF, no load
Example of active "H"
VPMEN
tPU
tPU
VPMOUT(S) + VPOF
VPMOUT(S) + VPOF
VPMOUT
Figure 19
Remark
VPMEN = VIN ↔ VSS
20
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Typical Application in S-1740/1741 Series A / C Type
Figure 20 shows the circuit diagram of the typical application in the S-1740/1741 Series A / C type, and Figure 21 shows
the timing chart.
As shown in Figure 20, connect the PMOUT pin to an analog input pin (AIN pin) of the A/D converter in the
microcontroller. The microcontroller can monitor the battery voltage by inputting the output voltage (VPMOUT) to the A/D
converter.
The input voltage from the battery is converted to output voltage by the regulator operation, and the microcontroller starts
driving with the voltage. The supply voltage divided output can be controlled by inputting "H" and "L" signals output from
the microcontroller I/O pin to the PMEN pin. Control the supply voltage divided output according to the A/D converter
operation timing.
When inputting "H" to the PMEN pin in the S-1740/1741 Series A type, or "L" to the PMEN pin in the C type, the
microcontroller monitors the battery voltage. The IC current consumption can be minimized by inputting "L" to the PMEN
pin in the S-1740/1741 Series A type, or "H" to the PMEN pin in the C type when battery voltage is not monitored.
S-1740/1741 Series
Microcontroller
A / C type
VDD
VOUT
VIN
CL
A/D
converter
AIN
PMOUT
VSS
PMEN
CIN
Battery
VSS
I/O
CPM
Figure 20
Example of active "H"
VPMEN
tPU
tPU
tPU
VPMOUT(S) + VPOF
VPMOUT
Voltage monitoring timing
Figure 21
21
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Precautions
• Generally, when a voltage regulator is used under the condition that the load current value is small (1.0 μA or less), the
output voltage may increase due to the leakage current of an output transistor.
• Generally, when a voltage regulator is used under the condition that the temperature is high, the output voltage may
increase due to the leakage current of an output transistor.
• Generally, when a voltage regulator is used under the condition that the impedance of the power supply is high, an
oscillation may occur. Perform thorough evaluation including the temperature characteristics with an actual application
to select CIN.
• Generally, in a voltage regulator, an oscillation may occur depending on the selection of the external parts. The
following use conditions are recommended in the S-1740/1741 Series, however, perform thorough evaluation including
the temperature characteristics with an actual application to select CIN, CL and CPM
.
Input capacitor (CIN):
Output capacitor (CL):
Output capacitor (CPM):
A ceramic capacitor with capacitance of 1.0 μF or more is recommended.
A ceramic capacitor with capacitance of 1.0 μF to 100 μF is recommended.
A ceramic capacitor with capacitance of 100 nF to 220 nF is recommended.
• Generally, in a voltage regulator, the values of an overshoot and an undershoot in the output voltage vary depending
on the variation factors of input voltage start-up, input voltage fluctuation and load fluctuation etc., or the capacitance of
CIN, CL or CPM and the value of the equivalent series resistance (ESR), which may cause a problem to the stable
operation. Perform thorough evaluation including the temperature characteristics with an actual application to select
CIN, CL and CPM
.
• Generally, in a voltage regulator, if the VOUT pin is steeply shorted with GND, a negative voltage exceeding the
absolute maximum ratings may occur in the VOUT pin due to resonance phenomenon of the inductance and the
capacitance including CL on the application. The resonance phenomenon is expected to be weakened by inserting a
series resistor into the resonance path, and the negative voltage is expected to be limited by inserting a protection
diode between the VOUT pin and the VSS pin.
• Make sure of the conditions for the input voltage, output voltage and the load current so that the internal loss does not
exceed the power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• When considering the output current value that the IC is able to output, make sure of the output current value specified
in Table 14 in " Electrical Characteristics" and footnote *5 of the table.
• Wiring patterns on the application related to the VIN pin, the VOUT pin and the VSS pin should be designed so that the
impedance is low. When mounting CIN between the VIN pin and the VSS pin and CL between the VOUT pin and the
VSS pin, connect the capacitors as close as possible to the respective destination pins of the IC.
• In the package equipped with heat sink of backside, mount the heat sink firmly. Since the heat radiation differs
according to the condition of the application, perform thorough evaluation with an actual application to confirm no
problems happen.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
22
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Characteristics (Typical Data)
1. Regulator block
1. 1 Output voltage vs. Output current (When load current increases) (Ta = +25°C)
1. 1. 1 VOUT = 1.0 V
1. 1. 2 VOUT = 2.5 V
1.2
1.0
0.8
0.6
0.4
0.2
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VIN = 1.3 V
VIN = 1.5 V
VIN = 2.0 V
VIN = 3.0 V
VIN = 5.5 V
V
V
V
V
V
IN = 2.8 V
IN = 3.0 V
IN = 3.5 V
IN = 4.5 V
IN = 5.5 V
0
100
200
300
400
500
0
100
200
300
400
500
IOUT [mA]
IOUT [mA]
1. 1. 3 VOUT = 3.5 V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
IN = 3.8 V
IN = 4.0 V
IN = 4.5 V
IN = 5.5 V
Remark In determining the output current, attention should
V
V
V
be paid to the following.
1. The minimum output current value and
footnote *5 of Table 14 in " Electrical
Characteristics"
2. Power dissipation
0
100
200
300
400
500
I
OUT [mA]
1. 2 Output voltage vs. Input voltage (Ta = +25°C)
1. 2. 1
VOUT = 1.0 V
1. 2. 2 VOUT = 2.5 V
1.2
1.1
1.0
0.9
0.8
0.7
0.6
2.7
2.6
2.5
2.4
I
I
I
I
OUT = 1 mA
OUT = 10 mA
OUT = 50 mA
OUT = 100 mA
I
I
I
I
OUT = 1 mA
OUT = 10 mA
OUT = 50 mA
OUT = 100 mA
2.3
2.2
2.1
2.0
0.6
1.0
1.4
1.8
2.2
2.6
2.0
2.5
3.0
3.5
4.0
4.5
V
IN [V]
VIN [V]
1. 2. 3 VOUT = 3.5 V
3.7
3.6
3.5
3.4
3.3
3.2
3.1
3.0
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
3.0
3.5
4.0
4.5
5.0
5.5
VIN [V]
23
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
1. 3 Dropout voltage vs. Output current
1. 3. 1 VOUT = 1.0 V
1. 3. 2 VOUT = 2.5 V
1.2
0.40
0.35
0.30
0.25
Ta = +85C
Ta = +25C
Ta = 40C
1.0
Ta = +85C
0.8
Ta = +25C
Ta = 40C
0.6
0.4
0.2
0.0
0.20
0.15
0.10
0.05
0.00
0
20
40
60
80
100
0
20
40
60
80
100
IOUT [mA]
IOUT [mA]
1. 3. 3 VOUT = 3.5 V
0.40
0.35
0.30
0.25
Ta = +85C
Ta = +25C
Ta = 40C
0.20
0.15
0.10
0.05
0.00
0
20
40
60
80
100
I
OUT [mA]
1. 4 Dropout voltage vs. Set output voltage
1.2
1.0
I
OUT = 0.1 mA
0.8
0.6
0.4
0.2
0.0
IOUT = 1 mA
IOUT = 10 mA
I
OUT = 50 mA
I
OUT = 100 mA
1.0
1.5
2.0
2.5
3.0
3.5
V
OUT(S) [V]
24
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
1. 5 Output voltage vs. Ambient temperature
1. 5. 1 VOUT = 1.0 V
1. 5. 2 VOUT = 2.5 V
1.10
2.70
1.05
1.00
0.95
0.90
2.60
2.50
2.40
2.30
−40
−25
0
25
50
75 85
−40
−25
0
25
50
75 85
Ta [°C]
Ta [°C]
1. 5. 3 VOUT = 3.5 V
3.80
3.70
3.60
3.50
3.40
3.30
3.20
−40
−25
0
25
50
75 85
Ta [°C]
1. 6 Current consumption vs. Input voltage
1. 6. 1 VOUT = 1.0 V
1. 6. 2 VOUT = 2.5 V
0.7
0.7
Ta = +85C
Ta = +25C
Ta = +85C
Ta = +25C
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Ta = 40C
Ta = 40C
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
V
IN [V]
V
IN [V]
1. 6. 3 VOUT = 3.5 V
0.7
Ta = +85C
Ta = +25C
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Ta = 40C
1.0 2.0 3.0
0.0
4.0
5.0
6.0
V
IN [V]
25
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
1. 7 Current consumption vs. Ambient temperature
1. 7. 1 VOUT = 1.0 V
1. 7. 2 VOUT = 2.5 V
0.7
0.6
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0.5
0.4
0.3
0.2
0.1
0.0
VIN = 2.0 V
VIN = 3.5 V
V
IN = 5.5 V
VIN = 5.5 V
−40
−25
0
25
Ta [C]
50
75 85
−40
−25
0
25
Ta [C]
50
75 85
1. 7. 3 VOUT = 3.5 V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
VIN = 4.5 V
V
IN = 5.5 V
−40
−25
0
25
Ta [C]
50
75 85
1. 8 Current consumption vs. Output current
1. 8. 1 VOUT = 1.0 V
1. 8. 2 VOUT = 2.5 V
40
35
30
40
35
30
25
20
15
10
5
25
VIN = 2.0 V
VIN = 3.5 V
20
15
10
5
0
VIN = 5.5 V
80
VIN = 5.5 V
80 100
0
0
20
40
60
100
0
20
40
60
IOUT [mA]
IOUT [mA]
1. 8. 3 VOUT = 3.5 V
40
35
30
25
20
15
10
5
VIN = 4.5 V
VIN = 5.5 V
0
0
20
40
60
80 100
I
OUT [mA]
26
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
2. Supply voltage divider block
2. 1 Output voltage vs. Load current
VPMOUT = VIN/2, VIN = 3.6 V
VPMOUT = VIN/3, VIN = 3.6 V
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Ta = 85C
Ta = 85C
Ta = 25C
Ta = 25C
Ta = 40C
Ta = 40C
10
5
0
5
10
10
5
0
5
10
I
PMOUT [A]
I
PMOUT [A]
2. 2 Output voltage vs. Input voltage (Ta = +25°C)
VPMOUT = VIN/2
VPMOUT = VIN/3
3.5
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
I
PMOUT = 0 A
IPMOUT = 0 A
I
PMOUT = 10 A
IPMOUT = 10 A
I
PMOUT = 10 A
IPMOUT = 10 A
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V
IN [V]
V
IN [V]
2. 3 Output voltage vs. Ambient temperature
VPMOUT = VIN/2
VPMOUT = VIN/3
3.5
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
I
PMOUT = 10 A
IPMOUT = 0 A
IPMOUT = 10 A
IPMOUT = 0 A
IPMOUT = 10 A
I
PMOUT = 10 A
40
25
0
25
50
75 85
40
25
0
25
50
75 85
Ta [C]
Ta [C]
27
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Reference Data
1. Characteristics of input transient response (Ta = +25°C)
1. 1 VOUT = 1.0 V
IOUT = 1 mA, CIN = CL = 1
μ
F, VIN = 2.0 V
↔
3.0 V, tr = tf = 5.0
μ
μ
μ
s
s
s
IOUT = 50 mA, CIN = CL = 1
μ
F, VIN = 2.0 V
↔
3.0 V, tr = tf = 5.0
μs
μs
μs
1.5
1.4
1.3
1.2
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.5
1.4
1.3
1.2
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VIN
V
IN
1.1
1.0
0.9
0.8
0.7
1.1
1.0
0.9
0.8
0.7
V
OUT
V
OUT
−200
0
200 400 600 800 1000 1200
−200
0
200 400 600 800 1000 1200
t [s]
t [s]
1. 2 VOUT = 2.5 V
IOUT = 1 mA, CIN = CL = 1
μ
F, VIN = 3.5 V
↔
4.5 V, tr = tf = 5.0
IOUT = 50 mA, CIN = CL = 1
μF, VIN = 3.5 V
↔
4.5 V, tr = tf = 5.0
3.0
2.9
2.8
2.7
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
3.0
2.9
2.8
2.7
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
VIN
V
IN
2.6
2.5
2.4
2.3
2.2
2.6
2.5
2.4
2.3
2.2
V
OUT
V
OUT
−200
0
200 400 600 800 1000 1200
−200
0
200 400 600 800 1000 1200
t [s]
t [s]
1. 3 VOUT = 3.5 V
IOUT = 1 mA, CIN = CL = 1
μ
F, VIN = 4.5 V
↔
5.5 V, tr = tf = 5.0
IOUT = 50 mA, CIN = CL = 1
μF, VIN = 4.5 V
↔
5.5 V, tr = tf = 5.0
4.0
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
4.0
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
V
IN
V
IN
VOUT
VOUT
−200
0
200 400 600 800 1000 1200
−200
0
200 400 600 800 1000 1200
t [s]
t [s]
28
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
2. Characteristics of load transient response (Ta = +25°C)
2. 1 VOUT = 1.0 V
VIN = 2.0 V, CIN = CL = 1
μ
F, IOUT = 1 mA
↔
10 mA, tr = tf = 5.0
μ
μ
μ
s
s
s
VIN = 2.0 V, CIN = CL = 1
μ
F, IOUT = 10 mA
↔
50 mA, tr = tf = 5.0
μ
μ
μ
s
s
s
1.5
1.4
1.3
1.2
75
50
25
0
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
75
50
25
0
IOUT
I
OUT
1.1
1.0
0.9
0.8
0.7
25
50
75
100
125
25
50
75
100
125
V
OUT
V
OUT
200
0
200 400 600 800 1000 1200
200
0
200 400 600 800 1000 1200
t [s]
t [s]
2. 2 VOUT = 2.5 V
VIN = 3.5 V, CIN = CL = 1
μ
F, IOUT = 1 mA
↔
10 mA, tr = tf = 5.0
VIN = 3.5 V, CIN = CL = 1
μ
F, IOUT = 10 mA
↔
50 mA, tr = tf = 5.0
3.0
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
75
50
25
0
3.0
2.9
2.8
75
50
25
0
2.7
2.6
2.5
2.4
2.3
2.2
I
OUT
I
OUT
25
50
75
100
125
25
50
75
100
125
V
OUT
V
OUT
100
0
100 200 300 400 500 600
100
0
100 200 300 400 500 600
t [s]
t [s]
2. 3 VOUT = 3.5 V
VIN = 4.5 V, CIN = CL = 1
μ
F, IOUT = 1 mA
↔
10 mA, tr = tf = 5.0
VIN = 4.5 V, CIN = CL = 1
μ
F, IOUT = 10 mA
↔
50 mA, tr = tf = 5.0
4.0
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
75
50
25
0
4.0
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
75
50
25
0
I
OUT
I
OUT
−
−
−
−
−
25
50
75
100
125
−
−
−
−
−
25
50
75
100
125
V
OUT
V
OUT
−400
0
400 800 1200 1600 2000 2400
−800
0
800 1600 2400 3200 4000 4800
t [s]
t [s]
29
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
3. Transient response characteristics of PMEN pin (Ta = +25°C)
3. 1 VPMOUT = VIN/2
VIN = 3.6 V, CPM = 220 nF, VPMEN = 0 V
10
↔
3.6 V, tr = tf = 1.0 μs
VIN = 5.5 V, CPM = 220 nF, VPMEN = 0 V
10
↔
5.5 V, tr = tf = 1.0
μ
s
6
6
8
6
4
8
6
4
4
2
0
4
2
0
V
PMEN
VPMEN
2
0
2
2
4
6
2
0
2
2
4
6
V
PMOUT
V
PMOUT
2
0
2
4
6
8
10
12
2
0
2
4
6
8
10
12
t [ms]
t [ms]
3. 2 VPMOUT = VIN/3
VIN = 3.6 V, CPM = 220 nF, VPMEN = 0 V
10
↔
3.6 V, tr = tf = 1.0 μs
V
10
IN = 5.5 V, CPM = 220 nF, VPMEN = 0 V
↔
5.5 V, tr = tf = 1.0
μ
s
6
6
8
6
4
8
4
2
0
4
2
0
6
4
V
PMEN
V
PMEN
2
0
2
2
4
6
2
2
4
6
0
V
PMOUT
V
PMOUT
2
2
0
2
4
6
8
10
12
2
0
2
4
6
8
10
12
t [ms]
t [ms]
4. Ripple rejection (Ta = +25°C)
4. 1 VOUT = 1.0 V
4. 2
VOUT = 2.5 V
VIN = 2.0 V, CL = 1.0 μF
VIN = 3.5 V, CL = 1.0 μF
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
Frequency [Hz]
Frequency [Hz]
4. 3 VOUT = 3.5 V
VIN = 4.5 V, CL = 1.0 μF
100
90
80
70
60
50
40
30
20
10
0
IOUT = 1 mA
IOUT = 10 mA
IOUT = 50 mA
IOUT = 100 mA
10
100
1k
10k
100k
1M
Frequency [Hz]
30
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
5. Example of equivalent series resistance vs. Output current characteristics (Ta = +25°C)
CIN = CL = 1.0 μF
CPM = 0.1 μF
100
100
Stable
Stable
0
0
0.01
100
10
−10
IOUT [mA]
Figure 22
IPMOUT [μA]
Figure 23
VIN
VIN
PMOUT
VOUT
PMOUT
VOUT
S-1740/1741
Series
A / C type
S-1740/1741
Series
CIN
CIN
*2
*2
CPM
CPM
*1
*1
CL
CL
G type
PMEN
VSS
VSS
RESR
RESR
RESR
RESR
*1. CL: TDK Corporation C3216X7R1H105K160AB
*1. CL: TDK Corporation C3216X7R1H105K160AB
*2.
CPM: TDK Corporation C2012X7R1H104K
*2.
CPM: TDK Corporation C2012X7R1H104K
Figure 24
Figure 25
31
5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT
Rev.1.3_00
S-1740/1741 Series
Power Dissipation
SOT-23-5
HSNT-6(1212)
T
j
= 125C max.
T
j
= 125C max.
1.0
0.8
1.0
0.8
B
0.6
0.6
B
A
0.4
0.4
0.2
0.0
A
0.2
0.0
0
25
50
75
100 125 150 175
0
25
50
75
100 125 150 175
Ambient temperature (Ta) [C]
Ambient temperature (Ta) [C]
Board
Power Dissipation (PD)
Board
Power Dissipation (PD)
A
B
C
D
E
0.52 W
A
B
C
D
E
0.43 W
0.63 W
0.52 W
−
−
−
−
−
−
HSNT-4(1010)
Tj = 125C max.
1.0
0.8
0.6
0.4
0.2
0.0
B
A
0
25
50
75
100 125 150 175
Ambient temperature (Ta) [C]
Board
Power Dissipation (PD)
A
B
C
D
E
0.26 W
0.32 W
−
−
−
32
SOT-23-3/3S/5/6 Test Board
No. SOT23x-A-Board-SD-2.0
ABLIC Inc.
HSNT-6(1212) Test Board
No. HSNT6-A-Board-SD-1.0
ABLIC Inc.
HSNT-4(1010) Test Board
No. HSNT4-B-Board-SD-1.0
ABLIC Inc.
2.9±0.2
1.9±0.2
4
5
+0.1
-0.06
1
2
3
0.16
0.95±0.1
0.4±0.1
No. MP005-A-P-SD-1.3
TITLE
SOT235-A-PKG Dimensions
MP005-A-P-SD-1.3
No.
ANGLE
UNIT
mm
ABLIC Inc.
4.0±0.1(10 pitches:40.0±0.2)
+0.1
-0
2.0±0.05
0.25±0.1
ø1.5
+0.2
-0
4.0±0.1
ø1.0
1.4±0.2
3.2±0.2
3
4
2 1
5
Feed direction
No. MP005-A-C-SD-2.1
TITLE
SOT235-A-Carrier Tape
MP005-A-C-SD-2.1
No.
ANGLE
UNIT
mm
ABLIC Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. MP005-A-R-SD-1.1
TITLE
SOT235-A-Reel
MP005-A-R-SD-1.1
No.
ANGLE
UNIT
QTY.
3,000
mm
ABLIC Inc.
1.00±0.05
0.38±0.02
0.40
0.40
4
6
+0.05
-0.02
3
0.08
1
1.20±0.04
he heat sink of back side has different electric
potential depending on the product.
Confirm specifications of each product.
Do not use it as the function of electrode.
0.20±0.05
No. PM006-A-P-SD-1.1
TITLE
HSNT-6-B-PKG Dimensions
No.
PM006-A-P-SD-1.1
ANGLE
mm
UNIT
ABLIC Inc.
4.0±0.1
2.0±0.05
+0.1
-0
ø1.5
0.25±0.05
+0.1
-0
ø0.5
0.50±0.05
4.0±0.1
1.32±0.05
3
1
6
4
Feed direction
No. PM006-A-C-SD-2.0
TITLE
HSNT-6-B-Carrier Tape
PM006-A-C-SD-2.0
No.
ANGLE
mm
UNIT
ABLIC Inc.
+1.0
- 0.0
9.0
11.4±1.0
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PM006-A-R-SD-1.0
TITLE
HSNT-6-B-Reel
No.
PM006-A-R-SD-1.0
ANGLE
5,000
QTY.
mm
UNIT
ABLIC Inc.
1.04min.
Land Pattern
0.24min.
1.02
0.40±0.02 0.40±0.02
(1.22)
Caution It is recommended to solder the heat sink to a board
in order to ensure the heat radiation.
PKG
Metal Mask Pattern
Aperture ratio
Aperture ratio
Caution
Mask aperture ratio of the lead mounting part is 100%.
Mask aperture ratio of the heat sink mounting part is 40%.
Mask thickness: t0.10mm to 0.12 mm
100%
40%
t0.10mm ~ 0.12 mm
HSNT-6-B
TITLE
-Land Recommendation
No.
PM006-A-L-SD-2.0
ANGLE
mm
UNIT
No. PM006-A-L-SD-2.0
ABLIC Inc.
0.38±0.02
0.65
3
4
+0.05
-0.02
1
2
0.08
1.00±0.04
he heat sink of back side has different electric
potential depending on the product.
Confirm specifications of each product.
Do not use it as the function of electrode.
0.20±0.05
No. PL004-A-P-SD-1.1
TITLE
HSNT-4-B-PKG Dimensions
PL004-A-P-SD-1.1
No.
ANGLE
UNIT
mm
ABLIC Inc.
4.0±0.05
2.0±0.05
+0.1
-0
ø1.5
0.25±0.05
+0.1
-0
ø0.5
2.0±0.05
0.5±0.05
1.12±0.05
2
3
1
4
Feed direction
No. PL004-A-C-SD-2.0
HSNT-4-B-Carrier Tape
PL004-A-C-SD-2.0
TITLE
No.
ANGLE
UNIT
mm
ABLIC Inc.
+1.0
- 0.0
9.0
11.4±1.0
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PL004-A-R-SD-1.0
HSNT-4-B-Reel
PL004-A-R-SD-1.0
TITLE
No.
QTY.
10,000
ANGLE
UNIT
mm
ABLIC Inc.
Land Pattern
0.30min.
0.38~0.48
0.38~0.48
0.07
0.65±0.02
(1.02)
Caution It is recommended to solder the heat sink to a board
in order to ensure the heat radiation.
PKG
Metal Mask Pattern
Aperture ratio
Aperture ratio
Caution
Mask aperture ratio of the lead mounting part is 100%.
Mask aperture ratio of the heat sink mounting part is 40%.
Mask thickness: t0.10mm to 0.12 mm
100%
40%
t0.10mm ~ 0.12 mm
HSNT-4-B
TITLE
-Land Recommendation
No. PL004-A-L-SD-2.0
No.
PL004-A-L-SD-2.0
ANGLE
UNIT
mm
ABLIC Inc.
Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application
circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not responsible for damages caused by the reasons other than the products described herein
(hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use
of the information described herein.
3. ABLIC Inc. is not responsible for damages caused by the incorrect information described herein.
4. Be careful to use the products within their specified ranges. Pay special attention to the absolute maximum ratings,
operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the
products outside their specified ranges.
5. When using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products must not be used or provided (exported) for the purposes of the development of weapons of mass
destruction or military use. ABLIC Inc. is not responsible for any provision (export) to those whose purpose is to
develop, manufacture, use or store nuclear, biological or chemical weapons, missiles, or other military use.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do
not apply the products to the above listed devices and equipments without prior written permission by ABLIC Inc.
Especially, the products cannot be used for life support devices, devices implanted in the human body and devices
that directly affect human life, etc.
Prior consultation with our sales office is required when considering the above uses.
ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products.
9. Semiconductor products may fail or malfunction with some probability.
The user of the products should therefore take responsibility to give thorough consideration to safety design including
redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or
death, fires and social damage, etc. that may ensue from the products' failure or malfunction.
The entire system must be sufficiently evaluated and applied on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc.
The information described herein does not convey any license under any intellectual property rights or any other
rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any
part of this document described herein for the purpose of disclosing it to a third-party without the express permission
of ABLIC Inc. is strictly prohibited.
14. For more details on the information described herein, contact our sales office.
2.2-2018.06
www.ablic.com
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SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
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