S-8225AAJ-TCT1U [ABLIC]
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK;型号: | S-8225AAJ-TCT1U |
厂家: | ABLIC |
描述: | BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK 监视器 |
文件: | 总27页 (文件大小:590K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
S-8225A Series
BATTERY MONITORING IC
FOR 3-SERIAL TO 5-SERIAL CELL PACK
www.ablic.com
© ABLIC Inc., 2012-2019
Rev.2.0_00
The S-8225A Series includes high-accuracy voltage detection circuits and delay circuits, and can monitor the status of
3-serial to 5-serial cell lithium-ion rechargeable battery in single use. By switching the voltage level which is applied to the
SEL1 pin and SEL2 pin, users are able to use the S-8225A Series for 3-serial to 5-serial cell pack.
By cascade connection using the S-8225A Series, it is also possible to protect 6-serial or more cells lithium-ion rechargeable
battery pack.
Features
• High-accuracy voltage detection function for each cell
Overcharge detection voltage n (n = 1 to 5)
3.500 V to 4.400 V (50 mV step)
Accuracy 20 mV (Ta = +25°C), 30 mV (Ta = 0°C to +60°C)
Overcharge release voltage n (n = 1 to 5)
Overdischarge detection voltage n (n = 1 to 5)
Overdischarge release voltage n (n = 1 to 5)
3.300 V to 4.400 V*1
Accuracy 50 mV
2.000 V to 3.200 V (100 mV step) Accuracy 80 mV
2.100 V to 3.400 V*2
Accuracy 100 mV
• Overcharge detection delay time and overdischarge detection delay time can be set by external capacitor.
• Switchable between 3-serial to 5-serial cell by using the SEL1 pin and the SEL2 pin
• Cascade connection is available.
• The CO pin and the DO pin are controlled by the CTLC pin and the CTLD pin, respectively.
• Output voltage of the CO pin and the DO pin is limited to 12 V max.
• High-withstand voltage
Absolute maximum rating: 28 V
• Wide operation voltage range
• Wide operation temperature range
• Low current consumption
4 V to 26 V
Ta = −40°C to +85°C
During operation (V1 = V2 = V3 = V4 = V5 = 3.4 V)
22 μA max. (Ta = +25°C)
During power-down (V1 = V2 = V3 = V4 = V5 = 1.6 V) 4.5 μA max. (Ta = +25°C)
• Lead-free (Sn 100%), halogen-free
*1. Overcharge hysteresis voltage n (n = 1 to 5) is selectable in 0 V, or in 0.1 V to 0.4 V in 50 mV step.
(Overcharge hysteresis voltage = Overcharge detection voltage − Overcharge release voltage)
*2. Overdischarge hysteresis voltage n (n = 1 to 5) is selectable in 0 V to 0.7 V in 100 mV step.
(Overdischarge hysteresis voltage = Overdischarge release voltage − Overdischarge detection voltage)
Application
• Lithium-ion rechargeable battery pack
Package
• 16-Pin TSSOP
1
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Block Diagram
VDD
CTLD
Control circuit
CTLC
Delay circuit
Delay circuit
VC1
VC2
VC3
VC4
VC5
VC6
VSS
Overcharge 1
CO pin output voltage
−
limit circuit
Over-
discharge 1
+
+
−
CO
Overcharge 2
−
+
Over-
discharge 2
DO pin output voltage
limit circuit
+
−
Overcharge 3
−
DO
+
Over-
discharge 3
+
−
Overcharge 4
−
+
Over-
discharge 4
+
−
SEL1
Overcharge 5
−
+
Over-
discharge 5
+
−
SEL2
CDT
CCT
Remark Diodes in the figure are parasitic diodes.
Figure 1
2
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Product Name Structure
1. Product name
S-8225A xx
-
TCT1
U
Environmental code
U:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
TCT1: 16-Pin TSSOP, Tape
Serial code*2
Sequentially set from AA to ZZ
*1. Refer to the tape drawing.
*2. Refer to "3. Product name list".
2. Package
Table 1 Package Drawing Codes
Package Name
16-Pin TSSOP
Dimension
Tape
Reel
FT016-A-P-SD
FT016-A-C-SD
FT016-A-R-S1
3. Product name list
Table 2
Overcharge
Overcharge
Overdischarge
Overdischarge
0 V Battery
Detection
Function
Product Name
Detection Voltage Release Voltage Detection Voltage Release Voltage
[VCU [VCL [VDL [VDU
]
]
]
]
S-8225AAA-TCT1U
S-8225AAB-TCT1U
S-8225AAC-TCT1U
S-8225AAD-TCT1U
S-8225AAE-TCT1U
S-8225AAF-TCT1U
S-8225AAG-TCT1U
S-8225AAH-TCT1U
S-8225AAI-TCT1U
S-8225AAJ-TCT1U
S-8225AAK-TCT1U
S-8225AAM-TCT1U
4.225 V
4.400 V
4.250 V
4.350 V
4.225 V
4.215 V
4.250 V
4.150 V
4.200 V
3.900 V
4.275 V
4.220 V
4.125 V
4.300 V
4.150 V
4.350 V
4.125 V
4.155 V
4.250 V
4.000 V
4.150 V
3.500 V
4.175 V
4.120 V
2.300 V
2.300 V
2.500 V
2.500 V
2.300 V
2.800 V
2.500 V
2.500V
2.500V
2.000 V
2.600 V
2.500 V
2.500 V
2.500 V
3.000 V
2.700 V
3.000 V
3.000 V
2.700 V
3.000 V
2.550 V
2.700 V
2.800 V
3.000 V
Available
Available
Unavailable
Unavailable
Unavailable
Available
Unavailable
Available
Available
Available
Available
Available
Remark Please contact our sales representatives for products other than the above.
3
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Pin Configuration
1. 16-Pin TSSOP
Top view
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Figure 2
Table 3
Pin No.
Symbol
CTLD
Description
1
2
3
4
5
6
7
8
DO control pin
CO control pin
CTLC
CO
Output pin for overcharge detection
Output pin for overdischarge detection
DO
SEL1
SEL2
CDT
CCT
Switching pins for 3-serial to 5-serial cell*1
Capacitor connection pin for delay for overdischarge detection voltage
Capacitor connection pin for delay for overcharge detection voltage
Input pin for negative power supply,
9
VSS
VC6
VC5
connection pin for negative voltage of battery 5
Connection pin for negative voltage of battery 5
Connection pin for negative voltage of battery 4,
connection pin for positive voltage of battery 5
Connection pin for negative voltage of battery 3,
connection pin for positive voltage of battery 4
Connection pin for negative voltage of battery 2,
connection pin for positive voltage of battery 3
Connection pin for negative voltage of battery 1,
connection pin for positive voltage of battery 2
Connection pin for positive voltage of battery 1
Input pin for positive power supply,
10
11
12
13
VC4
VC3
14
15
16
VC2
VC1
VDD
connection pin for positive voltage of battery 1
*1. Refer to "7. SEL pin" in " Operation" for setting of the SEL1 pin and the SEL2 pin.
4
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Absolute Maximum Ratings
Table 4
(Ta = +25°C unless otherwise specified)
Item
Symbol
Applied Pin
Absolute Maximum Rating
Unit
Input voltage between
VDD pin and VSS pin
VDS
VDD
VSS − 0.3 to VSS + 28
V
VC1, VC2, VC3, VC4, VC5, VC6,
Input pin voltage
VIN
SEL1, SEL2, CTLC, CTLD,
VSS − 0.3 to VDD + 0.3
V
CCT, CDT
Output pin voltage
Power dissipation
VOUT
PD
DO, CO
VSS − 0.3 to VDD + 0.3
1100*1
V
mW
°C
−
−
−
Operation ambient temperature Topr
−40 to +85
−40 to +125
Storage temperature
Tstg
°C
*1. When mounted on board
[Mounted board]
(1) Board size:
114.3 mm × 76.2 mm × t1.6 mm
(2) Board name:
JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
1200
1000
800
600
400
200
0
0
50
100
150
Ambient temperature (Ta) [°C]
Figure 3 Power Dissipation of Package (When Mounted on Board)
5
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Electrical Characteristics
Table 5 (1 / 2)
(Ta = +25°C, VDS = VDD − VSS = V1 + V2 + V3 + V4 + V5 unless otherwise specified)
Test
Circuit
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Detection Voltage
Ta = +25°C
VCUn
− 0.020
VCUn
VCUn
+ 0.020
VCUn
+ 0.030
VCLn
+ 0.050
VDLn
+ 0.080
VDUn
VCUn
VCUn
VCLn
VDLn
VDUn
0.7
V
V
V
V
V
V
1
1
1
1
1
1
V1 = V2 = V3 = V4 = V5 = VCU
−
−
0.05 V
Overcharge detection voltage n
(n = 1, 2, 3, 4, 5)
VCUn
Ta = 0°C to +60°C*1
V1 = V2 = V3 = V4 = V5 = VCU
0.05 V − 0.030
VCLn
Overcharge release voltage n
(n = 1, 2, 3, 4, 5)
VCLn
−
−
−
− 0.050
VDLn
− 0.080
VDUn
Overdischarge detection voltage n
(n = 1, 2, 3, 4, 5)
VDLn
Overdischarge release voltage n
(n = 1, 2, 3, 4, 5)
VDUn
V0INHn
− 0.100
+ 0.100
0 V battery detection voltage n
(n = 1, 2, 3, 4, 5)
With 0 V battery detection function
0.4
1.1
Delay Time Function*2
Overcharge detection
delay time
tCU
tDL
s
s
2
2
CCCT = 0.1 μF
CCDT = 0.1 μF
0.67
0.67
1.00
1.00
1.33
1.33
Overdischarge detection
delay time
CCT pin voltage
CDT pin voltage
Input Voltage
VCCT
VCDT
−
−
−
−
1.5
1.5
5.0
5.0
V
V
2
2
Fixed output voltage of CO pin and
DO pin
Operation voltage between
VDD pin and VSS pin
VDSOP
4
−
26
V
−
CTLC pin voltage "H"
CTLC pin voltage "L"
CTLD pin voltage "H"
CTLD pin voltage "L"
VCTLCH
VCTLCL
VCTLDH
VCTLDL
−
−
−
−
−
−
−
−
−
VDS − 0.8
V
V
V
V
3
3
3
3
VDS − 4.0
−
VDS − 4.0
−
VDS − 0.8
−
SEL1 pin voltage "H"
SEL2 pin voltage "H"
SEL1 pin voltage "L"
SEL2 pin voltage "L"
VSELH1
VSELH2
VSELL1
VSELL2
−
−
−
−
VDS × 0.8
−
−
−
−
−
V
V
V
V
3
3
3
3
VDS × 0.8
−
−
−
VDS × 0.2
VDS × 0.2
Output Voltage
CO pin voltage "H"
DO pin voltage "H"
Input Current
−
−
−
VCOH
VDOH
5.0
5.0
8.0
8.0
12.0
12.0
V
V
4
4
Current consumption
during operation
13
2.6
0.4
−
IOPE
IPDN
IVC1
V1 = V2 = V3 = V4 = V5 = 3.4 V
V1 = V2 = V3 = V4 = V5 = 1.6 V
−
−
22
4.5
0.8
1.0
−
μA
μA
μA
μA
μA
μA
μA
5
5
6
6
6
6
6
Current consumption
during power-down
V1 = V2 = V3 = V4 = V5 = 3.4 V,
V6 = V7 = VDS, V8 = V9 = 0 V
V1 = V2 = V3 = V4 = V5 = 3.4 V,
V6 = V7 = VDS, V8 = V9 = 0 V
V1 = V2 = V3 = V4 = V5 = 3.4 V,
V6 = V7 = VDS, V8 = V9 = 0 V
V1 = V2 = V3 = V4 = V5 = 3.4 V,
V6 = V7 = VDS, V8 = V9 = 0 V
V1 = V2 = V3 = V4 = V5 = 3.4 V,
V6 = V7 = VDS, V8 = V9 = 0 V
VC1 pin current
−
I
VC2 to
VC2 to VC5 pins current
VC6 pin current
−1.0
−3.0
0.4
0.4
IVC5
IVC6
ICTLCH
ICTLDH
−1.0
0.6
0.6
CTLC pin current "H"
0.8
0.8
CTLD pin current "H"
6
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Table 5 (2 / 2)
(Ta = +25°C, VDS = VDD − VSS = V1 + V2 + V3 + V4 + V5 unless otherwise specified)
Test
Circuit
Item
Symbol
ISELH1
ISELH2
ISELL1
Condition
Min.
Typ.
Max.
0.1
0.1
−
Unit
μA
μA
μA
μA
V1 = V2 = V3 = V4 = V5 = 3.4 V,
V6 = V7 = V8 = VDS, V9 = 0 V
V1 = V2 = V3 = V4 = V5 = 3.4 V,
V6 = V7 = V9 = VDS, V8 = 0 V
V1 = V2 = V3 = V4 = V5 = 3.4 V,
V6 = V7 = VDS, V8 = V9 = 0 V
V1 = V2 = V3 = V4 = V5 = 3.4 V,
V6 = V7 = VDS, V8 = V9 = 0 V
SEL1 pin current "H"
SEL2 pin current "H"
SEL1 pin current "L"
SEL1 pin current "L"
−
−
−
−
−
6
−
6
6
6
−0.1
−0.1
ISELL2
−
Output Current
−
−
CO pin source current
ICOH
ICOL
IDOH
IDOL
7
7
μA
μA
−
−
−
−10
CO pin sink current
DO pin source current
DO pin sink current
10
−
−
−
−
−
−
−10
μA
μA
7
7
10
−
*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
*2. Refer to "6. Delay time setting" in " Operation" for details of the delay time function.
7
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Test Circuits
1. Overcharge detection voltage (VCUn), overcharge release voltage (VCLn), overdischarge detection
voltage (VDLn), overdischarge release voltage (VDUn
(Test circuit 1)
)
VCU1 is defined as the voltage V1 when V1 is gradually increased and the CO pin output becomes detection status
after setting V1 = V2 = V3 = V4 = V5 = VCU − 0.05 V. After that, VCL1 is defined as the voltage V1 when V1 is
gradually decreased and the CO pin output becomes release status after setting V2 = V3 = V4 = V5 = 3.2 V.
Moreover, VDL1 is defined as the voltage V1 when V1 is gradually decreased and the DO pin output becomes
detection status after setting V1 = V2 = V3 = V4 = V5 = 3.5 V. After that, VDU1 is defined as the voltage V1 when V1
is gradually increased and the DO pin output becomes release status.
Similarly, VCUn, VCLn, VDLn and VDUn can be defined by changing Vn (n = 2 to 5).
2. 0 V battery detection voltage (V0INHn) (With 0 V battery detection function)
(Test circuit 1)
V0INH1 is defined as the voltage V1 when V1 is gradually decreased and the CO pin output becomes detection
status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.
Similarly, V0INHn can be defined by changing Vn (n = 2 to 5).
3. Overcharge detection delay time (tCU), overdischarge detection delay time (tDL)
(Test circuit 2)
tCU is defined as the time period from when V1 changes from 3.4 V to 4.5 V to when the CO pin output becomes
detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.
Moreover, tDL is defined as the time period from when V1 changes from 3.4 V to 1.6 V to when the DO pin output
becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.
4. CCT pin voltage (VCCT), CDT pin voltage (VCDT
(Test circuit 2)
)
VCCT is defined as the voltage between the CCT pin and the VSS pin during the time period when V1 changes from
3.4 V to 4.5 V to when the CO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.
Moreover, VCDT is defined as the voltage between the CDT pin and the VSS pin during the time period when V1
changes from 3.4 V to 1.6 V to when the DO pin output becomes detection status after setting V1 = V2 = V3 = V4 =
V5 = 3.4 V.
5. CTLC pin voltage "H" (VCTLCH), CTLC pin voltage "L" (VCTLCL), CTLD pin voltage "H" (VCTLDH), CTLD
pin voltage "L" (VCTLDL
(Test circuit 3)
)
VCTLCL is defined as the voltage V6 when V6 is gradually decreased and the CO pin output becomes detection
status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5), V8 = V9 = 0 V. After
that, VCTLCH is defined as the voltage V6 when V6 is gradually increased and the CO pin output becomes release
status. Moreover, VCTLDL is defined as the voltage V7 when V7 is gradually decreased and the DO pin output
becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5),
V8 = V9 = 0 V. After that, VCTLDH is defined as the voltage V7 when V7 is gradually increased and the DO pin output
becomes release status.
8
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
6. SEL1 pin voltage "H" (VSELH1), SEL2 pin voltage "H" (VSELH2), SEL1 pin voltage "L" (VSELL1), SEL2
pin voltage "L" (VSELL2
)
(Test circuit 3)
VSELH1 is defined as the voltage V8 when V8 is gradually increased and the DO pin output becomes release status
after setting V1 = V2 = V3 = V5 = 3.5 V, V4 = 0 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5), V8 = V9 = 0 V. After
that, VSELL1 is defined as the voltage V8 when V8 is gradually decreased and the DO pin output becomes detection
status.
Moreover, VSELH2 is defined as the voltage V9 when V9 is gradually increased and the DO pin output becomes
release status after setting V1 = V2 = V3 = V4 = 3.5 V, V5 = 0 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5), V8 =
V9 = 0 V. After that, VSELL2 is defined as the voltage V9 when V9 is gradually decreased and the DO pin output
becomes detection status.
7. CO pin voltage "H" (VCOH), DO pin voltage "H" (VDOH
(Test circuit 4)
)
VCOH is defined as the voltage between the CO pin and the VSS pin when V1 = V2 = V3 = V4 = V5 = 3.4 V.
DOH is defined as the voltage between the DO pin and the VSS pin when V1 = V2 = V3 = V4 = V5 = 3.4 V.
V
8. CO pin source current (ICOH), CO pin sink current (ICOL), DO pin source current (IDOH), DO pin sink
current (IDOL
)
(Test circuit 7)
ICOH is defined as the CO pin current when V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = VCOH − 0.5 V.
ICOL is defined as the CO pin current when V1 = 6.8 V, V2 = 0 V, V3 = V4 = V5 = 3.4 V, V6 = 0.5 V.
IDOH is defined as the DO pin current when V1 = V2 = V3 = V4 = V5 = 3.4 V, V7 = VDOH − 0.5 V.
IDOL is defined as the DO pin current when V1 = 6.8 V, V2 = 0 V, V3 = V4 = V5 = 3.4 V, V7 = 0.5 V.
9
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
1
2
16
CTLD VDD
VC1 15
1
VDD16
CTLD
15
14
13
12
11
10
CTLC
CTLC VC1
V1
V2
V3
V4
V5
V1
V2
V3
V4
V5
VC2
VC3
VC4
VC5
VC6
VSS
VC2
VC3
VC4
VC5
VC6
3 CO
4 DO
5 SEL1
6 SEL2
7 CDT
14
13
12
11
10
9
3 CO
4 DO
5 SEL1
6 SEL2
7 CDT
8 CCT
V
V
V
V
CCT
8
VSS 9
V
0.1 μF
0.1 F
Figure 4 Test Circuit 1
Figure 5 Test Circuit 2
1
VDD16
VC1 15
1
2
CTLD
CTLC
VDD
16
CTLD
15
14
13
12
11
10
9
CTLC VC1
V1
V1
V2
V3
V4
VC2
VC3
VC4
VC5
VC6
VSS
VC2
VC3
VC4
VC5
VC6
VSS
3 CO
4 DO
5 SEL1
6 SEL2
7 CDT
8 CCT
14
13
12
11
10
9
3 CO
4 DO
5 SEL1
6 SEL2
7 CDT
V2
V3
V4
V5
V5
V6 V7
V
V
V
1 MΩ
V
8
CCT
V8
V9
1 MΩ
Figure 6 Test Circuit 3
Figure 7 Test Circuit 4
IOPE, IPDN
1
2
16
CTLD VDD
1
2
VDD 16
VC1 15
CTLD
CTLC
A
VC1 15
VC2 14
VC3 13
CTLC
A
A
A
A
A
A
V1
V2
V3
V4
V5
V1
VC2
VC3
VC4
VC5
VC6
VSS
3 CO
4 DO
5 SEL1
6 SEL2 VC5
7 CDT
8 CCT
3 CO
4 DO
5 SEL1
6 SEL2
7 CDT
8 CCT
14
13
12
11
10
9
V2
V3
V4
V5
VC4
12
11
10
V
V
VC6
A A A A
VSS 9
V6
V8
V9
V7
Figure 8 Test Circuit 5
Figure 9 Test Circuit 6
1
2
VDD 16
VC1 15
CTLD
CTLC
V1
VC2
VC3
VC4
VC5
VC6
VSS
3 CO
4 DO
5 SEL1
6 SEL2
7 CDT
8 CCT
14
13
12
11
10
9
V2
V3
V4
V5
A
A
V6
V7
Figure 10 Test Circuit 7
10
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Operation
Remark Refer to " Connection Examples of Battery Monitoring IC".
1. Normal status
When the voltage of each of the batteries is in the range from overcharge detection voltage (VCUn) to overdischarge
detection voltage (VDLn), and the CTLC pin input voltage (VCTLC) and the CTLD pin input voltage (VCTLD) are higher
than the CTLC pin voltage "H" (VCTLCH) and the CTLD pin voltage "H" (VCTLDH), respectively, the S-8225A Series
defines each of the CO pin output voltage (VCO) and the DO pin output voltage (VDO) as "H". This is called normal
status.
VCO is defined as the CO pin voltage "H" (VCOH) when it is "H". Similarly, VDO is defined as the DO pin voltage "H"
(VDOH) when it is "H".
Caution When the battery is connected for the first time, the S-8225A Series returns to normal status if the
voltage of each of the batteries is in the range from overcharge release voltage (VCLn) to
overdischarge release voltage (VDUn).
2. Overcharge status
When the voltage of one of the batteries becomes VCUn or higher, the CO pin output inverts and the S-8225A Series
becomes detection status. This is called overcharge status.
When the voltage of each of the batteries becomes overcharge release voltage (VCLn) or lower, the overcharge status
is released and the S-8225A Series returns to normal status.
3. Overdischarge status
When the voltage of one of the batteries becomes VDLn or lower, the DO pin output inverts and the S-8225A Series
becomes detection status. This is called overdischarge status.
When the voltage of each of the batteries becomes overdischarge release voltage (VDUn) or higher, the overdischarge
status is released and the S-8225A Series returns to normal status.
11
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
4. CTLC pin and CTLD pin
The S-8225A Series has two pins to control.
The CTLC pin controls the output voltage from the CO pin; the CTLD pin controls the output voltage from the DO pin.
Thus it is possible for users to control the output voltages from the CO pin and DO pin, respectively. These controls
precede the battery protection circuit.
Table 6 Status Set by CTLC Pin
CTLC Pin
CO Pin
Normal status*4
VSS
"H"*1
Open*2
"L"*3
VSS
*1. "H": CTLC ≥ VCTLCH
*2. Pulled down by ICTLCH
*3. "L": CTLC ≤ VCTLCL
*4. The status is controlled by the voltage detection circuit.
Table 7 Status Set by CTLD Pin
CTLD Pin
DO Pin
Normal status*4
VSS
"H"*1
Open*2
"L"*3
VSS
*1. "H": CTLD ≥ VCTLDH
*2. Pulled down by ICTLDH
*3. "L": CTLD ≤ VCTLDL
*4. The status is controlled by the voltage detection circuit.
Caution When the power supply fluctuates, unexpected behavior might occur if an electrical potential is
generated between the potentials of "H" level input to the CTLC / CTLD pins and IC's VDD by
external filters.
5. 0 V battery detection function
In the S-8225A Series, users are able to select a 0 V battery detection function.
If this optional function is selected, the CO pin becomes detection status when the voltage of one of the batteries
becomes 0 V battery detection voltage (V0INHn) or lower.
12
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
6. Delay time setting
When the voltage of one of the batteries becomes VCUn or higher, the S-8225A Series charges the capacitor
connected to the CCT pin rapidly up to the CCT pin voltage (VCCT). After that, The S-8225A Series discharges the
capacitor with the constant current of 100 nA, and the CO pin output is defined as detection status at the time when
the CCT pin voltage falls to a certain level or lower. The overcharge detection delay time (tCU) changes depending on
the capacitor connected to the CCT pin.
tCU is calculated by the following formula.
Min. Typ. Max.
tCU [s] = (6.7, 10, 13.3) × CCCT [μF]
Similarly, the overdischarge detection delay time (tDL) changes depending on the capacitor connected to the CDT pin.
t
DL is calculated by the following formula.
Min. Typ. Max.
tDL [s] = (6.7, 10, 13.3) × CCDT [μF]
Since the S-8225A Series charges the capacitor for delay rapidly, the voltage of the CCT pin and the CDT pin
becomes large if the capacitance value is small. As a result, a variation between the calculated value of the delay
time and the actual delay time is generated.
If the capacitance value is so large that the rapid charging can not be finished within the internal delay time, the
output pin becomes detection status simultaneously with the end of internal delay time.
In addition, the charging current to the capacitor for delay passes through the VDD pin. Therefore, a large resistor
connected to the VDD pin results in a big drop of the power supply voltage at the time of rapid charging which causes
malfunction.
Regarding the recommended values for external components, refer to "Table 9 Constants for External
Components".
7. SEL pin
In the S-8225A Series, switchable monitoring control between 3-cell to 5-cell is possible by using the SEL1 pin and
the SEL2 pin. For example, since the overdischarge detection of V4 or V5 is prohibited and the overdischarge is not
detected even if V4 or V5 is shorted when the SEL1 pin is "H" and the SEL2 pin is "L", the S-8225A Series can be
used for 3-cell monitoring.
Be sure to use the SEL1 pin and the SEL2 pin at "H" or "L" potential.
Table 8 Settings of SEL1 Pin and SEL2 Pin
SEL1 pin
SEL2 pin
Setting
Prohibition
"H"*1
"H"*1
"L"*2
"L"*2
"H"*1
"L"*2
"H"*1
"L"*2
3-cell monitoring
4-cell monitoring
5-cell monitoring
*1. "H": SEL1 ≥ VSELH1 and SEL2 ≥ VSELH2
*2. "L": SEL1 ≤ VSELL1 and SEL2 ≤ VSELL2
13
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Timing Charts
1. Overcharge detection and overdischarge detection
VCUn
VCLn
Battery voltage
VDUn
VDLn
(n = 1 to 5)
VCOH
CO pin voltage
VSS
VDOH
DO pin voltage
VSS
Charger connection
Load connection
Overdischarge detection delay time (tDL)
(1) (3) (1)
Overcharge detection delay time (tCU
(1)
)
Status*1
(2)
*1. (1): Normal status
(2): Overcharge status
(3): Overdischarge status
Figure 11
14
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
2. Overcharge detection delay
VCUn
(n = 1 to 5)
Battery voltage
VCOH
CO pin voltage
VSS
CCT pin voltage
VCCT
VSS
Charger connection
Less than tCU
(1)
tCU
(2)
Status*1
*1. (1): Normal status
(2): Overcharge status
Figure 12
15
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
3. Overdischarge detection delay
(n = 1 to 5)
Battery voltage
VDLn
VDOH
DO pin voltage
VSS
CDT pin voltage
VCDT
VSS
Load connection
Less than tDL
(1)
tDL
(2)
Status*1
*1. (1): Normal status
(2): Overdischarge status
Figure 13
16
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Connection Examples of Battery Monitoring IC
1. 10-serial cell
EB+
RVDD1
CVDS1
CVDD1
1 CTLD
VDD 16
VC1 15
VC2 14
VC3 13
VC4 12
VC5 11
VC6 10
VSS 9
RCTLD
RVC11
RVC21
RVC31
RVC41
RVC51
RVC61
2 CTLC
RCTLC
CVC11
CVC21
CVC31
CVC41
CVC51
CVC61
3 CO
4 DO
RSEL11
RSEL21
S-8225A
5 SEL1
6 SEL2
7 CDT
8 CCT
CCDT1
CCCT1
RIFC
RIFD
CIFC
CIFD
RVDD2
CVDS2
1 CTLD
2 CTLC
3 CO
VDD 16
VC1 15
VC2 14
VC3 13
VC4 12
VC5 11
VC6 10
VSS 9
CVDD2
RVC12
RVC22
RVC32
RVC42
RVC52
RVC62
CVC12
CVC22
CVC32
CVC42
CVC52
CVC62
4 DO
RSEL12
RSEL22
S-8225A
5 SEL1
6 SEL2
7 CDT
8 CCT
OD
OC
CCDT2
CCCT2
EB−
Remark Regarding the recommended values for external components, refer to "Table 9 Constants for External
Components".
Figure 14
17
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
2. 9-serial cell
EB+
RVDD1
CVDS1
1 CTLD
2 CTLC
3 CO
VDD 16
VC1 15
VC2 14
VC3 13
VC4 12
VC5 11
VC6 10
RCTLD
RCTLC
RVC11
RVC21
RVC31
RVC41
RVC51
CVDD1
CVC11
CVC21
CVC31
CVC41
CVC51
CVC61
4 DO
RSEL11
RSEL21
S-8225A
5 SEL1
6 SEL2
7 CDT
8 CCT
RVC61
CCDT1
CCCT1
RIFC
VSS
9
RIFD
CIFC
CIFD
RVDD2
CVDS2
1 CTLD
2 CTLC
3 CO
VDD 16
VC1 15
VC2 14
VC3 13
VC4 12
VC5 11
VC6 10
CVDD2
RVC12
RVC22
RVC32
RVC42
RVC52
CVC12
CVC22
CVC32
CVC42
CVC52
4 DO
RSEL12
RSEL22
S-8225A
5 SEL1
6 SEL2
7 CDT
8 CCT
OD
OC
CCDT2
CCCT2
VSS
9
EB−
Remark Regarding the recommended values for external components, refer to "Table 9 Constants for External
Components".
Figure 15
18
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
3. 7-serial cell
EB+
RVDD1
CVDS1
1 CTLD
2 CTLC
3 CO
VDD 16
VC1 15
VC2 14
VC3 13
VC4 12
VC5 11
VC6 10
RCTLD
RCTLC
RVC11
RVC21
RVC31
RVC41
RVC51
CVDD1
CVC11
CVC21
CVC31
CVC41
CVC51
4 DO
RSEL11
RSEL21
S-8225A
5 SEL1
6 SEL2
7 CDT
8 CCT
CCDT1
CCCT1
RIFC
VSS
9
RIFD
CIFC
CIFD
RVDD2
CVDS2
1 CTLD
2 CTLC
3 CO
VDD 16
VC1 15
VC2 14
VC3 13
VC4 12
VC5 11
VC6 10
CVDD2
RVC12
RVC22
RVC32
RVC42
CVC12
CVC22
CVC32
CVC42
4 DO
RSEL12
RSEL22
S-8225A
5 SEL1
6 SEL2
7 CDT
8 CCT
OD
OC
CCDT2
CCCT2
VSS
9
EB−
Remark Regarding the recommended values for external components, refer to "Table 9 Constants for External
Components".
Figure 16
19
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Table 9 Constants for External Components
Symbol
RVDD1, RVDD2
Min.
50
Typ.
100
1
Max.
Unit
Ω
1000
RVCn1, RVCn2
CVDS1, CVDS2
CVDD1, CVDD2
CVCn1, CVCn2
CCCT1, CCCT2
CCDT1, CCDT2
RIFC, RIFD
0.5
0.01
−
0.01
0.001
0.001
−
−
−
0.5
2
1
kΩ
μF
μF
μF
μF
μF
MΩ
pF
kΩ
kΩ
kΩ
0.1
0
1
0.1
0.1
0.1
5.1
1000
1
1
0.22
0.22
−
−
−
CIFC, CIFD
RCTLC, RCTLD
RSEL11, RSEL21
RSEL12, RSEL22
1
−
−
0.5
1
Caution 1. The constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the
connection examples. In addition, the connection examples and the constants do not guarantee
proper operation. Perform thorough evaluation using the actual application to set the constants.
3. RVC1 to RVC6 and CVC1 to CVC6 should be the same constant, respectively.
4. Set up RVCn and CVCn as RVCn × CVCn ≥ 50 × 10-6.
5. Set up RVDD and CVDS as 5 × 10-6 ≤ RVDD × CVDS ≤ 100 × 10-6.
6. Set (RVDD × CVDS) / (RVCn × CVCn) = 0.1.
Remark n = 1 to 6
20
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Precautions
•
•
•
•
The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
If both an overcharge battery and an overdischarge battery are included among the whole batteries, the condition is
set in overcharge status and overdischarge status. Therefore either charging or discharging is impossible.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
21
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
Characteristics (Typical Data)
1. Detection voltage
1. 1 VCU vs. Ta
1. 2 VCL vs. Ta
VCU = 4.225 V
VCL = 4.125 V
4.250
4.240
4.230
4.220
4.210
4.200
4.180
4.140
4.100
4.060
−40 −25
0
25
50
75 85
−40 −25
0
25
50
75 85
Ta [C]
Ta [C]
1. 3 VDL vs. Ta
1. 4 VDU vs. Ta
VDL = 2.30 V
VDU = 2.50 V
2.38
2.34
2.30
2.26
2.22
2.60
2.55
2.50
2.45
2.40
−40 −25
0
25
50
75 85
−40 −25
0
25
50
75 85
Ta [C]
Ta [C]
2. Current consumption
2. 1 IOPE vs. Ta
2. 2 IPDN vs. Ta
VDD = 17.0 V
VDD = 8.0 V
20
15
10
5
4.0
3.0
2.0
1.0
0
0
−40 −25
0
25
50
75 85
−40 −25
0
25
50
75 85
Ta [C]
Ta [C]
2. 3 IOPE vs. VDD
Ta = +25°C
50
40
30
20
10
0
0
5
10
15
20
25
30
V
DD [V]
22
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.2.0_00
3. Delay time
3. 1 tCU vs. Ta
3. 2 tDL vs. Ta
VDD = 18.1 V
VDD = 15.2 V
2.0
1.5
1.0
0.5
0
2.0
1.5
1.0
0.5
0
−40 −25
0
25
50
75 85
−40 −25
0
25
50
75 85
Ta [C]
Ta [C]
4. Output current
4. 1 ICOL vs. VDD
4. 2 ICOH vs. VDD
Ta = +25°C
Ta = +25°C
500
400
300
200
100
0
−20
−40
−60
0
0
−80
5
10
15
20
25
30
0
5
10
15
20
25
30
V
DD [V]
V
DD [V]
4. 3 IDOL vs. VDD
4. 4 IDOH vs. VDD
Ta = +25°C
Ta = +25°C
500
400
300
200
100
0
−20
−40
−60
0
0
−80
5
10
15
20
25
30
0
5
10
15
20
25
30
V
DD [V]
V
DD [V]
5. Output voltage
5. 1 VCOH vs. VDD
5. 2 VDOH vs. VDD
Ta = +25°C, VCU = 4.225 V
Without 0 V battery detection function
Ta = +25°C, VDL = 2.30 V
12
10
8
12
10
8
6
6
4
4
2
2
0
0
0
0
5
10
15
20
25
30
5
10
15
20
25
30
V
DD [V]
V
DD [V]
23
5.1±0.2
16
9
8
1
0.17±0.05
0.22±0.08
0.65
No. FT016-A-P-SD-1.2
TITLE
TSSOP16-A-PKG Dimensions
FT016-A-P-SD-1.2
No.
ANGLE
mm
UNIT
ABLIC Inc.
+0.1
-0
4.0±0.1
ø1.5
0.3±0.05
2.0±0.1
8.0±0.1
1.5±0.1
ø1.6±0.1
(7.2)
4.2±0.2
+0.4
-0.2
6.5
1
16
8
9
Feed direction
No. FT016-A-C-SD-1.1
TITLE
TSSOP16-A-Carrier Tape
FT016-A-C-SD-1.1
No.
ANGLE
mm
UNIT
ABLIC Inc.
21.4±1.0
17.4±1.0
+2.0
-1.5
17.4
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.2
No. FT016-A-R-S1-1.0
TITLE
No.
TSSOP16-A- Reel
FT016-A-R-S1-1.0
ANGLE
UNIT
4,000
QTY.
mm
ABLIC Inc.
Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
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life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
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aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
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described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
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14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
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