S-8225AAK-TCT1U_技术文档

S-8225A Series

BATTERY MONITORING IC

FOR 3-SERIAL TO 5-SERIAL CELL PACK

www.ablic.com

Rev.2.0_00

The S-8225A Series includes high-accuracy voltage detection circuits and delay circuits, and can monitor the status of

3-serial to 5-serial cell lithium-ion rechargeable battery in single use. By switching the voltage level which is applied to the

SEL1 pin and SEL2 pin, users are able to use the S-8225A Series for 3-serial to 5-serial cell pack.

By cascade connection using the S-8225A Series, it is also possible to protect 6-serial or more cells lithium-ion rechargeable

battery pack.

 Features

• High-accuracy voltage detection function for each cell

Overcharge detection voltage n (n = 1 to 5)

3.500 V to 4.400 V (50 mV step)

Accuracy 20 mV (Ta = +25°C), 30 mV (Ta = 0°C to +60°C)

Overcharge release voltage n (n = 1 to 5)

Overdischarge detection voltage n (n = 1 to 5)

Overdischarge release voltage n (n = 1 to 5)

3.300 V to 4.400 V^*1

Accuracy 50 mV

2.000 V to 3.200 V (100 mV step) Accuracy 80 mV

2.100 V to 3.400 V^*2

Accuracy 100 mV

• Overcharge detection delay time and overdischarge detection delay time can be set by external capacitor.

• Switchable between 3-serial to 5-serial cell by using the SEL1 pin and the SEL2 pin

• Cascade connection is available.

• The CO pin and the DO pin are controlled by the CTLC pin and the CTLD pin, respectively.

• Output voltage of the CO pin and the DO pin is limited to 12 V max.

• High-withstand voltage

Absolute maximum rating: 28 V

• Wide operation voltage range

• Wide operation temperature range

• Low current consumption

4 V to 26 V

Ta = −40°C to +85°C

During operation (V1 = V2 = V3 = V4 = V5 = 3.4 V)

22 μA max. (Ta = +25°C)

During power-down (V1 = V2 = V3 = V4 = V5 = 1.6 V) 4.5 μA max. (Ta = +25°C)

• Lead-free (Sn 100%), halogen-free

*1. Overcharge hysteresis voltage n (n = 1 to 5) is selectable in 0 V, or in 0.1 V to 0.4 V in 50 mV step.

(Overcharge hysteresis voltage = Overcharge detection voltage − Overcharge release voltage)

*2. Overdischarge hysteresis voltage n (n = 1 to 5) is selectable in 0 V to 0.7 V in 100 mV step.

(Overdischarge hysteresis voltage = Overdischarge release voltage − Overdischarge detection voltage)

 Application

• Lithium-ion rechargeable battery pack

 Package

• 16-Pin TSSOP

1

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Block Diagram

VDD

CTLD

Control circuit

CTLC

Delay circuit

VC1

VC2

VC3

VC4

VC5

VC6

VSS

Overcharge 1

CO pin output voltage

−

limit circuit

Over-

discharge 1

+

−

CO

Overcharge 2

−

+

Over-

discharge 2

DO pin output voltage

limit circuit

+

−

Overcharge 3

−

DO

+

Over-

discharge 3

+

−

Overcharge 4

−

+

Over-

discharge 4

+

−

SEL1

Overcharge 5

−

+

Over-

discharge 5

+

−

SEL2

CDT

CCT

Remark Diodes in the figure are parasitic diodes.

Figure 1

2

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Product Name Structure

1. Product name

S-8225A xx

-

TCT1

U

Environmental code

U:

Lead-free (Sn 100%), halogen-free

Package abbreviation and IC packing specifications^*1

TCT1: 16-Pin TSSOP, Tape

Serial code^*2

Sequentially set from AA to ZZ

*1. Refer to the tape drawing.

*2. Refer to "3. Product name list".

2. Package

Table 1 Package Drawing Codes

Package Name

16-Pin TSSOP

Dimension

Tape

Reel

FT016-A-P-SD

FT016-A-C-SD

FT016-A-R-S1

3. Product name list

Table 2

Overcharge

Overdischarge

0 V Battery

Detection

Function

Product Name

Detection Voltage Release Voltage Detection Voltage Release Voltage

[V_CU[V_CL[V_DL[V_DU

]

S-8225AAA-TCT1U

S-8225AAB-TCT1U

S-8225AAC-TCT1U

S-8225AAD-TCT1U

S-8225AAE-TCT1U

S-8225AAF-TCT1U

S-8225AAG-TCT1U

S-8225AAH-TCT1U

S-8225AAI-TCT1U

S-8225AAJ-TCT1U

S-8225AAK-TCT1U

S-8225AAM-TCT1U

4.225 V

4.400 V

4.250 V

4.350 V

4.225 V

4.215 V

4.250 V

4.150 V

4.200 V

3.900 V

4.275 V

4.220 V

4.125 V

4.300 V

4.150 V

4.350 V

4.125 V

4.155 V

4.250 V

4.000 V

4.150 V

3.500 V

4.175 V

4.120 V

2.300 V

2.500 V

2.300 V

2.800 V

2.500 V

2.500V

2.000 V

2.600 V

2.500 V

3.000 V

2.700 V

3.000 V

2.700 V

3.000 V

2.550 V

2.700 V

2.800 V

3.000 V

Available

Unavailable

Available

Unavailable

Available

Remark Please contact our sales representatives for products other than the above.

3

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Pin Configuration

1. 16-Pin TSSOP

Top view

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Figure 2

Table 3

Pin No.

Symbol

CTLD

Description

1

2

3

4

5

6

7

8

DO control pin

CO control pin

CTLC

CO

Output pin for overcharge detection

Output pin for overdischarge detection

DO

SEL1

SEL2

CDT

CCT

Switching pins for 3-serial to 5-serial cell^*1

Capacitor connection pin for delay for overdischarge detection voltage

Capacitor connection pin for delay for overcharge detection voltage

Input pin for negative power supply,

9

VSS

VC6

VC5

connection pin for negative voltage of battery 5

Connection pin for negative voltage of battery 5

Connection pin for negative voltage of battery 4,

connection pin for positive voltage of battery 5

Connection pin for negative voltage of battery 3,

connection pin for positive voltage of battery 4

Connection pin for negative voltage of battery 2,

connection pin for positive voltage of battery 3

Connection pin for negative voltage of battery 1,

connection pin for positive voltage of battery 2

Connection pin for positive voltage of battery 1

Input pin for positive power supply,

10

11

12

13

VC4

VC3

14

15

16

VC2

VC1

VDD

connection pin for positive voltage of battery 1

*1. Refer to "7. SEL pin" in " Operation" for setting of the SEL1 pin and the SEL2 pin.

4

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Absolute Maximum Ratings

Table 4

(Ta = +25°C unless otherwise specified)

Item

Symbol

Applied Pin

Absolute Maximum Rating

Unit

Input voltage between

VDD pin and VSS pin

V_DS

VDD

V_SS− 0.3 to V_SS+ 28

V

VC1, VC2, VC3, VC4, VC5, VC6,

Input pin voltage

V_IN

SEL1, SEL2, CTLC, CTLD,

V_SS− 0.3 to V_DD+ 0.3

V

CCT, CDT

Output pin voltage

Power dissipation

V_OUT

P_D

DO, CO

V_SS− 0.3 to V_DD+ 0.3

1100^*1

V

mW

°C

−

Operation ambient temperature T_opr

−40 to +85

−40 to +125

Storage temperature

T_stg

°C

*1. When mounted on board

[Mounted board]

(1) Board size:

114.3 mm × 76.2 mm × t1.6 mm

(2) Board name:

JEDEC STANDARD51-7

Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical

damage. These values must therefore not be exceeded under any conditions.

1200

1000

800

600

400

200

0

50

100

150

Ambient temperature (Ta) [°C]

Figure 3 Power Dissipation of Package (When Mounted on Board)

5

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Electrical Characteristics

Table 5 (1 / 2)

(Ta = +25°C, V_DS= V_DD− V_SS= V1 + V2 + V3 + V4 + V5 unless otherwise specified)

Test

Circuit

Item

Symbol

Condition

Min.

Typ.

Max.

Unit

Detection Voltage

Ta = +25°C

V_CUn

− 0.020

V_CUn

+ 0.020

V_CUn

+ 0.030

V_CLn

+ 0.050

V_DLn

+ 0.080

V_DUn

V_CUn

V_CLn

V_DLn

V_DUn

0.7

V

1

V1 = V2 = V3 = V4 = V5 = V_CU

−

0.05 V

Overcharge detection voltage n

(n = 1, 2, 3, 4, 5)

V_CUn

Ta = 0°C to +60°C^*1

V1 = V2 = V3 = V4 = V5 = V_CU

0.05 V − 0.030

V_CLn

Overcharge release voltage n

(n = 1, 2, 3, 4, 5)

V_CLn

−

− 0.050

V_DLn

− 0.080

V_DUn

Overdischarge detection voltage n

(n = 1, 2, 3, 4, 5)

V_DLn

Overdischarge release voltage n

(n = 1, 2, 3, 4, 5)

V_DUn

V_0INHn

− 0.100

+ 0.100

0 V battery detection voltage n

(n = 1, 2, 3, 4, 5)

With 0 V battery detection function

0.4

1.1

Delay Time Function^*2

Overcharge detection

delay time

t_CU

t_DL

s

2

C_CCT= 0.1 μF

C_CDT= 0.1 μF

0.67

1.00

1.33

Overdischarge detection

delay time

CCT pin voltage

CDT pin voltage

Input Voltage

V_CCT

V_CDT

−

1.5

5.0

V

2

Fixed output voltage of CO pin and

DO pin

Operation voltage between

VDD pin and VSS pin

V_DSOP

4

−

26

V

−

CTLC pin voltage "H"

CTLC pin voltage "L"

CTLD pin voltage "H"

CTLD pin voltage "L"

V_CTLCH

V_CTLCL

V_CTLDH

V_CTLDL

−

V_DS− 0.8

V

3

V_DS− 4.0

−

V_DS− 4.0

−

V_DS− 0.8

−

SEL1 pin voltage "H"

SEL2 pin voltage "H"

SEL1 pin voltage "L"

SEL2 pin voltage "L"

V_SELH1

V_SELH2

V_SELL1

V_SELL2

−

V_DS× 0.8

−

V

3

V_DS× 0.8

−

V_DS× 0.2

Output Voltage

CO pin voltage "H"

DO pin voltage "H"

Input Current

−

V_COH

V_DOH

5.0

8.0

12.0

V

4

Current consumption

during operation

13

2.6

0.4

−

I_OPE

I_PDN

I_VC1

V1 = V2 = V3 = V4 = V5 = 3.4 V

V1 = V2 = V3 = V4 = V5 = 1.6 V

−

22

4.5

0.8

1.0

−

μA

5

6

Current consumption

during power-down

V1 = V2 = V3 = V4 = V5 = 3.4 V,

V6 = V7 = V_DS, V8 = V9 = 0 V

V1 = V2 = V3 = V4 = V5 = 3.4 V,

V6 = V7 = V_DS, V8 = V9 = 0 V

V1 = V2 = V3 = V4 = V5 = 3.4 V,

V6 = V7 = V_DS, V8 = V9 = 0 V

V1 = V2 = V3 = V4 = V5 = 3.4 V,

V6 = V7 = V_DS, V8 = V9 = 0 V

V1 = V2 = V3 = V4 = V5 = 3.4 V,

V6 = V7 = V_DS, V8 = V9 = 0 V

VC1 pin current

−

I

_VC2to

VC2 to VC5 pins current

VC6 pin current

−1.0

−3.0

0.4

I_VC5

I_VC6

I_CTLCH

I_CTLDH

−1.0

0.6

CTLC pin current "H"

0.8

CTLD pin current "H"

6

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

Table 5 (2 / 2)

(Ta = +25°C, V_DS= V_DD− V_SS= V1 + V2 + V3 + V4 + V5 unless otherwise specified)

Test

Circuit

Item

Symbol

I_SELH1

I_SELH2

I_SELL1

Condition

Min.

Typ.

Max.

0.1

−

Unit

μA

V1 = V2 = V3 = V4 = V5 = 3.4 V,

V6 = V7 = V8 = V_DS, V9 = 0 V

V1 = V2 = V3 = V4 = V5 = 3.4 V,

V6 = V7 = V9 = V_DS, V8 = 0 V

V1 = V2 = V3 = V4 = V5 = 3.4 V,

V6 = V7 = V_DS, V8 = V9 = 0 V

V1 = V2 = V3 = V4 = V5 = 3.4 V,

V6 = V7 = V_DS, V8 = V9 = 0 V

SEL1 pin current "H"

SEL2 pin current "H"

SEL1 pin current "L"

−

6

−

6

−0.1

I_SELL2

−

Output Current

−

CO pin source current

I_COH

I_COL

I_DOH

I_DOL

7

μA

−

−10

CO pin sink current

DO pin source current

DO pin sink current

10

−

−10

μA

7

10

−

*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed

by design, not tested in production.

*2. Refer to "6. Delay time setting" in " Operation" for details of the delay time function.

7

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Test Circuits

1. Overcharge detection voltage (V_CUn), overcharge release voltage (V_CLn), overdischarge detection

voltage (V_DLn), overdischarge release voltage (V_DUn

(Test circuit 1)

)

V_CU1is defined as the voltage V1 when V1 is gradually increased and the CO pin output becomes detection status

after setting V1 = V2 = V3 = V4 = V5 = V_CU− 0.05 V. After that, V_CL1is defined as the voltage V1 when V1 is

gradually decreased and the CO pin output becomes release status after setting V2 = V3 = V4 = V5 = 3.2 V.

Moreover, V_DL1is defined as the voltage V1 when V1 is gradually decreased and the DO pin output becomes

detection status after setting V1 = V2 = V3 = V4 = V5 = 3.5 V. After that, V_DU1is defined as the voltage V1 when V1

is gradually increased and the DO pin output becomes release status.

Similarly, V_CUn, V_CLn, V_DLnand V_DUncan be defined by changing Vn (n = 2 to 5).

2. 0 V battery detection voltage (V_0INHn) (With 0 V battery detection function)

(Test circuit 1)

V_0INH1is defined as the voltage V1 when V1 is gradually decreased and the CO pin output becomes detection

status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.

Similarly, V_0INHncan be defined by changing Vn (n = 2 to 5).

3. Overcharge detection delay time (t_CU), overdischarge detection delay time (t_DL)

(Test circuit 2)

t_CUis defined as the time period from when V1 changes from 3.4 V to 4.5 V to when the CO pin output becomes

detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.

Moreover, t_DLis defined as the time period from when V1 changes from 3.4 V to 1.6 V to when the DO pin output

becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.

4. CCT pin voltage (V_CCT), CDT pin voltage (V_CDT

(Test circuit 2)

)

V_CCTis defined as the voltage between the CCT pin and the VSS pin during the time period when V1 changes from

3.4 V to 4.5 V to when the CO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.

Moreover, V_CDTis defined as the voltage between the CDT pin and the VSS pin during the time period when V1

changes from 3.4 V to 1.6 V to when the DO pin output becomes detection status after setting V1 = V2 = V3 = V4 =

V5 = 3.4 V.

5. CTLC pin voltage "H" (V_CTLCH), CTLC pin voltage "L" (V_CTLCL), CTLD pin voltage "H" (V_CTLDH), CTLD

pin voltage "L" (V_CTLDL

(Test circuit 3)

)

V_CTLCLis defined as the voltage V6 when V6 is gradually decreased and the CO pin output becomes detection

status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = V_DS(= V1 + V2 + V3 + V4 + V5), V8 = V9 = 0 V. After

that, V_CTLCHis defined as the voltage V6 when V6 is gradually increased and the CO pin output becomes release

status. Moreover, V_CTLDLis defined as the voltage V7 when V7 is gradually decreased and the DO pin output

becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = V_DS(= V1 + V2 + V3 + V4 + V5),

V8 = V9 = 0 V. After that, V_CTLDHis defined as the voltage V7 when V7 is gradually increased and the DO pin output

becomes release status.

8

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

6. SEL1 pin voltage "H" (V_SELH1), SEL2 pin voltage "H" (V_SELH2), SEL1 pin voltage "L" (V_SELL1), SEL2

pin voltage "L" (V_SELL2

)

(Test circuit 3)

V_SELH1is defined as the voltage V8 when V8 is gradually increased and the DO pin output becomes release status

after setting V1 = V2 = V3 = V5 = 3.5 V, V4 = 0 V, V6 = V7 = V_DS(= V1 + V2 + V3 + V4 + V5), V8 = V9 = 0 V. After

that, V_SELL1is defined as the voltage V8 when V8 is gradually decreased and the DO pin output becomes detection

status.

Moreover, V_SELH2is defined as the voltage V9 when V9 is gradually increased and the DO pin output becomes

release status after setting V1 = V2 = V3 = V4 = 3.5 V, V5 = 0 V, V6 = V7 = V_DS(= V1 + V2 + V3 + V4 + V5), V8 =

V9 = 0 V. After that, V_SELL2is defined as the voltage V9 when V9 is gradually decreased and the DO pin output

becomes detection status.

7. CO pin voltage "H" (V_COH), DO pin voltage "H" (V_DOH

(Test circuit 4)

)

V_COHis defined as the voltage between the CO pin and the VSS pin when V1 = V2 = V3 = V4 = V5 = 3.4 V.

_DOHis defined as the voltage between the DO pin and the VSS pin when V1 = V2 = V3 = V4 = V5 = 3.4 V.

V

8. CO pin source current (I_COH), CO pin sink current (I_COL), DO pin source current (I_DOH), DO pin sink

current (I_DOL

)

(Test circuit 7)

I_COHis defined as the CO pin current when V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V_COH− 0.5 V.

I_COLis defined as the CO pin current when V1 = 6.8 V, V2 = 0 V, V3 = V4 = V5 = 3.4 V, V6 = 0.5 V.

I_DOHis defined as the DO pin current when V1 = V2 = V3 = V4 = V5 = 3.4 V, V7 = V_DOH− 0.5 V.

I_DOLis defined as the DO pin current when V1 = 6.8 V, V2 = 0 V, V3 = V4 = V5 = 3.4 V, V7 = 0.5 V.

9

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

1

2

16

CTLD VDD

VC1 15

1

2

VDD16

CTLD

15

14

13

12

11

10

CTLC

CTLC VC1

V1

V2

V3

V4

V5

V1

V2

V3

V4

V5

VC2

VC3

VC4

VC5

VC6

VSS

VC2

VC3

VC4

VC5

VC6

3 CO

4 DO

5 SEL1

6 SEL2

7 CDT

14

13

12

11

10

9

3 CO

4 DO

5 SEL1

6 SEL2

7 CDT

8 CCT

V

CCT

8

VSS 9

V

0.1 μF

V

0.1

μ

F

Figure 4 Test Circuit 1

Figure 5 Test Circuit 2

1

2

VDD16

VC1 15

1

2

CTLD

CTLC

VDD

16

CTLD

15

14

13

12

11

10

9

CTLC VC1

V1

V2

V3

V4

VC2

VC3

VC4

VC5

VC6

VSS

VC2

VC3

VC4

VC5

VC6

VSS

3 CO

4 DO

5 SEL1

6 SEL2

7 CDT

8 CCT

14

13

12

11

10

9

3 CO

4 DO

5 SEL1

6 SEL2

7 CDT

V2

V3

V4

V5

V6 V7

V

1 MΩ

V

8

CCT

V8

V9

1 MΩ

Figure 6 Test Circuit 3

Figure 7 Test Circuit 4

I_OPE, I_PDN

1

2

16

CTLD VDD

1

2

VDD 16

VC1 15

CTLD

CTLC

A

VC1 15

VC2 14

VC3 13

CTLC

A

V1

V2

V3

V4

V5

V1

VC2

VC3

VC4

VC5

VC6

VSS

3 CO

4 DO

5 SEL1

6 SEL2 VC5

7 CDT

8 CCT

3 CO

4 DO

5 SEL1

6 SEL2

7 CDT

8 CCT

14

13

12

11

10

9

V2

V3

V4

V5

VC4

12

11

10

V

VC6

A A A A

VSS 9

V6

V8

V9

V7

Figure 8 Test Circuit 5

Figure 9 Test Circuit 6

1

2

VDD 16

VC1 15

CTLD

CTLC

V1

VC2

VC3

VC4

VC5

VC6

VSS

3 CO

4 DO

5 SEL1

6 SEL2

7 CDT

8 CCT

14

13

12

11

10

9

V2

V3

V4

V5

A

V6

V7

Figure 10 Test Circuit 7

10

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Operation

Remark Refer to " Connection Examples of Battery Monitoring IC".

1. Normal status

When the voltage of each of the batteries is in the range from overcharge detection voltage (V_CUn) to overdischarge

detection voltage (V_DLn), and the CTLC pin input voltage (V_CTLC) and the CTLD pin input voltage (V_CTLD) are higher

than the CTLC pin voltage "H" (V_CTLCH) and the CTLD pin voltage "H" (V_CTLDH), respectively, the S-8225A Series

defines each of the CO pin output voltage (V_CO) and the DO pin output voltage (V_DO) as "H". This is called normal

status.

V_COis defined as the CO pin voltage "H" (V_COH) when it is "H". Similarly, V_DOis defined as the DO pin voltage "H"

(V_DOH) when it is "H".

Caution When the battery is connected for the first time, the S-8225A Series returns to normal status if the

voltage of each of the batteries is in the range from overcharge release voltage (V_CLn) to

overdischarge release voltage (V_DUn).

2. Overcharge status

When the voltage of one of the batteries becomes V_CUnor higher, the CO pin output inverts and the S-8225A Series

becomes detection status. This is called overcharge status.

When the voltage of each of the batteries becomes overcharge release voltage (V_CLn) or lower, the overcharge status

is released and the S-8225A Series returns to normal status.

3. Overdischarge status

When the voltage of one of the batteries becomes V_DLnor lower, the DO pin output inverts and the S-8225A Series

becomes detection status. This is called overdischarge status.

When the voltage of each of the batteries becomes overdischarge release voltage (V_DUn) or higher, the overdischarge

status is released and the S-8225A Series returns to normal status.

11

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

4. CTLC pin and CTLD pin

The S-8225A Series has two pins to control.

The CTLC pin controls the output voltage from the CO pin; the CTLD pin controls the output voltage from the DO pin.

Thus it is possible for users to control the output voltages from the CO pin and DO pin, respectively. These controls

precede the battery protection circuit.

Table 6 Status Set by CTLC Pin

CTLC Pin

CO Pin

Normal status^*4

V_SS

"H"^*1

Open^*2

"L"^*3

V_SS

*1. "H": CTLC ≥ V_CTLCH

*2. Pulled down by I_CTLCH

*3. "L": CTLC ≤ V_CTLCL

*4. The status is controlled by the voltage detection circuit.

Table 7 Status Set by CTLD Pin

CTLD Pin

DO Pin

Normal status^*4

V_SS

"H"^*1

Open^*2

"L"^*3

V_SS

*1. "H": CTLD ≥ V_CTLDH

*2. Pulled down by I_CTLDH

*3. "L": CTLD ≤ V_CTLDL

*4. The status is controlled by the voltage detection circuit.

Caution When the power supply fluctuates, unexpected behavior might occur if an electrical potential is

generated between the potentials of "H" level input to the CTLC / CTLD pins and IC's V_DDby

external filters.

5. 0 V battery detection function

In the S-8225A Series, users are able to select a 0 V battery detection function.

If this optional function is selected, the CO pin becomes detection status when the voltage of one of the batteries

becomes 0 V battery detection voltage (V_0INHn) or lower.

12

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

6. Delay time setting

When the voltage of one of the batteries becomes V_CUnor higher, the S-8225A Series charges the capacitor

connected to the CCT pin rapidly up to the CCT pin voltage (V_CCT). After that, The S-8225A Series discharges the

capacitor with the constant current of 100 nA, and the CO pin output is defined as detection status at the time when

the CCT pin voltage falls to a certain level or lower. The overcharge detection delay time (t_CU) changes depending on

the capacitor connected to the CCT pin.

t_CUis calculated by the following formula.

Min. Typ. Max.

t_CU[s] = (6.7, 10, 13.3) × C_CCT[μF]

Similarly, the overdischarge detection delay time (t_DL) changes depending on the capacitor connected to the CDT pin.

t

_DLis calculated by the following formula.

Min. Typ. Max.

t_DL[s] = (6.7, 10, 13.3) × C_CDT[μF]

Since the S-8225A Series charges the capacitor for delay rapidly, the voltage of the CCT pin and the CDT pin

becomes large if the capacitance value is small. As a result, a variation between the calculated value of the delay

time and the actual delay time is generated.

If the capacitance value is so large that the rapid charging can not be finished within the internal delay time, the

output pin becomes detection status simultaneously with the end of internal delay time.

In addition, the charging current to the capacitor for delay passes through the VDD pin. Therefore, a large resistor

connected to the VDD pin results in a big drop of the power supply voltage at the time of rapid charging which causes

malfunction.

Regarding the recommended values for external components, refer to "Table 9 Constants for External

Components".

7. SEL pin

In the S-8225A Series, switchable monitoring control between 3-cell to 5-cell is possible by using the SEL1 pin and

the SEL2 pin. For example, since the overdischarge detection of V4 or V5 is prohibited and the overdischarge is not

detected even if V4 or V5 is shorted when the SEL1 pin is "H" and the SEL2 pin is "L", the S-8225A Series can be

used for 3-cell monitoring.

Be sure to use the SEL1 pin and the SEL2 pin at "H" or "L" potential.

Table 8 Settings of SEL1 Pin and SEL2 Pin

SEL1 pin

SEL2 pin

Setting

Prohibition

"H"^*1

"L"^*2

"H"^*1

"L"^*2

"H"^*1

"L"^*2

3-cell monitoring

4-cell monitoring

5-cell monitoring

*1. "H": SEL1 ≥ V_SELH1and SEL2 ≥ V_SELH2

*2. "L": SEL1 ≤ V_SELL1and SEL2 ≤ V_SELL2

13

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Timing Charts

1. Overcharge detection and overdischarge detection

V_CUn

V_CLn

Battery voltage

V_DUn

V_DLn

(n = 1 to 5)

V_COH

CO pin voltage

V_SS

V_DOH

DO pin voltage

V_SS

Charger connection

Load connection

Overdischarge detection delay time (t_DL)

(1) (3) (1)

Overcharge detection delay time (t_CU

(1)

)

Status^*1

(2)

*1. (1): Normal status

(2): Overcharge status

(3): Overdischarge status

Figure 11

14

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

2. Overcharge detection delay

V_CUn

(n = 1 to 5)

Battery voltage

V_COH

CO pin voltage

V_SS

CCT pin voltage

V_CCT

V_SS

Charger connection

Less than t_CU

(1)

t_CU

(2)

Status^*1

*1. (1): Normal status

(2): Overcharge status

Figure 12

15

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

3. Overdischarge detection delay

(n = 1 to 5)

Battery voltage

V_DLn

V_DOH

DO pin voltage

V_SS

CDT pin voltage

V_CDT

V_SS

Load connection

Less than t_DL

(1)

t_DL

(2)

Status^*1

*1. (1): Normal status

(2): Overdischarge status

Figure 13

16

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Connection Examples of Battery Monitoring IC

1. 10-serial cell

EB+

R_VDD1

C_VDS1

C_VDD1

1 CTLD

VDD 16

VC1 15

VC2 14

VC3 13

VC4 12

VC5 11

VC6 10

VSS 9

R_CTLD

R_VC11

R_VC21

R_VC31

R_VC41

R_VC51

R_VC61

2 CTLC

R_CTLC

C_VC11

C_VC21

C_VC31

C_VC41

C_VC51

C_VC61

3 CO

4 DO

R_SEL11

R_SEL21

S-8225A

5 SEL1

6 SEL2

7 CDT

8 CCT

C_CDT1

C_CCT1

R_IFC

R_IFD

C_IFC

C_IFD

R_VDD2

C_VDS2

1 CTLD

2 CTLC

3 CO

VDD 16

VC1 15

VC2 14

VC3 13

VC4 12

VC5 11

VC6 10

VSS 9

C_VDD2

R_VC12

R_VC22

R_VC32

R_VC42

R_VC52

R_VC62

C_VC12

C_VC22

C_VC32

C_VC42

C_VC52

C_VC62

4 DO

R_SEL12

R_SEL22

S-8225A

5 SEL1

6 SEL2

7 CDT

8 CCT

OD

OC

C_CDT2

C_CCT2

EB−

Remark Regarding the recommended values for external components, refer to "Table 9 Constants for External

Components".

Figure 14

17

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

2. 9-serial cell

EB+

R_VDD1

C_VDS1

1 CTLD

2 CTLC

3 CO

VDD 16

VC1 15

VC2 14

VC3 13

VC4 12

VC5 11

VC6 10

R_CTLD

R_CTLC

R_VC11

R_VC21

R_VC31

R_VC41

R_VC51

C_VDD1

C_VC11

C_VC21

C_VC31

C_VC41

C_VC51

C_VC61

4 DO

R_SEL11

R_SEL21

S-8225A

5 SEL1

6 SEL2

7 CDT

8 CCT

R_VC61

C_CDT1

C_CCT1

R_IFC

VSS

9

R_IFD

C_IFC

C_IFD

R_VDD2

C_VDS2

1 CTLD

2 CTLC

3 CO

VDD 16

VC1 15

VC2 14

VC3 13

VC4 12

VC5 11

VC6 10

C_VDD2

R_VC12

R_VC22

R_VC32

R_VC42

R_VC52

C_VC12

C_VC22

C_VC32

C_VC42

C_VC52

4 DO

R_SEL12

R_SEL22

S-8225A

5 SEL1

6 SEL2

7 CDT

8 CCT

OD

OC

C_CDT2

C_CCT2

VSS

9

EB−

Remark Regarding the recommended values for external components, refer to "Table 9 Constants for External

Components".

Figure 15

18

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

3. 7-serial cell

EB+

R_VDD1

C_VDS1

1 CTLD

2 CTLC

3 CO

VDD 16

VC1 15

VC2 14

VC3 13

VC4 12

VC5 11

VC6 10

R_CTLD

R_CTLC

R_VC11

R_VC21

R_VC31

R_VC41

R_VC51

C_VDD1

C_VC11

C_VC21

C_VC31

C_VC41

C_VC51

4 DO

R_SEL11

R_SEL21

S-8225A

5 SEL1

6 SEL2

7 CDT

8 CCT

C_CDT1

C_CCT1

R_IFC

VSS

9

R_IFD

C_IFC

C_IFD

R_VDD2

C_VDS2

1 CTLD

2 CTLC

3 CO

VDD 16

VC1 15

VC2 14

VC3 13

VC4 12

VC5 11

VC6 10

C_VDD2

R_VC12

R_VC22

R_VC32

R_VC42

C_VC12

C_VC22

C_VC32

C_VC42

4 DO

R_SEL12

R_SEL22

S-8225A

5 SEL1

6 SEL2

7 CDT

8 CCT

OD

OC

C_CDT2

C_CCT2

VSS

9

EB−

Remark Regarding the recommended values for external components, refer to "Table 9 Constants for External

Components".

Figure 16

19

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

Table 9 Constants for External Components

Symbol

R_VDD1, R_VDD2

Min.

50

Typ.

100

1

Max.

Unit

Ω

1000

R_VCn1, R_VCn2

C_VDS1, C_VDS2

C_VDD1, C_VDD2

C_VCn1, C_VCn2

C_CCT1, C_CCT2

C_CDT1, C_CDT2

R_IFC, R_IFD

0.5

0.01

−

0.01

0.001

−

0.5

2

1

kΩ

μF

MΩ

pF

kΩ

0.1

0

1

0.1

5.1

1000

1

0.22

−

C_IFC, C_IFD

R_CTLC, R_CTLD

R_SEL11, R_SEL21

R_SEL12, R_SEL22

1

−

0.5

1

Caution 1. The constants may be changed without notice.

2. It has not been confirmed whether the operation is normal or not in circuits other than the

connection examples. In addition, the connection examples and the constants do not guarantee

proper operation. Perform thorough evaluation using the actual application to set the constants.

3. R_VC1to R_VC6and C_VC1to C_VC6should be the same constant, respectively.

4. Set up R_VCnand C_VCnas R_VCn× C_VCn≥ 50 × 10^-6.

5. Set up R_VDDand C_VDSas 5 × 10^-6≤ R_VDD× C_VDS≤ 100 × 10^-6.

6. Set (R_VDD× C_VDS) / (R_VCn× C_VCn) = 0.1.

Remark n = 1 to 6

20

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Precautions

•

The application conditions for the input voltage, output voltage, and load current should not exceed the package

power dissipation.

If both an overcharge battery and an overdischarge battery are included among the whole batteries, the condition is

set in overcharge status and overdischarge status. Therefore either charging or discharging is impossible.

Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic

protection circuit.

ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products

including this IC of patents owned by a third party.

21

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

 Characteristics (Typical Data)

1. Detection voltage

1. 1 V_CUvs. Ta

1. 2 V_CLvs. Ta

V_CU= 4.225 V

V_CL= 4.125 V

4.250

4.240

4.230

4.220

4.210

4.200

4.180

4.140

4.100

4.060

−40 −25

0

25

50

75 85

−40 −25

0

25

50

75 85

Ta [C]

1. 3 V_DLvs. Ta

1. 4 V_DUvs. Ta

V_DL= 2.30 V

V_DU= 2.50 V

2.38

2.34

2.30

2.26

2.22

2.60

2.55

2.50

2.45

2.40

−40 −25

0

25

50

75 85

−40 −25

0

25

50

75 85

Ta [C]

2. Current consumption

2. 1 I_OPEvs. Ta

2. 2 I_PDNvs. Ta

V_DD= 17.0 V

V_DD= 8.0 V

20

15

10

5

4.0

3.0

2.0

1.0

0

−40 −25

0

25

50

75 85

−40 −25

0

25

50

75 85

Ta [C]

2. 3 I_OPEvs. V_DD

Ta = +25°C

50

40

30

20

10

0

5

10

15

20

25

30

V

DD [V]

22

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK

S-8225A Series

Rev.2.0_00

3. Delay time

3. 1 t_CUvs. Ta

3. 2 t_DLvs. Ta

V_DD= 18.1 V

V_DD= 15.2 V

2.0

1.5

1.0

0.5

0

2.0

1.5

1.0

0.5

0

−40 −25

0

25

50

75 85

−40 −25

0

25

50

75 85

Ta [C]

4. Output current

4. 1 I_COLvs. V_DD

4. 2 I_COHvs. V_DD

Ta = +25°C

500

400

300

200

100

0

−20

−40

−60

0

−80

5

10

15

20

25

30

0

5

10

15

20

25

30

V

DD [V]

V

DD [V]

4. 3 I_DOLvs. V_DD

4. 4 I_DOHvs. V_DD

Ta = +25°C

500

400

300

200

100

0

−20

−40

−60

0

−80

5

10

15

20

25

30

0

5

10

15

20

25

30

V

DD [V]

V

DD [V]

5. Output voltage

5. 1 V_COHvs. V_DD

5. 2 V_DOHvs. V_DD

Ta = +25°C, V_CU= 4.225 V

Without 0 V battery detection function

Ta = +25°C, V_DL= 2.30 V

12

10

8

12

10

8

6

4

2

0

5

10

15

20

25

30

5

10

15

20

25

30

V

DD [V]

V

DD [V]

23

5.1±0.2

16

9

8

1

0.17±0.05

0.22±0.08

0.65

No. FT016-A-P-SD-1.2

TITLE

TSSOP16-A-PKG Dimensions

FT016-A-P-SD-1.2

No.

ANGLE

mm

UNIT

ABLIC Inc.

+0.1

-0

4.0±0.1

ø1.5

0.3±0.05

2.0±0.1

8.0±0.1

1.5±0.1

ø1.6±0.1

(7.2)

4.2±0.2

+0.4

-0.2

6.5

1

16

8

9

Feed direction

No. FT016-A-C-SD-1.1

TITLE

TSSOP16-A-Carrier Tape

FT016-A-C-SD-1.1

No.

ANGLE

mm

UNIT

ABLIC Inc.

21.4±1.0

17.4±1.0

+2.0

-1.5

17.4

Enlarged drawing in the central part

ø21±0.8

2±0.5

ø13±0.2

No. FT016-A-R-S1-1.0

TITLE

No.

TSSOP16-A- Reel

FT016-A-R-S1-1.0

ANGLE

UNIT

4,000

QTY.

mm

ABLIC Inc.

Disclaimers (Handling Precautions)

1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and

application circuit examples, etc.) is current as of publishing date of this document and is subject to change without

notice.

2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of

any specific mass-production design.

ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products

described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other

right due to the use of the information described herein.

3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described

herein.

4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute

maximum ratings, operation voltage range and electrical characteristics, etc.

ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to

the use of the products outside their specified ranges.

5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they

are used and verify suitability, safety and other factors for the intended use.

6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related

laws, and follow the required procedures.

7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of

weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands

caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,

biological or chemical weapons or missiles, or use any other military purposes.

8. The products are not designed to be used as part of any device or equipment that may affect the human body, human

life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control

systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,

aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by

ABLIC, Inc. Do not apply the products to the above listed devices and equipments.

ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of

the products.

9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should

therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread

prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social

damage, etc. that may ensue from the products' failure or malfunction.

The entire system in which the products are used must be sufficiently evaluated and judged whether the products are

allowed to apply for the system on customer's own responsibility.

10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the

product design by the customer depending on the intended use.

11. The products do not affect human health under normal use. However, they contain chemical substances and heavy

metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be

careful when handling these with the bare hands to prevent injuries, etc.

12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.

13. The information described herein contains copyright information and know-how of ABLIC Inc. The information

described herein does not convey any license under any intellectual property rights or any other rights belonging to

ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this

document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express

permission of ABLIC Inc.

14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales

representative.

15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into

the English language and the Chinese language, shall be controlling.

2.4-2019.07

www.ablic.com


型号：	S-8225AAK-TCT1U
厂家：	ABLIC
描述：	BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK 监视器
文件：	总27页 (文件大小：590K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

S-8225AAK-TCT1U [ABLIC]

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