ABFM-125MHZ-R-P1T [ABRACON]

PECL Output Clock Oscillator, 125MHz Nom, CERAMIC, SMD, 6 PIN;
ABFM-125MHZ-R-P1T
型号: ABFM-125MHZ-R-P1T
厂家: ABRACON    ABRACON
描述:

PECL Output Clock Oscillator, 125MHz Nom, CERAMIC, SMD, 6 PIN

文件: 总2页 (文件大小:1118K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CERAMICC SSMMD CRYSSTTAALL CLOCK OSCILLATTOORR  
ABFM SERIES  
: PRELIMINARY  
5.0 x 7.0 x 1.8mm  
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APPLICATIONS:  
• Fiber Channel  
• 12Gbit SERDES  
• 10Gbit SERDES  
• PCI Express  
FEATURES:  
• Based on a proprietary analog multiplier  
Tri-State Output  
• Ultra low Phase Jitter  
• 125MHz, 156.25MHz, 187.5MHz, and 212.5MHz applications  
• 2.5V to 3.3V +/- 10% operation  
• Ceramic SMD, low profile package  
STANDARD SPECIFICATIONS:  
PARAMETERS  
Frequency Range  
150 MHz to 280 MHz  
0°C to + 70°C (see options)  
- 55°C to + 125°C  
50 ppm maꢀx (see options)  
2x25V - 3x63 V  
Operating Temperature  
Storage Temperature  
Overall Frequency Stability  
Supply Voltage (Vdd)  
Jitter (12KHz - 20MHz)  
RMS phase jitter < 0x3pS  
period jitter < 20pS peak to peak typical  
Low Phase Noise  
Aging (PPM/year)  
-130 dBc/Hz @ 1kHz Offset from 212x5MHz  
-140 dBc/Hz @ 10kHz Offset from 212x5MHz  
-145 dBc/Hz @ 100kHz Offset from 212x5MHz  
TBD Per Crystal  
Supply Current (IDD)[Fout = 212x50MHz]  
Output Clock Duty Cycle @ VDD-1x3V  
Output High Voltage  
Output Low Voltage  
Clock Rise time (tr) @ 20/80%  
Clock Fall time (tf) @ 80/20%  
85mA maꢀx  
45% min, 50% typical, 55% maꢀx  
VOH = (VDD-1x025V min)  
VOL = (VDD-1x620V maꢀ)  
0x2ns typical, 0x5ns maꢀ,  
0x2ns typical, 0x5ns maꢀ  
Supply Current (IDD) [Fout = 212x50MHz]  
Output Clock Duty Cycle @ 1x25V  
55mA typical, 60mA maꢀ  
45% min, 50% typical, 55% maꢀ  
Output Differential Voltage (VOD  
)
247mV min, 355mV typical, 454mV maꢀ  
-50mV min, 50mV maꢀ  
VDD Magnitude Change (VOD  
)
Output High Voltage  
Output Low Voltage  
Offset Voltage [RL = 100  
Offset Magnitude Voltage[RL = 100  
Power-off Leakage (IOXD) [Vout=VDD or GND, VDD=0V]  
Output Short Circuit Current (IOSD  
Differential Clock Rise Time (tr) [RL=100  
Differential Clock Fall Time (tf) [RL=100  
VOH = 1x4V typical,1x6V maꢀ  
VOL = 0x9V min, 1x1V typical  
VOS = 1x125V min, 1x2V typical, 1x375V maꢀ  
VOS = 0mV min, 3mV typical, 25mV maꢀ  
1µA typical, 10µA maꢀ  
-5mA typ, -8mA maꢀx  
0x2ns min, 0x5ns typical, 0x7ns maꢀ  
0x2ns min, 0x5ns typical, 0x7ns maꢀ  
]  
]  
)
, CL=10pF]  
, CL=10pF]  
ABRACON IS  
ISO 9001 / QS 9000  
CERTTIIFFIED  
30332 Esperanza, Rancho Santa Margarita, California 92688  
tel 949-546-8000 | fax 949-546-8001 | www.abracon.com  
CERAMICC SSMMD CRYSSTTAALL CLOCK OSCILLATTOORR  
ABFM SERIES  
: PRELIMINARY  
5.0 x 7.0 x 1.8mm  
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STANDARD SPECIFICATIONS:  
Supply Current (IDD)[at 100MHz, load 15pF]  
Output Clock Duty Cycle @ 50%VDD  
Output High Voltage (VOH) [IOH = -8.5mA]  
16mA typ., 20mA max.  
45% min, 50% typical, 55% max.  
2.4 min  
Output Low Voltage (VOL) [IOL = 8.5mA]  
0.4V max  
Output Drive Current (IOSD) [VOL = 0.4V, VOH = 2.4V]  
Output Clock Rise/Fall time [10% ~ 90% VDD w/10pF load]  
Output Clock Duty cycle [Measured @ 50% VDD]  
8.5mA typ.  
1.2nS typical, 1.6nS max.  
45% min, 50% typical, 55% max.  
MARKING:  
- TUH  
Frequency: T=First “ten” digit of frequency, U=First “unit” of frequency, H=First “tenth” digit of freq,  
Ex: 100 for 10.0MHz; 143 for 14.31818 MHz)  
- ABFM ZYX (Z: Month, A to L; Y: Year, 5 for 2005;  
X: Traceability Code)  
TRI-STATE PIN OPERATION:  
OUTPUT TYPE OPTION PIN 1 LOGIC LEVEL*  
OUTPUT STATE  
Enabled  
0 (Default)  
P
P1  
V
PECL  
PECL1  
LVDS  
PIN ASSIGNMENTS:  
1
Tri-state  
PIN #  
NAME  
Tri-state  
NC  
DESCRIPTION  
Tri-state  
1
Enabled  
1
2
3
4
5
6
0
Tri-state  
No Connect  
0
Tri-state  
GND  
Ground  
PECL, LVDS  
Complimentary PECL, LVDS  
VDD Connection  
1 (Default)  
0
Enabled  
Q
Tri-state  
C
CMOS  
1 (Default)  
Enabled  
Q
VDD  
*Connect to VDD from logic level "1", connect to ground for logic level "0".  
OPTIONS AND PART IDENTIFICATION (Left blank if standard)  
:
ABFMX - Frequency - Temperature - Frequency Stability - Output - Tri-state pin output - Packaging  
Vdd options:  
Blank  
Stability options:  
R for 25 ppm max  
Packaging option:  
T for Tape and Reel (1,000pcs/reel)  
(3.3Vdc 10%V)  
(2.5Vdc 10%V)  
T5 for Tape and Reel (500pcs/reel)  
1
PECL & LVDS DRAWING:  
CMOS DRAWING:  
PIN #  
NAME  
1
2
3
4
Tri-state  
GND/Case  
Output  
Vdd  
Dimensions: inch (mm)  
Dimensions: inch (mm)  
ABRACON IS  
ISO 9001 / QS 9000  
CERTTIIFFIED  
30332 Esperanza, Rancho Santa Margarita, California 92688  
tel 949-546-8000 | fax 949-546-8001 | www.abracon.com  

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