ACVTX1018S-FREQ-D20-H5 [ABRACON]

Clipped Sine Output Oscillator, 8MHz Min, 45MHz Max, COMPACT, DIP-4;


型号：	ACVTX1018S-FREQ-D20-H5
厂家：	ABRACON
描述：	Clipped Sine Output Oscillator, 8MHz Min, 45MHz Max, COMPACT, DIP-4
文件：	总6页 (文件大小：177K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TTL / CMOS AND SINE WAVE •

CRYSTAL OSCILLATORS

TEMPERATURE-COMPENSATED XTAL OSCILLATORS

ACTX 1018 and ACVTX 1018 Series

FEATURES:

• Compatible with 14 Pin Dual in Line.

• Compact Size.

• Tight Stability Available.

• Low Current Consumption.

• Control Voltage Function.

• Low can height option.

APPLICATIONS:

• Cellular and Cordless Phones.

• Facsimile and Computer Control.

• Car Telephones.

• Communication Equipment

STANDARD SPECIFICATIONS

ACTX1018 (A)

ACVTX1018 (A)

PARAMETERS

ACTX1018 S

ACVTX1018S (A)

(F )

Frequency Range

1 MHz - 26 MHz

8 MHz - 45 MHz

Operating Temperature (T_OPR

)

-10°C to + 60°C (See Options / Table 1)

-40°C to + 85°C

Storage Temperature (T_STO

)

0.5 ppm max

Frequency Stability -vs- 25°C

-vs- Temperature

2.5 ppm max. (See Options

1 ppm per year max.

0.5 ppm max.

/ Table 1)

-vs- Aging

-vs- Supply Voltage

Supply Voltage

Input Current

)

5 Vdc 5ꢀ or 3.3 Vdc 5ꢀ (A Series)

(Idd

)

20 mA max.

2 mA max. for F 26 MHz

4 mA max. for F > 26 MHz

Dimensions: Inches (mm)

Duty Cycle or Symmetry

40 / 60ꢀ max.

10 ns max.

15 pF or 2TTL

N / A

Rise and Fall Times

Output Load

(T_{R /}T_F)

10 k

pp min. Clipped Sine

0.7 Vpp min. (A Series)

3 ppm min.

Ω // 10 pF

Output Voltage

(V_OH

)

0.9

0.4

dd min.

V max.

1 V

(V_OL

)

Frequency Adjustment

(Internal Trimmer)

Vc and Freq. Pulling (V Series)

0.5 V to 4.5 V or 0.3 V to 3.0 V ( 10 ppm min.)

0.024

( 0.6) ref.

For test circuit, waveforms, please see page 67.

Environmental and mechanical specifications on page 68, Group 4. Marking, see p. 79.

NOTE:

ORDERING OPTIONS

Pin 1 may be present with no

connection function.

ACXTX 1018XX

Frequency - Temperature & Frequency Stability - Max. Can Height

Blank or V

H5 for 5.08 mm

XX.XXXXX MHz

Blank or S

TABLE 1

Frequency -vs.- Temperature

Blank or A

TEMPERATURE

0.5 ppm

max.

1 ppm

max.

1.5 ppm

max.

2 ppm

max.

2.5 ppm

max.

3 ppm

max.

5 ppm

max.

RANGE °C

PIN #

FUNCTION

Vc or N/A

GND / Case

Output

0°C to + 50°C

-10°C to + 60°C

-20°C to + 70°C

- 30°Cto + 75°C

- 40°Cto + 85°C

C 05

C 10

D 10

C 15

D 15

C 20

D 20

E 20

C 25

Standard

E 25

C 30

D 30

E 30

C 50

D 50

E 50

F 20 ( )

F 25 ( )

F 30 ( )

F 50 ( )

G 30 ( )

G 50 ( )

( ) DEPENDING ON FREQUENCY

NOTE: Left blank if standard • All specifications and markings subject to change without notice

ABRACON

ABRACON IS

ISO 9001 / QS 9000

CERTIFIED

29 Journey • Aliso Viejo, CA 92656 • USA

- 55 -

(949) 448-7070

•

FAX: (949) 448-8484

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C O R P O R A T I O N

CRYSTAL OSCILLATORS

TECHNICAL TERMS

Nominal frequency: The center or nominal output frequency of a

Rise Time (T ): Waveform rise time from Low to High transition,

crystal oscillator.

measured at the specified level

10ꢀ to 90ꢀ for HCMOS,

20ꢀ to 80ꢀ for ECL

Package: Crystal oscillators are packaged in various styles from lead

through holes to surface-mount types. Various sizes and functions

are suitable for different applications.

0.4V to 2.4V for TTL.

Fall Time (T ): The waveform fall time from High to Low transition,

Frequency tolerance: The deviation from the nominal frequency in

terms of parts per millions (ppm) at room temperature. (25° 5°C)

measured at the specified level

90ꢀ to 10ꢀ for HCMOS,

80ꢀ to ꢀ for ECL

Frequency range: The frequency band that the oscillator type or

model can be offered.

2.4V to 0.4V for TTL.

Frequency stability: The maximum allowable frequency deviation

compared to the measured frequency at 25 °C over the temperature

window, i.e., 0° C to +70° C. Typical stability is 0.01ꢀ ( 100 ppm).

Jitter: The modulation in phase or frequency of oscillator output.

HCMOS/TTL Compatible: The oscillator is designed with ACMOS

logic with driving capability of TTL and HCMOS loads while main-

taining minimum logic HIGH of the HCMOS.

Operating temperature: Temperature range within which output fre-

quency and other electrical, environmental characteristics meet the

specifications.

Tristate Enable: When the input is left OPEN or tied to logic “1”, the

normal oscillation occurs. When the input is Grounded (tied to logic

“0”), the output is in HIGH IMPEDANCE state. The input has an

internal pull-up resistor thus allowing the input to be left open.

Aging: The relative frequency change over a certain period of time.

This rate of change of frequency is normally exponential in character.

Typically, aging is 5ppm over 1 year maximum.

Output Logic: The output of an oscillator is designed to meet vari-

ous specified logic states, such as TTL, HCMOS, ECL, Sine,

Clipped-Sine (DC cut).

Storage Temperature: The temperature range where the unit is

safely stored without damaging or changing the performance of the

unit.

Harmonic Distortion: The non-linear distortion due to unwanted

harmonic spectrum component related with target signal frequency.

Each harmonic component is the ratio of electric power against

desired signal output electric power and is expressed in terms of

dBc, i.e. -20dBc. Harmonic distortion specification is important espe-

cially in sine output when a clean and less distorted signal is

required.

Frequency vs. Power Supply Variation: Maximum frequency

change allowed when the power supply voltage is changed within its

specified limits (typical 10ꢀ in V

or 5ꢀ change).

Supply Voltage (Vdd max): The maximum voltage which can safe-

ly be applied to the Vcc terminal with respect to ground. Maximum

supply voltage for TTL is 5.5V and for HCMOS is 7V.

Input Voltage (V ): The maximum voltage that can be safely applied

Phase Noise:

The measure of the short-term frequency

to any input terminal of the oscillator.

fluctuations of the oscillator. It is usually specified as the single side

band (SSB) power density in a 1Hz bandwidth at a specified offset

frequency from the carrier. It is measured in dBc/Hz.

Output HIGH voltage (V ): The minimum voltage at an output of

the oscillator under proper loading.

Stand By: A function that temporary turns off the oscillator and other

dividers to save power. Logic “0” will enable stand by mode. The dis-

able current at stand by mode varies from a few micro-amperes to

tens of micro-amperes (5µA typical). Because oscillation is halted,

there is a maximum of 10 ms (same amount of start-up time) before

output stabilizes.

Output LOW voltage (V ): The maximum voltage at an output of

the oscillator under proper loading.

Input HIGH voltage (V ): The minimum voltage to guarantee

threshold trigger at the input of the oscillator.

Input LOW voltage (V ): The maximum voltage to guarantee the

threshold trigger at the input of the oscillator.

Supply Current (lcc): The current flowing into Vcc terminal with

respect to ground. Typical supply current is measured without load.

Symmetry or Duty Cycle: The symmetry of the output waveform at

the specified level (at 1.4V for TTL, at 1/2 Vcc for HCMOS, or 1/2

waveform peak level for ECL).

SYM

x 100 (ꢀ); See Fig. 1.

Figure 1

Fan Out: The measure of driving ability of an oscillator, expressed

as the number of inputs that can be driven by a single output. It can

be represented by an equivalent load capacitance (CL) or a TTL load

circuit consisting of diodes, load resistor, and a capacitor.

ABRACON

ABRACON IS

ISO 9001 / QS 9000

- 56 -

29 Journey • Aliso Viejo, CA 92656 • USA

(949) 448-7070

•

FAX: (949) 448-8484

CERTIFIED

E-MAIL: abinfo

@abracon.com • INTERNET ADDRESS: www.abracon.com

C O R P O R A T I O N

CRYSTAL OSCILLATORS

APPLICATION NOTES

METHOD 1:

CMOS RISE AND FALL TIMES

The rise and fall time on the CMOS technology depends on its

speed (CMOS, HCMOS, ACMOS, BICMOS), the supply voltage,

the load capacitance, and the load configuration. Typical rise and

fall time for CMOS 4000 series is 30ns, HCMOS is 6ns, and for

ACMOS (HCMOS, TTL compatible) is 3 ns max.

Series termination (Fig. 3)

DUT

LOAD

Typical rise and fall

time is measured

between 10ꢀ to 90ꢀ

of its waveform level.

Figure 3

Rs >_ - Ro

In series termination, a damping resistor is placed close to the

source of the clock signal. Value of Rs must satisfy the following

requirement:

(See example of

Wave Output; Fig. 1.)

OUTPUT

WAVEFORM

METHOD 2:

Figure 1

Pull-Up / Pull-Down Resistors (Fig. 4)

ACMOS OUTPUT TERMINATION TECHNIQUES

DUT

Due to the fast transition time of the ACMOS (HCMOS/TTL com-

patible) device, proper termination techniques must be used

when testing or measuring electrical performance characteris-

tics.

LOAD

Termination is usually used to solve the problem of voltage

reflection, which essential cause steps in clock waveforms as

well as overshoot and undershoot. Such effect could result in

false clocking of data, as well as higher EMI and system noise.

Figure 4

In pull-up/pull-down termination, the Thevenin’s equivalent of the

combination is equal to the characteristics impedance of the

trace. This is probably the cleanest, and results in no reflections,

as well as EMI.

Overshoot

VoH

~ Z

METHOD 3:

VoL

Parallel AC Termination (Fig. 5)

Undershoot

Figure 2

DUT

LOAD

Termination is required also because of the length of the trace on

the PC board and its load configuration.

There are three general methods of terminating a clock trace,

which is a process of matching the output impedance of the

device with the line impedance:

Figure 5

In parallel AC termination, a R-C combination is placed at the

load. The value of the capacitor must be chosen carefully, usual-

ly smaller than the 50pF. This termination is not recommended

because it will degrade the rise and fall time of the clock, al-

though it draws no DC current.

1) Series termination;

2) Pull-up/Pull-down termination;

3) Parallel-AC termination

ABRACON

ABRACON IS

ISO 9001 / QS 9000

CERTIFIED

29 Journey • Aliso Viejo, CA 92656 • USA

(949) 448-7070 FAX: (949) 448-8484

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•

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C O R P O R A T I O N

CRYSTAL OSCILLATORS

QUESTIONS AND ANSWERS

Q: Why the Overall frequency stability is specified in

crystal oscillators but not in crystals?

• Typically, PLLs, Multiplier or Programmable designs pro-

duce higher jitter than the conventional fundamental design.

It is very important to understand the jitter requirements from the

application to specify the right specification for crystal oscillators.

We can classify two types of jitters:

• Cycle to cycle jitter

A: The crystal oscillator is typically used as a master clock for

the microprocessor and its parameters are not affected by the

internal characteristics of the microprocessor such as variation

in load capacitance and other variables that could affect the

change in frequency at room and over temperature. The over-

all frequency stability in crystal oscillators is typically 100ppm

max. and includes frequency calibration at 25°C, over temper-

ature, frequency changes due to load, supply, aging, vibration,

and shock.

• Period jitter.

CYCLE TO CYCLE JITTER

The Cycle to cycle jitter is the maximum difference in time

between several measured periods. Usually a minimum of ten

(10) cycles is used where T1 to T10 were recorded . See fig. 2.

Q: What is the start-up time?

A: Start-up time is the delay time between the oscillation

starts from noise until it reaches its

full output amplitude when power is

applied. The supply voltage must be

applied with a defined rate or rise.

The start-up time varies from micro-

seconds to milliseconds depending

on frequency, ASIC speed and logic.

Please see figure 1.

Jitter =

Maximum Delta (Ts)

Figure 2

PERIOD JITTER.

Figure 1

The period jitter is the maximum change of a clock edge. It is

usually expressed as peak-to-peak jitter and can be converted to

rms value by multiplying to

(0.5) x (0.707). The period

jitter can only be measured

Q: What is Tristate Enable/Disable mode?

A: When the voltage at the control pin is set to a logic low “0”,

the output is in Tri-state mode that is High Impedance. The

disabled current is usually lower than its normal operating cur-

rent but not completely cut-off as it was seen in the Stand-by

mode, where the oscillation is shut down completely.

at each cycle but not multiple

cycles. See figure 3.

Typical jitter recorded in

Abracon oscillators varies

from 20ps to 60ps rms.

There is an internal pull-up resistor between control pin and

supply (typically 100k

open (floating) if unused.

Ω

), therefore the control pin can be left

Figure 3

Q: What is phase noise and how to measure it?

Q: What is jitter and how to specify its maximum value?

A: Phase noise is the expression of noise in the frequency

domain. It is a measure of the short-term frequency fluctua-

A: Jitter is noise caused by many sources in crystal oscillators.

Major sources of noise are:

tions of the oscil-

lator. It is usually

specified as the

single sideband

power density in

a 1Hz bandwidth

• Power supply noise.

•

Integer multiples of the signal source frequency (harmonics).

• Load and termination conditions.

• Amplifier noise.

• Circuit configuration (PLLs, Multiplier, Overtone, etc.)

at a specified offset fre-

quency from the carrier.

Figure 4

The following methods can be used to suppress the noise condi-

tions in the above sources:

OFFSET

PHASE

FREQUENCY NOISE

In order to measure phase noise, it is

necessary to pair a similar device-

under-test with one unit set a VCXO

and other set a fixed XO. Please see

block diagram in figure 4.

Typical phase noise in Abracon

VCXO and oscillators:

(Hz)

(dBc/Hz)

-70

•

Make sure that the power supply noise is filtered by using

bypass capacitors, chip beads, or RC filters.

If jitter is critical in some applications, especially for high-

•

100

-110

frequencies noise, use low harmonics outputs or sine output.

• Make sure that load and termination conditions are opti-

mized to avoid reflected power back to its output.

1,000

10,000

100,000

-125

-150

-160

ABRACON

ABRACON IS

ISO 9001 / QS 9000

CERTIFIED

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(949) 448-7070 FAX: (949) 448-8484

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C O R P O R A T I O N

VCXOs and TCXOs

QUESTIONS AND ANSWERS

Q: What are the factors that affect frequency pullability?

Q: What is the control voltage?

A: The frequency pullability or deviation in VCXO is the change in

the output frequency with respect to

change in control voltage.

A: The control voltage is the external voltage applied to the input

of the VCXO. It consists of a minimum, a maximum, and a

center voltage. The center control voltage is the nominal volt-

age that sets the oscillation frequency to its minimal value.

Standard control voltages:

Vc min = 0.5Vdc; Vc max. = 4.5Vdc; Vc center = 2.5Vdc 0.5V

Pullability is usually specified as min-

imum; however, in some applications,

a maximum pulling value is also

specified to avoid circuit instability.

Please refer to figure 1 for a typical

Q: What is a TCXO?

A: A TCXO (Temperature-Compensated Crystal Oscillator) is a

crystal oscillator that has a high-precision crystal, a tempera-

ture-compensated network. There are several methods to

design a compensated network, which could vary from simple,

less expensive to, complicate and very expensive:

• Method 1: Thermistor/Capacitor networks

Colpitts VCXO circuit:

Figure 1

Some major factors that affect the frequency deviation in VCXO:

•

Load capacitance value C1 and C2.

Frequency.

Crystal characteristics (C1, C0/C1, size)

Varactor type and capacitance.

Voltage control Vc.

(Direct compensation). Lowest cost, no varactor needed.

• Method 2: Traditional thermistor network.

• Method 3: Analog Polynomial Generator

• Method 4: Digitally segmented analog

Operating temperature.

• Method 5: Digital compensation

• Method 6: Digital compensation with DAC voltage summers.

The frequency pullability can be increased either by using a

low capacitance with sharp slope varactor, connect in series

another varactor or an inductor, adjusting load capacitor val-

ues C1 and C2, or increasing control voltage.

Be very careful when considering any above methods because

it may create circuit instability which has a severe effect on jit-

ter, linearity, unwanted modes, frequency hysteresis, or fre-

quency shift over temperature.

Figure 3

shows a

traditional

thermistor

network:

Figure 3

Q: What is the typical input impedance?

Q: Why and when we need to use a TCXO?

The input impedance is a function of modulation frequency. Its

minimum input impedance is 50kW at 10kHz.

A: We need to use a TCXO when the frequency stability of the

oscillator falls beyond the design limitation of a standard simple

(fixed) crystal oscillator which is typically less than 5ppm over a

standard or extended temperature window. The TCXO costs

more due to its complex circuit and manufacturing.

Q: What is the transfer function?

A: The transfer function is the direction of change in frequency

versus the change in control voltage. Most applications

require a positive transfer function, which the frequency rises

when increasing control voltage.

Q: Why there is an internal trimmer or control voltage on a

TCXO?

Q: What is linearity and what are the factors that affect it?

A: The purpose of the internal trimmer (variable capacitor) or a

control voltage is to re-adjust the frequency to its nominal fre-

quency for aging compensation or initial setting.

A: Linearity is the deviation

from the best straight-

line slope of the

The internal trimmer is accessible via a hole on top of the

TCXO can and can be adjusted with a special tool.

The control voltage can be set with a voltage divider or an

external voltage. Both methods of adjustment usually can not

produce large frequency deviation rather than 5 to 15ppm

enough to offset the frequency due to standard aging.

frequency versus control

voltage curve. The typi-

cal linearity in Abracon

VCXO is 10ꢀ maxi-

mum for standard pulla-

bility. Larger pulling may

Q: How to specify frequency stability on a TCXO?

worsen the linearity.

Figure 2

A: Unless otherwise specified, the frequency stability on a TCXO

is specified as follows:

• Due to temperature change: 2.5ppm ꢁ -20°C to +70°C

• Due to aging: 1ppm per year max.

• Due to supply voltage ( 5ꢀ): 0.3ppm max.

The frequency drift due to temperature change is referred to nom-

inal frequency set at 25°C.

Q: What is the modulation bandwidth?

A: The modulation bandwidth is the minimum 3dB bandwidth

frequency, relative to a 1kHz to 10kHz modulation frequency.

Unless otherwise specified as default, other values of modula-

tion bandwidth and frequency must be specified when ordering.

ABRACON

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ISO 9001 / QS 9000

CERTIFIED

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(949) 448-7070 FAX: (949) 448-8484

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C O R P O R A T I O N

CRYSTAL OSCILLATORS

RECOMMENDED HANDLING AND LAYOUT

hit with a hard object could damage the unit electrically and

mechanically. Please check the unit if dropped before

assembling or using.

I. ELECTRICAL

1) Supply voltage

Most of Abracon oscillators utilize a CMOS technology ASIC

chip with extreme ESD sensitive. When apply power to the

oscillator unit, be sure to check the polarities before con-

necting to the terminals. Reversed polarity connections may

cause the unit to be damaged electrically (dead) or mechan-

ically (burn, color change). Pin 1 is usually identified by a

black dot marked on cover.

2) Mounting

The following precautions shall be applied during mounting

through-hole crystal oscillators:

•

Do not force spreading the terminals into socket or

PCB holes. This will avoid breaking the glass insulation on

terminals.

Be sure to apply voltage to the oscillator not exceeding the

maximum specified value which is typically 7Vdc max. for

most CMOS IC. Applying under rating voltage could result

to no or unstable oscillation.

•

Do not apply excessive soldering heat or soldering

duration on terminals.

•

When bending leads for surface-mount, be very care-

ful to use appropriate tool keeping a safe distance between

the terminal base and the bent area.

Although many metal can oscillators have built-in bypass

capacitors, it is a good practice to add an external bypass

capacitor 0.01µF

near the Vdd ter-

minal. The exter-

nal capacitor is

used as an over

impressed voltage

The following precautions shall be applied to all surface-

mount oscillators:

•

Use the appropriate reflow condition as recommended

on the unit specification. Please make sure to not exceed

the peak temperature, its maximum duration, the number of

exposures, the rate of temperature change vs. time, etc.

and overcurrent

protective device.

3) Cleaning

Do not use solvents not recommended to clean to avoid

discoloration or damage on ink marking permanency.

Some solvents, which contain Chlorine, may cause some

color discoloration on some metallic cover.

Figure 1

shows a typical layout for a surface-mount crystal oscillator.

Do not exceed the maximum recommended temperature

when cleaning.

2) Load impedance

Oscilloscope impedance shall be greater than 1 MΩ with

probe capacitance less than 15pF. The load applied shall

include probe capacitance. All lead length should be kept

as short as possible especially ground trace. Output trace

from oscillator output to the load (next IC) shall be kept

short and avoided layout in parallel or cross with another

hot signal trace. Stray capacitance and inductance have

major effects on output impedance of the oscillator unit and

shall be minimized.

III. PACKAGING

Although an anti-static protection circuit is built-in the ASIC,

excessive static electricity level may damage the unit.

Abracon uses conductive packing materials for all oscillators.

By sure to ground with ESD strap before handling the device.

IV. HANDLING UNUSED TERMINALS

3) Output frequency

Some Abracon oscillators include Tristate function. Although

there is an internal pull-up resistor to prevent floating, it is rec-

ommended to terminate the tristate terminal to Vdd with a

resistor of 100kΩ in series.

Output frequency shall be measured with a precision fre-

quency counter using a reference external time base.

Make sure to stabilize the crystal oscillator (warm-up)

before recording the final frequency value, especially on

high frequency and high current units.

V. STORING

Please store all units at normal temperature and humidity.

High humidity may cause deterioration to units. Avoid storing

over a long period. Please perform visual and electrical

inspections before using once the units are stored over a long

period.

II. MECHANICAL

1) Vibration and shock

Do not apply or cause sudden shock and vibration exceed-

ing its maximum specifications to the unit. Severe drop or

ABRACON

ABRACON IS

ISO 9001 / QS 9000

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29 Journey • Aliso Viejo, CA 92656 • USA

(949) 448-7070 FAX: (949) 448-8484

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•

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C O R P O R A T I O N

ACVTX1018S-FREQ-D20-H5 [ABRACON]

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