ACE24AC16CTMTH [ACE]
Two-wire Serial EEPROM;
| 型号： | ACE24AC16CTMTH |
| 厂家： | 
ACE TECHNOLOGY CO., LTD. |
| 描述： | Two-wire Serial EEPROM 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 |
| 文件： | 总20页 (文件大小：1585K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ACE24AC16C
Two-wire Serial EEPROM
Description
The ACE24AC16C is 16,384 bits of serial Electrical Erasable and Programmable Read Only Memory,
commonly known as EEPROM. They are organized as 2,048 words of 8 bits (1 byte) each. The devices
are fabricated with proprietary advanced CMOS process for low power and low voltage applications.
These devices are available in standard 8-lead DIP, 8-lead SOP, 8-lead MSOP, 8-lead TSSOP, 8-lead
USON and 5-lead SOT-23/TSOT-23 packages. A standard 2-wire serial interface is used to address all
read and write functions. Our extended VCC range (1.8V to 5.5V) devices enables wide spectrum of
applications.
Features
⚫
⚫
⚫
⚫
⚫
⚫
⚫
⚫
⚫
⚫
⚫
⚫
⚫
⚫
⚫
Low voltage and low power operations:
ACE24AC16C: VCC = 1.8V to 5.5V, Industrial temperature range (-40℃ to 85℃).
Maximum Standby current < 1µA (typically 0.02µA and 0.06µA @ 1.8V and 5.5V respectively).
16 bytes page write mode.
Partial page write operation allowed.
Internally organized: 2048× 8 (16K).
Standard 2-wire bi-directional serial interface.
Schmitt trigger, filtered inputs for noise protection.
Self-timed programming cycle (5ms maximum).
1 MHz (2.5-5V), 400 kHz (1.8V) Compatibility.
Automatic erase before write operation.
Write protect pin for hardware data protection.
High reliability: typically 1,000,000 cycles endurance.
100 years data retention.
Standard 8-pin DIP/SOP/MSOP/TSSOP/USON and 5-pin SOT-23/TSOT-23 Pb-free packages.
Absolute Maximum Ratings
Industrial operating temperature
-40℃to 85℃
-50℃to 125℃
-0.3V to VCC + 0.3V
8V
Storage temperature
Input voltage on any pin relative to ground
Maximum voltage
ESD protection on all pins
>4000V
*Notice: Stresses exceed those listed under “Absolute Maximum Rating” may cause permanent damage to the device.
Functional operation of the device at conditions beyond those listed in the specification is not guaranteed. Prolonged exposure to
extreme conditions may affect device reliability or functionality.
VER 1.1
1
ACE24AC16C
Two-wire Serial EEPROM
Packaging Type
DIP-8
SOP-8
TSSOP-8
MSOP-8
USON3*2-8
SOT-23-5
TSOT-23-5
Pin Configurations
Pin Name
Function
SDA
SCL
WP
Serial Data Input / Open Drain Output
Serial Clock Input
Write Protect
VCC
GND
NC
Power Supply
Ground
No-Connect
Ordering Information
ACE24AC16C XX + X H
Halogen - free
U：Tube
T：Tape and Reel
Pb - free
OM：MSOP8
DP：DIP-8
FM：SOP-8
TM：TSSOP-8
UA8：USON3*2-8
BN：SOT23-5
BNS：TSOT23-5
VER 1.1
2
ACE24AC16C
Two-wire Serial EEPROM
Block Diagram
Pin Description
A. SERIAL CLOCK (SCL)
The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of
this clock is to clock data out of the EEPROM device.
B. SERIAL DATALINE (SDA)
SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and
can be wired- OR with other open-drain output devices.
C. WRITE PROTECT (WP)
The ACE24AC16C devices have a WP pin to protect the whole EEPROM array from programming.
Programming operations are allowed if WP pin is left un-connected or input to VIL. Conversely all
programming functions are disabled if WP pin is connected to VIH or VCC. Read operations is not
affected by the WP pin’s input level. If left unconnected, it is internally recognized as VIL. However,
due to capacitive coupling that may appear in customer applications, ACE recommends always
connecting the WP pin to a known state. When using a pull-up or pull-down resistor, ACE
recommends using 10kΩ or less.
VER 1.1
3
ACE24AC16C
Two-wire Serial EEPROM
Memory Organization
The ACE24AC16C devices have 128 pages. Since each page has 16 bytes, random word addressing to
ACE24AC16C will require 11 bits data word addresses.
Device Operation
A. SERIAL CLOCK AND DATA TRANSITIONS
The SDA pin is typically pulled to high by an external resistor. Data is allowed to change only when
Serial clock SCL is at VIL. Any SDA signal transition may interpret as either a START or STOP
condition as described below.
B. START CONDITION
With SCL ≥ VIH, a SDA transition from high to low is interpreted as a START condition. All valid
commands must begin with a START condition.
C. STOP CONDITION
With SCL ≥ VIH, a SDA transition from low to high is interpreted as a STOP condition. All valid read
or write commands end with a STOP condition. The device goes into the STANDBY mode if it is
after a read command. A STOP condition after page or byte write command will trigger the chip into
the STANDBY mode after the self- timed internal programming finish.
D. ACKNOWLEDGE
The 2-wire protocol transmits address and data to and from the EEPROM in 8bit words. The
EEPROM acknowledges the data or address by outputting a "0" after receiving each word. The
ACKNOWLEDGE signal occurs on the 9th serial clock after each word.
E. STANDBY MODE
The EEPROM goes into low power STANDBY mode after a fresh power up, after receiving a STOP
bit in read mode, or after completing a self-time internal programming operation.
F. SOFT RESET
After an interruption in protocol power loss or system reset, any two-wire part can be reset by
following these steps:
1. Creat a START condition,
2. Clock eighteen data bits “1”,
3. Creat a start condition as SDA is high.
VER 1.1
4
ACE24AC16C
Two-wire Serial EEPROM
Figure 1: Timing diagram for start and stop conditions
Figure 2: Timing diagram for output acknowledge
VER 1.1
5
ACE24AC16C
Two-wire Serial EEPROM
Device Addressing
The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to
invoke valid read or write command. The first four most significant bits of the device address must be
1010, which is common to all serial EEPROM devices. The next bit is device address bit. This device
address bit (5th) is to match with the external chip select/address pin states. If a match is made, the
EEPROM device outputs an ACKNOWLEDGE signal after the 8th read/write bit, otherwise the chip will go
into STANDBY mode. The last or 8th bit is a read/write command bit. If the 8th bit is at VIH then the chip
goes into read mode. If a “0” is detected, the device enters programming mode. ACE24AC16C does not
use any device address bit. Only one ACE24AC16C device can be used on the on 2-wire bus.
Write Operations
(A) Byte Write
A byte write operation starts when a micro-controller sends a START bit condition, follows by a
proper EEPROM device address and then a write command. If the device address bits match the
chip select address, the EEPROM device will acknowledge at the 9th clock cycle. The
micro-controller will then send the rest of the lower 8 bits word address. At the 18th cycle, the
EEPROM will acknowledge the 8-bit address word. The micro- controller will then transmit the 8bit
data. Following an ACKNOWLDEGE signal from the EEPROM at the 27th clock cycle, the
micro-controller will issue a STOP bit. After receiving the STOP bit, the EEPROM will go into a
self-timed programming mode during which all external inputs will be disabled. After a programming
time of TWC, the byte programming will finish and the EEPROM device will return to the STANDBY
mode.
(B) Page Write
A page write is similar to a byte write with the exception that one to sixteen bytes can be
programmed along the same page or memory row. All ACE24AC16C are organized to have 16 bytes
per memory row or page.
With the same write command as the byte write, the micro-controller does not issue a STOP bit after
sending the 1st byte data and receiving the ACKNOWLEDGE signal from the EEPROM on the 27th
clock cycle. Instead, it sends out a second 8-bit data word, with the EEPROM acknowledging at the
36th cycle. This data sending and EEPROM acknowledging cycle repeats until the micro-controller
sends a STOP bit after the n × 9th clock cycle. After which the EEPROM device will go into a
self-timed partial or full-page programming mode. After the page programming completes after a
time of TWC, the devices will return to the STANDBY mode.
VER 1.1
6
ACE24AC16C
Two-wire Serial EEPROM
The least significant 4 bits of the word address (column address) increments internally by one after
receiving each data word. The rest of the word address bits (row address) do not change internally,
but pointing to a specific memory row or page to be programmed. The first page write data word can
be of any column address. Up to 16 data words can be loaded into a page. If more than 16 data
words are loaded, the 17th data word will be loaded to the 1st data word column address. The 18th
data word will be loaded to the 2nd data word column address and so on. In other word, data word
address (column address) will “roll” over the previously loaded data.
(C) Acknowledge Polling
ACKNOWLEDGE polling may be used to poll the programming status during a self-timed internal
programming. By issuing a valid read or write address command, the EEPROM will not acknowledge
at the 9th clock cycle if the device is still in the self-timed programming mode. However, if the
programming completes and the chip has returned to the STANDBY mode, the device will return a
valid ACKNOWLEDGE signal at the 9th clock cycle.
Read Operations
The read command is similar to the write command except the 8th read/write bit in address word is set to
“1”. The three read operation modes are described as follows:
(A) Current Address Read
The EEPROM internal address word counter maintains the last read or write address plus one if the
power supply to the device has not been cut off. To initiate a current address read operation, the
micro-controller issues a start bit and a valid device address word with the read/write bit (8th) set to
“1”. The EEPROM will response with an acknowledge signal on the 9th serial clock cycle. An 8-bit
data word will then be serially clocked out. The internal address word counter will then automatically
increase by one. For current address read the micro-controller will not issue an acknowledge signal
on the 18th clock cycle. The micro-controller issues a valid stop bit after the 18th clock cycle to
terminate the read operation. The device then returns to standby mode.
(B) Sequential Read
The sequential read is very similar to current address read. The micro-controller issues a start bit
and a valid device address word with read/write bit (8th) set to “1”. The EEPROM will response with
an acknowledge signal on the 9th serial clock cycle. An 8-bit data word will then be serially clocked
out. Meanwhile the internally address word counter will then automatically increase by one. Unlike
current address read, the micro-controller sends an acknowledge signal on the 18th clock cycle
signaling the EEPROM device that it wants another byte of data. Upon receiving the acknowledge
signal, the EEPROM will serially clocked out an 8-bit data word based on the incremented internal
address counter. If the micro-controller needs another data, it sends out an ACKNOWLEDGE signal
on the 27th clock cycle. Another 8-bit data word will then be serially clocked out.
VER 1.1
7
ACE24AC16C
Two-wire Serial EEPROM
This sequential read continues as long as the micro-controller sends an acknowledge signal after
receiving a new data word. When the internal address counter reaches its maximum valid address, it
rolls over to the beginning of the memory array address. Similar to current address read, the
micro-controller can terminate the sequential read by not acknowledging the last data word received,
but sending a STOP bit afterwards instead.
(C) Random Read
Random read is a two-steps process. The first step is to initialize the internal address counter with a
target read address using a “dummy write” instruction. The second step is a current address read.
To initialize the internal address counter with a target read address, the micro-controller issues a
START bit first, follows by a valid device address with the read/write bit (8th) set to “0”. The EEPROM
will then acknowledge. The micro-controller will then send the address word. Again the EEPROM will
acknowledge. Instead of sending a valid written data to the EEPROM, the micro-controller performs
a current address read instruction to read the data. Note that once a start bit is issued, the EEPROM
will reset the internal programming process and continue to execute the new instruction which is to
read the currentaddress.
Figure 3: Byte Write
Figure 4: Page Write
VER 1.1
8
ACE24AC16C
Two-wire Serial EEPROM
Figure 5: Current Address Read
Figure 6: Sequential Read
Figure 7: Random Read
Figure 8: SCL and SDA Bus Timing
VER 1.1
9
ACE24AC16C
Two-wire Serial EEPROM
Electrical Specifications
A. Power-Up Requirements
During a power-up sequence, the VCC supplied to the device should monotonically rise from GND to
the minimum VCC level, with a slew rate no faster than 0.05 V/μs and no slower than 0.1 V/ms. A
decoupling cap should be connected to the VCC PAD which is no smaller than 10nF.
B. Device Reset
To prevent inadvertent write operations or any other spurious events from occurring during a
power-up sequence, this device includes a Power-on Reset (POR) circuit. Upon power-up, the
device will not respond to any commands until the VCC level crosses the internal voltage threshold
(VPOR) that brings the device out of Reset and into Standby mode. The system designer must
ensure the instructions are not sent to the device until the VCC supply has reached a stable value
greater than or equal to the minimum VCC level.
Figure 9: Power on and Power down
If an event occurs in the system where the VCC level supplied to the device drops below the maximum
VPOR level specified, it is recommended that a full power cycle sequence be performed by first driving the
VCC pin to GND, waiting at least the minimum tPOFF time and then performing a new power-up sequence
in compliance with the requirements defined in this section.
VER 1.1 10
ACE24AC16C
Two-wire Serial EEPROM
AC Characteristics
Symbol
1.8V
2.5V-5.0V
Units
Parameter
Min
Max
Min
Max
fSCL
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
400
1000
kHz
µs
TLOW
THIGH
1.3
0.6
0.4
0.4
µs
(1)
TI
ns
µs
50
50
Noise suppression time
Clock Low to Data Out Valid
Time the bus must be free before a new
transmission can start
Start Hold Time
TAA
0.2
1.3
0.9
0.2
0.5
0.55
TBUF
µs
THD.STA
TSU.STA
THD.DAT
TSU.DAT
TR
0.6
0.6
0
0.25
0.25
0
µs
µs
µs
ns
µs
ns
µs
ns
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Inputs Rise Time
100
100
0.3
0.3
TF
Inputs Fall Time
300
100
TSU.STO
TDH
Stop Setup Time
0.6
50
0.25
50
Data Out Hold Time
(1)
Vcc slew rate at power up
0.1
100
500
50
0.1
100
500
50
V/ms
tPWR,R
Time required after VCC is stable
before the device can accept
commands
(1)
µs
tPUP
Minimum time at Vcc=0V
between power cycles
Write Cycle Time
(1)
ms
tPOFF
TWR
5
1,000,000
5
ms
Endurance(1)
25℃, Page Mode,3.3V
Write Cycles
Notes：
1. This Parameter is expected by characterization but is not fully screened by test.
2. AC Measurement conditions:
RL (Connects to Vcc): 1.3KΩ
Input Pulse Voltages: 0.3Vcc to 0.7Vcc
Input and output timing reference Voltages: 0.5Vcc
VER 1.1 11
ACE24AC16C
Two-wire Serial EEPROM
DC Characteristics
Symbol
Unit
Parameter
Test Condition
Min
Typ
Max
s
VCC1
ICC
Power supply VCC
Supply Current
1.8
5.5
1.0
V
VCC @5.0V, Read = 400kHZ
VCC@ 5.0V, Write = 400kHZ
VCC @1.8V, VIN = VCC or VSS
VCC @2.5V, VIN = VCC or VSS
VCC @5.0V, VIN = VCC or VSS
VIN = VCC or VSS
0.5
2.0
mA
mA
µA
µA
ICC
Supply Current
3.0
ISB1
ISB2
ISB3
ILI
Standby Current
Standby Current
Standby Current
Input Leakage Current
Output Leakage Current
Input Low Level
1.0
1.0
0.07
1.0
3.0
µA
µA
V
ILO
VIN = VCC or VSS
3.0
VIL
-0.6
VCC*0.3
VCC+0.5
0.2
VIH
VOL1
VOL2
Input High Level
Output Low Level
Output Low Level
VCC*0.7
V
VCC @1.8V, IOL =0.15 mA
VCC @3.0V, IOL = 2.1 mA
V
0.4
V
VER 1.1 12
ACE24AC16C
Two-wire Serial EEPROM
Packaging information
DIP-8
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A2
B
3.710
0.510
3.200
0.380
4.310
0.146
0.020
0.126
0.015
0.170
3.600
0.570
0.142
0.022
B1
C
1.524（BSC）
0.060（BSC）
0.204
9.000
6.200
7.320
0.360
9.400
6.600
7.920
0.008
0.354
0.244
0.288
0.014
0.370
0.260
0.312
D
E
E1
e
2.540 (BSC)
0.100（BSC）
L
3.000
8.400
3.600
9.000
0.118
0.331
0.142
0.354
E2
VER 1.1 13
ACE24AC16C
Two-wire Serial EEPROM
Packaging information
SOP-8
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A2
b
1.350
0.100
1.350
0.330
0.170
4.700
3.800
5.800
1.750
0.250
1.550
0.510
0.250
5.100
4.000
6.200
0.053
0.004
0.053
0.013
0.006
0.185
0.150
0.228
0.069
0.010
0.061
0.020
0.010
0.200
0.157
0.244
c
D
E
E1
e
1.270 (BSC)
0.050 (BSC)
L
0.400
0°
1.270
8°
0.016
0°
0.050
8°
θ
VER 1.1 14
ACE24AC16C
Two-wire Serial EEPROM
Packaging information
TSSOP-8
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
D
E
2.900
4.300
0.190
0.090
6.250
3.100
4.500
0.300
0.200
6.550
1.100
1.000
0.150
0.114
0.169
0.007
0.004
0.246
0.122
0.177
0.012
0.008
0.258
0.043
0.039
0.006
b
c
E1
A
A2
A1
e
0.800
0.020
0.031
0.001
0.65 (BSC)
0.25 (TYP)
0.026 (BSC)
L
0.500
1°
0.700
7°
0.020
1°
0.028
H
0.01 (TYP)
θ
7°
VER 1.1 15
ACE24AC16C
Two-wire Serial EEPROM
Packaging information
MSOP-8
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A2
b
0.820
0.020
0.750
0.250
0.090
2.900
1.100
0.150
0.950
0.380
0.230
3.100
0.320
0.001
0.030
0.010
0.004
0.114
0.043
0.006
0.037
0.015
0.009
0.122
c
D
e
0.65 (BSC)
0.026 (BSC)
E
2.900
4.750
0.400
0°
3.100
5.050
0.800
6°
0.114
0.187
0.016
0°
0.122
0.199
0.031
6°
E1
L
θ
VER 1.1 16
ACE24AC16C
Two-wire Serial EEPROM
Packaging information
USON3*2-8
Dimensions In Millimeters
Symbol
Min
Nom
0.75
Max
0.80
0.05
0.03
0.25
2.10
A
A1
b
0.70
0.02
0.18
0.18
1.90
0.25
c
0.20
D
2.00
D2
e
1.50REF
0.50BSC
1.50BSC
3.00
Nd
E
2.90
3.10
E2
L
1.60REF
0.40
0.30
0.20
0.50
0.30
h
0.25
VER 1.1 17
ACE24AC16C
Two-wire Serial EEPROM
Packaging information
SOT23-5
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A2
b
1.050
0.000
1.050
0.300
0.100
2.820
1.500
2.650
1.250
0.100
1.150
0.500
0.200
3.020
1.700
2.950
0.041
0.000
0.041
0.012
0.004
0.111
0.059
0.104
0.049
0.004
0.045
0.020
0.008
0.119
0.067
0.116
c
D
E
E1
e
0.95 (BSC)
0.037 (BSC)
e1
L
1.800
0.300
0°
2.000
0.600
8°
0.071
0.012
0°
0.079
0.024
6°
VER 1.1 18
ACE24AC16C
Two-wire Serial EEPROM
Packaging information
TSOT23-5
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A2
b
0.700
0.000
0.700
0.350
0.080
2.820
1.600
2.650
0.900
0.100
0.800
0.500
0.200
3.020
1.700
2.950
0.028
0.000
0.028
0.014
0.003
0.111
0.063
0.104
0.035
0.004
0.031
0.020
0.008
0.119
0.067
0.116
c
D
E
E1
e
0.95 (BSC)
1.90 (BSC)
0.300
0°
0.037 (BSC)
0.075 (BSC)
e1
L
0.600
8°
0.012
0°
0.024
8°
θ
VER 1.1 19
ACE24AC16C
Two-wire Serial EEPROM
Notes
ACE does not assume any responsibility for use as critical components in life support devices or systems
without the express written approval of the president and general counsel of ACE Technology Co., LTD.
As sued herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and shoes failure to perform when properly used in
accordance with instructions for use provided in the labeling, can be reasonably expected to result in
a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can
be reasonably expected to cause the failure of the life support device or system, or to affect its safety
or effectiveness.
ACE Technology Co., LTD.
http://www.ace-ele.com/
VER 1.1 20
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明