ACT8332_10 [ACTIVE-SEMI]

Three Channel Integrated Power Management IC for Handheld Portable Equipment; 三通道集成电源管理IC,适用于手持便携式设备
ACT8332_10
型号: ACT8332_10
厂家: ACTIVE-SEMI, INC    ACTIVE-SEMI, INC
描述:

Three Channel Integrated Power Management IC for Handheld Portable Equipment
三通道集成电源管理IC,适用于手持便携式设备

便携式 便携式设备
文件: 总13页 (文件大小:291K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ACT8332  
Rev1, 24-May-10  
Three Channel Integrated Power Management IC  
for Handheld Portable Equipment  
GENERAL DESCRIPTION  
FEATURES  
Multiple Patents Pending  
Three Integrated Regulators  
The patent-pending ACT8332 is a complete, cost  
effective, highly-efficient ActivePMUTM power man-  
agement solution that is ideal for a wide range of  
350mA PWM Step-Down DC/DC  
360mA Low Noise LDO  
portable handheld equipment. This device inte-  
grates one PWM step-down DC/DC converter and  
two low noise, low dropout linear regulators (LDOs)  
in a single, thin, space-saving package. This device  
is ideal for a wide range of portable handheld  
equipment that can benefit from the advantages of  
ActivePMU technology but does not require a high  
level of integration.  
360mA Low Noise LDO  
Independent Enable/Disable Control  
Minimal External Components  
3×3mm, Thin-DFN (TDFN33-10) Package  
Only 0.75mm Height  
RoHS Compliant  
REG1 is a fixed-frequency, current-mode PWM  
step-down DC/DC converter that is optimized for  
high efficiency and is capable of supplying up to  
350mA output current. REG1’s output is available in  
a variety of factory-preset output voltage options,  
and an adjustable output voltage mode is also avail-  
able. REG2, REG3 are low noise, high PSRR linear  
regulators that are capable of supplying up to  
360mA, and 360mA, respectively.  
APPLICATIONS  
Portable Devices and PDAs  
MP3/MP4 Players  
Wireless Handhelds  
GPS Receivers, etc.  
The ACT8332 is available in a tiny 3mm × 3mm  
10-pin Thin-DFN package that is just 0.75mm thin.  
SYSTEM BLOCK DIAGRAM  
OUT1  
REG1  
Adjustable, or  
Step-Down  
Battery  
1.2V to 3.3V  
DC/DC  
Up to 350mA  
ON1  
System  
Control  
Pb  
Pb-free  
OUT2  
1.4V to 3.7V  
Up to 360mA  
REG2  
LDO  
ON3  
OUT3  
1.4V to 3.7V  
Up to 360mA  
REG3  
LDO  
ACT8332  
TM  
PMU  
Active  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 1 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
FUNCTIONAL BLOCK DIAGRAM  
Active- Semi  
VP1  
To Battery  
ACT8332  
UVLO  
SW1  
OUT1  
ON1  
ON3  
FB1  
GP1  
INL  
To Battery or OUT1  
OUT2  
REG2  
LDO  
GA  
REG3  
LDO  
OUT3  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 2 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
ORDERING INFORMATIONcd  
PART  
NUMBER  
TEMPERATURE  
RANGE  
VOUT1  
VOUT2  
VOUT3  
PACKAGE  
PINS  
ACT8332NDAQB-T  
Adjustable  
2.85V  
2.5V  
TDFN33-10  
10  
-40°C to +85°C  
REG1 OUTPUT VOLTAGE CODES  
A
C
P
J
D
E
F
I
Q
G
H
Adjustable  
1.2V  
1.3V  
1.4V  
1.5V  
1.8V  
2.5V  
2.8V  
2.85V  
3.0V  
3.3V  
REG2 OUTPUT VOLTAGE CODES  
J
D
L
E
F
I
Q
G
H
1.4V  
1.5V  
1.7V  
1.8V  
2.5V  
2.8V  
2.85V  
3.0V  
3.3V  
REG3 OUTPUT VOLTAGE CODES  
E
G
K
M
B
H
I
L
R
1.4V  
1.5V  
1.7V  
1.8V  
2.5V  
2.8V  
2.85V  
3.0V  
3.3V  
c: Output voltage options detailed in this table represent standard voltage options, and are available for samples or production orders.  
Additional output voltage options, as detailed in the Output Voltage Codes table, are available for production subject to minimum order  
quantities. Contact Active-Semi for more information regarding semi-custom output voltage combinations.  
d: All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means  
semiconductor products that are in compliance with current RoHS (Restriction of Hazardous Substances) standards.  
PIN CONFIGURATION  
TOP VIEW  
VP1  
1
2
10 FB1  
9
8
7
6
SW1  
GP1  
ON3  
ON1  
GA  
Active- Semi  
ACT8332  
3
4
OUT2  
INL  
5
OUT3  
Thin - DFN (TDFN 33-10)  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 3 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
PIN DESCRIPTIONS  
PIN  
1
NAME  
VP1  
DESCRIPTION  
Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as  
possible to the IC.  
2
SW1  
GP1  
Switching node Output for REG1. Connect this pin to the switching end of the inductor.  
Power Ground for REG1. Connect GA, GP1 together at a single point as close to the IC as  
possible.  
3
Output voltage for REG2. Capable of delivering up to 360mA of output current. Output has  
high impedance when disabled.  
4
5
6
7
8
9
OUT2  
INL  
Power input for REG2, REG3. Bypass to GA with a high quality ceramic capacitor placed as  
close as possible to the IC.  
Output voltage for REG3. Capable of delivering up to 360mA of output current. Output has  
high impedance when disabled.  
OUT3  
GA  
Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1 together at a  
single point as close to the IC as possible.  
Enable control input for REG1, REG2. Drive ON1 to the VP1 or a logic high for normal  
operation, drive to GA or a logic low to disable REG1, REG2  
ON1  
ON3  
Enable control input for REG3. Drive ON3 to the INL or a logic high for normal operation, drive  
to GA or a logic low to disable REG3  
Output Feedback Sense. For fixed output voltage options REG1, connect this pin directly to  
the output node to connect the internal feedback network to the output voltage. For adjustable  
output voltage Options REG1. The voltage at this pin is regulated to 0.625V. Connect this pin  
to the center point of the output voltage feedback network between OUT1 and GA to set the  
output voltage.  
10  
FB1  
EP  
EP  
Exposed Pad. Must be soldered to ground on PCB  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 4 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
ABSOLUTE MAXIMUM RATINGSc  
PARAMETER  
VALUE  
UNIT  
SW1 to GP1,  
INL, VP1, FB1, OUT2, OUT3, ON1, ON3 to GA  
-0.3 to +6  
V
SW1 to VP1  
-6 to +0.3  
-0.3 to +0.3  
33  
V
V
GP1 to GA  
Junction to Ambient Thermal Resistance (θJA)  
Operating Temperature Range  
Junction Temperature  
°C/W  
°C  
-40 to 85  
125  
°C  
Storage Temperature  
-55 to 150  
300  
°C  
Lead Temperature (Soldering, 10 sec)  
°C  
c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may  
affect device reliability.  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 5 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
STEP-DOWN DC/DC CONVERTER  
ELECTRICAL CHARACTERISTICS (REG1)  
(VVP1 = 3.6V, TA = 25°C, unless otherwise specified.)  
PARAMETER  
TEST CONDITIONS  
MIN  
3.1  
TYP  
MAX  
5.5  
UNIT  
V
VP1 Operating Voltage Range  
VP1 UVLO Threshold  
VP1 UVLO Hysteresis  
Standby Supply Current  
Shutdown Supply Current  
Input Voltage Rising  
Input Voltage Falling  
2.9  
3
3.1  
V
90  
mV  
µA  
µA  
130  
0.1  
200  
1
ON1 = GA, VVP1 = 4.2V  
Adjustable Output Option Regulation  
Voltage  
0.625  
V
V
c
V
V
V
NOM1 < 1.3V, IOUT1 = 10mA  
-2.4%  
-1.2%  
VNOM1  
+1.8%  
Output Voltage Regulation Accuracy  
NOM1 1.3V, IOUT1 = 10mA  
VNOM1 +1.8%  
Line Regulation  
Load Regulation  
Current Limit  
VP1 = Max(VNOM1 + 1V, 3.2V) to 5.5V  
0.15  
0.0017  
0.6  
%/V  
%/mA  
A
I
OUT1 = 10mA to 350mA  
0.45  
1.35  
V
V
V
OUT1 20% of VNOM1  
1.6  
1.85  
0.4  
MHz  
kHz  
Oscillator Frequency  
OUT1 = 0V  
530  
INL = 3.1V to 5.5V, VVP1 = 3.1V to 5.5V,  
ON1 Logic High Input Voltage  
ON1 Logic Low Input Voltage  
1.4  
V
V
TA = -40°C to 85°C  
VINL = 3.1V to 5.5V, VVP1 = 3.1V to 5.5V,  
TA = -40°C to 85°C  
PMOS On-Resistance  
ISW1 = -100mA  
0.52  
0.27  
0.88  
0.46  
1
NMOS On-Resistance  
SW1 Leakage Current  
Power Good Threshold  
Minimum On-Time  
ISW1 = 100mA  
V
VP1 = 5.5V, VSW1 = 5.5V or 0V  
µA  
94  
70  
%VNOM1  
ns  
Thermal Shutdown Temperature  
Thermal Shutdown Hysteresis  
Temperature Rising  
Temperature Falling  
160  
20  
°C  
°C  
c: VNOM1 refers to the nominal output voltage level for VOUT1 as defined by the Ordering Information section.  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 6 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
STEP-DOWN DC/DC CONVERTER  
TYPICAL PERFORMANCE CHARACTERISTICS  
(ACT8332NDAQB, VVP1 = 3.6V, L = 3.3µH, CVP1 = 2.2μF, COUT1 = 10μF, TA = 25°C, unless otherwise specified.)  
REG1 Efficiency vs. Load Current  
REG1 Transient Peak Inductor Current  
100  
650  
630  
VOUT1 = 1.8V  
3.2V  
90  
80  
70  
60  
50  
3.6V  
4.2V  
610  
590  
570  
550  
0.1  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
1
10  
100  
1000  
Output Current (mA)  
VP1 Voltage (V)  
REG1 MOSFET Resistance  
REG1 Load Regulation  
600  
500  
400  
0.2  
0.0  
-0.2  
-0.4  
-0.6  
-0.8  
PMOS  
NMOS  
3.6V  
4.2V  
300  
200  
100  
0
-1.0  
0
400  
50  
100  
150  
200  
250  
300  
350  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
Output Current (mA)  
VP1 Voltage (V)  
OUT1 Regulation Voltage  
1.812  
IOUT1 = 35mA  
1.808  
1.804  
1.800  
1.796  
1.792  
1.788  
-40  
-20  
0
20  
40  
60  
85  
Temperature (°C)  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 7 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
STEP-DOWN DC/DC CONVERTER  
FUNCTIONAL DESCRIPTION  
Input Capacitor Selection  
General Description  
The input capacitor reduces peak currents and  
noise induced upon the voltage source. A 2.2µF  
ceramic input capacitor is recommended for most  
applications.  
REG1 is a fixed-frequency, current-mode, synchro-  
nous PWM step-down converters that achieves a  
peak efficiency of up to 97%. REG1 is capable of  
supplying up to 350mA of output current and oper-  
ates with a fixed frequency of 1.6MHz, minimizing  
noise in sensitive applications and allowing the use  
of small external components. REG1 is available  
with a variety of standard and custom output volt-  
ages, as well as an adjustable output voltage option.  
Output Capacitor Selection  
For most applications, a 10µF ceramic output ca-  
pacitor is recommended. Although REG1 was de-  
signed to take advantage of the benefits of ceramic  
capacitors, namely small size and very-low ESR,  
low-ESR tantalum capacitors can provide accept-  
able results as well.  
100% Duty Cycle Operation  
REG1 is capable of operating at up to 100% duty  
cycle. During 100% duty-cycle operation, the  
high-side power MOSFET is held on continuously,  
providing a direct connection from the input to the  
output (through the inductor), ensuring the lowest  
possible dropout voltage in battery-powered appli-  
cations.  
Inductor Selection  
REG1 utilizes current-mode control and a proprie-  
tary internal compensation scheme to simultane-  
ously simplify external component selection and  
optimize transient performance over its full operat-  
ing range. REG1 was optimized for operation with a  
3.3µH inductor, although inductors in the 2.2µH to  
4.7µH range can be used. Choose an inductor with  
a low DC-resistance, and avoid inductor saturation  
by choosing inductors with DC ratings that exceed  
the maximum output current of the application by at  
least 30%.  
Synchronous Rectification  
REG1 features an integrated n-channel synchro-  
nous rectifier, which maximizes efficiency and mini-  
mizes the total solution size and cost by eliminating  
the need for an external rectifier.  
Enabling and Disabling REG1  
Thermal Shutdown  
REG1 is enabled or disabled using ON1. Drive ON1  
to a logic-high to enable REG1. Drive ON1 to a  
logic-low to disable REG1, reducing supply current  
to less than 1µA  
The ACT8332 integrates thermal shutdown protec-  
tion circuitry to prevent damage resulting from ex-  
cessive thermal stress, as may be encountered un-  
der fault conditions. This circuitry disables all regu-  
lators if the ACT8332 die temperature exceeds  
160°C, and prevents the regulators from being en-  
abled until the IC temperature drops by 20°C (typ).  
Soft-Start  
REG1 includes internal soft-start circuitry, and en-  
abled its output voltage tracks an internal 80µs soft-  
start ramp so that it powers up in a monotonic man-  
ner that is independent of loading.  
Output Voltage Programming  
Figure 4 shows the feedback network necessary to  
set the output voltage when using the adjustable  
output voltage option. Select components as fol-  
lows: Set RFB2 = 51K, then calculate RFB1 using  
the following equation:  
Compensation  
REG1 utilizes current-mode control and a proprie-  
tary internal compensation scheme to simultane-  
ously simplify external component selection and  
optimize transient performance over its full operat-  
ing range. No compensation design is required,  
simply follow a few simple guidelines described be-  
low when choosing external components.  
VOUT1  
VFB1  
RFB1 = RFB2  
1  
(1)  
Where VFB1 is 0.625V  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 8 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
STEP-DOWN DC/DC CONVERTER  
Figure 4:  
Output Voltage Programming  
Finally choose CFF using the following equation:  
2.2 ×10 6  
CFF  
=
(2)  
RFB1  
where RFB1 = 47k, use 47pF.  
PCB Layout Considerations  
High switching frequencies and large peak currents  
make PC board layout an important part of step-  
down DC/DC converter design. A good design mini-  
mizes excessive EMI on the feedback paths and volt-  
age gradients in the ground plane, both of which can  
result in instability or regulation errors. Step-down  
DC/DCs exhibit discontinuous input current, so the  
input capacitors should be placed as close as possi-  
ble to the IC, and avoiding the use of vias if possible.  
The inductor, input filter capacitor, and output filter  
capacitor should be connected as close together as  
possible, with short, direct, and wide traces. The  
ground nodes for each regulator's power loops  
should be connected at a single point in a star-  
ground configuration, and this point should be con-  
nected to the backside ground plane with multiple  
vias. For fixed output voltage options, connect the  
output node directly to the FB1 pin. For adjustable  
output voltage options, connect the feedback resis-  
tors and feed-forward capacitor to the FB1 pin  
through the shortest possible route. In both cases,  
the feedback path should be routed to maintain suffi-  
cient distance from switching nodes to prevent noise  
injection. Finally, the exposed pad should be directly  
connected to the backside ground plane using multi-  
ple vias to achieve low electrical and thermal resis-  
tance.  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 9 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
LOW-DROPOUT LINEAR REGULATORS  
ELECTRICAL CHARACTERISTICS (REG2, REG3)  
(VINL = 3.6V, COUT = 1µF, TA = 25°C, unless otherwise specified.)  
PARAMETER  
INL Operating Voltage Range  
INL UVLO Threshold  
TEST CONDITIONS  
MIN  
3.1  
TYP  
MAX UNIT  
5.5  
3.1  
V
V
V
V
INL Input Rising  
INL Input Falling  
2.9  
3
UVLO Hysteresis  
V
0.1  
1
TA = 25°C  
-1.2  
-2.5  
VNOM  
VNOM  
0
+2  
+3  
Output Voltage Accuracy  
%
TA = -40°C to 85°C  
Line Regulation Error  
Load Regulation Error  
VINL = Max(VOUT + 0.5V, 3.6V) to 5.5V  
mV  
I
OUT = 1mA to 360mA  
-0.004  
70  
%/mA  
f = 1kHz, IOUT = 360mA, COUT = 1µF  
f = 10kHz, IOUT = 360mA, COUT = 1µF  
REG2 or REG3 Enabled  
Power Supply Rejection Ratio  
dB  
60  
85  
Supply Current  
REG2 and REG3 Enabled  
125  
1.5  
µA  
REG2 and REG3 Disabled  
ON1, ON3 Logic High Input Voltage VINL = 3.1V to 5.5V, TA = -40°C to 85°C  
1.4  
400  
1
V
V
ON1, ON3 Logic Low Input Voltage  
Dropout Voltage2  
V
INL = 3.1V to 5.5V, TA = -40°C to 85°C  
0.4  
200  
360  
IOUT = 160mA, VOUT > 3.1V  
100  
mV  
mA  
mA  
µs  
Output Current  
Current Limite  
VOUT = 95% of regulation voltage  
Internal Soft-Start  
100  
89  
Power Good Flag High Threshold  
Output Noise  
V
OUT, hysteresis = -4%  
%
C
OUT = 10µF, f = 10Hz to 100kHz  
40  
µVRMS  
µF  
Stable COUT Range  
20  
Discharge Resistor in Shutdown  
Thermal Shutdown Temperature  
Thermal Shutdown Hysteresis  
LDO Disabled  
1000  
160  
20  
Temperature Rising  
Temperature Falling  
°C  
°C  
c: VNOM refers to the nominal output voltage level for VOUT2 or VOUT3 as defined by the Ordering Information section.  
d: Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the  
regulation voltage at 1V differential voltage.  
e: LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Un-  
der heavy overload conditions the output current limit folds back by 30% (typ)  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 10 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
LOW-DROPOUT LINEAR REGULATORS  
TYPICAL PERFORMANCE CHARACTERISTICS  
(ACT8332NDAQB, VINL = 5V, TA = 25°C, unless otherwise specified.)  
Load Regulation  
Dropout Voltage vs. Output Current  
0.5  
225  
0.4  
0.3  
0.2  
200  
175  
150  
125  
100  
75  
REG2, REG3  
0.1  
0.0  
-0.1  
-0.2  
50  
-0.3  
-0.4  
-0.5  
3.1V  
3.3V  
3.6V  
25  
0
25 50 75 100 125 150 175 200 225 250 300 360  
0
0
50  
100  
150  
200  
250  
300  
360  
Output Current (mA)  
Load Current (mA)  
Output Voltage Deviation vs. Temperature  
LDO Output Voltage Noise  
0.5  
0.4  
0.3  
0.2  
0.1  
ILOAD = 0mA  
CH1  
0.0  
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
-15  
CH1: VOUTx, 200µV/div (AC COUPLED)  
TIME: 200ms/div  
-40  
10  
35  
60  
85  
Temperature (°C)  
Region of Stable COUT ESR vs. Output Current  
1
0.1  
Stable ESR  
0.01  
0
50  
100  
150  
200  
250  
300  
360  
Output Current (mA)  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 11 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
LOW-DROPOUT LINEAR REGULATORS  
FUNCTIONAL DESCRIPTION  
A good design places input and output capacitors  
as close to the LDO inputs and output as possible,  
General Description  
REG2 and REG3 are low-noise, low-dropout linear  
regulators (LDOs) that are optimized for low-noise  
and high-PSRR operation, achieving more than  
60dB PSRR at frequencies up to 10kHz.  
and utilizes a star-ground configuration for all regu-  
lators to prevent noise-coupling through ground.  
Output traces should be routed to avoid close prox-  
imity to noisy nodes, particularly the SW nodes of  
the DC/DCs.  
Output Current Capability  
REG2 and REG3 each supply 360mA of load cur-  
rent. Excellent performance is achieved over each  
regulator's entire load current ranges.  
Output Current Limit  
In order to ensure safe operation under over-load  
conditions, each LDO features current-limit circuitry  
with current fold-back. The current-limit circuitry  
limits the current that can be drawn from the output,  
providing protection in over-load conditions. For  
additional protection under extreme over current  
conditions, current-fold-back protection reduces the  
current-limit by approximately 30% under extreme  
overload conditions.  
Enabling and Disabling the LDOs  
REG2 and REG3 is enabled or disabled using ON1  
and ON3. Drive ON1 and ON3 to a logic-high to  
enable REG2 and REG3. Drive ON1 and ON3 to a  
logic-low to disable REG2 and REG3, reducing  
supply current to less than 1µA.  
Output Capacitor Selection  
REG2 and REG3 each require only a small ceramic  
capacitor for stability. For best performance, each  
output capacitor should be connected directly be-  
tween the OUT2 and OUT3 and G pins as possible,  
with a short and direct connection. To ensure best  
performance for the device, the output capacitor  
should have a minimum capacitance of 1µF, and  
ESR value between 10mand 200m. High quality  
ceramic capacitors such as X7R and X5R dielectric  
types are strongly recommended.  
PCB Layout Considerations  
The ACT8332’s LDOs provide good DC, AC, and  
noise performance over a wide range of operating  
conditions, and are relatively insensitive to layout  
considerations. When designing a PCB, however,  
careful layout is necessary to prevent other circuitry  
from degrading LDO performance.  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 12 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  
ACT8332  
Rev1, 24-May-10  
PACKAGE INFORMATION  
PACKAGE OUTLINE  
TDFN33-10 PACKAGE OUTLINE AND DIMENSIONS  
D
DIMENSION IN  
MILLIMETERS  
DIMENSION IN  
INCHES  
SYMBOL  
MIN  
0.700  
0.000  
0.153  
2.900  
2.900  
2.350  
1.650  
0.200  
MAX  
0.800  
0.050  
0.253  
3.100  
3.100  
2.450  
1.750  
0.320  
MIN  
0.028  
0.0000  
0.006  
0.114  
0.114  
0.093  
0.065  
0.008  
MAX  
0.031  
0.002  
0.010  
0.122  
0.122  
0.096  
0.069  
0.012  
A
A1  
A3  
D
E
E
D2  
E2  
b
D2  
e
0.500 TYP  
0.020 TYP  
L
0.300  
0.500  
0.012  
0.020  
E2  
L
b
e
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each  
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use  
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of  
the use of any product or circuit described in this datasheet, nor does it convey any patent license.  
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact  
sales@active-semi.com or visit http://www.active-semi.com.  
®
is a registered trademark of Active-Semi.  
Innovative PowerTM  
ActivePMUTM is a trademark of Active-Semi.  
- 13 -  
www.active-semi.com  
Copyright © 2010 Active-Semi, Inc.  

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