5962-01-392-1478 [ADI]
IC IC,VOLT REFERENCE,FIXED,5V,BIPOLAR,DIP,8PIN,CERAMIC, Voltage Reference;
| 型号： | 5962-01-392-1478 |
| 厂家： | 
ADI |
| 描述： | IC IC,VOLT REFERENCE,FIXED,5V,BIPOLAR,DIP,8PIN,CERAMIC, Voltage Reference |
| 文件： | 总16页 (文件大小：578K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
5 V Precision Voltage
Reference/Temperature Transducer
REF02
FEATURES
PIN CONFIGURATIONS
NC
5 V output: 0.3% maximum
8
NC
NC
1
3
7
5
Temperature voltage output: 1.96 mV/°C
Adjustment range: 3% minimum
Excellent temperature stability: 8.5 ppm/°C maximum
Low noise: 15 µV p-p maximum
Low supply current: 1.4 mA maximum
Wide input voltage range: 7 V to 40 V
High load-driving capability: 10 mA
No external components
V
2
6
V
OUT
IN
NC
TRIM
4
GROUND
(CASE)
NC = NO CONNECT. DO NOT CONNECT ANYTHING
ON THESE PINS. SOME OF THEM ARE RESERVED
FOR FACTORY TESTING PURPOSES.
Figure 1. 8-Lead TO-99 (J-Suffix)
NC
1
2
3
4
8
7
6
5
NC
NC
Short-circuit proof
REF02
V
IN
TOP VIEW
TEMP
GND
V
OUT
(Not to Scale)
TRIM
GENERAL DESCRIPTION
NC = NO CONNECT. DO NOT CONNECT ANYTHING
ON THESE PINS. SOME OF THEM ARE RESERVED
FOR FACTORY TESTING PURPOSES.
The REF02 precision voltage reference provides a stable 5 V
output that can be adjusted over a ±±6 range with minimal
effect on temperature stability. Single-supply operation over an
input voltage range of 7 V to 40 V, low current drain of 1 mA,
and excellent temperature stability are achieved with an
improved band gap design. Low cost, low noise, and low power
make the REF02 an excellent choice whenever a stable voltage
reference is required. Applications include DACs and ADCs,
portable instrumentation, and digital voltmeters. The versatility
of the REF02 is enhanced by its use as a monolithic temperature
transducer. For new designs, refer to the ADR02.
Figure 2. 8-Lead PDIP (P-Suffix), 8-Lead CERDIP (Z-Suffix)
and 8-Lead SOIC (S-Suffix)
3
2
1
20 19
4
5
6
7
8
18
17
16
15
14
NC
NC
NC
NC
V
IN
REF02
NC
TEMP
NC
TOP VIEW
(Not to Scale)
V
OUT
NC
9
10 11 12 13
NC = NO CONNECT. DO NOT CONNECT ANYTHING
ON THESE PINS. SOME OF THEM ARE RESERVED
FOR FACTORY TESTING PURPOSES.
Figure 3. 20-Terminal LCC (RC-Suffix)
OUTPUT RESISTORS
R8
INPUT
2
R7
R14
REF02 OPTION
883C PRODUCT
R9
R11
R12
Q15
18kΩ
2kΩ
6.1kΩ
15kΩ
R15
Q14
Q13
Q8
Q7
Q9
P, S, J, Z PACKAGES 18kΩ
4.5kΩ
Q18
Q12
Q11
Q16
Q19
Q21
C1
R4
Q17
Q10
R6
Q6
Q5
OUTPUT
TRIM
6
5
R13
R3
R12*
R9*
Q4
Q3
R5
≈
1.23V
Q20
R10
Q2
Q1
R1
R11*
3
TEMP
R2
GROUND
*SEE OUTPUT RESISTORS
4
Figure 4. Simplified Schematic
Rev. I
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
© 2005 Analog Devices, Inc. All rights reserved.
REF02
TABLE OF CONTENTS
Features .............................................................................................. 1
General Description......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Specifications............................................................... 3
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
Typical Performance Characteristics ..............................................8
Output Adjustment ........................................................................ 10
Temperature Monitoring........................................................... 11
Reference Stack with Excellent Line Regulation.................... 11
Precision Current Source .......................................................... 12
Supply Bypassing........................................................................ 12
Outline Dimensions....................................................................... 13
Ordering Guide .......................................................................... 15
ESD Caution.................................................................................. 7
REVISION HISTORY
12/05—Rev. H to Rev. I
10/03—Rev. C to Rev. D
Changes to Figure 14...................................................................... 10
Changes to Ordering Guide .......................................................... 15
Updated TPCs.....................................................................Universal
Changes to Features .........................................................................1
Changes to Electrical Specifications ..............................................2
Change to Absolute Maximum Ratings ........................................4
Changes to Ordering Guide.............................................................4
Deleted Typical Electrical Characteristics table........................... 4
Deleted Wafer Test Limits ................................................................4
Deleted Figure 1.................................................................................4
5/05—Rev. G to Rev. H
Updated Figure 4 .............................................................................. 1
Changes to Specifications................................................................ 3
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide .......................................................... 15
2/05—Rev. F to Rev. G
Changes to Specifications................................................................ 3
Change to Outline Dimensions .................................................... 13
10/02—Rev. B to Rev. C
Changes to Features ..........................................................................1
Changes to General Description .....................................................1
Changes to Simplified Schematic....................................................1
Changes to Specifications.................................................................2
Changes to Absolute Maximum Ratings .......................................5
Changes to Package Type ................................................................5
Changes to Ordering Guide.............................................................5
Updated to Outline Dimensions .................................................. 11
7/04—Rev. E to Rev. F
Updated Format..................................................................Universal
Changes to Simplified Schematic ................................................... 1
Changes to Specifications................................................................ 3
Changes to Specifications................................................................ 4
Changes to Specifications................................................................ 5
Changes to Specifications................................................................ 6
Changes to Figure 18...................................................................... 10
Changes to Ordering Guide .......................................................... 15
3/04—Rev. D to Rev. E
Changes to Features.......................................................................... 1
Changes to Specifications................................................................ 2
Changes to Ordering Guide ............................................................ 4
Replaced TPCs 3 and 4 .................................................................... 5
Added Temperature Monitoring section ...................................... 7
Updated Figure 5 ............................................................................. 7
Deleted Table I .................................................................................. 7
Updated Figure 6 ............................................................................. 7
Rev. I | Page 2 of 16
REF02
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
@ VIN = 15 V, TA = 25°C, unless otherwise noted.
Table 1.
REF02A/REF02E
REF02/REF02H
Parameter
Symbol
VO
∆VTRIM
en p-p
Conditions
IL = 0 mA
RP = 10 kΩ
Unit
V
%
Min
4.985
3
Typ
5.000
6
Max
Min
4.975
3
Typ
5.000
6
Max
Output Voltage
5.015
5.025
Output Adjustment Range
Output Voltage Noise1
P, Z, and S Packages
J Package
883 Parts
Line Regulation2
0.1 Hz to 10 Hz
15
20
10
0.006
0.005
5
15
20
10
0.006
0.006
5
µV p-p
µV p-p
µV p-p
%/V
%/mA
µs
mA
mA
mA
mA
15
0.010
0.010
15
0.010
0.010
VIN = 8 V to 40 V
IL = 0 mA to 10 mA
To 0.1% of final value
No load
Load Regulation2
Turn-On Settling Time1
Quiescent Supply Current
Load Current
tON
ISY
IL
IS
ISC
1.0
1.4
1.0
1.4
10
−0.3
10
–0.3
Sink Current3
–0.5
30
–0.5
30
Short-Circuit Current
Temperature Voltage Output4
883C Product
VO = 0
VT
VT
630
550
630
550
mV
mV
P, S, J, and Z Packages
1 Guaranteed by design.
2 Line and load regulation specifications include the effect of self-heating.
3 During sink current test, the device meets the output voltage specified.
4 Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.
Rev. I | Page 3 of 16
REF02
@ VIN = 15 V, −55°C ≤ TA ≤ +125°C for REF02A and REF02; 0°C ≤ TA ≤ 70°C for REF02E and REF02H; IL = 0 mA, unless otherwise
noted.
Table 2.
REF02A/REF02E
REF02/REF02H
Parameter
Symbol
Conditions
Unit
%
%
Min Typ
Max
0.06
0.15
8.5
Min Typ
0.07
Max
Output Voltage Change
∆VOT
0°C ≤ TA ≤ 70°C
−55°C ≤ TA ≤ +125°C
0.02
0.06
3
0.17
0.45
25
with Temperature1, 2
0.18
10
Output Voltage Temperature Coefficient3
TCVO
ppm/°C
Change in VO Temperature Coefficient
with Output Adjustment
RP = 10 kΩ
0.7
0.7
ppm/%
Line Regulation
V
0°C ≤ TA ≤ 70°C
−55°C ≤ TA ≤ +125°C
0°C ≤ TA ≤ 70°C
0.007 0.012
0.009 0.015
0.006 0.010
0.007 0.012
0.007 0.012 %/V
0.009 0.015 %/V
0.007 0.012 %/mA
0.009 0.015 %/mA
IN = 8 V to 40 V4
Load Regulation
IL = 0 mA to 8 mA4
−55°C ≤ TA ≤ +125°C
Temperature Voltage Output Temperature
Coefficient5
TCVT
883C Product
P, S, J, and Z Packages
2.10
1.96
2.10
1.96
mV/°C
mV/°C
1 ΔVOT is defined as the absolute difference between the maximum output voltage and the minimum output voltage over the specified temperature range expressed
as a percentage of 5 V.
VMAX − VMIN
∆VOT
=
×100
5 V
2 ∆VOT specification applies trimmed to 5,000 V or untrimmed.
3 TCVO is defined as ∆VOT divided by the temperature range.
∆VOT
TCVO
=
70°C
4 Line and load regulation specifications include the effect of self-heating.
5 Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.
Rev. I | Page 4 of 16
REF02
@ VIN = 15 V, TA = 25°C, unless otherwise noted.
Table 3.
REF02C
Typ
REF02D
Typ
Parameter
Symbol
VO
∆VTRIM
en p-p
Conditions
IL = 0 mA
RP = 10 kΩ
Unit
V
%
Min
4.950
2.7
Max
Min
4.900
2.0
Max
Output Voltage
Output Adjustment Range
Output Voltage Noise1
P, Z, and S Packages
J Package
883 Parts
Line Regulation2
Load Regulation2
5.000
6.0
5.050
5.000
6.0
5.100
0.1 Hz to 10 Hz
15
20
12
0.009
0.006
µV p-p
µV p-p
µV p-p
%/V
%/mA
%/mA
µs
mA
mA
mA
mA
15
20
0.010
18
0.015
0.015
VIN = 8 V to 40 V
IL = 0 mA to 8 mA
IL = 0 mA to 4 mA
To 0.1% of final value
No load
0.04
0.04
2.0
0.015
5
1.0
Turn-On Settling Time1
Quiescent Supply Current
Load Current
tON
ISY
IL
IS
ISC
5
1.0
1.6
8
−0.3
8
−0.3
Sink Current3
−0.5
30
−0.5
30
Short-Circuit Current
Temperature Voltage Output4
883C Product
VO = 0
VT
VT
630
550
630
550
mV
mV
P, S, J, and Z Packages
1 Guaranteed by design.
2 Line and load regulation specifications include the effect of self-heating.
3 During sink current test, the device meets the output voltage specified.
4 Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.
Rev. I | Page 5 of 16
REF02
@ VIN = 15 V, IL = 0 mA, 0°C ≤ TA ≤ 70°C for REF02CJ, REF02CZ, and REF02DP; and −40°C ≤ TA ≤ +85°C for REF02CP and REF02CS,
unless otherwise noted.
Table 4.
REF02C
Min Typ
REF02D
Min Typ
Parameter
Symbol
Conditions
Unit
Max
Max
Output Voltage Change
∆VOT
0.14
0.45
0.49
1.7
%
with Temperature1, 2
Output Voltage Temperature Coefficient3
Change in VO Temperature Coefficient
with Output Adjustment
Line Regulation4
Load Regulation4
TCVO
20
0.7
65
70
0.7
250
ppm/°C
ppm/%
RP = 10 kΩ
VIN = 8 V to 40 V
IL = 0 mA to 5 mA
0.011 0.018
0.008 0.018
0.012 0.05
0.016 0.05
%/V
%/mA
Temperature Voltage Output
Temperature Coefficient5
883C Product
TCVT
2.10
1.96
2.10
1.96
mV/°C
mV/°C
P, S, J, and Z Packages
1 ΔVOT is defined as the absolute difference between the maximum output voltage and the minimum output voltage over the specified temperature range expressed
as a percentage of 5 V.
VMAX − VMIN
∆VOT
=
×100
5 V
2 ∆VOT specification applies trimmed to 5,000 V or untrimmed.
3 TCVO is defined as ΔVOT divided by the temperature range.
∆VOT
70°C
TCVO
=
4 Line and load regulation specifications include the effect of self-heating.
5 Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.
Rev. I | Page 6 of 16
REF02
ABSOLUTE MAXIMUM RATINGS
Table 5.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating1
40 V
Input Voltage
Output Short-Circuit Duration
to Ground or VIN
Indefinite
Storage Temperature Range
J, RC, and Z Packages
P Package
–65°C to +150°C
–65°C to +125°C
Operating Temperature Range
REF02A, REF02J, REF02RC
REF02CJ, REF02CZ
REF02CP, REF02CS, REF02E, and REF02H
Lead Temperature Range (Soldering 10 sec)
THERMAL RESISTANCE
–55°C to +125°C
0°C to 70°C
–40°C to +85°C
300°C
Table 6.
1
Package Type
θJA
θJC
24
26
50
40
44
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
TO-99 (J)
8-Lead CERDIP (Z)
8-Lead PDIP (P)
20-Terminal Ceramic LCC (RC) 120
8-Lead SOIC (S) 160
170
162
110
1 Absolute maximum ratings apply to both DICE packaged parts, unless
otherwise noted.
1 θJA is specified for worst-case mounting conditions; device in socket for TO,
CERDIP, PDIP, and LCC packages; and device soldered to printed circuit
board for SOIC package.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. I | Page 7 of 16
REF02
TYPICAL PERFORMANCE CHARACTERISTICS
10k
20
19
18
17
16
15
14
V
T
= 15V
IN
T
= 25°C
A
= 25°C
A
1k
100
10
10
100
1k
10k
100k
1M
10
15
20
25
30
35
40
FREQUENCY (Hz)
INPUT VOLTAGE (V)
Figure 5. Output Wideband Noise vs. Bandwidth
(0.1 Hz to Frequency Indicated)
Figure 8. Maximum Load Current vs. Input Voltage
0.0031
0.0100
0.0310
0.1000
0.3100
1.0000
3.1000
10.0000
76
66
56
46
36
26
16
0
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
V
= 15V
IN
V
T
= 15V
= 25°C
IN
A
10
100
1k
10k
100k
1M
–60 –40 –20
0
20
40
60
80
100 120 140
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 6. Line Regulation vs. Frequency
Figure 9. Normalized Load Regulation (∆IL = 10 mA) vs. Temperature
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
0
V
= 15V
IN
DEVICE IMMERSED
25°C
IN 75°C OIL BATH
–60 –40 –20
0
20
40
60
80
100 120 140
–10
0
10
20
30
40
50
TIME (s)
TEMPERATURE (°C)
Figure 7. Output Change Due to Thermal Shock
Figure 10. Normalized Line Regulation vs. Temperature
Rev. I | Page 8 of 16
REF02
0.03
0.02
0.01
0
30
25
20
15
10
5
T
= 25°C
A
V
= 15V
IN
0
5
10
15
20
25
30
–60 –40 –20
0
20
40
60
80
100 120 140
INPUT VOLTAGE (V)
TEMPERATURE (°C)
Figure 11. Line Regulation vs. Input Voltage
Figure 13. Maximum Load Current vs. Temperature
1.3
1.2
1.1
1.0
0.9
0.8
0.7
V
= 15V
IN
–60 –40 –20
0
20
40
60
80
100 120 140
TEMPERATURE (°C)
Figure 12. Quiescent Current vs. Temperature
Rev. I | Page 9 of 16
REF02
OUTPUT ADJUSTMENT
The REF02 trim terminal can be used to adjust the output
voltage over a 5 V ± ꢀ00 mV range. This feature lets the system
designer trim system errors by setting the reference to a voltage
other than 5 V. The output also can be set to exactly 5.00 V or to
5.12 V for binary applications.
Adjustment of the output does not significantly affect the
temperature performance of the device. The temperature
coefficient change is approximately 0.7 ppm/°C for 100 mV of
output adjustment.
+15V
2
V
IN
+5V
6
5
V
O
U1
REF02
10kΩ
REF02
3
TEMP TRIM
GND
10kΩ
V
V
IN
V
V
OUT
O
IN
+15V
4
pot
10kΩ
0.1µF
TEMP TRIM
GND
R1
–5V
470kΩ
OP02
5kΩ
R2
1kΩ
–15V
Figure 14. Output Adjustment Circuit
Figure 16. 5 V Reference
V
+
O
+2.5V
+5V
2
R1
5.6kΩ
6
+18V
2
REF02
V
REF
R2
5.6kΩ
V
IN
7
2
3
–
4
6
OP02
REF02
+
R1
R1 + R2
R2
R1 + R2
4
(V
),
V – =
O
(V
)
V
+ =
REF
REF
O
GND
4
–9V
+V
O
–2.5V
–18V
Figure 17. 2.5 V Reference
Figure 15. Burn-In Circuit
Rev. I | Page 10 of 16
REF02
V+ (12V TO 32V)
TEMPERATURE MONITORING
R7
27kΩ
The REF02 provides a TEMP output (Pin ꢀ) that varies linearly
with temperature. This output can be used to monitor the
temperature change in the system. The voltage at VTEMP is
approximately 550 mV at 25°C, and the temperature coefficient
is approximately 1.9± mV/°C (see Figure 18).
2
R1
R6
V
(9.2kΩ)
IN
2
3
6
8
+
V
O
V+
7
R3
(1.3kΩ)
HEATING
ELEMENT
V–
4
REF02
3
CMP02
–
TEMP
1
850
GND
4
R2
1.5kΩ
V
= 9V
IN
(SEE NOTE 1)
SAMPLE SIZE = 6
800
750
700
650
600
550
500
450
400
Z PACKAGE AND 833 PRODUCT
T = 2.1mV/°C
R5
R4
2.7kΩ
2.2kΩ
∆
V
/∆
TEMP
NOTES
1. REF02 SHOULD BE THERMALLY CONNECTED
TO SUBSTANCE BEING HEATED.
2. NUMBERS IN PARENTHESES ARE FOR A
SETPOINT TEMPERATURE OF 60°C.
∆V
/
∆
T = 1.96mV/°C
||
||
3. R3 = R1 R2 R6
TEMP
Figure 20. Temperature Controller
J, S, AND P PACKAGES
REFERENCE STACK WITH EXCELLENT LINE
REGULATION
Two REF01s and one REF02 can be stacked to yield 5.00 V,
15.00 V, and 25.00 V outputs. An additional advantage is near-
perfect line regulation of the 5.0 V and 15.0 V output. A 27 V to
55 V input change produces an output change that is less than
the noise voltage of the devices. A load bypass resistor (RB)
provides a path for the supply current (ISY) of the 15.00 V
regulator.
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
Figure 18. Voltage at TEMP Pin vs. Temperature
A voltage change of ꢀ9.2 mV at the TEMP pin corresponds to a
20°C change in temperature.
The TEMP function is provided as a convenience rather than a
precise feature. Since the voltage at the TEMP node is acquired
from the band gap core, current pulling from this pin has a
significant effect on VOUT. Care must be taken to buffer the
TEMP output with a suitable low bias current op amp, such as
the AD8±01, AD820, or OP1177. Using any of these three op
amps results in less than a 100 µV change in ΔVOUT (see
Figure 19). Without buffering, even tens of microamps drawn
from the TEMP pin can cause VOUT to fall out of specification.
In general, any number of REF01s and REF02s can be stacked
this way. For example, 10 devices yield 10 outputs in 5 V or 10 V
steps. The line voltage can change from 100 V to 1ꢀ0 V. Care
must be taken, however, to ensure that the total load currents
do not exceed the maximum usable current (typically 21 mA).
27V TO 55V
2
V
IN
15V
6
5
U1
V
O
15V
REF02
REF02
V
V
V
V
O
IN
IN
OUT
10kΩ
TRIM
GND
4
TEMP
V+
OP1177
V–
TRIM
GND
V
TEMP
1.9mV/°C
2
U2
10V
V
6
5
IN
V
O
REF02
Figure 19. Temperature Monitoring
TRIM
GND
10kΩ
2
5V
4
V
6
IN
V
O
REF02
R
B
6.8kΩ
5
TRIM
10kΩ
GND
4
Figure 21. Reference Stack
Rev. I | Page 11 of 16
REF02
PRECISION CURRENT SOURCE
SUPPLY BYPASSING
A current source with ꢀ5 V output compliance and excellent
output impedance can be obtained using this circuit. REF02
keeps the line voltage and power dissipation constant in the
device; the only important error consideration at room
temperature is the negative supply rejection of the op amp. The
typical ꢀ µV/V PSRR of the OP02E creates a 20 ppm change
(ꢀ µV/V × ꢀ5 V/5 V) in output current over a 25 V range. For
example, a 5 mA current source can be built (R = 1 kΩ) with
ꢀ50 MΩ output impedance.
For best results, it is recommended that the power supply pin be
bypassed with a 0.1 µF disc ceramic capacitor.
I
OUT
VOLTAGE COMPLIANCE: –9V TO +25V
6
2
V
IN
V
O
REF02
5V
R
3
5
I
= +
+ 1mA
OUT
TEMP
TRIM
R
GND
+50V
4
35V
–6
R
=
2
O
20
×
10
× 5mA
V
IN
6
–15V
V
O
REF02
Figure 24. Current Sink
2
5kΩ
5kΩ
+15V
2
GND
4
5kΩ
2
LSB
MSB
V
IN
6
+15V
V
O
B1 B2 B3 B4 B5 B6 B7 B8
l
6
5
4
V
IN
V
REF02
O
O
O
R
E
O
OP02
DAC08
2
0.1µF
l
C
(TRIM FOR
CALIBRATION)
REF02
1
V
C
C
LC
V+
V–
GND
4
GND
4
R
C
5kΩ
–15V
+15V
–15V
7
2
3
Figure 25. DAC Reference
6
V
= 0V
O
OP02E
4
TO 25V
+7.5V ( 10%)
2
+7.5V
5V
R
V
IN
6
I
=
O
V
V (+) = +3V
O
O
–5V
R1
20kΩ
REF02HJ
Figure 22. Precision Current Source
GND
4
R2
13.3kΩ
15V
1/2 OP04CK
A1
2
V
IN
6
5
V
O
–7.5V
–7.5V
REF02
5V
R
3
I
= +
+ 1mA
OUT
TEMP
TRIM
R
V
(–) = –3V
A2
1/2 OP04CK
O
GND
R4
2kΩ
R3
1kΩ
4
VOLTAGE COMPLIANCE: –25V TO +8V
–7.5V ( 10%)
I
OUT
Figure 26. 3 V Reference
Figure 23. Current Source
Rev. I | Page 12 of 16
REF02
OUTLINE DIMENSIONS
0.005 (0.13)
MIN
0.055 (1.40)
MAX
8
1
5
REFERENCE PLANE
0.310 (7.87)
0.220 (5.59)
0.5000 (12.70)
MIN
0.2500 (6.35) MIN
0.0500 (1.27) MAX
0.1850 (4.70)
0.1650 (4.19)
0.1000 (2.54)
BSC
4
0.1600 (4.06)
0.1400 (3.56)
0.100 (2.54) BSC
0.405 (10.29) MAX
5
6
8
4
0.320 (8.13)
0.290 (7.37)
0.2000
(5.08)
BSC
3
7
0.060 (1.52)
0.015 (0.38)
0.0450 (1.14)
0.0270 (0.69)
0.200 (5.08)
MAX
2
1
0.1000
(2.54)
BSC
0.0190 (0.48)
0.0160 (0.41)
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.0340 (0.86)
0.0280 (0.71)
0.0400 (1.02) MAX
0.0210 (0.53)
0.0160 (0.41)
0.015 (0.38)
0.008 (0.20)
0.0400 (1.02)
0.0100 (0.25)
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
15°
0°
45° BSC
0.070 (1.78)
0.030 (0.76)
BASE & SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-002-AK
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 29. 8-Lead Metal Header Package [TO-99]
Figure 27. 8-Lead Ceramic Dual In-Line Package [CERDIP]
J-Suffix
(H-08)
Z-Suffix
(Q-8)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.200 (5.08)
0.210
(5.33)
MAX
0.075 (1.91)
REF
REF
0.100 (2.54)
0.064 (1.63)
0.100 (2.54) REF
0.015
(0.38)
MIN
0.095 (2.41)
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
MIN
0.015 (0.38)
GAUGE
0.075 (1.90)
3
19
18
PLANE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
20
SEATING
PLANE
4
8
0.028 (0.71)
0.022 (0.56)
1
0.358 (9.09)
0.342 (8.69)
SQ
0.358
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.011 (0.28)
(9.09)
MAX
SQ
0.430 (10.92)
MAX
BOTTOM
VIEW
0.005 (0.13)
MIN
0.007 (0.18)
R TYP
0.050 (1.27)
BSC
14
0.075 (1.91)
13
9
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
REF
45° TYP
0.088 (2.24)
0.054 (1.37)
0.055 (1.40)
0.045 (1.14)
0.150 (3.81)
BSC
COMPLIANT TO JEDEC STANDARDS MS-001-BA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 28. 8-Lead Plastic Dual In-Line Package [PDIP]
Figure 30. 20-Terminal Ceramic Leadless Chip Carrier [LCC]
Narrow Body
P-Suffix
(N-8)
RC-Suffix
(E-20A)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
Rev. I | Page 13 of 16
REF02
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 31. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body
S-Suffix
(R-8)
Dimensions shown in millimeters and (inches)
Rev. I | Page 14 of 16
REF02
ORDERING GUIDE
TA = 25°C
Model
∆VOS Max (mV)
Temperature Range
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
0°C to 70°C
Package Description
8-Lead TO-99
8-Lead CERDIP
8-Lead CERDIP
8-Lead TO-99
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead CERDIP
8-Lead PDIP
8-Lead PDIP
8-Lead TO-99
8-Lead CERDIP
8-Lead TO-99
8-Lead TO-99
8-Lead CERDIP
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC
8-Lead SOIC
20-Lead LCC
8-Lead CERDIP
Package Option
REF02AJ/883C1
J-Suffix (H-08)
Z-Suffix (Q-8)
Z-Suffix (Q-8)
J-Suffix (H-08)
P-Suffix (N-8)
P-Suffix (N-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
Z-Suffix (Q-8)
P-Suffix (N-8)
P-Suffix (N-8)
J-Suffix (H-08)
Z-Suffix (Q-8)
J-Suffix (H-08)
J-Suffix (H-08)
Z-Suffix (Q-8)
P-Suffix (N-8)
P-Suffix (N-8)
S-Suffix (R-8)
S-Suffix (R-8)
RC-Suffix (E-20A)
Z-Suffix (Q-8)
±15
±15
±15
±50
±50
±50
±50
±50
±50
±50
±50
±50
±50
±100
±100
±15
±15
±25
±25
±25
±25
±25
±25
±25
±25
±25
REF02AZ
REF02AZ/883C1
REF02CJ
REF02CP
REF02CPZ2
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
0°C to 70°C
REF02CS
REF02CS-REEL
REF02CS-REEL7
REF02CSZ2
REF02CSZ-REEL2
REF02CSZ-REEL72
REF02CZ
REF02DP
REF02DPZ2
0°C to 70°C
0°C to 70°C
REF02EJ
−40°C to +85°C
−40°C to +85°C
−55°C to +125°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−55°C to +125°C
−55°C to +125°C
REF02EZ
REF02J
REF02HJ
REF02HZ
REF02HP
REF02HPZ2
REF02HS
REF02HSZ2
REF02RC/8831
REF02Z
1 Consult sales for 883 data sheet.
2 Z = Pb-free part.
Rev. I | Page 15 of 16
REF02
NOTES
©
2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00375-0-12/05(I)
Rev. I | Page 16 of 16
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