AD102 [ADI]

General Purpose Input Isolation Amplifier; 通用输入隔离放大器


型号：	AD102
厂家：	ADI
描述：	General Purpose Input Isolation Amplifier 通用输入隔离放大器隔离放大器
文件：	总6页 (文件大小：109K)
中文：	中文翻译
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General Purpose

Input Isolation Amplifier

AD102/AD104

FEATURES

FUNCTIO NAL BLO CK D IAGRAM

Integral Isolated Pow er Supply

500 V rm s CMV Isolation Rating (100% Tested)

High Accuracy: ؎0.05% Max Nonlinearity

Sm all SIP Style Footprint

AD102

IN–

IN+

SIGNAL

OUT HI

OUT LO

AMPLIFIER

AND

MODULATOR

±5V

DEMOD

Low est Priced Isolation Am plifiers

FILTER

ICOM

APPLICATIONS

POWER

Single/ Multichannel Data Acquisition System s

Process Control Input Signal Isolation

Motor Control

OSCILLATOR

+15V DC

POWER

RECTIFIER

25kHz

PWR/CLK

COM

Utility Pow er Monitoring

General Input Protection Circuits

Ground Loop Interruption

GENERAL D ESCRIP TIO N

P RO D UCT H IGH LIGH TS

Com plete, Single D evice Solution for Input Isolation

T he AD102 offers full isolation without external parts or need

for an external dc/dc power source. T he AD104 features the

same functionality at a lower price for multichannel uses when

supplied with a 25 kHz clock signal.

T he AD102 and AD104 are general purpose, two-port, isolation

amplifiers suitable for use where input signal isolation is desired.

Each offers a functionally complete, compact isolation solution

rated at 500 V rms common mode, based upon the proven and

reliable transformer-coupled, galvanic isolation technique used

in all AD200 series isolation amplifier products.

H igh Accur acy

Each model is offered in a minimum footprint package requiring

no external components to operate. T hough similar to the

AD202 and AD204, the AD102 and AD104 models are in-

tended as lower cost solutions where the performance of the

AD202 or AD204 is not demanded.

A maximum nonlinearity of 0.05% is specified for both the

AD102 and AD104 over the rated temperature range.

Wide Bandwidth

Each is specified with a full power (–3 dB) bandwidth. T he

AD104 at 4 kHz and the AD102 at 1.5 kHz.

Both the AD102 and AD104 can be used in applications where

input-to-input and/or input-to-system isolation is desired. T he

AD102 is best suited for single input uses as it requires only

+15 V dc power to operate. It may also be appropriate for

multichannel applications when input-to-input isolation is not

required such as where a single input multiplexer selects a spe-

cific channel prior to isolation.

H igh P er for m ance Com m on-Mode Rejection

While providing continuous 500 V rms isolation, greater than

100 dB rejection is provided. Each part has only 5.5 pF (typical)

of common-mode input capacitance.

Uncom m itted Input Stage

Both models offer an uncommitted op amp input stage for user

flexibility and input gain optimization up to 100 V/V.

For applications where input to input isolation is required, the

AD104 may be a more desirable choice. It offers the lowest cost

per channel especially when powered from a common clock

source, the cost of which may be amortized over many channels.

Low P ower Consum ption

T he AD104 consumes only 35 mW from the clock source, the

AD102 only 75 mW from the +15 V dc supply.

T he clock necessary for AD104 operation is a 25 kHz, 15 V p-p

square wave applied to the clock input pin. Most standard oscil-

lator components like a CD4047 or T L555 may be used, or a

designer may choose the AD246 clock driver developed for the

AD204 product.

REV. A

Inform ation furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assum ed by Analog Devices for its

use, nor for any infringem ents of patents or other rights of third parties

which m ay result from its use. No license is granted by im plication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norw ood. MA 02062-9106, U.S.A.

Tel: 617/ 329-4700

Fax: 617/ 326-8703

AD102/AD104–SPECIFICATIONS^{(@ T = +25؇C and power supply of +15 V ؎ 5% unless otherwise noted)}

P aram eter

Min

Typ

Max

Unit

Notes

ACCURACY

Gain Range

100

±5.0

V/V

Unity Gain Error

vs. T emperature

vs. T ime

±0.5

±45

±50

±0.01

±0.001

ppm/°C

ppm

%/V

±100 ppm/°C max

Per √1,000 Hours

vs. Supply Voltage, AD102¹

vs. Supply Voltage, AD104¹

Nonlinearity²

±0.05

INPUT VOLT AGE RAT INGS

Linear Differential Range

CMV, Input to Output²

AC, 60 Hz, Sinusoidal Waveform

±5.0

Between IN+ and IN–

100% T ested

500

V rms

V pk-pk

700

Common-Mode Rejection (CMR)

R_S≤ 100 Ω, AD102¹

R_S≤ 100 Ω, AD104¹

R_S≤ 1 kΩ, AD102¹

100

105

0.5

µA

R_S≤ 1 kΩ, AD104¹

Leakage Current

2 µA max, In to Out,

240 V rms @ 60 Hz

INPUT CHARACT ERIST ICS

Input Offset Voltage, Initial

vs. T emperature

Input Bias Current, Initial

vs. T emperature

(±15 ±15/G) mV

µV/°C

+25°C

0°C to +70°C

+25°C

0°C to +70°C

+25°C

0°C to +70°C

(±10 ±10/G)

±100

±20

±10

±2

Input Difference Current, Initial

vs. T emperature

Input Voltage Noise

0.1 Hz to 100 Hz

f > 200 Hz

Differential Input Impedance

Common-Mode Input Impedance

µV pk-pk

nV/√Hz

Ω

10¹²

2Gʈ5.5

ΩʈpF

FREQUENCY RESPONSE

Bandwidth, Full Power (–3 dB)

AD102¹

1.5

4.0

1.0

kHz

V_IN≤ ±5 V, G = 1–50 V/V

T ime to ±10 mV from

10 V Step Input

AD104¹

Settling T ime

RAT ED OUT PUT

Output Voltage Range

Between OUT HI and OUT LO

Between OUT HI or LO to PWR/CLK COM

Output Resistance

±5.0

±6.5

AD102¹

kΩ

AD104¹

Output Ripple

100 kHz Bandwidth

5 kHz Bandwidth

0.5

mV pk-pk

mV rms

POWER SUPPLY (AD102 ONLY)¹

Supply Voltage

Rated Performance

Operational Performance

Supply Current

+14.25

+13.5

+15

+15.75

+16.5

V dc

–2–

REV. A

AD102/AD104

P aram eter

Min

Typ

Max

Unit

Notes

CLOCK OSCILLAT OR (AD104 ONLY)¹

Source Voltage Amplitude

14.25 15

15.75

V pk-pk

kHz

±7.5 V Amplitude Within

±15 V Range

±5 kHz

Square Wave Frequency

Duty Cycle

% Hi vs. Low ±2%

T EMPERAT URE RANGE

Rated Performance

Operating

–40

+70

+85

°C

Storage

PACKAGE DIMENSIONS

SIP Style Package (Y)

2.08 × 0.260 × 0.625 in. (max)

Not Including Pin Length

NOT ES

¹Specification(s) apply to one model only, either AD102 or AD104, as indicated.

²Nonlinearity is specified as a % deviation from a best fit straight line.

³All units 100% tested by “Partial Discharge” method @ 750 V rms for 5 sec, 150 pc maximum allowable discharge.

Specifications subject to change without notice.

P IN D ESIGNATIO NS

Function

D IFFERENCES BETWEEN TH E AD 102 AND AD 104

T he primary difference between the AD102 and AD104 is that

the AD102 contains an integral clock oscillator circuit and the

AD104 does not. As a result, the AD102 operates when sup-

plied +15 V dc power while the AD104 requires power in the

form of 15 V, 25 kHz square wave source. T ypically a clock

source for an AD104 will drive multiple devices to reduce the

per channel cost of the source and to provide perfect oscillator

synchronization between devices. T he AD104 also consumes

slightly less power and has more than twice the bandwidth of

the AD102.

P in

OUT HI

PWR/CLK COM

ICOM

IN+

IN–

+15 V DC (AD102)

CLOCK INPUT (AD104)

OUT LO

In situations where only one or a few isolators are used, the con-

venience of stand-alone operation offered by the AD102 may

provide a greater user advantage than use of the AD104. For

maximum product flexibility both the AD102 and AD104 can

be accommodated by using a single universal layout for device

interchangeability.

O RD ERING GUID E

Model

P ackage

Max CMV

Nonlinearity

AD102JY

AD104JY

SIP Style

500 V rms

0.05%

CAUTIO N

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although these devices feature proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

REV. A

–3–

AD102/AD104

INSID E TH E AD 102 AND AD 104

USING TH E AD 102 AND AD 104

T he AD102 and AD104 use an amplitude modulation tech-

nique to exploit transmission of low frequency signal levels

through an isolation barrier produced by a signal transformer

including signals at a dc level (Figures 1 and 2). Additionally a

separate transformer is incorporated to provide power to the

isolated input port of the device. It is driven by a 25 kHz, 15 V

amplitude square wave generated internally by the AD102, sup-

plied externally for the AD104.

P ower ing the AD 102

T he AD102 requires only a single +15 V DC power supply con-

nected as shown in Figure 3 to operate. A series 1.3 kΩ resistor

and 1.0 µF capacitor are connected across the +15 V DC and

COMMON pins to aid in filtering power line variations.

AD102

1.3k

+15VDC

T he device outputs are not buffered so the user may inter-

change output leads for signal inversion. In multichannel appli-

cations the outputs can be multiplexed with a single buffer

following the multiplexer to minimize offset errors while reduc-

ing power consumption and cost.

1.0µF

PWR/CLK

COM

Figure 3. AD102 Power Input

P ower ing the AD 104

T he AD104 requires its power in the form of a 15 V p-p,

25 kHz square wave from an external source as shown in Fig-

ure 4 (NOT E: pinout for AD246 clock driver shown).

AD102

IN–

IN+

SIGNAL

OUT HI

OUT LO

AMPLIFIER

AND

MODULATOR

±5V

DEMOD

FILTER

ICOM

POWER

OSCILLATOR

+15V DC

AD246

CLOCK DRIVER

POWER

RECTIFIER

25kHz

PWR/CLK

COM

15V p-p

@ 25kHz

AD104

+15VDC

Figure 1. AD102 Functional Block Diagram

PWR/CLK

COM

AD104

IN–

IN+

SIGNAL

OUT HI

OUT LO

AMPLIFIER

AND

MODULATOR

±5V

Figure 4. Typical Multiple AD104 Connection

AD 104 Clock Sour ce

DEMOD

FILTER

ICOM

T he AD246 clock driver designed to power the AD204 is a

clock driver that can be used to supply the required clock for the

AD104 from a +15 V DC supply (refer to the AD202/AD204

data sheet for AD246 specifications).

POWER

CLK IN

RECTIFIER

25kHz

PWR/CLK

COM

For designs where the lowest cost per channel approach is de-

sired, it is usually more cost efficient for designers to consider a

discrete onboard clock source such as the circuit shown in

Figure 5 (essentially an AD246).

Figure 2. AD104 Functional Block Diagram

+15V

1N914

180pF

49.9k

CLK

OUT

1µF

35V

CD4047B

TELEDYNE

TSC426

1N914

CLK/PWR

COM

Figure 5. Typical Clock Driver Circuit

–4–

REV. A

AD102/AD104

Although this circuit generates a unipolar clock output of

0 V–15 V, any 15 V amplitude square wave at 25 kHz with a

duty cycle of 50% is acceptable. T his is possible since the

AD104 clock input is ac coupled by means of a 0.1 µF capacitor

as shown in Figure 6. T he source, therefore, only needs to be

±7.5 V p-p in total amplitude and may be offset as desired. A

recommended maximum amplitude limit of ±15 V with respect

to PWR/CLK COM should not be exceeded.

For gains larger than unity, the addition of a gain and feedback

resistor allows amplification of smaller signals up to a higher

level. Whenever practical, any low level signal should be ampli-

fied to meet a full ±5 V output swing. T his helps reduce the

effective output ripple contribution introduced to the original

signal during modulation, isolation and subsequent filtering as

seen at the output.

100pF

0.1µF

IN–

IN+

ISOLATION

BARRIER

CLK IN

2kΩ

OUT HI

–V

AMPLIFIER

AND

SIG

(±5V)

OUT

(±5V)

MODULATOR

ICOM

0.1µF

OUT LO

0.1µF

PWR/CLK

COM

AD102

AD104

= V

x (

SIG

1 +

)

OUT

≥ 20kΩ

Figure 6. AD104 Clock Input

One clock circuit will usually drive multiple AD104s (typically

4, 8 or 16 units). If many AD104s are to be operated from a

single source, external bypass capacitors should be used with a

value of at least 1 µF for every five isolators used. Place the

capacitor as close as possible to the clock driver.

Figure 8. Input Connection for Gain > 1

When taking a gain of more than 5 V/V, addition of a 100 pF

capacitor is recommended; it is not needed at lower gains, but if

used will not adversely affect operation. Additionally, whenever

the isolation amplifier is not powered, a negative input voltage

of approximately 2 V may cause an input current to flow. If the

signal source can supply more than a few mA of current, a 2 kΩ

limiting resistor in series with IN+ is recommended. T his is es-

pecially advised when using AD102s as they may not power up

properly with a high input current present, (see Figures 7 and 8

for examples).

Input Configur ation

T he AD102 and AD104 are very easy to use in a wide range of

applications. T he input stage connections (IN+, IN–, FB,

ICOM) approximate a “vanilla” type op amp input and may for

all intents and purposes be treated as such. Most any typical cir-

cuit connection that is valid for a standard op amp can be

accommodated, so long as it is expected to perform within

the specifications herein (i.e., limited gain and bandwidth

parameters).

Synchr onization

Since the AD104 operates from a common clock, synchroniza-

tion is inherent. AD102s will normally not interact to produce

beat frequencies even when mounted on 0.3 inch centers. Inter-

action may occur in very rare situations where a large number of

long, unshielded input cables are bundled together. In such

cases, shielded cable may be required or AD104s can be used.

Figure 7 shows the most common input configuration, which is

unity gain operation. T his configuration is appropriate where

the input signal is within the range of ±5 V or where larger sig-

nals have been previously attenuated, usually by means of a tra-

ditional resistor divider technique.

For related information and application examples refer to the

AD202/AD204 and AD210 data sheets.

IN–

ISOLATION

BARRIER

OUT HI

IN+

AMPLIFIER

AND

2kΩ

SEE TEXT)

OUT

(±5V)

SIG

(

MODULATOR

ICOM

OUT LO

±15VDC (AD102)

CLOCK (AD104)

±15VDC

CLOCK IN

COMMON

AD102

AD104

Figure 7. Unity Gain Application

REV. A

–5–

AD102/AD104

O UTLINE D IMENSIO NS

D imensions shown in inches and (mm).

0.250 (6.35) TYP

0.260 (6.60) MAX

2.08 (52.83) MAX

0.625

AD102/AD104

SIDE

(15.88)

VIEW

FRONT VIEW

MAX

0.15

(3.81)

TYP

0.010 x 0.020

(0.254 x 0.508)

0.143

(3.63)

0.120

(3.048)

0.10 (2.54)

1.50 (38.10)

BOTTOM VIEW

0.05 (1.27)

0.10 (2.54)

0.20

(5.08)

NOTE:

PIN 7 IS ONLY PRESENT ON AD102

PIN 8 IS ONLY PRESENT ON AD104

–6–

REV. A

AD102 [ADI]

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