AD1882JCPZ1_技术文档

High Definition Audio

SoundMAX Codec

AD1882

FEATURES

DEDICATED AUXILIARY PINS

Stereo CD input w/GND sense

Six 96 kHz DACs

Mono out pin for internal speakers or telephony

Analog PCBeep input pin

Three independent stereo DAC pairs

Independent 8, 11.025, 16, 22.05, 32, 44.1,

48, 88.2, and 96 kHz sample rates

16-, 20-, and 24-bit PCM resolution

Selectable stereo mixer on outputs

ENHANCED FEATURES

Two stereo headphone amplifiers

Microsoft Vista Premium logo for notebook and desktop

95 dB audio outputs, 90 dB audio inputs

Internal 32-bit arithmetic for greater accuracy

Impedance and presence detection on all jack pins

Digital synthesis PCBeep

Four 96 kHz ADCs

Two independent stereo ADC pairs

Simultaneous record of up to four channels

Independent 8, 11.025, 16, 22.05, 32, 44.1,

48, 88.2, and 96 kHz sample rates

C/LFE channel swapping

Two general-purpose digital I/O (GPIO) pins

Advanced power management modes

EAPD control for internal speakers

16-, 20-, and 24-bit resolution

S/PDIF OUTPUT

Supports 44.1, 48, 88.2, and 96 kHz sample rates

16-, 20-, and 24-bit data widths; PCM and AC3 formats

Digital PCM gain control

48-lead, Pb-free LFCSP_VQ package

AD1882

DIGITAL

BEEP

DAC0

PORT F

⌺

H

HP

PORT D

PORT G

DAC1

D

⌺

A

U

D

I

DAC2

MONO OUT

PORT A

O

HP

I

N

T

E

R

F

A

C

E

⌺

PORT C

PORT E

⌺

ADC0

ADC1

PCBEEP

PORT B

CD IN

Figure 1. AD1882 Block Diagram

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel:781.329.4700

Fax:781.461.3113

www.analog.com

AD1882

TABLE OF CONTENTS

General Description ................................................. 3

Additional Information ............................................. 3

Jack Configuration ................................................... 3

AD1882 Specifications .............................................. 4

Test Conditions ....................................................... 4

Performance ........................................................... 4

General Specifications ............................................... 4

HD-Audio Link Specifications .................................... 6

Power Down States .................................................. 6

Absolute Maximum Ratings ....................................... 7

ESD Sensitivity ........................................................ 7

Environmental Conditions ......................................... 7

Pin Configuration and Function Descriptions ................. 8

HD Audio Widgets ................................................ 11

AD1882 HD Audio Parameters ................................. 12

Outline Dimensions ............................................... 16

Ordering Guide ..................................................... 16

REVISION HISTORY

7/07–Rev 0: Initial version

Rev. 0

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Page 2 of 16

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July 2007

AD1882

GENERAL DESCRIPTION

The AD1882 audio codec and SoundMAX® software provides

superior HD audio quality that exceeds Vista Premium perfor-

mance. The AD1882 has six DACs and four ADCs, two stereo

headphone ports, C/LFE swapping, digital and analog PCBeep,

and S/PDIF output, making the AD1882 the right choice for

desktop PCs where performance is the primary consideration.

Table 2. Typical Desktop Configuration with 5.1 on 3 Jacks

Port

Function

Port A

Port B

Port C

Port D

Port E

Front Panel Headphone

Front Panel Microphone

Rear Panel Line-In/Surround

Rear Panel Line-Out/Headphone

Rear Panel Microphone / C/LFE

The jack retasking feature on this product supports various con-

figurations including platforms for 5.1 on 5 or 3 jacks, and front

panel jack retasking.

Table 3. Typical Notebook Configuration

The AD1882 is available in a 48-lead Pb-free frame chip scale

package in both reels and trays. See Ordering Guide on Page 16.

Port

Function

Port A

Port B

Port C

Port D

Port E

Headphone

Microphone

Internal Microphone

Internal Stereo Speakers

Docking Station Line/Microphone In

ADDITIONAL INFORMATION

This data sheet provides a general overview of the AD1882

SoundMAX codec’s architecture and functionality. Additional

information on the AD1882 is available in the AD1882 Pro-

grammers Reference Manual. Please contact your local ADI

sales representative for more information. For information on

SoundMAX codecs and software see Analog Devices website at

http://www.analog.com/soundMAX.

JACK CONFIGURATION

The guidelines shown in Table 1 through Table 3 should be

used when selecting ports for particular functions..

Table 1. Typical Desktop Configuration with Discreet Jacks

Port

Function

Port A

Port B

Port C

Port D

Port E

Port F

Port G

Front Panel Headphone

Front Panel Microphone

Rear Panel Line-In

Rear Panel Line-Out/Headphone

Rear Panel Microphone

Rear Panel Surround

Rear Panel C/LFE

Rev. 0

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Page 3 of 16

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July 2007

AD1882

AD1882 SPECIFICATIONS

TEST CONDITIONS

Parameter

Test Condition

Temperature

25°C

Digital Supply

Analog Supply

MIC_BIAS_IN (via Low-Pass Filter)

Sample Rate f_S

3.3 V

5.0 V

48 kHz

Input Signal (Frequency Sine Wave) 1008 Hz

Amplitude for THD + N

Analog Output Pass Band

DAC

–3.0 dB Full Scale

20 Hz to 20 kHz

10 kΩ Output Load: Line Out Tests

32 Ω Output Load: Headphone Tests

0 dB Gain

ADC

PERFORMANCE

Parameter

Min

Typ

Max

Unit

Line Out Drive (10 kΩ Loads—DAC to Pin)

Total Harmonic Distortion (THD + N)

Dynamic Range (–60 dB in Ref to f_SA-Weighted)

Signal-to-Noise Ratio

–85

95

dB

Headphone Drive (32 Ω Loads—DAC to Pin)

Total Harmonic Distortion (THD + N)

Dynamic Range (–60 dB in Ref to f_SA-Weighted)

Signal-to-Noise Ratio

–83

95

dB

Input Ports (Pin to ADC, Mic Boost = 0 dB)

Total Harmonic Distortion (THD + N)

Dynamic Range (–60 dB in Ref to f_SA-Weighted)

Signal-to-Noise Ratio

–81

90

dB

GENERAL SPECIFICATIONS

Table 4. AD1882 General Specifications

Parameter

Min

Typ

Max

Unit

DIGITAL DECIMATION AND INTERPOLATION FILTERS¹

Pass Band – f_S(kHz) = 8 ~ 96

Pass-Band Ripple– f_S(kHz) = 8 ~ 96

Stop Band – f_S(kHz) = 8 ~ 96

0

0.4 f_S

±0.005

Hz

dB

Hz

dB

1/f_S

μs

0.6 f_S

Stop-Band Rejection – f_S(kHz) = 8 ~ 96

Group Delay – f_S(kHz) = 8 ~ 96

Group Delay Variation Over Pass Band

ANALOG TO DIGITAL CONVERTERS

Resolution

+20

0

–100

24

Bits

%

dB

mV

Gain Error (Full-Scale Span Relative to Nominal Input Voltage)²

Interchannel Gain Mismatch (Difference of Gain Errors)

ADC Offset Error¹

±10

±0.5

±5

ADC Crosstalk¹

Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L)

Line_In to Other

–85

–100

dB

–80

Rev. 0

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July 2007

AD1882

Table 4. AD1882 General Specifications (Continued)

Parameter

Min

Typ

Max

Unit

DIGITAL TO ANALOG CONVERTERS

Resolution

24

Bits

%

dB

Gain Error (Full Scale Span Relative to Nominal Input Voltage)¹

Interchannel Gain Mismatch (Difference of Gain Errors)

Total Audible Out-of-Band Energy (Measured from 0.6 × f_Sto 100 kHz)¹

DAC Crosstalk

±10

±0.5

–85

–95

1.5

(Input L, Zero R, Read R_OUT; Input R, Zero L, Read L_OUT)¹

DAC VOLUMES

Step size (DAC-0, DAC-1, DAC-2)

Output Gain/Attenuation Range

Mute Attenuation of 0 dB Fundamental¹

ADC VOLUMES

Step size (ADCSEL-0, ADCSEL-1)

PGA Gain/Attenuation Range

Mute Attenuation of 0 dB Fundamental¹

ANALOG MIXER

dB

–58.5

0

–80

1.5

dB

+22.5

–80

Signal-to-Noise Ratio (SNR) Input to Output

CD to Port D Output

Port B, C, or E to Port D Output

Port A to Port D Output

Port D to Port A Output

Step Size: All Mixer Inputs

Input Gain/Attenuation Range: All Mixer Inputs

ANALOG LINE LEVEL OUTPUTS

Full-Scale Output Voltage

95

1.5

dB

–34.5

+12.0

1.0

2.83

1.0

15

V rms³

V p-p

Ω

kΩ

pF

Ports C, E, F, and G Mono Out

Output Impedance¹

300

External Load Impedance¹

10

Output Capacitance¹

External Load Capacitance

1000

pF

ANALOG HP DRIVE OUTPUTS

Full-Scale Output Voltage

Ports A and D

1.0

2.83

V rms³

V p-p

Ω

pF

Output Impedance¹

0.5

External Load Impedance¹

32

Output Capacitance¹

15

External Load Capacitance¹

ANALOG INPUTS

1000

pF

CD, Port D (When Used as Input)

1

2.83

1

V rms³

V p-p

V rms³

V p-p

V rms³

V p-p

V rms³

V p-p

V rms³

V p-p

kΩ

Microphone Boost Amplifier, Ports B, C, or E Boost = 0 dB

(When Used as Inputs)

2.83

0.316

0.894

0.1

0.283

0.032

0.089

20

Boost = 10 dB

Boost = 20 dB

Boost = 30 dB

Input Impedance¹

Input Capacitance¹

5

7.5

pF

Rev. 0

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July 2007

AD1882

Table 4. AD1882 General Specifications (Continued)

Parameter

Min

Typ

Max

Unit

Digital GPIO Pins: GPIO_0, GPIO_1/EAPD

Input Signal High (V_IH)

DV_IO× 0.60

DV_IO

V

Input Signal Low (V_IL)

0

DV_IO× 0.24

V

Input Leakage Current (Signal High, (I_IH)

Input Leakage Current (Signal Low, (I_IL)

Output Signal High (V_OH)

Output Signal Low (V_OL)

S/PDIF_OUT

150

50

nA

μA

V

I_OUT= –500 μA

I_OUT= +1500 μA

DV_IO× 0.72

0

DV_IO

DV_IO× 0.10

V

Output Signal High (V_OH)

Output Signal Low (V_OL)

POWER SUPPLY

I_OUT= –500 μA

I_OUT= +1500 μA

DV_IO× 0.72

0

DV_IO

DV_IO× 0.10

V

Analog (AV_DD) 3.3 V 5%

Power Supply Range

Power Dissipation

3.13

2.97

3.30

119

36

3.46

3.63

V

mW

mA

Supply Current

Digital (DV_DD) 3.3 V ±10%

Power Supply Range

Power Dissipation

3.30

198

60

V

mW

mA

Supply Current

Digital I/O (DV_IO) 3.3 V ±10%

Power Supply Range

Power Dissipation

3.30

3.96

1.20

80

V

mW

mA

dB

Supply Current

Power Supply Rejection (100 mV p-p Signal @ 1 kHz)¹

¹Guaranteed but not tested.

²Measurements reflect main ADC.

³RMS values assume sine wave input.

HD-AUDIO LINK SPECIFICATIONS

HD-Audio signals comply with the High Definition Audio spec-

ifications. Please refer to these specifications at:

http://www.intel.com/standards/hdaudio/

POWER DOWN STATES

Table 5. Power Down States

Parameter

ID_VDDTyp

IA_VDDTyp

Unit

Function node in D0, all nodes active

Function node in D3¹

Codec in RESET

60

23

3

36

1.2

3

mA

Individual block power savings

DAC pair powered down saves (each)

ADC pair powered down saves (each)

Mixer power control (and associated amps) saves

MIC_BIAS powered down saves²

1

6

5

0

6

4.4

3

mA

1.0

Function node D3 state powers down all nodes except for the V_REF, Mixer and MIC_BIAS nodes which have independent power controls. V_REFshould be kept active when

background functions such as jack presence detection or analog pass-through are required. Mixer should be kept active when analog pass-through is required. MIC_BIAS

can be disabled if microphones are not in use in the power-down state.

²Powering down the MIC_BIAS powers down all port MIC_BIAS pins. This disables all microphone bias circuits set to 100% or 50%, setting them to the Hi-Z state. The

0 Ω and Hi-Z states remain unaffected by the MIC_BIAS power state.

Rev. 0

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July 2007

AD1882

ABSOLUTE MAXIMUM RATINGS

ENVIRONMENTAL CONDITIONS

Ambient Temperature Rating

T_AMB= T_CASE– (PD × θ_CA)

Stresses greater than those listed in Table 6 may cause perma-

nent damage to the device. This is a stress rating only;

functional operation of the device at these or any other condi-

tions above those indicated in the operational section of this

specification is not implied. Exposure to absolute maximum rat-

ing conditions for extended periods may affect device reliability.

T

_CASE= Case Temperature in °C

PD = Power Dissipation in W

θ_CA= Thermal Resistance (Case-to-Ambient)

θ_JA= Thermal Resistance (Junction-to-Ambient)

θ_JC= Thermal Resistance (Junction-to-Case)

Table 6. Absolute Maximum Ratings

All measurements per EIA-JESD51 with 2S2P test board per

EIA-JESD51-7.

Power Supplies

Min

Max

Units

Digital (DV_DD)

Digital I/O (DV_IO)

Analog (AV_DD)

Input Current (Except Supply Pins)

Analog Input Voltage (Signal Pins) –0.30

Digital Input Voltage (Signal Pins) –0.30

Ambient Temperature (Operating)

Storage Temperature

–0.30

+3.65

10.0

AV_DD+ 0.3

DV_IO+ 0.3

+70

V

mA

V

°C

Table 7. Thermal Resistance

Package

θ_JA

θ_JC

θ_CA

Unit

LFCSP_VQ

47

15

32

°C/W

0

–65

+150

ESD SENSITIVITY

ESD (electrostatic discharge) sensitive device.

Charged devices and circuit boards can discharge

without detection. Although this product features

patented or proprietary circuitry, damage may occur

on devices subjected to high energy ESD. Therefore,

proper ESD precautions should be taken to avoid

performance degradation or loss of functionality.

Rev. 0

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Page 7 of 16

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July 2007

AD1882

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

48

47

46

45

44

43

42

41

40

39

38

37

PORT-D_R

36

35

34

33

32

31

30

29

28

27

26

25

DV

CORE

1

2

PORT-D_L

GPIO_0

SENSE_B/SRC_A

MIC_BIAS_IN

DV

I/O

3

4

DV

SS

RESERVED (NC)

MIC_BIAS-E

SDATA_OUT

BIT_CLK

5

AD1882JCPZ

6

TOP VIEW

RESERVED (NC)

MIC_BIAS-C

DV

SS

7

(Not To Scale)

SDATA_IN

8

MIC_BIAS-B

DV

DD

9

VREF_FLT

SYNC

RESET

10

AV

SS

DD

11

12

AV

PCBEEP

13 14

15

16

17

18

19

20

21

22

23 24

Figure 2. AD1882 48-Lead Package and Pinout

Rev. 0

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Page 8 of 16

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July 2007

AD1882

Table 8. AD1882 Pin Descriptions

Mnemonic

Pin No. Function

Description

DIGITAL INTERFACE

SDATA_OUT

I

Link Serial Data Output. AD1882 input stream. Clocked on both edges of the

BIT_CLK.

5

BIT_CLK

SDATA_IN

SYNC

I

Link Bit Clock. 24.000 MHz serial data clock.

Link Serial Data Input. AD1882 output stream Clocked only on one edge of BIT_CLK.

Link Frame Sync.

6

8

10

11

I/O

I

RESET

Link Reset. AD1882 master hardware reset

DIGITAL I/O

GPIO_0

GPIO_1/EAPD

2

47

I/O

General Purpose Input/Output Pin. Digital signal used to control external circuitry.

General Purpose Input/Output Pin/EAPD Pin. Digital signal used to control external

circuitry. Defaults to Hi-Z. When used as EAPD: Hi-Z = amp-on, DV_SS= amp off.

S/PDIF_OUT. Supports S/PDIF output.

S/PDIF_OUT

JACK SENSE AND EAPD

SENSE_A/SRC_B

SENSE_B/SRC_A

ANALOG I/O

PCBEEP

PORT-E_L

PORT-E_R

PORT-F_L

PORT-F_R

48

O

13

34

I/O

JACK SENSE A-D Input/Sense B Drive.

JACK SENSE E-H Input/Sense A Drive.

12

14

15

16

17

18

19

LI

Monaural Input from System for Analog PCBeep.

LI, MIC, LO, SWAP Auxiliary Input/Output Left Channel.

LI, MIC, LO, SWAP Auxiliary Input/Output Right Channel.

I/O

LI

Auxiliary Input/Output Left Channel.

Auxiliary Input/Output Right Channel.

CD Audio Left Channel.

CD-Audio-Analog-Ground-Reference (for Differential CD Input). Must be connected

to AGND via 0.1 mF capacitor if not in use as CD_GND.

CD Audio Right Channel.

Front Panel Stereo MIC/Line-In.

Rear Panel Stereo MIC/Line-In.

Rear Panel Headphone/Line-Out.

Front Panel Headphone/Line-Out.

Monaural Output to Internal Speaker or Telephony Subsystem Speakerphone.

Front Panel Headphone/Line-Out.

CD_L

CD_GND

LI

CD_R

20

21

22

23

24

35

36

39

40

41

43

44

LI

PORT-B_L

PORT-B_R

PORT-C_L

PORT-C_R

PORT-D_L

PORT-D_R

PORT-A_L

MONO_OUT

PORT-A_R

PORT-G_L

PORT-G_R

FILTER/REFERENCE

MIC_BIAS-B

MIC_BIAS-C

MIC_BIAS-E

DV_CORE

LI, MIC, HP, LO

LI, MIC, LO

LI, HP, LO

LI, MIC, HP, LO

LO

LI, MIC, HP, LO

LO, SWAP

Rear Panel C/LFE Output.

28

29

31

1

O

Switchable Microphone Bias. For use with Port B (Pins 21, 22).

Switchable Microphone Bias. For use with Port C (Pins 23, 24).

Switchable Microphone Bias. For use with Port E (Pins 14, 15).

CAUTION: DO NOT APPLY 3.3 V TO THIS PIN!

Filter connection for internal core voltage regulator.

This pin must be connected to filter caps: 10 μF, 1.0 μF, and 0.1 μF connected in

parallel between Pin 1 and DV_SS(Pin 4).

VREF_FLT

27

O

Voltage Reference Filter. This pin must be connected to filter caps: 1.0 μF and 0.1μF

connected in parallel between Pin 27 and AV_SS(Pins 26, 42).

The symbols used in this table are defined as: I = Input, O = Output, LI = Line level input, LO = Line level output, HP = Output capable of

driving headphone load, MIC = Input supports microphones with MIC bias and boost amplifier, SWAP = Outputs can swap L/R channels

(typically used to support C/LFE or shared C/LFE function).

Rev. 0

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July 2007

AD1882

Table 8. AD1882 Pin Descriptions (Continued)

Mnemonic

Pin No. Function

Description

POWER AND GROUND

DV_I/O(3.3V)

DV_SS

3

4, 7

9

I

Connect to the I/O Voltage Used for the HD-Audio Controller Signals.

Digital Supply Return (Ground).

Digital Supply Voltage 3.3 V. This is regulated down to DV_COREon Pin 1 to supply the

internal digital core internal to the AD1882.

DV_DD(3.3 V)

AV_DD(3.3 V)

25, 38

I

CAUTION: DO NOT APPLY 5.0 V TO THESE PINS!

Analog supply voltage 3.3 V ONLY.

Note: AV_DDsupplies should be well regulated and filtered as supply noise degrades

audio performance.

MIC_BIAS_IN

AV_SS

33

26, 42

I

Source Power for Microphone Bias Boost Circuitry.

Analog Supply Return (Ground). AV_SSshould be connected to DV_SSusing a

conductive trace under, or close to, the AD1882.

The symbols used in this table are defined as: I = Input, O = Output, LI = Line level input, LO = Line level output, HP = Output capable of

driving headphone load, MIC = Input supports microphones with MIC bias and boost amplifier, SWAP = Outputs can swap L/R channels

(typically used to support C/LFE or shared C/LFE function).

Rev. 0

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July 2007

AD1882

HD AUDIO WIDGETS

In the following table, node IDs that are not shown are reserved

for future use.

Table 9. HD Audio Widgets

Node ID Name

Type ID

Type

Description

00

01

02

03

04

05

08

09

0B

0C

0D

10

11

12

13

14

15

16

17

18

19

1A

1B

1D

1E

20

21

22

23

24

26

27

29

2A

2C

2D

2F

37

39

3A

3C

ROOT

FUNCTION

S/PDIF DAC

DAC_0

DAC_1

DAC_2

ADC_0

ADC_1

S/PDIF Mix Selector

ADC Selector 0

ADC Selector 1

Digital Beep

Port A (Headphone)

Port D (Front L/R)

Mono Out

Port B (Front Mic)

Port C (Line In)

Port F (Surr Back)

Port E (Rear Mic)

CD In

x

Root

Function

Device Identification

Designates this Device as an Audio Codec

S/PDIF Digital Stream Output Interface

0

1

3

7

4

5

4

2

3

2

F

4

2

F

3

Audio Output

Audio Input

Audio Selector

Beep Generator

Pin Complex

Power Widget

Pin Complex

Audio Mixer

Audio Selector

Audio Mixer

Vendor Defined

Pin Complex

Audio Mixer

Vendor Defined

Audio Selector

Headphone/Surround Side (7.1) Channel Digital/Audio Converters

Stereo Front Channel Digital/Audio Converters

Stereo C/LFE Channel Digital/Audio Converters

Stereo Record Channel 1 Audio/Digital Converters

Stereo Record Channel 2 Audio/Digital Converters

Selects which ADC Drives the S/PDIF Mixer

Selects and Amplifies/Attenuates the Input to ADC_0

Selects and Amplifies/Attenuates the Input to ADC_1

Internal Digital PCBeep Signal

Front Panel Headphone/Microphone Jack

Rear Panel Front/Headphone Jack

Monorail Output Pin (Internal Speakers or Telephony System)

Front Panel Microphone/Headphone Jack

Rear Panel Line-In Jack

Rear Panel Surround-Rear (5.1) Jack

Rear Panel Mic Jack

Analog CD Input

Powers Down the Analog Mixer and Associated Amps

External Analog PCBeep Signal Input

Mixer Power Down

Analog PCBeep

S/PDIF Out

S/PDIF Output Pin

S/PDIF Mixer

Mono Out Mixer

Analog Mixer

Mixer Output Atten

Port A Mixer

VREF Power Down

Port G (C/LFE)

Port E Mixer

Port G Mixer

Port D Mixer

Port F Mixer

Port C Mixer

Stereo Mix Down

BIAS Power Down

Port A Out Selector

Port B Boost

Port C Boost

Port E Boost

Mixes the Selected ADC with the Digital Stream to Drive S/PDIF Out

Selects Which Source Drives the Mono Out Signal

Mixes Individually Gainable Analog Inputs

Attenuates the Mixer Output to Drive the Port Mixers

Mixes the Port A Selected DAC and Mixer Output Amps to Drive Port A

Powers Down the Internal and External VREF Circuitry

Rear Panel C/LFE Jack

Mixes DAC_1 and Mixer Output Amps to Drive Port E

Mixes DAC_1 and Mixer Output Amps to Drive Port G

Mixes DAC_0 and Mixer Output Amps to Drive Port D

Mixes DAC_2 and Mixer Output Amps to Drive Port F

Mixes the Port C Selected DAC and Mixer Output Amps to Drive Port C

Mixes the Stereo L/R Channels to Drive Mono Output

Powers Down the Internal MIC_BIAS_FILT and all MIC_BIAS Pins

Selects the Port A DAC (0, 1)

Microphone Boost Amp for Port B

Microphone Boost Amp for Port C

Microphone Boost Amp for Port E

Rev. 0

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July 2007

AD1882

AD1882 HD AUDIO PARAMETERS

The SSID value is set on codec power-up only. SSID is not reset

by link or soft reset in order to preserve modifications by BIOS

control.

Table 10. Root and Function Node Parameters

Sub Node

Count

04

Func. Group Audio F.G.

Vendor ID

00

Revision ID

Type

05

Caps

08

GPIO Caps

11

Node ID

Name

01

02¹

03

00

01

ROOT

FUNCTION

11D41882

00100100

00010001

0002003B

00000001

00010C0C

40000002

¹Subject to change with silicon stepping.

Table 11. SubSystem ID ¹

SubSystem ID

Node ID

01

31:16

SSID

BFD2

15:8

SKU

00

7:0

Asm ID

00

Name

FUNCTION

Value

BFD20000

¹The default SSID is over-written by platform BIOS after power on. It is preserved across HD Audio link reset and verb reset.

Rev. 0

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Page 12 of 16

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July 2007

AD1882

Table 12. Widget Parameters

Output

Processing Amp

Volume

Knob

Widget

Stream

Input Amp ConnList

Power

States

0F

Capabilities PCM Size, Formats

09

Capabilities Capabilities Length

0C

Caps

10

Capabilities Capabilities

12

Node ID

Rate 0A 0B

0D

0E

13

01

02

03

04

05

08

09

0B

0C

0D

10

11

12

13

14

15

16

17

18

19

1A

1B

1D

1E

1F

20

21

22

23

24

26

27

29

2A

2C

2D

2F

37

39

3A

3C

00000480

0003031D 000E01E0 00000005

000E01FF 00000001

80000000

00000009

00052727

80052727

00052727

00000001

00000000

00000001

00000002

00000008

00000000

00000001

00000000

00000001

00000000

00000002

00000000

00000001

00000002

00000001

00000008

00000001

00000002

00000008

00000001

00000002

00000001

00000003

00000002

00000001

00000405

00100501

00300301

0030010D

0070000C

0040018D

0040058D

0040050C

00400081

0040018D

0040098D

00400001

00500500

00400000

00400301

00200303

00200103

00F00100

0020010B

0030010D

00200103

00F00100

0040098D

00200103

00200100

00F00100

00300101

0030010D

000E01FF 00000001

00000009

80053627

800B0F0F

80000000

80051F1F

0000373F

0001003F

00010010

00003727

00003737

00000017

00003737

00000020

00000009

80000000

00000009

00000020

00000010

80000000

00000010

00000017

80051F17

80000000

80051F1F

80000000

00270300

Rev. 0

|

Page 13 of 16

|

July 2007

AD1882

Table 13. Connection List

Node ID Connections

0

1

I

2

I

3

I

4

I

5

I

6

I

7

I

[0–3]

[4–7]

NID

02

03

04

05

08

09

0B

0C

0D

10

11

12

13

14

15

16

17

18

19

1A

1B

1D

1E

1F

20

21

22

23

24

26

27

29

2A

2C

2D

2F

37

39

3A

3C

0000001D

1D

0000000C

0000000D

00000908

18BC3911

0C

0D

08

11

09

39

20123B3B

1

3C

18

3B

12

20

00000022

00000029

0000002D

22

29

2D

0000002C

0000002A

00000026

2C

2A

26

00002120

20

21

00000002

00000B01

00002104

00000002

12113A39

00000020

00002137

A2209811

00000027

00002105

00002104

00002106

00002131

0000001E

00171514

00000403

00000014

00000015

00000017

02

01

04

02

39

20

37

11

27

05

04

03

1E

14

03

14

15

17

0B

21

1A183B3C

BC30AE24

3A

11

20

12

22

3C

24

3B

2E

18

30

1A

3C

21

18

1

21

15

04

17

Rev. 0

|

Page 14 of 16

|

July 2007

AD1882

In Table 14, default configuration values are set on codec

power-up only. Default configuration values are not reset by

link or soft reset to preserve modifications by BIOS control.

Table 14. Default Configuration Bytes

31:30

29:28

27:24

23:20

19:16

15:12

8

7:4

3:0

Location

Misc.

JD Over

Ride

Name

Value

Connectivity Chasis Position Def. Device Conn Type Color

Def Assn Sequence

Port A (Headphone) 0221401F Jack

Port D (Front L/R) 01014010 Jack

External Front

External Rear

Internal N/A

External Front

External Rear

HP Out

Line Out

Speaker

Mic In

Line In

Line Out

Mic In

1/8” Jack

Other Analog Unknown 1

1/8” Jack

ATAPI

Green

0

1

F

2

1

2

F

1

F

0

1

2

0

E

0

1

Mono Out

901701F0 Fixed

Port B (Front Mic) 02A190F0 Jack

Pink

Blue

Black

Pink

0

Port C (Line In)

Port F (Surr Back)

Port E (Rear Mic)

CD IN

Analog PCBeep

S/PDIF Out

01813021 Jack

01011012 Jack

01A19020 Jack

9933012E Fixed

90F701F0 Fixed

014511F0 Jack

01016011 Jack

Internal Special 3 CD

Unknown 1

Internal N/A

External Rear

Other

SPDIF Out Optical

Line Out 1/8” Jack

Other Analog Unknown 1

Black

Orange

1

0

Port G (C/LFE)

Rev. 0

|

Page 15 of 16

|

July 2007

AD1882

OUTLINE DIMENSIONS

Dimensions are shown in millimeters.

0.30

0.23

0.18

7.00

0.60 MAX

BSC SQ

0.60 MAX

PIN 1

INDICATOR

37

36

48

1

PIN 1

INDICATOR

EXPOSED

5.25

5.10 SQ

4.95

TOP

6.75

PAD

VIEW

BSC SQ

(BOTTOM VIEW)

0.50

0.40

0.30

25

24

12

13

0.25 MIN

5.50

REF

0.80 MAX

0.65 TYP

1.00

0.85

0.80

12° MAX

0.05 MAX

0.02 NOM

COPLANARITY

0.08

0.50 BSC

0.20 REF

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2

Figure 3. 48-Lead, Lead Frame Chip Scale Package [LFCSP_VQ]

7 mm x 7 mm Body, Very Thin Quad

(CP-48-1)

Dimensions shown in millimeters

ORDERING GUIDE

Model

Temperature Range

Package Description

Package Option

AD1882JCPZ¹

0°C to 70°C

48-Lead LFCSP_VQ

CP-48-1

AD1882JCPZ-RL¹

¹Z = RoHS Compliant Part.

registered trademarks are the property of their respective owners.

D06826-0-7/07(0)

Rev. 0

|

Page 16 of 16

|

July 2007


型号：	AD1882JCPZ1
厂家：	ADI
描述：	High Definition Audio SoundMAX Codec 高清晰度音频编解码器的SoundMAX 解码器编解码器
文件：	总16页 (文件大小：851K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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