AD1884JCPZ-RL_技术文档

High Definition Audio

SoundMAX^®Codec

aꢀ

AD1884

FEATURES

ENHANCED FEATURES

Two stereo headphone amplifiers

FOUR 192 kHz DACs/ADCs

Microsoft Vista premium logo for notebook

90 dB audio outputs, 85 dB audio inputs

Internal 32-bit arithmetic for greater accuracy

Impedance and presence detection on all jacks

Three independent microphone bias pins

Digital and analog PCBeep

Two independent stereo DAC/ADC pairs

Simultaneous record of two stereo channels

Simultaneous playback of two stereo channels

Independent 8, 11.025, 16, 22.05, 32, 44.1,

48, 88.2, 96, 176.4, and 192 kHz sample rates

16, 20, and 24-bit resolution

Three general-purpose digital I/O (GPIO) pins

3.3 V analog and digital supply voltages

Advanced power management modes

48-lead, Pb-free LFCSP_VQ package

Selectable stereo mixer on outputs

S/PDIF OUTPUT

Supports 44.1, 48, 88.2, 96, 176.4, and 192 kHz sample rates

16, 20, and 24-bit data; PCM, and AC3 formats

Digital PCM gain control

DEDICATED AUXILIARY PINS

Stereo CD/auxiliary I/O port w/GND sense

Stereo auxiliary/dock I/O port

Mono out pin for internal speakers or telephony

AD1884

�

HP

H

D

DAC1

DAC0

PORT A

HP

PORT D

�

A

U

D

I

MONO OUT

S/PDIF OUT

O

PORT E

I

PORT F

PCBEEP

PORT C

PORT B

N

T

E

R

F

A

C

E

DIGITAL

PCBEEP

�

ADC0

ADC1

Figure 1. Functional Block Diagram

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

AD1884ꢀ

CONTENTS

General Description ................................................. 3

Additional Information ......................................... 3

Jack Configurations .............................................. 3

AD1884 Specifications .............................................. 4

Test Conditions ................................................... 4

Performance ........................................................ 4

General Specifications ............................................ 4

HD–Audio Link Specification .................................. 6

Power Down States ............................................... 7

Absolute Maximum Ratings ....................................... 8

ESD Sensitivity ..................................................... 8

Environmental Conditions ...................................... 8

Pin Configuration and Function Descriptions ................. 9

HD Audio Widgets ................................................ 12

AD1884 HD Audio Parameters ................................. 13

Outline Dimensions ............................................... 15

Ordering Guide ..................................................... 15

REVISION HISTORY

1/07–Rev 0: Initial version

Rev. 0

|

Page 2 of 16

|

January 2007

AD1884ꢀ

GENERAL DESCRIPTION

The AD1884 family of audio codecs and SoundMAX® software

provides superior high definition audio quality that exceeds

Vista Premium for notebook performance. The AD1884 has

four 192 kHz DACs, four 192 kHz ADCs, S/PDIF output, Digi

tal Beep and analog PCBeep. These features make the AD1884

the right choice for notebook PCs that meet the Microsoft Vista

premium performance specifications as well as desktop PCs that

meet the Microsoft Vista Basic performance specifications.

The AD1884 is available in a 48lead, Pbfree frame chip scale

package in both reels and trays. See Ordering Guide on Page 15.

ADDITIONAL INFORMATION

This data sheet provides a general overview of the AD1884

SoundMAX codec’s architecture and functionality. Additional

information on the AD1884 is available in the AD1884 Pro

grammers Reference Manual. Please contact your local ADI

sales representative for more information. For information on

SoundMAX codecs and software see Analog Devices website at

http://www.analog.com/soundMAX.

JACK CONFIGURATIONS

The guideline shown in Table 1 should be used when selecting

ports for particular functions. The symbols used in this table are

defined as: LI = Line Level Input, LO = Line Level Output,

HP = Output capable of driving headphone load, MIC = Input

supports microphones with MIC bias and boost amplifier.

Table 1. Port Assignments

Port

HP

MIC

LO

LI

Port A

x

Port B

Port C

x

Port D

Port E

Port F

MONO_OUT

x

Rev. 0

|

Page 3 of 16

|

January 2007

AD1884ꢀ

AD1884 SPECIFICATIONS

TEST CONDITIONS

Parameter

Test Condition

Temperature

25°C

Digital Supply

Analog Supply

MIC_BIAS_IN (via Low-Pass Filter)

Sample Rate f_S

3.3 V

5.0 V

48 kHz

Input Signal (Frequency Sine Wave) 1008 Hz

Amplitude for THD + N

Analog Output Pass Band

DAC

–3.0 dB Full Scale

20 Hz to 20 kHz

10 kΩ Output Load: Line Out Tests

32 Ω Output Load: Headphone Tests

0 dB Gain

ADC

PERFORMANCE

Parameter

Min

Typ

Max

Unit

Line Out Drive (10 kΩ loads—DAC to Pin)

Total Harmonic Distortion (THD + N)

Dynamic Range (–60 dB in ref to f_SA-Weighted)

Signal-to-Noise Ratio

–84

90

dB

Headphone Drive (32 Ω loads—DAC to Pin)

Total Harmonic Distortion (THD + N)

Dynamic Range (–60 dB in ref to f_SA-Weighted)

Signal-to-Noise Ratio

–74

90

dB

Microphone/Line In (Pin to ADC, Mic Boost = 0 dB)

Total Harmonic Distortion (THD + N)

Dynamic Range (–60 dB in ref to f_SA-Weighted)

Signal-to-Noise Ratio

–78

85

dB

GENERAL SPECIFICATIONS

Parameter

Min

Typ

Max

Unit

DIGITAL DECIMATION AND INTERPOLATION FILTERS¹

Pass Band – f_S(kHz) = 8 ~ 192

0

0.4 f_S

±0.005

Hz

dB

Hz

dB

1/f_S

μs

Pass-Band Ripple– f_S(kHz) = 8 ~ 192

Stop Band – f_S(kHz) = 8 ~ 192

Stop-Band Rejection – f_S(kHz) = 8 ~ 192

Group Delay – f_S(kHz) = 8 ~ 192

0.6 f_S

–100

20

0

Group Delay Variation Over Pass Band

ANALOG TO DIGITAL CONVERTERS

Resolution

24

Bits

%

dB

mV

Gain Error²(Full-Scale Span Relative to Nominal Input Voltage)

Interchannel Gain Mismatch (Difference of Gain Errors)

ADC Offset Error¹

±10

±0.5

±5

±0.2

ADC Crosstalk¹

Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L)

Line_In to Other

–85

–100

dB

–80

Rev. 0

|

Page 4 of 16

|

January 2007

AD1884ꢀ

Parameter

Min

Typ

Max

Unit

DIGITAL TO ANALOG CONVERTERS

Resolution

24

Bits

%

dB

Gain Error¹(Full Scale Span Relative to Nominal Input Voltage)

Interchannel Gain Mismatch (Difference of Gain Errors)

Total Audible Out-of-Band Energy¹(Measured from 0.6 × f_Sto 20 kHz)

DAC Crosstalk¹(Input L, Zero R, Measure R_OUT; Input R, Zero L, Measure L_OUT)

DAC VOLUMES

±10

±0.5

–85

–95

Step Size (DAC-0, DAC-1)

1.5

–80

1.5

dB

Output Gain/Attenuation Range

Mute Attenuation of 0 dB Fundamental¹

ADC VOLUMES

Step Size (ADCSEL-0, ADCSEL-1)

PGA Gain/Attenuation Range

ANALOG MIXER

–58.5

–34.5

0

dB

+22.5

+12.0

Signal-to-Noise Ratio Input to Output – Ports B, C, or F, to Port D Output

Step Size: All Mixer Inputs

90

–1.5

dB

Input Gain/Attenuation Range: All Mixer Inputs

ANALOG LINE LEVEL OUTPUTS

Full-Scale Output Voltage: Line Out Drive Enabled

Ports A, D, E, F, and Mono Out

1.0

2.83

V rms³

V p-p

Ω

kΩ

pF

Output Impedance¹

190

15

External Load Impedance¹

10

Output Capacitance¹

External Load Capacitance

1000

pF

ANALOG HP DRIVE OUTPUTS

Full-Scale Output Voltage: Line Out Drive Enabled

Ports A and D (when HP Drive is Enabled)

Output Impedance¹

1.0

2.83

V rms

V p-p

Ω

pF

0.5

External Load Impedance¹

32

Output Capacitance¹

15

External Load Capacitance¹

1000

pF

ANALOG INPUTS

Input Voltages—Port B, C, or E

Mic Boost = 0 dB

1

2.83

V rms

V p-p

Input Voltages—Microphone Boost Amplifier, Ports B, C, or E

Mic Boost = +10 dB

0.316

0.894

0.1

0.283

0.032

0.089

V rms

V p-p

V rms

V p-p

V rms

V p-p

Mic Boost = +20 dB

Mic Boost = +30 dB

Input Impedance

PCBEEP

23

150

45

5

kΩ

pF

Ports B, C, E (Mic Boost = 0 dB)

Port F

Input Capacitance¹

7.5

Rev. 0

|

Page 5 of 16

|

January 2007

AD1884ꢀ

Parameter

Min

Typ

Max

Unit

MICROPHONE BIAS

MIC_BIAS-B, MIC_BIAS-C

MIC_BIAS_IN (Pin 33) = +5 V or +3.3 V

V_REFSetting = Hi-Z

_REFSetting = 0 V

V_REFSetting = 50%

Hi-Z

0

V dc

V

1.65

3.7

3.9

2.86

3.0

MIC_BIAS_IN (Pin 33) = +5 V

MIC_BIAS_IN (Pin 33) = +3.3 V

V

_REFSetting = 80%

_REFSetting = 100%

V_REFSetting = 80%

_REFSetting = 100%

V

MIC_BIAS-E (When enabled as BIAS)

V_REFSetting = Hi-Z

V_REFSetting = 0 V

Hi-Z

0

1.65

2.86

3.0

V dc

V

_REFSetting = 50%

V_REFSetting = 80%

_REFSetting = 100%

V

Output Drive Current

GPIO 0

V_REFSetting = 50%, 80%, or 100%

1.6

mA

Input Signal High (V_IH)

Input Signal Low (V_IL)

Output Signal High (V_OH

Output Signal Low (V_OL)

DV_IO× 0.60

0

DV_IO× 0.72

0

DV_IO

DV_IO× 0.24

DV_IO

V

)

I_OUT= –500 μA

I_OUT= +1500 μA

DV_IO× 0.10

Input Leakage Current (Signal High) (I_IH)

Input Leakage Current (Signal Low) (I_IL)

–150

–50

nA

μA

GPIO 1 and 2

Input Signal High (V_IH)

Input Signal Low (V_IL)

Output Signal High (V_OH

Output Signal Low (V_OL)

Input Leakage Current (Signal High) (I_IH)

Input Leakage Current (Signal Low) (I_IL)

AV_DD× 0.60

0

AV_DD× 0.72

0

AV_DD

V

AV_DD× 0.24 V

AV_DD

AV_DD× 0.10 V

nA

)

I_OUT= –500 μA

I_OUT= +1500 μA

V

–150

–50

μA

POWER SUPPLY

Analog (AV_DD) 3.3 V ±5%

Power Supply Range

Power Dissipation

3.13

2.97

3.30

99

31

3.46

3.63

V

mW

mA

Supply Current

Digital (DV_DD) 3.3 V ±10%

Power Supply Range

Power Dissipation

3.30

162

58

V

mW

mA

Supply Current

Digital I/O (DV_IO) 3.3 V ±10%

Power Supply Range

Power Dissipation

3.30

3.96

1.2

V

mW

mA

dB

Supply Current

Power Supply Rejection (reference to f_S100 mV p-p Signal @ 1 kHz)¹

80

¹Guaranteed but not tested.

²Measurements reflect main ADC.

³RMS values assume sine wave input.

HD–AUDIO LINK SPECIFICATION

Highdefinition audio signals comply with the Highdefinition

Audio specification. Please refer to these specifications at:

http://www.intel.com/standards/hdaudio/

Rev. 0

|

Page 6 of 16

|

January 2007

AD1884ꢀ

POWER DOWN STATES

Parameter

ID_VDDTyp

IA_VDDTyp

Unit

Function Node in D0, All Nodes Active

Function Node in D3¹

Codec in RESET

58

21

3

31

2

3

mA

Individual Block Power Savings

DAC Pair Powered Down Saves (Each)

ADC Pair Powered Down Saves (Each)

Mixer Power Control (And Associated Amps) Saves

MIC_BIAS Powered Down Saves²

1

6

5

0

5

3

2

0.5

mA

Function node D3 state powers down all nodes except for the V_REF, Mixer and MIC_BIAS nodes which have independent power controls. V_REFshould be kept active when

background functions such as jack presence detection or analog passthrough are required. Mixer should be kept active when analog passthrough is required. MIC_BIAS

can be disabled if microphones are not in use in the powerdown state.

²Powering down the MIC_BIAS powers down all port MIC_BIAS pins. This disables all microphone bias circuits set to 100% or 50%, setting them to the HiZ state. The

0 Ω and HiZ states remain unaffected by the MIC_BIAS power state.

Rev. 0

|

Page 7 of 16

|

January 2007

AD1884ꢀ

ABSOLUTE MAXIMUM RATINGS

Stresses greater than those listed below may cause permanent

damage to the device. This is a stress rating only; functional

operation of the device at these or any other conditions above

those indicated in the operational section of this specification is

not implied. Exposure to absolute maximum rating conditions

for extended periods may affect device reliability.

Power Supplies

Min

Max

Units

Digital (DV_DD)

Digital I/O (DV_IO)

Analog (AV_DD)

–0.30

+3.65

V

Input Current (Except Supply Pins)

Analog Input Voltage (Signal Pins) –0.30

Digital Input Voltage (Signal Pins)

Ambient Temperature (Operating)

Storage Temperature

10.0

mA

V

°C

AV_DD+ 0.3

DV_IO+ 0.3

+70

–0.30

0

–65

+150

ESD SENSITIVITY

ESD (electrostatic discharge) sensitive device.

Charged devices and circuit boards can discharge

without detection. Although this product features

patented or proprietary circuitry, damage may occur

on devices subjected to high energy ESD. Therefore,

proper ESD precautions should be take to avoid

performance degradation or loss of functionality.

ENVIRONMENTAL CONDITIONS

Ambient Temperature Rating

T

_AMB= T_CASE– (PD × θ_CA)

T

_CASE= Case Temperature in °C

PD = Power Dissipation in W

θ_CA= Thermal Resistance (CasetoAmbient)

θ_JA= Thermal Resistance (JunctiontoAmbient)

θ_JC= Thermal Resistance (JunctiontoCase)

All measurements per EIAJESD51 with 2S2P test board per

EIAJESD517.

Table 2. Thermal Resistance

Package

θ_JA

θ_JC

θ_CA

Unit

LFCSP_VQ

47

15

32

°C/W

Rev. 0

|

Page 8 of 16

|

January 2007

AD1884ꢀ

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

48

47

46

45

44

43

42

41

40

39

38

37

PORT-D_R

36

35

34

33

32

31

30

29

28

27

26

25

DV_CORE

1

2

PORT-D_L

NC = NO CONNECT

DV_I/O

SENSE_B/SRC_A

MIC_BIAS_IN

MONO_OUT

GPIO_1/MIC_BIAS-E

GPIO_2

3

4

NC = NO CONNECT

SDATA_OUT

BIT_CLK

5

AD1884JCPZ

6

TOP VIEW

DV_SS

SDATA_IN

DV_DD

7

(Not To Scale)

MIC_BIAS-C

MIC_BIAS-B

8

9

VREF_FLT

AV_SS

SYNC

10

11

12

RESETꢀ

PCBEEP

AV_DD

13 14

15

16

17

18

19

20

21

22

23 24

Figure 2. AD1884 48-Lead Package and Pinout

Rev. 0

|

Page 9 of 16

|

January 2007

AD1884ꢀ

Table 3. AD1884 Pin Descriptions

Mnemonic

Pin No.

I/O

Description

DIGITAL INTERFACE

SDATA_OUT

5

I

Link Serial Data Output. AD1884 input stream. Clocked on both edges of the

BIT_CLK.

BIT_CLK

SDATA_IN

SYNC

6

8

10

11

I

Link Bit Clock. 24.000 MHz serial data clock .

Link Serial Data Input. AD1884 output stream clocked only on one edge of BIT_CLK.

Link Frame Sync.

I/O

I

RESET

Link Reset. AD1884 master hardware reset.

DIGITAL I/O

GPIO_2

GPIO_1/MIC_BIAS-E

30

31

I/O

General Purpose I/O/Microphone Bias for Port E. Capable of Hi-Z, 1.65 V, and 2.86 V.

Pin 31 shares functionality between GPIO_1 and MIC_BIAS_E. These functions are

mutually exclusive.

GPIO_0/EAPD

47

I/O

EAPD/General Purpose Input/Output pin. Pin 47 shares functionality between

GPIO_0 and EAPD. These functions are mutually exclusive and the EAPD function

takes priority over the GPIO function. By default, the pin is in a Hi-Z state. External

resistors should be used to insure the proper circuit state when this pin is in Hi-Z.

S/PDIF_OUT – Supports S/PDIF output.

S/PDIF_OUT

JACK SENSE AND EAPD

SENSE_A/SRC_B

SENSE_B/SRC_A

ANALOG I/O

PCBEEP

Port E_L

Port E_R

Port F_L

Port F_R

48

O

13

34

I/O

Jack Sense A-D Input/Sense B drive.

Jack Sense E-F Input/Sense A drive.

LI

Monaural Input from system for Analog PCBeep.

12

14

15

16

17

19

LI, MIC, LO Auxiliary Input/Output Left Channel.

LI, MIC, LO Auxiliary Input/Output Right Channel.

LI, LO

I

Auxiliary Input/Output Left Channel.

Auxiliary Input/Output Right Channel.

CD-Audio-Analog-Ground-Reference. Must be connected to AGND via a 0.1 μF

capacitor if not in use as CD_GND. MUST always be ac-coupled.

Front Panel stereo MIC/Line-In.

Rear Panel stereo MIC/Line-In.

Monaural Output to Internal Speaker or Telephony Subsystem Speakerphone.

Rear Panel Headphone/Line-Out.

CD_GND

Port B_L

Port B_R

Port C_L

Port C_R

MONO_OUT

Port D_L

Port D_R

Port A_L

Port A_R

LI, MIC

LO

HP, LO

21

22

23

24

32

35

36

39

41

Rear Panel Headphone/Line-Out.

Front Panel Headphone/Line-Out.

FILTER/REFERENCE

V

_REF_FILT

O

Voltage Reference Filter.

27

28

29

MIC_BIAS-B

MIC_BIAS-C

Switchable Microphone Bias. For use with Port B (Pins 21, 22).

Switchable Microphone Bias. For use with Port C (Pins 23, 24).

Both MIC bias pins are capable of Hi-Z, 0 V, 1.65 V, 3.7 V, and 3.9 V (with 5.0 V on

Pin 33), Hi-Z, 0 V, 1.65 V, 2.86 V, and 3.0 V (with 3.3 V on Pin 33).

DV_CORE

1

O

CAUTION: DO NOT APPLY 3.3 V TO THIS PIN!

Filter connection for internal core voltage regulator. This pin must be connected to

filter caps: 10 μf, 1.0 μf, and 0.1 μf connected in parallel between Pin 1 and

D_VSS(Pin 7).

POWER AND GROUND

DV_IO3.3V

DV_SS

3

7

9

I

Link Digital I/O Voltage Reference. 3.3 V

Digital Supply Return (ground).

Digital Supply Voltage 3.3 V. This is regulated down to DV_COREon Pin 1 to supply the

internal digital core internal to the AD1884.

DV_DD3.3 V

The symbols used in this table are defined as: I = Input, O = Output, LI = Line Level Input, LO = Line Level Output, HP = Output capable of

driving headphone load, MIC = Input supports microphones with MIC bias and boost amplifier.

Rev. 0

|

Page 10 of 16

|

January 2007

AD1884ꢀ

Table 3. AD1884 Pin Descriptions (Continued)

Mnemonic

Pin No.

I/O

Description

AV_DD3.3 V

25, 38

I

CAUTION: DO NOT APPLY 5 V TO THESE PINS!

Analog Supply Voltage 3.3 V ONLY.

Note: AV_DDsupplies should be well regulated and filtered as supply noise degrades

audio performance.

MIC_BIAS_IN

5.0 V or 3.3 V

33

I

Source Power for Microphone Bias Boost Circuitry.

Connect this pin to 5.0 V via a low-pass filter. When connected this way the AD1884 is

capable of providing +3.9 V as a mic bias to all of the mic bias pins (except on

Pin 31).

If 5 V is not available, connect this pin to +3.3 V (AV_DD) via a low-pass filter.

The AD1884 produces a mic bias voltage relative to the AV_DDsupply

(typically 3.0 V @ AV_DD= 3.3 V).

AV_SS

26, 42

I

Analog Supply Return (Ground). AV_SSshould be connected to DV_SSusing a

conductive trace under, or close to, the AD1884.

The symbols used in this table are defined as: I = Input, O = Output, LI = Line Level Input, LO = Line Level Output, HP = Output capable of

driving headphone load, MIC = Input supports microphones with MIC bias and boost amplifier.

Rev. 0

|

Page 11 of 16

|

January 2007

AD1884ꢀ

HD AUDIO WIDGETS

Table 4. HD Audio Widgets

Node ID Name

Type ID

Type

Description

00

01

02

03

04

05

06

07

08

09

0A

0B

0C

0D

0E

0F

10

11

12

13

14

15

16

17

18

19

1A

1B

1C

1D

1E

1F

20

21

22

23

24

25

26

ROOT

FUNCTION

S/PDIF DAC

DAC_0

DAC_1

VendorD_1

VendorD_2

Port A Mixer

ADC_0

x

0

F

2

1

2

3

7

4

F

5

4

F

2

3

2

3

F

Root

Function

Device identification

Designates this device as an audio codec

S/PDIF digital stream output interface

Stereo headphone channel digital/audio converters

Stereo front channel digital/audio converters

Vendor Defined

Audio Output

Vendor Defined

Audio Mixer

Audio Input

Vendor Defined

Mixes the of DAC_(0, 1) and mixer output amps to drive Port A

Stereo record Channel 0 audio/digital converters

Stereo record Channel 1 audio/digital converters

Mixes the DAC_1 and mixer output amps to drive Port D

Mixes the DAC_(0, 1) and mixer output amps to drive Port F

Selects and amplifies/attenuates the input to ADC_0

Selects and amplifies/attenuates the input to ADC_1

Selects the mono out DAC_(0, 1)

Selects the Port F DAC_(0, 1)

Internal digital PCBeep signal

Headphone jack pins

Line out jack pins

Monaural output pin (internal speakers or telephony system)

Microphone in jack pins

Line in jack pins

Auxiliary I/O pins

Vendor Defined

ADC_1

Audio Input

Port D Mixer

Port F Mixer

ADC Selector 0

ADC Selector 1

Mono Out Selector

Port F Out Selector

Digital Beep

Port A (Headphone)

Port D (Line Out)

Mono Out

Audio Mixer

Audio Selector

Beep Generator

Pin Complex

Vendor Defined

Power Widget

Pin Complex

Vendor Defined

Audio Mixer

Audio Selector

Audio Mixer

Audio Selector

Vendor Defined

Port B (Mic In)

Port C (Line In)

Port F (Aux In/Out)

VendorD_3

VendorD_4

Vendor Defined

Mixer Power Down

Analog PCBeep

S/PDIF Out Pin

Port E (Dock I/O)

Powers down the analog mixer and associated amps

External analog PCBeep signal input

S/PDIF output pin

Analog dock I/O pins

V

_REFPower Down

Powers down the internal and external V_REFcircuitry

Mixes the DAC_(0, 1) and mixer output amps to drive mono out

Mixes the stereo L/R channels to drive mono output

Mixes individually gainable analog inputs

Attenuates the mixer output to drive the port mixers

Selects the Port A DAC_(0, 1)

Mono Out Mixer

Stereo Mix-Down

Analog Mixer

Mixer Output Atten

Port A Out Selector

Port E Out Selector

Port E Mixer

Selects the Port E DAC_(0, 1)

Mixes the DAC_(0, 1) and mixer output amps to drive Port E

0 dB, 10 dB, 20 dB, or 30 dB gain boost for Port E

Powers down the internal MIC_BIAS_FILT and all MIC_BIAS pins

Port E Mic Boost

BIAS Power Down

Rev. 0

|

Page 12 of 16

|

January 2007

AD1884ꢀ

AD1884 HD AUDIO PARAMETERS

Table 5. Root and Function Node Parameters

Sub Node

Count

04

Func. Group

Type

Audio F.G.

Caps

Vendor ID

Revision ID

02

GPIO Caps

11

Node ID

Name

ROOT

FUNCTION

Type

Root

Function

00

05

08

00

01

11D41884

00100100

00010001

00020025

00000001

00010C0C

40000003

Table 6. SubSystem ID ¹

31:16

SSID

BFD4

15:8

SKU

00

7:0

Asm ID

00

Node ID

01

Name

FUNCTION

¹The SSID value is set on codec powerup only. SSID is not reset by link or soft reset in order to preserve modifications by BIOS control.

Table 7. Widget Parameters

Widget

Node Capabilities

PCM Size,

Rate

Stream

Formats

0B

Capabilities

0C

Input Amp

Capabilities

0D

Con. List

Length

0E

Output Amp

Power States Capabilities

ID

09

0A

0F

12

01

02

03

04

07

08

09

0A

0B

0C

0D

0E

0F

10

11

12

13

14

15

16

19

1A

1B

1C

1D

1E

1F

20

21

22

23

24

25

26

000004C0

00030311

00000405

00200103

00100501

00200103

0030010D

00300101

0070000C

0040018D

0040058D

0040050C

0040008B

0040018D

00500500

00400000

0040030D

0040018D

00F00100

00200103

00200100

0020010B

0030010D

00300101

00200103

0030010D

00F00100

000E07FF

00000001

00000005

00000001

80000000

00000009

00052727

000E07E0

000E07FF

00000003

00000000

00000002

00000001

00000002

00000004

00000002

00000000

00000001

00000000

00000001

00000002

00000000

00000001

0000000A

00000002

00000001

00000004

00000001

00000002

00000001

00000003

00000009

00052727

80000000

000E07FF

00000001

00000009

80000000

80053627

800B0F0F

80000000

80051F1F

0000001F

0001001F

00010010

00003727

00000037

00000009

00270300

80000000

00000009

00000020

00000010

00003737

80052727

80000000

80051F17

80051F1F

00270300

80000000

Rev. 0

|

Page 13 of 16

|

January 2007

AD1884ꢀ

Table 8. Connection List

Connection

0

1

2

3

4

5

6

7

8

9

Node

I D

[ 0 – 3 ]

[ 4 – 7 ]

[ 8 – 1 1 ]

I N I D I N I D I N I D I N I D I N I D I N I D I N I D I N I D I N I D I NID

02

03

04

07

08

09

0A

0B

0C

0D

0E

0F

10

11

12

13

14

15

16

19

1A

1B

1C

1D

1E

1F

20

21

22

23

24

25

26

00090801

01

08

I

09

00002122

0000000C

0000000D

00002104

0000210F

25209614

00000403

03

0C

0D

04

0F

21

16

04

1 14

03

20

25

03

00000007

0000000A

0000001F

07

0A

1F

0000000B

00002120

0B

20

21

00000002

00000024

8F0A1907

0000210E

0000001E

251A9614

00000020

00000403

00002123

0000001C

001C1514

02

24

07

0E

1E

96111C1A

0000A61E

19

21

0A

1A

1 0F

25

1A

1C

11

1 16

1E

1 26

1 14

20

16

03

23

26

04

21

14

15

In Table 9, default configuration values are set on codec power

up only. Default configuration values are not reset by link or

soft reset to preserve modifications by BIOS control.

Table 9. Default Configuration Bytes

31:30

29:28

27:24

Location

Connectivity Chasis Position Def. Device Conn Type Color

External Left

23:20

19:16

15:12

8

7:4

3:0

ID Name

Value

JD OR Def Assn. Seq.

11 Port A

12 Port D

13 Mono Out

14 Port B

15 Port C

16 Port F

0321401F Jack

90130110 Fixed

901301F0 Fixed

03A190F0 Jack

96A30120 Fixed

99330121 Fixed

HP Out

Speaker

Mic In

1/8" Jack

ATAPI

Green

0

1

F

2

F

2

F

0

1

0

E

Internal

External Left

Internal

External Rear

Separate Rear

N/A

Unknown 1

ATAPI

1/8" Jack

ATAPI

Pink

0

Bottom

Special 3 CD

N/A other

Mic In

Unknown 1

1A Analog PCBeep 90F301F0 Fixed

1B S/PDIF Out Pin 014511F0 Jack

ATAPI

SPDIF Out Optical

Mic In 1/8" Jack

Black

Pink

1

0

1C Port E

21A1902E Jack

Rev. 0

|

Page 14 of 16

|

January 2007

AD1884ꢀ

OUTLINE DIMENSIONS

Dimensions are shown in millimeters.

0.30

0.23

0.18

7.00

BSC SQ

0.60 MAX

PIN 1

INDICATOR

37

36

48

1

PIN 1

INDICATOR

EXPOSED

PAD

5.25

TOP

VIEW

6.75

BSC SQ

5.10 SQ

4.95

(BOTTOM VIEW)

0.50

0.40

0.30

25

24

12

13

0.25 MIN

5.50

REF

0.80 MAX

0.65 TYP

1.00

0.85

0.80

12° MAX

0.05 MAX

0.02 NOM

COPLANARITY

0.08

0.50 BSC

0.20 REF

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2

Figure 3. 48-Lead, Pb-Free, Frame Chip Scale Package [LFCSP_VQ]

7 mm x 7 mm Body, Very Thin Quad (CP-48-1)

ORDERING GUIDE

Model

Temperature Range

Package Description

Package Option

AD1884JCPZ¹

0°C to 70°C

48-Lead LFCSP_VQ

CP-48-1

AD1884JCPZ-RL¹

¹Z = Pbfree part.

Rev. 0

|

Page 15 of 16

|

January 2007

AD1884ꢀ

registered trademarks are the property of their respective owners.

D06537-0-1/07(0)

Rev. 0

|

Page 16 of 16

|

January 2007


型号：	AD1884JCPZ-RL
厂家：	ADI
描述：	High Definition Audio SoundMAX Codec 高清晰度音频编解码器的SoundMAX 解码器编解码器电信集成电路电信电路 PC
文件：	总16页 (文件大小：1273K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AD1884JCPZ-RL [ADI]

相关型号：

AD1885

AD1885JST

AD1885JST-REEL

AD1885JSTZ

AD1886

AD1886A

AD1886AJST

AD1886AJST-REEL

AD1886AJSTZ

AD1887

AD1887JST

AD1887JSTZ-REEL