AD1984BJCPZ-RL [ADI]
High Definition Audio SoundMAX Codec; 高清晰度音频编解码器的SoundMAX
| 型号： | AD1984BJCPZ-RL |
| 厂家： | 
ADI |
| 描述： | High Definition Audio SoundMAX Codec |
| 文件： | 总20页 (文件大小：285K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Definition Audio
SoundMAX Codec
AD1984B
FEATURES
STEREO DIGITAL MICROPHONE INTERFACE
Microsoft Vista Premium Logo for desktop
96+ dB audio outputs, 90 dB audio inputs
WLP 3.0 and 4.0
Security feature prevents unauthorized recording
2 stereo headphone amplifiers
Internal 32-bit arithmetic for greater accuracy
Impedance and presence detection on all jacks
Full analog mixer with DAC inputs
3 independent microphone bias pins
Digital and analog PCBeep
3 general-purpose digital I/O (GPIO) pins
3.3 V analog supply voltage
1.7 V to 1.9 V or 3.3 V digital supply voltages
3.3 V HD-Audio link signaling voltage
Advanced power management modes
48-lead LFCSP_VQ package
Two 192 kHz digital microphone channels
Supports 1 or 2 microphones per pin
Selectable bit clock rates of 1.5 MHz, 2.0 MHz, and 3.0 MHz
Mono and stereo array support 8 kHz, 11.025 kHz, 16 kHz,
22.05 kHz, 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz,
176.4 kHz, and 192 kHz sample rates
16-, 20-, and 24-bit resolution
S/PDIF OUTPUT
Second S/PDIF can support external HDMI interface
Supports 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and
192 kHz sample rates
16-, 20-, and 24-bit data; PCM and AC3 formats
Digital PCM gain control
AUXILIARY PINS
Stereo CD/auxiliary I/O port with ground sense
Stereo auxiliary/dock I/O port
Mono out pin for internal speakers or telephony
192 kHz DACs/ADCs
2 independent stereo DAC/ADC pairs
Simultaneous record of 2 stereo channels
Simultaneous playback of 2 stereo channels
Independent 8 kHz, 11.025 kHz, 16 kHz, 22.05 kHz, 32 kHz,
44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, and 192 kHz
sample rates
16-, 20-, and 24-bit resolution
Selectable stereo mixer on outputs
⌺
HP
H
D
DAC1
DAC0
PORT A
HP
PORT D
⌺
⌺
⌺
⌺
A
U
D
I
MONO OUT
S/PDIF-1
O
PORT E
PORT F
PCBEEP
PORT B
PORT C
S/PDIF-2
I
N
T
E
R
F
A
C
E
DIGITAL
PCBEEP
⌺
ADC0
ADC1
DM_1/2
DIGITAL
MICROPHONE
DM_2
DM_CLK
AD1984B
Figure 1. Functional Block Diagram
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
AD1984B
CONTENTS
Features ................................................................. 1
Revision History ...................................................... 2
General Description ................................................. 3
Additional Information .......................................... 3
Jack Configuration ................................................ 3
AD1984B Specifications ............................................ 4
Test Conditions .................................................... 4
Performance ........................................................ 4
General Specifications ............................................ 4
HD–Audio Link Specification .................................. 7
Power-Down States ............................................... 7
Absolute Maximum Ratings .................................... 8
ESD Caution ........................................................ 8
Environmental Conditions ...................................... 8
Pin Configuration and Function Descriptions ................. 9
Digital Microphone Interface Timing Specifications ....... 12
HD Audio Widgets ................................................ 13
HD Audio Parameters ............................................. 14
Widget Parameters ................................................. 15
Connection List ..................................................... 16
Default Configuration Bytes ..................................... 17
Outline Dimensions ............................................... 18
Ordering Guide ..................................................... 18
REVISION HISTORY
2/08—Rev 0. Initial version
Rev. 0
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February 2008
AD1984B
GENERAL DESCRIPTION
The AD1984B audio codec and SoundMAX® software provide
superior high definition audio quality that exceeds Vista Pre-
mium performance. The AD1984B has two 192 kHz DAC pairs,
two 192 kHz ADC pairs, dual S/PDIF outputs, a 2-channel digi-
tal microphone interface, and digital and analog PCBeep. These
features make the AD1984B the right choice for desktop and
notebook PCs where performance is key. For more information
on SoundMAX codecs and software see the Analog Devices,
Inc., website at www.analog.com/soundMAX.
Table 3. Typical Notebook Configuration with Dock
Interface
Port
Function
Port A
Port B
Headphone
Microphone
Port C
Port D
Port E
Port F
S/PDIF-1
S/PDIF-2
Internal Microphone
Dock Line-Out/Headphone
Dock Line-In/Microphone
Internal Stereo Speakers
Optical/RCA S/PDIF Output
HDMI Encoder Audio Source
The AD1984B has two S/PDIF outputs that can connect to both
TM
S/PDIF jacks and external HDMI encoder devices.
The AD1984B is available in a 48-lead, RoHS compliant frame
chip scale package in both reels and trays. See Ordering Guide
on Page 18.
ADDITIONAL INFORMATION
This data sheet provides a general overview of the AD1984B
SoundMAX codec’s architecture and functionality. Detailed
widget information is available in the AD1984B Programmers
Reference Manual. Please contact your local ADI sales represen-
tative for more information.
JACK CONFIGURATION
The guidelines shown in Table 1 through Table 3 should be
used when selecting ports for particular functions.
Table 1. Typical Desktop Configuration
Port
Function
Port A
Front Panel Headphone
Port B
Front Panel Microphone
Port C
Port D
S/PDIF-1
S/PDIF-2
Rear Panel Line-In/Microphone
Rear Panel Line-Out/Headphone
Optical/RCA S/PDIF Output
HDMI Encoder Audio Source
Table 2. Typical Notebook Configuration
Port
Function
Port A
Headphone
Port B
Microphone
Port C
Port F
S/PDIF-1
S/PDIF-2
Internal Microphone
Internal Stereo Speakers
Optical/RCA S/PDIF Output
HDMI Encoder Audio Source
Rev. 0
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Page 3 of 20
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February 2008
AD1984B
AD1984B SPECIFICATIONS
TEST CONDITIONS
Parameter
Test Condition
Temperature
25°C
Digital Supply
Analog Supply
MIC_BIAS_IN (via Low-Pass Filter)
Sample Rate fS
3.3 V
3.3 V
5.0 V
48 kHz
Input Signal (Frequency Sine Wave) 1008 Hz
Amplitude for THD + N
Analog Output Pass Band
DAC
–3.0 dB Full Scale
20 Hz to 20 kHz
10 kΩ Output Load: Line-Out Tests
32 Ω Output Load: Headphone Tests
0 dB Gain
ADC
PERFORMANCE
Parameter
Min
Typ
Max
Unit
Line-Out Drive (10 kΩ loads—DAC to Pin)
Total Harmonic Distortion (THD + N)
Dynamic Range (–60 dB in ref to fS A-Weighted)
Signal-to-Noise Ratio
–86
96
96
dB
dB
dB
Headphone Drive (32 Ω loads—DAC to Pin)
Total Harmonic Distortion (THD + N)
Dynamic Range (–60 dB in ref to fS A-Weighted)
Signal-to-Noise Ratio
–80
96
96
dB
dB
dB
Microphone/Line-In (Pin to ADC, Mic Boost = 0 dB)
Total Harmonic Distortion (THD + N)
Dynamic Range (–60 dB in ref to fS A-Weighted)
Signal-to-Noise Ratio
–81
90
90
dB
dB
dB
GENERAL SPECIFICATIONS
Parameter
Min
Typ
Max
Unit
DIGITAL DECIMATION AND INTERPOLATION FILTERS1
Pass Band – fS (kHz) = 8 ~ 192
Pass-Band Ripple– fS (kHz) = 8 ~ 192
Stop Band – fS (kHz) = 8 ~ 192
Stop-Band Rejection – fS (kHz) = 8 ~ 192
Group Delay – fS (kHz) = 8 ~ 192
Group Delay Variation over Pass Band
ANALOG-TO-DIGITAL CONVERTERS
Resolution
0
0.4 fS
±0.005
Hz
dB
Hz
dB
1/fS
μs
0.6 fS
–100
20
0
24
Bits
%
dB
mV
Gain Error (Full-Scale Span Relative to Nominal Input Voltage)
Interchannel Gain Mismatch (Difference of Gain Errors)
ADC Offset Error1
±10
±0.5
±5
±0.2
ADC Crosstalk1
Line-Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L)
Line_In to Other
–85
–100
dB
dB
–80
Rev. 0
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Page 4 of 20
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February 2008
AD1984B
Parameter
Min
Typ
Max
Unit
DIGITAL-TO-ANALOG CONVERTERS
Resolution
24
Bits
%
dB
dB
dB
Gain Error (Full-Scale Span Relative to Nominal Input Voltage)1
Interchannel Gain Mismatch (Difference of Gain Errors)
Total Audible Out-of-Band Energy (Measured from 0.6 × fS to 20 kHz)1
DAC Crosstalk (Input L, Zero R, Measure R_OUT; Input R, Zero L, Measure L_OUT)1
DAC VOLUMES
±10
±0.5
–85
–95
Step Size
1.5
–80
1.5
dB
dB
dB
Output Gain/Attenuation Range
–58.5
–58.5
0
Mute Attenuation of 0 dB Fundamental1
ADC VOLUMES
StepSize
dB
dB
dB
PGA Gain/Attenuation Range
+22.5
Mute Attenuation of 0 dB Fundamental1
ANALOG MIXER
–80
Signal-to-Noise Ratio Input to Output—Ports B, C, E, or F to Port D Output
Step Size: All Mixer Inputs
Input Gain/Attenuation Range: All Mixer Inputs
ANALOG LINE LEVEL OUTPUTS
95
–1.5
dB
dB
dB
–34.5
+12.0
Full-Scale Output Voltage
1.0
2.83
V rms
V p-p
Ports A, D, E, F, and Mono Out
Output Impedance1
190
15
Ω
External Load Impedance1
Output Capacitance1
10
kΩ
pF
pF
External Load Capacitance1
ANALOG HP DRIVE OUTPUTS
Full-Scale Output Voltage
1000
1.0
2.83
V rms
V p-p
Ports A and D
Output Impedance1
0.5
Ω
Ω
pF
pF
External Load Impedance1
Output Capacitance1
External Load Capacitance1
ANALOG INPUTS
32
15
1000
Input Voltages—Ports B, C, E, or F
Mic Boost = 0 dB
1
V rms
V p-p
V rms
V p-p
V rms
V p-p
V rms
V p-p
2.83
0.316
0.894
0.1
0.283
0.032
0.089
Input Voltages—Microphone Boost
Amplifier, Ports B, C, or E
Mic Boost = 10 dB
Mic Boost = 20 dB
Mic Boost = 30 dB
Input Impedance
PCBeep
23
150
45
5
kΩ
kΩ
kΩ
pF
Ports B, C, E (Mic Boost = 0 dB)
Port F
Input Capacitance1
7.5
Rev. 0
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Page 5 of 20
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February 2008
AD1984B
Parameter
Min
Typ
Max
Unit
MICROPHONE BIAS
MIC_BIAS-B, MIC_BIAS-C
MIC_BIAS_IN (Pin 33) = 5 V or 3.3 V
VREF Setting = High-Z
REF Setting = 0 V
VREF Setting = 50%
High-Z
0
1.65
3.7
3.9
2.86
3.0
V
V dc
V dc
V dc
V dc
V dc
V dc
MIC_BIAS_IN (Pin 33) = 5 V
MIC_BIAS_IN (Pin 33) = 3.3 V
V
V
REF Setting = 80%
REF Setting = 100%
VREF Setting = 80%
REF Setting = 100%
V
MIC_BIAS-E (When Enabled as BIAS)
VREF Setting = High-Z
VREF Setting = 0 V
High-Z
0
V dc
V dc
V dc
V dc
V
REF Setting = 50%
VREF Setting = 80%
REF Setting = 100%
1.65
2.86
3.0
V
Output Drive Current
VREF Setting = 50%, 80%, or 100%
1.6
mA
GPIO 0
Input Signal High (VIH)
DVIO × 0.60
DVIO
V
Input Signal Low (VIL)
0
DVIO × 0.24
DVIO
DVIO × 0.10
V
V
V
nA
μA
Output Signal High (VOH)
Output Signal Low (VOL)
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
GPIO 1 and 2
IOUT = –500 μA
IOUT = +1500 μA
DVIO × 0.72
0
150
–50
Input Signal High (VIH)
AVDD × 0.60
AVDD
V
Input Signal Low (VIL)
0
AVDD × 0.24
AVDD
AVDD × 0.10
V
V
V
nA
μA
Output Signal High (VOH)
Output Signal Low (VOL)
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
DM Clock
IOUT = –500 μA
IOUT = +1500 μA
AVDD × 0.72
0
150
–50
Output Signal High (VOH)
Output Signal Low (VOL)
DM 1/2 and DM_2
IOUT = –500 μA
IOUT = +1500 μA
AVDD × 0.72
0
AVDD
AVDD × 0.10
V
V
Input Signal High (VIH)
AVDD × 0.60
AVDD
V
Input Signal Low (VIL)
0
AVDD × 0.24
V
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
S/PDIF-Out-1 and S/PDIF-Out-2
Input Signal High (VIH)
–150
–50
nA
nA
DVIO × 0.60
DVIO
V
Input Signal Low (VIL)
0
DVIO × 0.24
DVIO
DVIO × 0.10
V
V
V
nA
μA
Output Signal High (VOH)
Output Signal Low (VOL)
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
IOUT = –500 μA
IOUT = +1500 μA
DVIO × 0.72
0
150
–50
Rev. 0
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Page 6 of 20
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February 2008
AD1984B
Parameter
Min
Typ
Max
Unit
POWER SUPPLY
Analog (AVDD) 3.3 V ±5%
Power Supply Range
Power Dissipation
3.13
3.30
75.9
23
3.46
V
mW
mA
Supply Current
Digital (DVDD) 3.3 V ±10%
Power Supply Range
Power Dissipation
Supply Current
Digital (DVDD) 1.7 through 1.9 V ±10%
Power Supply Range
Power Dissipation
Supply Current
Digital I/O (DVIO) 3.3 V ±10%
Power Supply Range
Power Dissipation
2.97
1.615
2.97
3.30
141.9
43
3.63
1.995
3.63
V
mW
mA
1.70
61
36
V
mW
mA
3.30
3.3
1
V
mW
mA
dB
Supply Current
Power Supply Rejection (Reference to fS 100 mV p-p Signal @ 1 kHz)1
80
1 Guaranteed but not tested.
HD–AUDIO LINK SPECIFICATION
High definition audio signals comply with the High Definition
Audio Specification. Please refer to these specifications at
www.intel.com/standards/hdaudio.
POWER-DOWN STATES
Parameter
IDVDD Typ (1.7 V)
IDVDD Typ (3.3 V)
IAVDD Typ
Unit
Function node in D0, All Nodes Active
Function Node in D3
Codec in RESET
36
15.75
3
43
17
3
23
1
3
mA
mA
mA
Individual block power savings
DAC Pair Powered Down Saves (Each)
ADC Pair Powered Down Saves (Each)
Mixer Power Control (and Associated Amps) Saves
DM_CLK Powered Down Saves1
MIC_BIAS Powered Down Saves2
4.5
4.5
0
0
0
6
6
0
0
0
5
3
2
1
mA
mA
mA
mA
mA
0.1
1 Test conditions: 30 pF load, 2.0 MHz frequency, 3.3 V AVDD.
2 Powering down the MIC_BIAS powers down all port MIC_BIAS pins. This disables all microphone bias circuits set to 100% or 50%, setting them to the high-Z state. The
0 V and high-Z states remain unaffected by the MIC_BIAS power state.
Rev. 0
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Page 7 of 20
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February 2008
AD1984B
ABSOLUTE MAXIMUM RATINGS
ENVIRONMENTAL CONDITIONS
Stresses greater than those listed below may cause permanent
damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above
those indicated in the operational section of this specification is
not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Ambient Temperature Rating:
T
T
AMB = TCASE – (PD × θCA)
CASE = case temperature in °C
PD = power dissipation in W
θCA = thermal resistance (case-to-ambient)
θJA = thermal resistance (junction-to-ambient)
θJC = thermal resistance (junction-to-case)
Parameter
Rating
All measurements per EIA-JESD51 with 2S2P test board per
EIA-JESD51-7.
Digital (DVDD)
Digital (DVCORE
Digital I/O (DVIO)
Analog (AVDD)
–0.30 V to +3.65 V
–0.30 V to +2.10 V
–0.30 V to +3.65 V
–0.30 V to +3.65 V
)
Package
θJA
θJC
θCA
32
Unit
LFCSP_VQ
47
15
°C/W
Input Current (except supply pins) 10.0 mA
Analog Input Voltage (Signal Pins) –0.30 V to AVDD +0.3 V
Digital Input Voltage (Signal Pins) –0.30 V to DVIO +0.3 V
Ambient Temperature (Operating) 0°C to +70°C
Storage Temperature
–65°C to +150°C
ESD CAUTION
ESD (electrostatic discharge) sensitive device.
Charged devices and circuit boards can discharge
without detection. Although this product features
patented or proprietary protection circuitry, damage
may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to
avoid performance degradation or loss of functionality.
Rev. 0
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Page 8 of 20
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February 2008
AD1984B
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
48
47
46
45
44
43
42
41
40
39
38
37
PORT-D_R
36
35
34
33
32
31
30
29
28
27
26
25
DV
CORE
1
2
PORT-D_L
DM_1/2
SENSE_B/SRC_A
MIC_BIAS_IN
MONO_OUT
MIC_BIAS-E/GPIO_1
GPIO_2
DV
IO
3
4
DM_2
SDATA_OUT
BIT_CLK
5
AD1984BJCP
6
TOP VIEW
DV
SS
7
(NotTo Scale)
MIC_BIAS-C
MIC_BIAS-B
VREF_FLT
SDATA_IN
8
DV
DD
9
SYNC
RESET
10
AV
SS
11
12
AV
DD
PCBEEP
13 14
15
16
17
18
19
20
21
22
23 24
Figure 2. AD1984B 48-Lead Package and Pinout
Rev. 0
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Page 9 of 20
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February 2008
AD1984B
Table 4. Pin Function Descriptions
Mnemonic
Pin No.
I/O
Description
DIGITAL INTERFACE
SDATA_OUT
5
I
Link Serial Data Output. AD1984B input stream. Clocked on both edges of the
BIT_CLK.
BIT_CLK
SDATA_IN
6
8
I
Link Bit Clock. 24.000 MHz serial data clock.
Link Serial Data Input. AD1984B output stream clocked only on one edge of BIT_CLK.
Link Frame Sync.
I/O
SYNC
RESET
10
11
I
I
Link Reset. AD1984B master hardware reset.
DIGITAL I/O and EAPD
DM_1/2
2
I
Digital microphone 1 and 2 Inputs (for Biphase Microphones), or Digital Microphone
1 Input (for Single-phase Microphones).
DM_2
DM_CLK
GPIO_2
4
46
30
I
Digital microphone 2 Input (for Single-phase Microphones).
Clock to drive external digital microphones.
General Purpose Input/Output Pins. Digital signals used to control or sense external
circuitry.
O
I/O
MIC_BIAS-E/GPIO_1
EAPD/GPIO_0
31
47
I/O
I/O
Microphone Bias for Port E/General-Purpose Input/Output. Capable of High-Z, 1.65 V,
and 2.86 V. Pin 31 shares functionality between MIC_BIAS_E (default) and GPIO_1.
These functions are mutually exclusive and the MIC_BIAS function takes priority over
the GPIO function.
EAPD/General-Purpose Input/Output pin. Pin 47 shares functionality between
GPIO_0 and EAPD. These functions are mutually exclusive and the EAPD function
takes priority over the GPIO function. By default, the pin is in a High-Z state. External
resistors should be used to ensure the proper circuit state when this pin is in High-Z.
Supports S/PDIF Output. Typically used as an audio interface to an external HDMI
encoder.
S/PDIF_OUT-2
45
48
O
O
S/PDIF_OUT-1
JACK SENSE
SENSE_A/SRC_B
SENSE_B/SRC_A
ANALOG I/O
PCBEEP
Port-E_L
Port-E_R
Port-F_L
Port-F_R
Supports S/PDIF Output.
13
34
I/O
I/O
Jack Sense A-D Input/Sense B drive.
Jack Sense E-F Input/Sense A drive.
LI
Monaural Input from System for Analog PCBeep.
12
14
15
16
17
19
LI, MIC, LO Auxiliary Input/Output Left Channel.
LI, MIC, LO Auxiliary Input/Output Right Channel.
LI, LO
LI, LO
I
Auxiliary Input/Output Left Channel.
Auxiliary Input/Output Right Channel.
CD-Audio-Analog-Ground-Reference. Must be connected to AGND via a 0.1 μF
capacitor if not in use as CD_GND. MUST always be ac-coupled.
Front Panel Stereo MIC/Line-In.
Front Panel Stereo MIC/Line-In.
Rear Panel Stereo MIC/Line-In.
Rear Panel Stereo MIC/Line-In.
Monaural Output to Internal Speaker or Telephony Subsystem Speakerphone.
Rear Panel Headphone/Line-Out.
CD_GND
Port-B_L
Port-B_R
Port-C_L
Port-C_R
MONO_OUT
Port-D_L
Port-D_R
Port-A_L
Port-A_R
LI, MIC
LI, MIC
LI, MIC
LI, MIC
LO
HP, LO
HP, LO
HP, LO
HP, LO
21
22
23
24
32
35
36
39
41
Rear Panel Headphone/Line-Out.
Front Panel Headphone/Line-Out.
Front Panel Headphone/Line-Out.
The symbols used in this table are defined as: I = input, O = output, LI = line level input, LO = line level output, HP = output capable of driving
headphone load, MIC = input supports microphones with MIC bias and boost amplifier.
Rev. 0
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Page 10 of 20
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February 2008
AD1984B
Table 4. Pin Function Descriptions (Continued)
Mnemonic
Pin No.
I/O
Description
FILTER/MIC_BIAS
VREF _FILT
MIC_BIAS-B
MIC_BIAS-C
O
O
O
Voltage Reference Filter.
Switchable Microphone Bias. For use with Port B (Pins 21, 22).
Switchable Microphone Bias. For use with Port C (Pins 23, 24).
27
28
29
Both MIC bias pins are capable of High-Z, 0 V, 1.65 V, 3.7 V, and 3.9 V (with 5.0 V on
Pin 33), High-Z, 0 V, 1.65 V, 2.86 V, and 3.0 V (with 3.3 V on Pin 33).
Source Power for Microphone Bias Boost Circuitry.
MIC_BIAS_IN
5.0 V or 3.3 V
I
33
1
Connect this pin to 5.0 V via a low-pass filter. When connected this way the AD1984B
is capable of providing 3.9 V as a mic bias to all of the mic bias pins (except on Pin 31).
If 5 V is not available, connect this pin to 3.3 V (AVDD) via a low-pass filter.
POWER AND GROUND
DVCORE 1.7 V to 1.9 V or
FILTER
I/O
CAUTION: DO NOT APPLY 3.3 V TO THIS PIN! Filter connection for internal core
voltage regulator.
If Pin 9 is connected to 3.3 V DVDD, this pin must be connected to filter caps: 10 μF,
1.0 μF and 0.1μF connected in parallel between Pin 1 and DVSS (Pin 7). Direct, filtered
1.7 V to 1.9 V DVDD may be applied to Pin 1 to lower the digital power requirements.
Pin 9 MUST be connected to pin 1 in this case.
DVIO 3.3 V
DVSS
DVDD 1.7 V to 1.9 V or 3.3 V 9
3
7
I
I
I
Link Digital I/O Voltage Reference. 3.3 V ± 10%
Digital Supply Return (Ground).
Digital Supply Voltage 3.3 V ± 10%. This is regulated down to DVCORE on Pin 1 to
supply the internal digital core internal to the AD1984B. Direct, filtered 1.7 V to 1.9 V
DVDD may be applied to Pin 1 to lower the digital power requirements. Pin 9 MUST be
connected to Pin 1 in this case.
AVDD 3.3 V
AVSS
25, 38
I
I
CAUTION: DO NOT APPLY 5 V TO THESE PINS! Analog Supply Voltage 3.3 V ONLY.
Note: AVDD supplies should be well regulated and filtered as supply noise degrades
audio performance.
Analog Supply Return (Ground). AVSS should be connected to DVSS using a
conductive trace under, or close to, the AD1984B.
26, 42
The symbols used in this table are defined as: I = input, O = output, LI = line level input, LO = line level output, HP = output capable of driving
headphone load, MIC = input supports microphones with MIC bias and boost amplifier.
Rev. 0
|
Page 11 of 20
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February 2008
AD1984B
DIGITAL MICROPHONE INTERFACE TIMING SPECIFICATIONS
The digital microphone interface can support one or two digital
microphones using two or three codec pins. Both uniplex (one
microphone per data pin) and multiplex (two microphones
sharing the same data pin) are supported. The timing for these
configurations is shown in Table 5 and Figure 3, Figure 4 and
Figure 5. The interface can generate a microphone clock at 1.5
MHz, 2.0 MHz, or 3.0 MHz to suit quality and power
requirements.
Table 5. Microphone Timing Parameters
Parameter Description
Min
Typ
Max
Unit
Timing Requirements
t0
t0
t0
DM_CLK (1.5 MHz) Period
Duty Cycle
DM_CLK (2.0 MHz) Period
Duty Cycle
DM_CLK (3.0 MHz) Period
Duty Cycle
667
50/50
500
50/50
333
50/50
ns
%
ns
%
ns
%
t1
t2
t3
t4
DM_CLK Rise Time
DM_CLK Fall Time
Data Setup to DM_CLK Edge
Data Hold from DM_CLK Edge
5
5
ns
ns
ns
ns
10
5
t0
t1
t2
DM_CLK
DM_1/2
t3
t4
DATA VALID
Figure 3. Uniplex Microphone Timing
t0
t1
t2
DM_CLK
t3
t4
DM_2
DATA VALID
Figure 4. DM_2 Uniplex Microphone Timing
Rev. 0
|
Page 12 of 20
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February 2008
AD1984B
t0
t1
t2
DM_CLK
DM_1/2
t3
t4
t3
t4
RIGHT DATA VALID
LEFT DATA VALID
LEFT DATA VALID
Figure 5. Multiplex Microphone Timing
HD AUDIO WIDGETS
Table 6. HD Audio Widgets1
Node ID Name
Type ID
Type
Description
0x00
0x01
0x02
0x03
0x04
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
ROOT
FUNCTION
S/PDIF-1 DAC
DAC_0
DAC_1
S/PDIF-2 DAC
Port A Mixer
ADC_0
ADC_1
Port D Mixer
Port F Mixer
ADC Selector 0
ADC Selector 1
Mono Out Selector
Port F Out Selector
Digital Beep
Port A (Headphone)
Port D (Line Out)
Mono Out
Port B (Mic In)
Port C (Line In)
Port F (Aux In/Out)
Dig Mic Pin
S/PDIF Out-2
Mixer Power Down
Analog PCBeep
S/PDIF Out-1
Port E (Dock I/O)
x
x
Root
Function
Device identification
Designates this device as an audio codec
S/PDIF digital stream output interface
Stereo headphone channel digital/audio converter
Stereo front channel digital/audio converter
S/PDIF digital stream output interface (typically for HDMI)
Mixes the of DAC_(0, 1) and analog mixer output to drive Port A
Stereo record Channel 0 audio/digital converters
Stereo record Channel 1 audio/digital converters
Mixes the DAC_1 and analog mixer output to drive Port D
Mixes the DAC_(0, 1) and analog mixer output to drive Port F
Selects and amplifies/attenuates the input to ADC_0
Selects and amplifies/attenuates the input to ADC_1
Selects the mono out DAC_(0, 1)
Selects the Port F DAC_(0, 1)
Internal digital PCBeep signal
Headphone jack pins
Line out jack pins
Monaural output pin (internal speakers or telephony system)
Microphone in jack pins
Line in jack pins
Auxiliary I/O pins
Digital microphone input pin
0
0
0
0
2
1
1
2
2
3
3
3
3
7
4
4
4
4
4
4
4
4
5
4
4
4
F
2
2
2
3
3
3
2
3
Audio Output
Audio Output
Audio Output
Audio Output
Audio Mixer
Audio Input
Audio Input
Audio Mixer
Audio Mixer
Audio Selector
Audio Selector
Audio Selector
Audio Selector
Beep Generator
Pin Complex
Pin Complex
Pin Complex
Pin Complex
Pin Complex
Pin Complex
Pin Complex
Pin Complex
Power Widget
Pin Complex
Pin Complex
Pin Complex
Vendor Defined
Audio Mixer
Audio Mixer
Audio Mixer
Audio Selector
Audio Selector
Audio Selector
Audio Mixer
Audio Selector
S/PDIF Out Pin recommended for HDMI
Powers down the analog mixer and associated amps
External analog PCBeep signal input
S/PDIF output pin
Analog dock I/O pins
V
REF Power Down
Powers down the VREF circuitry
Mono Out Mixer
Stereo Mix-Down
Analog Mixer
Mixer Output Atten
Port A Out Selector
Port E Out Selector
Port E Mixer
Mixes the DAC_(0, 1) and analog mixer output to drive mono out
Mixes the stereo L/R channels to drive mono output
Mixes individually gainable analog inputs
Attenuates the analog mixer output to drive the port mixers
Selects the Port A DAC_(0, 1)
Selects the Port E DAC_(0, 1)
Mixes the DAC_(0, 1) and analog mixer output to drive Port E
0 dB, 10 dB, 20 dB, or 30 dB gain boost for Port E
Port E Mic Boost
1 All node IDs (NIDs) are sequential in the codec. Any NIDs missing for this table are vendor defined.
Rev. 0
|
Page 13 of 20
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February 2008
AD1984B
HD AUDIO PARAMETERS
Table 7. Root and Function Node Parameters
Vendor ID
00
Revision ID
Sub Node Count Func. Group Type
Audio F.G. Caps GPIO Caps
Node ID
Name
021
04
05
08
11
0x00
0x01
ROOT
FUNCTION
0x11D4 194B
0x0010 0200
0x0001 0001
0x0002 002B
0x0000 0001
0x0001 0C0C
0x4000 0003
1 Subject to change with silicon stepping.
Table 8. Subsystem ID
31:16
SSID
0xBFD4
15:8
SKU
0x00
7:0
ASM ID
0x00
Node ID
0x01
Name
FUNCTION
Type
Function
Value
0xBFD4 0000
Rev. 0
|
Page 14 of 20
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February 2008
AD1984B
WIDGET PARAMETERS
Table 9. Widget Parameters
Widget
Node Capabilities
PCM Size,
Rate
0x0A
Stream
Formats
0x0B
Pin
Capabilities
0x0C
Input Amp
Capabilities
0x0D
Con. List
Length
0x0E
Output Amp
Power States Capabilities
0x0F 0x12
0x0000 0009 0x0005 2727
ID
0x09
0x01 0x0000 04C0 0x000E 07FF 0x0000 0001
0x8000 0000
0x02 0x0003 0211
0x03 0x0000 0405
0x04 0x0000 0405
0x06 0x0003 0211
0x07 0x0020 0103
0x08 0x0010 0501
0x09 0x0010 0501
0x0A 0x0020 0103
0x0B 0x0020 0103
0x0C 0x0030 010D
0x0D 0x0030 010D
0x0E 0x0030 0101
0x0F 0x0030 0101
0x10 0x0070 000C
0x11 0x0040 018D
0x12 0x0040 058D
0x13 0x0040 050C
0x14 0x0040 008B
0x15 0x0040 008B
0x16 0x0040 058D
0x17 0x0040 020B
0x18 0x0040 038D
0x19 0x0050 0500
0x1A 0x0040 0000
0x1B 0x0040 038D
0x1C 0x0040 018D
0x1D 0x00F0 0100
0x1E 0x0020 0103
0x1F 0x0020 0100
0x20 0x0020 010B
0x21 0x0030 010D
0x22 0x0030 0101
0x23 0x0030 0101
0x24 0x0020 0103
0x25 0x0030 010D
0x000E 07E0 0x0000 0005
0x000E 07FF 0x0000 0001
0x000E 07FF 0x0000 0001
0x000E 07E0 0x0000 0005
0x0000 0000
0x0000 0000 0x0000 0009 0x0005 2727
0x0000 0000 0x0000 0009 0x0005 2727
0x0000 0000
0x8000 0000
0x0000 0002
0x000E 07FF 0x0000 0001
0x000E 07FF 0x0000 0001
0x0000 0001 0x0000 0009
0x0000 0001 0x0000 0009
0x0000 0002
0x8000 0000
0x8000 0000
0x0000 0002
0x0000 0006
0x0000 0006
0x0000 0002
0x0000 0002
0x0000 0000
0x0000 0001
0x0000 0001 0x0000 0009 0x8000 0000
0x0000 0001 0x0000 0009 0x8005 1F1F
0x0000 0000
0x8005 3627
0x8005 3627
0x800B 0F0F
0x8000 0000
0x0000 001F
0x0001 001F
0x0001 0010
0x0000 3727
0x0000 3727
0x0001 0037
0x0000 0020
0x0000 0014
0x0027 0300
0x0027 0300
0x0000 0000
0x0000 0001 0x0000 0009 0x8000 0000
0x0000 0000
0x0017 0300
0x0000 0001
0x0000 0002 0x0000 0009
0x0000 0000
0x0000 0001
0x0000 0001
0x0000 000A
0x0000 0002
0x0000 0001
0x0000 0007
0x0000 0001
0x0000 0002
0x0000 0002
0x0000 0002
0x0000 0001
0x8005 2727
0x0000 0020
0x0000 0014
0x0000 3737
0x8005 2727
0x8000 0000
0x8000 0000
0x8005 1F17
0x8005 1F1F
0x0027 0300
0x8000 0000
Rev. 0
|
Page 15 of 20
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February 2008
AD1984B
CONNECTION LIST
Table 10. Connection List
Connections
Node
0
1
2
3
4
5
6
7
8
9
ID
[0–3]
[4–7]
[8–11]
NID R1 NID R NID R NID R NID R NID R NID R NID R NID R NID
0x02
0x03
0x04
0x06
0x07 0x0000 2122
0x08 0x0000 000C
0x09 0x0000 000D
0x0A 0x0000 2104
0x0B 0x0000 210F
0x0C 0x2016 1514 0x0000 1725
0x0D 0x2016 1514 0x0000 1725
0x0E 0x0000 0403
0x0F 0x0000 0403
0x10
0x22
0x0C
0x0D
0x04
0x0F
0x14
0x14
0x03
0x03
0x21
0x21
0x21
0x15
0x15
0x04
0x04
0x16
0x16
0x20
0x20
0x25
0x25
0x17
0x17
0x11 0x0000 0007
0x12 0x0000 000A
0x13 0x0000 001F
0x14
0x07
0x0A
0x1F
0x15
0x16 0x0000 000B
0x17
0x0B
0x18 0x0000 0006
0x19 0x0000 2120
0x1A
0x06
0x20
0x21
0x1B 0x0000 0002
0x1C 0x0000 0024
0x02
0x24
0x1D 0x118F 0A07 0x1C1A 1996 0x0000 A61E 0x07
0x0A 1 0x0F
0x21
0x11 1 0x16
0x19
0x03
0x1A
0x04
0x1C
0x1E 1 0x26
0x1E 0x0000 210E
0x1F 0x0000 001E
0x20 0x1A16 1514 0x004 0325
0x21 0x0000 0020
0x22 0x0000 0403
0x23 0x0000 0403
0x24 0x0000 2123
0x25 0x0000 001C
0x0E
0x1E
0x14
0x20
0x03
0x03
0x23
0x1C
0x15
0x16
0x1A
0x25
0x04
0x04
0x21
1 R = the MS bit of any node ID indicates a 2-tuple NID pair delineating a continuous range of nodes. If the MS bit is set (=1), that list entry forms a range of entries from the
previous NID to the current NID. For additional information, see chapter 7.1.2, “Node Addressing” in the High Definition Audio Specification.
Rev. 0
|
Page 16 of 20
|
February 2008
AD1984B
DEFAULT CONFIGURATION BYTES
Table 11. Default Configuration Bytes
Bits
31:30
29:28
27:24
Location
23:20
Node ID
Name
Value
Connectivity
Chassis
Position
Def. Device
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x1A
0x1B
0x1C
Port A (Headphone)
Port D (Line Out)
Mono Out
Port B (Mic In)
Port C (Line In)
Port F (Aux In/Out)
Dig Mic Pin
S/PDIF Out-2
Analog PCBeep
S/PDIF Out-1
0x0321 40F0
0x2121 4010
0x9017 01F0
0x03A1 90F0
0xB7A7 0121
0x9933 012E
0x97A6 01F0
0x9855 01F0
0x90F3 01F0
0x0145 10F0
0x21A1 9020
Jack
Jack
Fixed
Jack
Fixed
Fixed
None
Fixed
Fixed
Jack
External
Separate
Internal
External
Other
Internal
Other
Internal
Internal
External
Separate
Left
Rear
N/A
Left
Special 1
Special 3
Special 1
Special 2
N/A
HP Out
HP Out
Speaker
Mic In
Mic In
CD
Mic In
Digital Out
Other
S/PDIF Out
Mic In
Rear
Rear
Port E (Dock I/O)
Jack
Table 11. Default Configuration Bytes (Continued)
Bits
19:16
15:12
8
7:4
3:0
Node ID
Name
Value
Conn Type
Color
JD OVRD Def Assn.
Seq.
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x1A
0x1B
0x1C
Port A (Headphone)
Port D (Line Out)
Mono Out
Port B (Mic In)
Port C (Line In)
Port F (Aux In/Out)
Dig Mic Pin
S/PDIF Out-2
Analog PCBeep
S/PDIF Out-1
0x0321 40F0
0x2121 4010
0x9017 01F0
0x03A1 90F0
0xB7A7 0121
0x9933 012E
0x97A6 01F0
0x9855 01F0
0x90F3 01F0
0x0145 10F0
0x21A1 9020
1/8” Jack
1/8” Jack
Other Analog
1/8” Jack
Other Analog
ATAPI
Other Digital
Optical
ATAPI
Green
Green
Unknown
Pink
Unknown
Unknown
Unknown
Unknown
Unknown
Black
0
0
1
0
1
1
1
1
1
0
0
0xF
0x1
0xF
0xF
0x2
0x2
0xF
0xF
0xF
0xF
0x2
0x0
0x0
0x0
0x0
0x1
0xE
0x0
0x0
0x0
0x0
0x0
Optical
1/8” Jack
Port E (Dock I/O)
Pink
Rev. 0
|
Page 17 of 20
|
February 2008
AD1984B
OUTLINE DIMENSIONS
0.30
0.23
0.18
7.00
0.60 MAX
BSC SQ
0.60 MAX
PIN 1
INDICATOR
37
36
48
1
PIN 1
INDICATOR
EXPOSED
5.25
5.10 SQ
4.95
TOP
VIEW
6.75
PAD
BSC SQ
(BOTTOM VIEW)
0.50
0.40
0.30
25
24
12
13
0.25 MIN
5.50
REF
0.80 MAX
0.65 TYP
1.00
0.85
0.80
12° MAX
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.50 BSC
0.20 REF
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2
Figure 6. 48-Lead, Frame Chip Scale Package [LFCSP_VQ]
7 mm x 7 mm Body, Very Thin Quad (CP-48-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
AD1984BJCPZ1
0°C to 70°C
0°C to 70°C
48-Lead LFCSP_VQ
48-Lead LFCSP_VQ, 13” Tape and Reel
CP-48-1
CP-48-1
AD1984BJCPZ-RL1
1 Z = RoHS Compliant Part.
Rev. 0
|
Page 18 of 20
|
February 2008
AD1984B
Rev. 0
|
Page 19 of 20
|
February 2008
AD1984B
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07020-0-2/08(0)
Rev. 0
|
Page 20 of 20
|
February 2008
相关型号：
AD1985JSTZ-REEL
IC SPECIALTY CONSUMER CIRCUIT, PQFP48, LEAD FREE, MS-026BBC, LQFP-48, Consumer IC:Other
ADI
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