AD4311-1 [ADI]
Low Cost, Dual, High Current Output Line Driver with Shutdown; 低成本，双通道，具有关断功能的高电流输出线路驱动器
| 型号： | AD4311-1 |
| 厂家： | 
ADI |
| 描述： | Low Cost, Dual, High Current Output Line Driver with Shutdown |
| 文件： | 总16页 (文件大小：343K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost, Dual, High Current Output
Line Driver with Shutdown
ADA4311-1
FEATURES
PIN CONFIGURATION
ADA4311-1
High speed
+V
1
2
3
4
5
10 OUT B
S
−3 dB bandwidth: 310 MHz, G = +5, RLOAD = 50 Ω
Slew rate: 1050 V/μs, RLOAD = 50 Ω
Wide output swing
20.6 V p-p differential, RLOAD of 100 Ω from 12 V supply
High output current
NC
OUT A
–IN A
9
8
7
6
–IN B
+IN B
PD1
+IN A
PD0
NC = NO CONNECT
Low distortion
Figure 1. Thermally Enhanced, 10-Lead MINI_SO_EP
−98 dBc typical at 1 MHz, VOUT = 2 V p-p, G = +5, RLOAD = 100 Ω
−72 dBc typical at 10 MHz, VOUT = 2 V p-p, G = +5, RLOAD = 100 Ω
Power management and shutdown
Control inputs CMOS level compatible
Shutdown quiescent current: 1 mA/amplifier
Selectable quiescent current: 1 mA to 11.8 mA/amplifier
TYPICAL APPLICATION
1/2
ADA4311-1
V
*
MID
APPLICATIONS
1/2
Home networking line drivers
Twisted pair line drivers
Power line communications (PLC)
Video line drivers
ADA4311-1
–
V
GND
CC
=
*V
MID
2
Figure 2. Typical PLC Driver Application
ARB line drivers
I/Q channel amplifiers
GENERAL DESCRIPTION
The ADA4311-1 is comprised of two high speed, current
feedback operational amplifiers. The high output current, high
bandwidth, and fast slew rate make it an excellent choice for
broadband applications requiring high linearity performance
while driving low impedance loads.
The ADA4311-1 is available in a thermally enhanced, 10-lead
MSOP with an exposed paddle for improved thermal conduction.
The ADA4311-1 is rated to work in the extended industrial
temperature range of −40°C to +85°C.
The ADA4311-1 incorporates a power management function
that provides shutdown capabilities and the ability to optimize
the quiescent current of the amplifiers. The CMOS-compatible,
power-down control pins (PD1 and PD0) enable the ADA4311-1
to operate in four different modes: full power, medium power,
low power, and complete power-down. In power-down mode, the
quiescent current drops to only 1.0 mA/amplifier, while the outputs
go to a high impedance state.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2007 Analog Devices, Inc. All rights reserved.
ADA4311-1
TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation ...................................................................... 10
Application Information................................................................ 11
Feedback Resistor Selection...................................................... 11
Power Control Modes of Operation ........................................ 11
Exposed Thermal Pad Connections ........................................ 11
Powerline Application ............................................................... 11
Board Layout............................................................................... 12
Power Supply Bypassing............................................................ 12
Outline Dimensions....................................................................... 13
Ordering Guide .......................................................................... 13
Applications....................................................................................... 1
Pin Configuration............................................................................. 1
Typical Application........................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
REVISION HISTORY
8/07—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADA4311-1
SPECIFICATIONS
VS = 12 V, RF = 499 Ω (@ TA = 25°C, G = +5, RL = 100 Ω to VS/2), unless otherwise noted.
Table 1.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth
VOUT = 0.1 V p-p, PD1 = 0, PD0 = 0, RLOAD = 50 Ω
VOUT = 0.1 V p-p, PD1 = 0, PD0 = 1, RLOAD = 50 Ω
VOUT = 0.1 V p-p, PD1 = 1, PD0 = 0, RLOAD = 50 Ω
VOUT = 10.2 V p-p, PD1 = 0, PD0 = 0, RLOAD = 50 Ω
VOUT = 2 V p-p, PD1 = 0, PD0 = 0
310
220
140
12.9
1050
1050
1000
MHz
MHz
MHz
MHz
V/μs
V/μs
V/μs
Full Power Bandwidth
Slew Rate
VOUT = 2 V p-p, PD1 = 0, PD0 = 1
VOUT = 2 V p-p, PD1 = 1, PD0 = 0
NOISE/DISTORTION PERFORMANCE
Differential Distortion (Worst
Harmonic)
fC = 1 MHz, VOUT = 2 V p-p
PD1 = 0, PD0 = 0
PD1 = 0, PD0 = 1
PD1 = 1, PD0 = 0
fC = 10 MHz, VOUT = 2 V p-p
PD1 = 0, PD0 = 0
PD1 = 0, PD0 = 1
PD1 = 1, PD0 = 0
fC = 20 MHz, VOUT = 2 V p-p
PD1 = 0, PD0 = 0
PD1 = 0, PD0 = 1
PD1 = 1, PD0 = 0
f = 100 kHz
−98
−95
−86
dBc
dBc
dBc
−72
−63
−52
dBc
dBc
dBc
−56
−49
−43
2.4
dBc
dBc
dBc
nV/√Hz
pA/√Hz
Input Voltage Noise
Input Current Noise
DC PERFORMANCE
Input Offset Voltage
Input Bias Current
f = 100 kHz
17
−3
+1
+3
mV
Noninverting Input
Inverting Input
Open-Loop Transimpedance
−9
−4
4
15
57
−2
+4.5
14
35
62
+3
+16
μA
μA
MΩ
MΩ
dB
RLOAD = 50 Ω
RLOAD = 100 Ω
Common-Mode Rejection
INPUT CHARACTERISTICS
Input Resistance
+IN, f < 100 kHz
500
kΩ
OUTPUT CHARACTERISTICS
Single-Ended, +Swing
Single-Ended, −Swing
Single-Ended, +Swing
Single-Ended, −Swing
Differential Swing
RLOAD = 50 Ω
RLOAD = 50 Ω
RLOAD = 100 Ω
RLOAD = 100 Ω
RLOAD = 100 Ω
11
11.1
0.9
11.1
0.8
VP
VP
VP
VP
1
11
0.9
20.2
20.6
V p-p
POWER SUPPLY
Single Supply
12
V
Supply Current
PD1 = 0, PD0 = 0
PD1 = 0, PD0 = 1
PD1 = 1, PD0 = 0
PD1 = 1, PD0 = 1
10.5
7
4.3
11.8
7.9
5.2
0.9
13
9
6.3
1.3
mA/amp
mA/amp
mA/amp
mA/amp
Rev. 0 | Page 3 of 16
ADA4311-1
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
POWER-DOWN PINS
PD1, PD0 Threshold
Referenced to GND
1.5
V
High Level Input Voltage, VIH
Low Level Input Voltage, VIL
PD1, PD0 = 0 Pin Bias Current
PD1, PD0 = 1 Pin Bias Current
Enable/Disable Time
2
0
−1.5
40
5
V
V
μA
μA
ns
dB
0.8
+1.5
80
PD1 or PD0 = 0 V
PD1 or PD0 = 3 V
−0.2
63
130/116
−70
Power Supply Rejection Ratio
−63
Rev. 0 | Page 4 of 16
ADA4311-1
ABSOLUTE MAXIMUM RATINGS
Maximum Power Dissipation
Table 2.
The maximum safe power dissipation for the ADA4311-1 is
limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the amplifiers. Exceeding a junction temperature of
150°C for an extended period can result in changes in silicon
devices, potentially causing degradation or loss of functionality.
Parameter
Rating
Supply Voltage
Power Dissipation
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering 10 sec)
Junction Temperature
13.6 V
(TJMAX − TA)/θJA
−65°C to +125°C
−40°C to +85°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating
only; functional operation of the device at these or any other
conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Figure 3 shows the maximum safe power dissipation in
the package vs. the ambient temperature for the 10-lead
MINI_SO_EP (44°C/W) on a JEDEC standard 4-layer board.
θJA values are approximations.
5.0
THERMAL RESISTANCE
4.5
4.0
3.5
Thermal resistance (θJA) is specified for the worst-case conditions,
that is, θJA is specified for device soldered in circuit board for
surface-mount packages.
MINI_SO_EP-10
3.0
2.5
2.0
1.5
1.0
0.5
0
Table 3.
Package Type
θJA
Unit
10-Lead MINI_SO_EP
44
°C/W
–35
–15
5
25
45
65
85
AMBIENT TEMPERATURE (°C)
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. 0 | Page 5 of 16
ADA4311-1
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADA4311-1
+V
1
2
3
4
5
10 OUT B
S
NC
OUT A
–IN A
9
8
7
6
–IN B
+IN B
PD1
+IN A
PD0
NC = NO CONNECT
Figure 4. Pin Configuration
Table 4. Pin Function Description
Pin No.
Mnemonic
Description
1
+VS
Positive Power Supply Input.
2
NC
No Connection.
3
4
5
6
7
8
9
10
OUT A
−IN A
+IN A
PD0
Amplifier A Output.
Amplifier A Inverting Input.
Amplifier A Noninverting Input.
Power Dissipation Control.
Power Dissipation Control.
Amplifier B Noninverting Input.
Amplifier B Inverting Input.
Amplifier B Output.
PD1
+IN B
−IN B
OUT B
GND
11 (Exposed Paddle)
Ground (Electrical Connection Required).
Rev. 0 | Page 6 of 16
ADA4311-1
TYPICAL PERFORMANCE CHARACTERISTICS
9
–40
–50
V
R
= 100mV p-p
= 50Ω
HD2
HD3
V
R
= 2V p-p
OUT
OUT
= 100ꢀ
L
L
6
3
PD1, PD0 = 0, 0
G = +5
G = +5
–60
PD1, PD0 = 1, 0
0
–70
PD1, PD0 = 0, 1
PD1, PD0 = 0, 0
–3
–80
G = +10
–6
–90
–9
–100
–110
–120
–130
G = +20
–12
–15
–18
0.1
1
10
100
1000
1
10
FREQUENCY (MHz)
100
FREQUENCY (MHz)
Figure 5. Small Signal Frequency Response for Various Closed-Loop Gains
Figure 8. Differential Harmonic Distortion vs. Frequency
9
–60
–70
V
R
= 100mV p-p
f = 5MHz
OUT
= 50Ω
6
3
R = 100ꢀ
L
L
PD1, PD0 = 0, 0
G = +5
G = +5
0
HD2
HD3
–80
–3
PD1, PD0 = 0, 1
PD1, PD0 = 1, 0
–6
–90
–9
–12
–15
–18
–21
–24
–100
–110
–120
1
10
100
1000
0.1
1
10
FREQUENCY (MHz)
OUTPUT VOLTAGE (V p-p)
Figure 6. Small Signal Frequency Response for Various Modes
Figure 9. Differential Harmonic Distortion vs. Output Voltage
–40
0.20
G = +5
V
= 2V p-p
OUT
R
= 50ꢀ
f = 5MHz
G = +5
L
0.15
0.10
0.05
0
10ns/DIV
–50
–60
–70
HD2
HD3
–80
–0.05
–0.10
–0.15
–0.20
–90
–100
–110
10
100
LOAD RESISTANCE (ꢀ)
1000
Figure 7. Small Signal Transient Response
Figure 10. Differential Harmonic Distortion vs. Load Resistance
Rev. 0 | Page 7 of 16
ADA4311-1
1000
100
10
100M
10M
1M
0
R
= 100ꢀ
PD1, PD0 = 0, 0
L
–45
–90
–135
–180
–225
–270
PHASE
100k
10k
1k
1
MAGNITUDE
0.1
0.01
0.01
100
100
0.1
1
10
100
1000
1k
10k
100k
1M
10M
100M
1G
FREQUENCY (MHz)
FREQUENCY (Hz)
Figure 11. Open-Loop Transimpedance and Phase vs. Frequency
Figure 14. Closed-Loop Output Impedance vs. Frequency
0
1M
PD1, PD0 = 0, 0
PD1, PD0 = 1, 1
R
= 100ꢀ
L
–10
–20
–30
–40
–50
–60
–70
100k
10k
1k
100
10
1
0.01
0.01
0.1
1
10
100
1000
0.1
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 12. Common-Mode Rejection vs. Frequency
Figure 15. Output Impedance vs. Frequency (Disabled)
–10
–20
–30
–40
–50
–60
–70
100
10
1
PD1, PD0 = 0, 0
L
R
= 100ꢀ
+PSR
0.01
0.1
1
10
100
1000
10
100
1k
10k
100k
1M
10M
100M
1G
FREQUENCY (MHz)
FREQUENCY (Hz)
Figure 13. Power Supply Rejection vs. Frequency
Figure 16. Voltage Noise vs. Frequency
Rev. 0 | Page 8 of 16
ADA4311-1
–20
–40
0
–20
PD1, PD0 = 1, 1
–40
–60
–60
–80
–80
–100
–100
1
10
100
1000
0.1
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (Hz)
Figure 17. Feedthrough vs. Frequency
Figure 19. Crosstalk vs. Frequency
8
12
11
10
9
7
6
5
4
3
2
1
0
V
OUT
8
V
, V
PD0
PD1
7
6
30
100
1000
0
1
2
3
TIME (1μs/DIV)
4
5
6
LOAD (ꢀ)
Figure 18. Power-Down Turn On/Turn Off
Figure 20. Single-Ended Output Swing vs. Load
Rev. 0 | Page 9 of 16
ADA4311-1
THEORY OF OPERATION
The ADA4311-1 is a dual-current feedback amplifier with high
output current capability. With a current feedback amplifier, the
current into the inverting input is the feedback signal, and the
open-loop behavior is that of a transimpedance, dVO/dIIN or TZ.
Because G × RIN << RF for low gains, a current feedback amplifier
has relatively constant bandwidth vs. gain, the 3 dB point being
set when |TZ| = RF.
For a real amplifier, there are additional poles that contribute
excess phase, and there is a value for RF below which the amplifier
is unstable. Tolerance for peaking and desired flatness determines
the optimum RF in each application.
The open-loop transimpedance is analogous to the open-loop
voltage gain of a voltage feedback amplifier. Figure 21 shows a
simplified model of a current feedback amplifier. Because RIN is
proportional to 1/gm, the equivalent voltage gain is TZ × gm,
where gm is the transconductance of the input stage. Basic
analysis of the follower with gain circuit yields
R
F
R
G
R
IN
VOUT
VIN
TZ
s
( )
T
Z
V
= G ×
OUT
I
IN
TZ s + G × RIN + RF
( )
R
N
where:
V
IN
RF
RG
G =1+
Figure 21. Simplified Block Diagram
1
gm
RIN
=
≈ 50 ꢀ
Rev. 0 | Page 10 of 16
ADA4311-1
APPLICATION INFORMATION
FEEDBACK RESISTOR SELECTION
Table 6. Power Modes
Total Supply
Current (mA)
Output
Impedance
The feedback resistor has a direct impact on the closed-loop
bandwidth and stability of the current feedback op amp.
Reducing the resistance below the recommended value can
make the amplifier response peak and even become unstable.
Increasing the size of the feedback resistor beyond the recom-
mended value reduces the closed-loop bandwidth. Table 5
provides a convenient reference for quickly determining the
feedback and gain resistor values, and the corresponding
bandwidth, for common gain configurations. The recommended
feedback resistor value for the ADA4311-1 is 499 Ω.
PD1
Low
Low
PD0
Power Mode
Low
Full Power
23.6
15.8
10.4
1.8
Low
Low
Low
High
High ¾ Power
½ Power
High High Power-Down
High Low
EXPOSED THERMAL PAD CONNECTIONS
The exposed thermal pad on the 10-lead MSOP is both the
reference for the PD pins and the only electrical connection for
the negative supply voltage. Therefore, in the 10-lead MSOP,
the ADA4311-1 can only be used on a single supply. The exposed
thermal pad must be connected to ground. Failure to do so
renders the part inoperable.
Table 5. Recommended Values and Frequency Performance1
Gain
RF (Ω)
499
1 k
499
499
RG (Ω)
−3 dB SS BW (MHz)
+5
+5
+10
+20
124
250
55.4
26.1
310
220
175
84
A requirement for this package is that the thermal pad be
connected to a solid plane with low thermal resistance, ensuring
adequate heat transfer away from the die and into the board.
1 Conditions: VS = 12 V, TA = 25°C, RL = 50 Ω, PD1, PD0 = 0, 0.
POWERLINE APPLICATION
POWER CONTROL MODES OF OPERATION
Applications (that is, powerline AV modems) requiring greater
than 10 dBm peak power should consider using an external
line driver, such as the ADA4311-1. Figure 22 shows an example
interface between the TxDAC® output and the ADA4311-1 biased
for single-supply operation. The peak-to-peak differential
output voltage swing of the TxDAC should be limited to
2 V p-p, with the gain of the ADA4311-1 configured to realize
the additional voltage gain required by the application. A low-
pass filter should be considered to filter the DAC images
inherent in the signal reconstruction process. In addition, dc
blocking capacitors are required to level-shift the output signal
of the TxDAC to the common-mode level of the ADA4311-1
(that is, VMID = VCC − GND/2).
The ADA4311-1 features four power modes: full power, ¾
power, ½ power, and shutdown. The power modes are controlled
by two logic pins, PD0 and PD1. The power-down control pins
are compatible with standard 3 V and 5 V CMOS logic. Table 6
shows the various power modes and associated logic states. In
the power-down mode, the output of the amplifier goes into a
high impedance state.
0.1µF
R
SET
1/2
OPTIONAL
LCLPF
ADA4311-1
IOUTP+
IOUTP–
V
MID
TxDAC
0dB TO –7.5dB
1/2
ADA4311-1
Figure 22. TxDAC Output Directly via Center-Tap Transformer
Rev. 0 | Page 11 of 16
ADA4311-1
BOARD LAYOUT
POWER SUPPLY BYPASSING
As is the case with all high speed applications, careful attention
to printed circuit board (PCB) layout details prevents associated
board parasitics from becoming problematic. Proper RF design
technique is mandatory. The PCB should have a ground plane
covering all unused portions of the component side of the
board to provide a low impedance return path. Removing the
ground plane on all layers from the area near the input and
output pins reduces stray capacitance, particularly in the area of
the inverting inputs. Signal lines connecting the feedback and
gain resistors should be as short as possible to minimize the
inductance and stray capacitance associated with these traces.
Termination resistors and loads should be located as close as
possible to their respective inputs and outputs. Input and
output traces should be kept as far apart as possible to minimize
coupling (crosstalk) though the board. Wherever there are
complementary signals, a symmetrical layout should be provided
to the extent possible to maximize balanced performance.
When running differential signals over a long distance, the
traces on the PCB should be close. Doing this reduces the
radiated energy and makes the circuit less susceptible to RF
interference. Adherence to stripline design techniques for long
signal traces (greater than about 1 inch) is recommended.
The ADA4311-1 operates on supplies from 6 V to 12 V. The
ADA4311-1 circuit should be powered with a well-regulated
power supply. Careful attention must be paid to decoupling the
power supply. High quality capacitors with low equivalent series
resistance (ESR), such as multilayer ceramic capacitors (MLCCs),
should be used to minimize supply voltage ripple and power
dissipation. In addition, 0.1 μF MLCC decoupling capacitors
should be located no more than ⅛-inch away from each of the
power supply pins. A large, usually tantalum, 10 μF capacitor is
required to provide good decoupling for lower frequency signals
and to supply current for fast, large signal changes at the
ADA4311-1 outputs. Bypassing capacitors should be laid out
in such a manner as to keep return currents away from the
inputs of the amplifiers, which minimizes any voltage drops that
can develop due to ground currents flowing through the ground
plane. A large ground plane also provides a low impedance path
for the return currents.
For more information on high speed board layout, see A
Practical Guide to High-Speed Printed-Circuit-Board Layout.
Rev. 0 | Page 12 of 16
ADA4311-1
OUTLINE DIMENSIONS
*
2.27
2.17
2.07
3.10
3.00
2.90
10
1
6
5.05
4.90
4.75
*
1.83
1.73
1.63
3.10
3.00
2.90
TOP
VIEW
5
EXPOSED
PAD
PIN 1
INDICATOR
BOTTOM VIEW
0.50 BSC
1.10 MAX
0.50 BSC
0.94
0.86
0.78
0.23
0.18
0.13
0.70
0.55
0.40
0.15
0.10
0.05
SEATING
PLANE
8°
0°
0.30
0.23
0.15
COPLANARITY
0.10
*
COMPLIANT TO JEDEC STANDARDS MO-187-BA-T
EXCEPT FOR EXPOSED PAD DIMENSIONS.
Figure 23. 10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP]
(RH-10-1)
Dimensions shown in millimeters
ORDERING GUIDE
Package
Option
Model
ADA4311-1ARHZ1
ADA4311-1ARHZ-RL1 −40°C to +85°C
ADA4311-1ARHZ-R71 −40°C to +85°C
Temperature Range
−40°C to +85°C
Package Description
Branding
10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] RH-10-1
10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] RH-10-1
10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] RH-10-1
1A
1A
1A
1 Z = RoHS Compliant Part.
Rev. 0 | Page 13 of 16
ADA4311-1
NOTES
Rev. 0 | Page 14 of 16
ADA4311-1
NOTES
Rev. 0 | Page 15 of 16
ADA4311-1
NOTES
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06940-0-8/07(0)
Rev. 0 | Page 16 of 16
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