AD45048 [ADI]
Rail-to-Rail Upstream ADSL Line Driver; 轨到轨上行ADSL线路驱动器
| 型号： | AD45048 |
| 厂家： | 
ADI |
| 描述： | Rail-to-Rail Upstream ADSL Line Driver |
| 文件： | 总8页 (文件大小：150K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Rail-to-Rail Upstream ADSL Line Driver
AD45048
PIN CONFIGURATION
FEATURES
Dual op amp
Voltage feedback
Wide supply range: from 3.3 V to 24 V
Rail-to-rail output
OUT1
–IN1
+IN1
1
2
3
4
8
7
6
5
+V
S
OUT2
–IN2
+IN2
–V
S
Output swing to within 0.5 V of supply rails @ 230 mA
23 V p-p differential, RLOAD of 50 Ω from 12 V supply
High output current
Linear output current of 230 mA peak into 25 Ω
−68 dBc MTPR @ 15 dBm (100 Ω telephone line)
Low noise
Figure 1. 8-Lead SOIC
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
4.5 nV/√Hz voltage noise density @ 100 kHz
1.5 pA/√Hz current noise density @ 100 kHz
High speed
65 MHz bandwidth (AV = 1, −3 dB)
55 V/μs slew rate (RLOAD = 25 Ω)
–68dB
APPLICATIONS
Consumer xDSL modems
CENTER 86.31174378kHz
1kHz/
SPAN 10kHz
Twisted pair line drivers
ADSL CPE applications
Figure 2. AD45048AR Upstream ADSL MTPR (13 dBm, CF = 5.3)
(Drop in replacement for TS613ID and EL1519CS)
Audio applications
GENERAL DESCRIPTION
The AD45048 ADSL CPE line driver is a dual operational
amplifier capable of driving high output current (230 mA); it
features a rail-to-rail output stage that swings to within 0.5 V
of the supply rails. The AD45048 rail-to-rail output stage
surpasses the output voltage capability of typical emitter-
follower output stages and can deliver up to 23 V p-p
differentially from a single 12 V supply in ADSL CPE line
driving applications. The low distortion, high output current
and wide output dynamic range make the AD45048 ideal for
driving upstream signals in ADSL CPE applications.
Fabricated with ADI’s high speed XFCB-HV (eXtra Fast
Complementary Bipolar-High Voltage) process, the high
bandwidth and fast slew rate of the AD45048 keep distortion to
a minimum while dissipating minimum power. The AD45048 is
available in a standard 8-lead SOIC package that can operate
from −40°C to +85°C.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
© 2005 Analog Devices, Inc. All rights reserved.
AD45048
TABLE OF CONTENTS
Features .............................................................................................. 1
General Description..........................................................................7
Power Supply and Decoupling.....................................................7
Layout Considerations..................................................................7
CPE ADSL Application ................................................................7
Transformer Selection ..................................................................7
Receive Channel Considerations.................................................7
Outline Dimensions..........................................................................8
Ordering Guide .............................................................................8
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Typical Performance Characteristics ............................................. 5
REVISION HISTORY
9/05—Rev. 0 to Rev. A
Updated Outline Dimensions......................................................... 8
Changes to Ordering Guide ............................................................ 8
7/04—Revision 0: Initial Version
Rev. A | Page 2 of 8
AD45048
SPECIFICATIONS
VS = ±± V or +12 V (@ TA = 25°C, G = +10, RL = 100 Ω, unless otherwise noted).
Table 1.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth
0.1 dB Flatness
G = +1, VOUT = 0.1 V p-p, RFB = 0 Ω, RLOAD = 25 Ω
VOUT = 0.1 V p-p single-ended, G = +1, RLOAD = 25 Ω
VOUT = 1 V p-p single-ended, G = +10, RLOAD = 25 Ω
VOUT = 5 V p-p, G = +1, RLOAD = 25 Ω
65
MHz
MHz
MHz
V/μs
3.35
4.5
55
Large Signal Bandwidth
Large Signal Slew Rate
NOISE/DISTORTION PERFORMANCE
Distortion (Worst Harmonic)
Multitone Power Ratio
Input Voltage Noise
Input Current Noise
DC PERFORMANCE
fC = 40 kHz, VOUT = 6 V p-p, single-ended, RLOAD = 25 Ω
26 kHz to 134 kHz, ZLINE = 100 Ω, XFMR = 1:2 turns, PLINE = 13 dBm
f = 100 kHz
f = 100 kHz
−80
−68
4.5
dBc
dBc
nV/√Hz
pA/√Hz
1.5
Input Offset Voltage
1
2.5
1
200
1.3
50
94
2.5
mV
mV
mV
nA
μA
nA
dB
TMIN − TMAX
Input Offset Voltage Match
Input Bias Current
2.0
900
TMIN − TMAX
Input Offset Current
Open-Loop Gain
300
85
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
f = 100 kHz
87
1.4
kΩ
pF
OUTPUT CHARACTERISTICS
Output Resistance
1.4 MHz; G = +1
0.2
Ω
Output Voltage Swing
Maximum swing (differential) VOMAX, RLOAD = 50 Ω differential
Minimum swing (differential) VOMIN, RLOAD = 50 Ω differential
11.25
11.5
V diff
−11.5 −11.25 V diff
Differential Output Voltage Swing ΔVOUT = VOMAX − VOMIN
22.5
5.68
23
5.76
−5.67 −5.58
5.95
−5.91 −5.86
12.6
9
−85
−86
V p-p
Vp
Vp
Vp
Vp
Single-Ended +Swing
Single-Ended -Swing
Single-Ended +Swing
Single-Ended –Swing
RLOAD = 25 Ω
RLOAD = 25 Ω
RLOAD = 100 Ω
RLOAD = 100 Ω
5.92
Operating Range (Dual Supply)
Supply Current
1.5
7
V
12
−75
−79
mA
dB
dB
Power Supply Rejection Ratio
Common-Mode Rejection Ratio
0.5 V
1 V
Rev. A | Page 3 of 8
AD45048
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage
Power Dissipation
Storage Temperature
Operating Temperature Range
Lead Temperature Range
(Soldering 10 sec)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rating
26.4 V
(TJMAX – TA)/θJA
−65°C to +125°C
−40°C to +85°C
300°C
1
Junction Temperature
150°C
1 θJA = 112.7°C/W for SOIC package in still air based on 2S2P JEDEC PCB.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 4 of 8
AD45048
TYPICAL PERFORMANCE CHARACTERISTICS
25
25
20
499Ω
499Ω
G = +10
G = +5
G = +10
20
R
R
G
G
–
+
–
+
G = +5
15
15
10
25Ω
25Ω
10
G = +2
G = +1
G = +2
G = +1
5
5
0
0
–5
–5
–10
–15
–20
–25
–10
–15
–20
–25
10k
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 3. Noninverting Small Signal Bandwidth
(VS = 6 V, VO = 0.1 V p-p, RL = 25 Ω)
Figure 6. Noninverting Large Signal Bandwidth
(VS = 6 V, VO = 1 V p-p, RL = 25 Ω)
25
20
25
20
5kΩ
5kΩ
G = –10
G = –5
G = –10
G = –5
R
R
G
–
+
G
–
+
15
15
25Ω
25Ω
10
10
G = –2
G = –1
G = –2
G = –1
5
5
0
0
–5
–5
–10
–15
–20
–25
–10
–15
–20
–25
10k
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 4. Inverting Small Signal Bandwidth
(VS = 6 V, VO = 0.1 V p-p, RL = 25 Ω)
Figure 7. Inverting Large Signal Bandwidth
(VS = 6 V, VO = 1 V p-p, RL = 25 Ω)
–40
–50
–60
–70
–80
R2
3kΩ
+12V
4.7μF
TANT
0.1μF
R1
8
499Ω
2
3
+V
IN
R3
V+
12.5Ω
1
OUT
U1A
AD45048
TX1
R3
100Ω
+6V
5
6
R6
12.5Ω
1:2
7
R4
499Ω
OUT
V–
U1B
AD45048
–V
IN
4
R5
3kΩ
0
5
10
15
20
dBm (100Ω)
Figure 5. MTPR vs. Line Power (See Schematic in Figure 8)
Figure 8. Differential Test Circuit for MTPR
Rev. A | Page 5 of 8
AD45048
100
100
10
1
10
1
10
100
1k
10k
100k
1M
10M
100M
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9. Voltage Noise vs. Frequency, VS = 6 V
Figure 12. Input Current Noise vs. Frequency, VS = 6 V
0
–20
1000
100
10
–40
–60
1
SECOND
–80
0.1
–100
0.01
THIRD
–120
1
0.001
2
3
4
5
6
7
8
9
10
11
10k
100k
1M
10M
100M
OUTPUT VOLTAGE (p-p)
FREQUENCY (Hz)
Figure 10. Single-Ended Harmonic Distortion, VS = 6 V dc, G = +6,
RF = 499 Ω, RG = 100 Ω, RL = 25 Ω, Fundamental Frequency = 40 kHz
Figure 13. Output Impedance vs. Frequency
50mV/DIV
2V/DIV
M 5.00μs
M 100ns
Figure 11. Discrete Multitone Modulation Overdrive Recovery
(See Schematic in Figure 8)
Figure 14. Small Signal Pulse Response RLOAD = 1 kΩ, RFB = 500 Ω
Rev. A | Page 6 of 8
AD45048
GENERAL DESCRIPTION
The AD45048 is a voltage feedback, rail-to-rail output amplifier
with high output current capability. Fabricated on Analog
Devices’ proprietary high speed eXtra fast complementary
bipolar high voltage process (XFCB-HV), the high bandwidth
and fast slew rate of the AD45048 keep distortion to a
minimum while dissipating minimum power. The XFCB-HV,
silicon-on-insulator (SOI) process prevents latch-up problems
and enables the construction of high frequency, low distortion
amplifiers, such as the AD45048.
CPE ADSL APPLICATION
The low cost, high output current dual AD45048 xDSL line
driver amplifiers have been specifically designed to drive high
fidelity xDSL signals to within 0.5 V of the power rails on a
single 12 V supply. The AD45048 can be used in transformer-
coupled bridge hybrid circuits designed to drive modulated
signals, including discrete multitone (DMT), upstream to the
central office.
TRANSFORMER SELECTION
POWER SUPPLY AND DECOUPLING
Customer premise ADSL applications require the transmission
of a 13 dBm DMT signal (20 mW into 100 Ω). DMT signals can
have a crest factor (V peak/V rms ratio) as high as 5.3, requiring
the line driver to provide a peak power of 5±0 mW. The line
driver is required to drive a 7.5 V peak onto the 100 Ω
telephone line while maintaining about −±5 dBc to −70 dBc of
MTPR. Since the maximum low distortion output swing
available from the AD45048 line driver is approximately 11.5 V
on a 12 V supply (depending on the load), and taking into
account the power lost in the transformer and termination
resistors, a step-up transformer with a minimum turns ratio of
1.5 or greater is needed. In the simplified differential driver
circuit shown in Figure 8, the AD45048 is driving a 25 Ω
impedance reflected by 1:2 step-up transformer. R3 and R± are
12.5 Ω each and are back-termination or load-matching
resistors whose values can be calculated by
The AD45048 can be powered with a good quality, well
regulated, low noise supply anywhere in the range from +3 V to
±12.± V. In order to optimize the AD45048 in standard ADSL
CPE line driver applications (see Figure 8), power the amplifier
with a well regulated 12 V supply. Careful attention should be
paid to decoupling the power supply. High quality capacitors
with low equivalent series resistance (ESR), such as multilayer
ceramic capacitors (MLCCs), should be used to minimize the
supply voltage ripple and power dissipation. A 0.1 μF MLCC
decoupling capacitor(s) should be located no more than
1/8-inch away from the power supply pin(s). A large, usually
tantalum, 10 μF to 47 μF capacitor is recommended to provide
good decoupling for lower frequency signals and to supply
current for fast, large signal changes at the AD45048 outputs.
LAYOUT CONSIDERATIONS
(100 Ω/(N2))/2
As is the case with all high speed applications, careful attention
to printed circuit board layout details prevents associated board
parasitics from becoming problematic. Proper RF layout and
printed circuit board design techniques are strongly
recommended. The PCB should have a low impedance return
path (or ground) to the supply. Removing the ground plane
from all layers in the immediate area of the amplifier reduces
stray capacitances. The signal routing should be short and
direct in order to minimize the parasitic inductance and
capacitance associated with these traces. Termination resistors
and loads should be located as close as possible to their
respective inputs and outputs. Input traces should be kept as far
apart as possible from the output traces to minimize coupling
(crosstalk) though the board.
where 100 Ω is the approximate phone line impedance and N is
the transformer turns ratio. In Figure 8, the total differential
load including the termination resistors is 50 Ω, and under
these conditions, the AD45048 is capable of driving low
distortion signals to within 0.5 V of the power rails.
RECEIVE CHANNEL CONSIDERATIONS
A step-up transformer of N turns used at the output of the
differential line driver increases the differential output voltage
to the line (see Figure 8). However, the inverse effect is seen in
the receive channel as the amplitude of signal on the driver side
of the transformer is divided by N turns. The decision to use a
particular transformer turns ratio may be impacted by the
ability of the receive circuitry to resolve low level signals in the
noisy twisted pair telephone plant. Higher turns ratio
transformers reduce the effective receive channel SNR (signal-
to-noise ratio) due to the reduction in the received signal
strength.
Wherever there are complementary signals, a symmetrical
layout should be provided to the extent possible in order to
maximize balanced performance. When running differential
signals over a long distance, the traces on the PCB should be
close together or any differential wiring should be twisted
together to minimize the area of the loop that is formed. This
reduces the radiated energy and makes the circuit less
susceptible to RF interference. Adherence to stripline design
techniques for long signal traces (greater than about 1 inch) is
recommended.
An amplifier with low RTI noise, such as the AD8022
(2.5 nV/√Hz), is recommended for the receive channel. For a
complete selection of amplifiers and other related components,
see www.analog.com.
Rev. A | Page 7 of 8
AD45048
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 15. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
AD45048AR
AD45048AR-REEL
AD45048AR-REEL7
AD45048ARZ1
AD45048ARZ-REEL1
AD45048ARZ-REEL71
Temperature Range
−40°C to +85°C
Package Description
Package Option
8-Lead Standard Small Outline Package (SOIC_N)
8-Lead Standard Small Outline Package (SOIC_N)
8-Lead Standard Small Outline Package (SOIC_N)
8-Lead Standard Small Outline Package (SOIC_N)
8-Lead Standard Small Outline Package (SOIC_N)
8-Lead Standard Small Outline Package (SOIC_N)
R-8
R-8
R-8
R-8
R-8
R-8
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
1 Z = Pb-free part.
©
2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04817–0–9/05(A)
Rev. A | Page 8 of 8
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