AD5546CRUZ [ADI]
Current-Output Parallel-Input, 16-Bit Digital-to-Analog Converter;
| 型号： | AD5546CRUZ |
| 厂家： | 
ADI |
| 描述： | Current-Output Parallel-Input, 16-Bit Digital-to-Analog Converter 转换器 数模转换器 |
| 文件： | 总16页 (文件大小：567K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Current Output, Parallel Input, 16-/14-Bit
Multiplying DACs with 4-Quadrant Resistors
AD5546/AD5556
FEATURES
16-bit resolution
FUNCTIONAꢀ BꢀOCK DIAGRAM
R
R
REF R
1
COM
OFS
14-bit resolution
2- or 4-quadrant multiplying DAC
1 ꢀSB DNꢀ
1 ꢀSB INꢀ or 2 ꢀSB INꢀ
Operating supply voltage: 2.7 V to 5.5 V
ꢀow noise: 12 nV/√Hz
ꢀow power: IDD = 10 µA
0.5 µs settling time
R
R
R
R
FB
1
2
OFS
R
I
FB
DAC
16/14
AD5546/
AD5556
OUT
V
DD
WR
CONTROL
LOGIC
DAC
REGISTER
LDAC
GND
DB0–DB15
POR
Built-in RFB facilitates current-to-voltage conversion
Built-in 4-quadrant resistors allow 0 V to –10 V, 0 V to +10 V,
or 10 V outputs
MSB RS
Figure 1. AD5546/AD5556 Simplified Block Diagram
2 mA full-scale current 20ꢁ, with VREF = 10 V
Automotive operating temperature: –40°C to +125°C
Compact TSSOP-28 package
GENERAꢀ DESCRIPTION
The AD5546/AD5556 are precision 16-/14-bit, multiplying, low
power, current output, parallel input D/A converters. They
operate from a single 2.7 V to 5.5 V supply with 1ꢀ V multi-
plying references for 4-quadrant outputs. Built-in 4-quadrant
resistors facilitate the resistance matching and temperature
tracking that minimize the number of components needed for
multiquadrant applications. The feedback resistor (RFB) simpli-
fies the I-V conversion with an external buffer. The AD5546/
AD5556 are packaged in compact TSSOP-28 packages with
operating temperatures from –4ꢀ°C to +125°C.
APPꢀICATIONS
Automatic test equipment
Instrumentation
Digitally controlled calibration
Digital waveform generation
5V
2
+
VIN
U2A
U3
ADR03
OP2177
–
5
6
C1
TRIM
–VREF
REF
+VREF
VOUT
GND
4
R1
RCOM
ROF
RFB
R1
R2
ROFS
RFB
C2
5V
VDD
IOUT
–
16/14-BIT
U1
U2B
OP2177
AD5546/AD5556
VOUT
GND
16/14 DATA
+
–VREF TO +VREF
WR LDAC RS MSB
WR
LDAC
RS
MSB
Figure 2. 16-/14-Bit, 4-Quadrant Multiplying DAC with a Minimum of External Components
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
AD5546/AD5556
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Pin Configurations and Functional Descriptions ........................ 6
Typical Performance Characteristics ............................................. 8
Circuit Operation ........................................................................... 11
D/A Converter Section.............................................................. 11
Digital Section............................................................................. 12
ESD Protection Circuits............................................................. 12
Amplifier Selection..................................................................... 12
Reference Selection .................................................................... 12
Applications..................................................................................... 13
Unipolar Mode ........................................................................... 13
Bipolar Mode .............................................................................. 14
AC Reference Signal Attenuator............................................... 15
System Calibration ..................................................................... 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
Revision ꢀ: Initial Version
Rev. 0 | Page 2 of 16
AD5546/AD5556
SPECIFICATIONS
Table 1. Electrical Characteristics. VDD = 2.7 V to 5.5 V, IOUT = virtual GND, GND = 0 V, VREF = –10 V to 10 V, TA = full operating
temperature range, unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
STATIC PERFORMANCE1
Resolution
N
N
AD5546, 1 LSB = VREF/216 = 153 µV at
16
14
Bits
Bits
V
REF = 10 V
Resolution
AD5556, 1 LSB = VREF/214 = 610 µV at
VREF = 10 V
Relative Accuracy
Relative Accuracy
INL
INL
DNL
IOUT
IOUT
GFSE
GE
Grade: AD5556C
Grade: AD5546B
Monotonic
Data = zero scale, TA = 25°C
Data = zero scale, TA = TA maximum
Data = full scale
Data = full scale
Data = full scale
1
2
1
10
20
4
LSB
LSB
LSB
nA
Differential Nonlinearity
Output Leakage Current
Output Leakage Current
Full-Scale Gain Error
Bipolar Mode Gain Error
nA
1
1
1
mV
mV
mV
4
2.5
Bipolar Mode Zero-Scale
Error
GZSE
Full-Scale Tempco
REFERENCE INPUT
VREF Range
2
TCVFS
1
ppm/°C
VREF
REF
R1 and R2
∆(R1 to R2)
RFB, ROFS
–18
4
4
+18
6
6
1.5
12
V
REF Input Resistance
R1 and R2 Resistance
R1-to-R2 Mismatch
Feedback and Offset
Resistance
5
5
0.5
10
kΩ
kΩ
Ω
8
kΩ
Input Capacitance2
ANALOG OUTPUT
Output Current
CREF
5
pF
IOUT
COUT
Data = full scale
Code dependent
2
200
mA
pF
Output Capacitance
2
LOGIC INPUT AND OUTPUT
Logic Input Low Voltage
Logic Input Low Voltage
Logic Input High Voltage
Logic Input High Voltage
Input Leakage Current
VIL
VIL
VIH
VIH
IIL
VDD = 5 V
VDD = 3 V
VDD = 5 V
VDD = 3 V
0.8
0.4
V
V
V
V
µA
pF
2.4
2.1
10
10
Input Capacitance
2
CIL
INTERFACE TIMING, 3
2
Data to WR Setup Time
Data to WR Hold Time
WR Pulse Width
tDS
tDH
tWR
VDD = 5 V
VDD = 3 V
VDD = 5 V
VDD = 3 V
VDD = 5 V
20
35
0
ns
ns
ns
ns
ns
0
20
VDD = 3 V
VDD = 5 V
VDD = 3 V
VDD = 5 V
VDD = 3 V
VDD = 5 V
VDD = 3 V
35
20
35
20
35
0
ns
ns
ns
ns
ns
ns
ns
LDAC Pulse Width
RS Pulse Width
tLDAC
tRS
WR to LDAC Delay Time
tLWD
0
Rev. 0 | Page 3 of 16
AD5546/AD5556
Parameter
Symbol Condition
Min Typ Max
Unit
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
AC CHARACTERISTICS4
VDD RANGE
IDD
PDISS
PSS
2.7
5.5
10
V
µA
Logic inputs = 0 V
Logic inputs = 0 V
∆VDD 5ꢀ
0.055 mW
0.003 ꢀ/ꢀ
=
Output Voltage Settling
Time
tS
To 0.1ꢀ of full scale, data cycles from zero scale to full scale
to zero scale
0.5
µs
Reference Multiplying BW
DAC Glitch Impulse
Multiplying Feedthrough
Error
BW
Q
VREF = 5 V p-p, data = full scale
VREF = 0 V, midscale to midscale minus 1
4
7
–65
MHz
nV-s
dB
V
OUT/VREF VREF = 100 mV rms, f = 10 kHz
Digital Feedthrough
QD
WR = 1, LDAC toggles at 1MHz
VREF = 5 V p-p, data = full-scale, f = 1 KHz
f = 1 kHz, BW = 1 Hz
7
nV-s
dB
nV/rt
Hz
Total Harmonic Distortion
Output Noise Density
THD
eN
–85
12
1 All static performance tests (except IOUT) are performed in a closed-loop system, using an external precision OP97 I-V converter amplifier. The AD554x RFB terminal is
tied to the amplifier output. The op amp +IN is grounded and the DAC IOUT is tied to the op amp –IN. Typical values represent average readings measured at 25°C.
2 These parameters are guaranteed by design and not subject to production testing.
3 All input control signals are specified with tR = tF = 2.5 ns (10ꢀ to 90ꢀ of 3 V), and timed from a voltage level of 1.5 V.
4 All ac characteristic tests are performed in a closed-loop system using an AD841 I-V converter amplifier.
Rev. 0 | Page 4 of 16
AD5546/AD5556
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Rating
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
VDD to GND
–0.3 V, +8 V
–18 V, 18 V
–0.3 V, +8 V
–0.3 V, VDD + 0.3 V
50 mA
128°C
150°C
–40°C to +125°C
–65°C to +150°C
RFB, ROFS, R1, RCOM, and REF to GND
Logic Inputs to GND
V(IOUT) to GND
Input Current to Any Pin except Supplies
Thermal Resistance (θJA)
Maximum Junction Temperature (TJ MAX
Operating Temperature Range
Storage Temperature Range
Lead Temperature:
)
Vapor Phase, 60 s
215°C
Infrared, 15 s
220°C
Package Power Dissipation
(TJ MAX – TA)/θJA
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 16
AD5546/AD5556
PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
D5
D4
D3
D2
D1
D0
NC
NC
1
2
28 V
DD
D7
D6
D5
D4
D3
D2
D1
D0
1
2
28
V
DD
27 D6
27 D8
3
26 D7
3
26 D9
4
25 D8
4
25 D10
24 D11
23 D12
22 D13
21 D14
20 D15
19 GND
18 RS
5
24 D9
5
6
23 D10
22 D11
21 D12
20 D13
19 GND
18 RS
6
AD5556
AD5546
7
7
TOP VIEW
TOP VIEW
(Not to Scale)
(Not to Scale)
8
8
R
9
R
9
OFS
OFS
R
10
R
10
FB
FB
R1 11
R
12
COM
R1 11
12
17 MSB
16 WR
15 LDAC
R
17 MSB
16 WR
15 LDAC
COM
REF 13
14
REF 13
I 14
OUT
I
OUT
NC = NO CONNECT
Figure 3.AD5546 Pin Configuration
Figure 4. AD5556 Pin Configuration
Table 3. AD5546 Functional Descriptions
Pin No. Mnemonic Description
1–8
9
D7 to D0
ROFS
Digital Input Data Bits D7 to D0. Signal level must be ≤ VDD + 0.3 V.
Bipolar Offset Resistor. Accepts up to 18 V. In 2-quadrant mode ties to RFB. In 4-quadrant mode ties to R1 and
external reference.
10
11
12
RFB
R1
RCOM
Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion.
4-Quandrant Resistor R1. In 2-quadrant mode shorts to REF pin. In 4-quadrant mode ties to ROFS.
Center Tap Point of Two 4-Quadrant Resistors, R1 and R2. In 4-quadrant mode, ties to the inverting node of the
reference amplifier. In 2-quadrant mode, shorts to REF pin.
13
REF
DAC Reference Input in 2-Quadrant Mode and R2 Terminal in 4-Quadrant Mode. In 2-quadrant mode, this is the
reference input with constant input resistance versus code. In 4-quadrant mode, this pin is driven by the external
reference amplifier.
14
15
16
IOUT
LDAC
WR
DAC Current Output. Connects to the inverting node of an external op amp for I-V conversion.
Digital Input Load DAC Control. Signal level must be ≤ VDD + 0.3 V.
Write Control Digital Input in Active Low. Transfers shift-register data to DAC register on rising edge. Signal level
must be ≤ VDD + 0.3 V.
17
18
MSB
RS
Power-On Reset State. MSB = 0 resets at zero scale, MSB = 1 resets at midscale. Signal level must be ≤ VDD + 0.3 V.
Reset in Active Low. Resets to zero scale if MSB = 0, and resets to midscale if MSB = 1. Signal level must be
≤ VDD + 0.3 V.
19
GND
Analog and Digital Grounds.
20–21
22–27
28
D15 to D14 Digital Input Data Bits D15 to D14. Signal level must be ≤ VDD + 0.3 V.
D13 to D8
VDD
Digital Input Data Bits D13 to D8. Signal level must be ≤ VDD + 0.3 V.
Positive Power Supply Input. Specified range of operation: 2.7 V to 5.5 V.
Table 4. AD5556 Functional Descriptions
Pin No. Mnemonic Description
1–6
7–8
9
D5 to D0
NC
ROFS
Digital Input Data Bits D5 to D0. Signal level must be ≤ VDD+0.3 V.
No Connection. User should not connect anything other than dummy pads on these terminals.
Bipolar Offset Resistor. Accepts up to 18 V. In 2-quadrant mode ties to RFB. In 4-quadrant mode ties to R1 and
external reference.
10
11
12
RFB
R1
RCOM
Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion.
4-Quandrant Resistor R1. In 2-quadrant mode shorts to REF pin. In 4-quadrant mode ties to ROFS.
Center Tap Point of Two 4-Quadrant Resistors, R1 and R2. In 4-quadrant mode, ties to the inverting node of the
reference amplifier. In 2-quadrant mode, shorts to REF pin.
13
14
REF
IOUT
DAC Reference Input in 2-Quadrant Mode and R2 Terminal in 4-Quadrant Mode. In 2-quadrant mode, this is the
reference input with constant input resistance versus code. In 4-quadrant mode, this pin is driven by the external
reference amplifier.
DAC Current Output. Connects to the inverting node of an external op amp for I-V conversion.
Rev. 0 | Page 6 of 16
AD5546/AD5556
Pin No. Mnemonic Description
15
16
LDAC
WR
Digital Input Load DAC Control. Signal level must be ≤ VDD + 0.3 V.
Write Control Digital Input in Active Low. Transfers shift-register data to DAC register on rising edge. Signal level
must be ≤ VDD + 0.3 V.
17
18
MSB
RS
Power On Reset State. MSB = 0 resets at zero-scale, MSB = 1 resets at midscale. Signal level must be ≤ VDD + 0.3 V.
Reset in Active Low. Resets to zero-scale if MSB = 0 and resets to midscale if MSB = 1. Signal level must be
≤ VDD + 0.3 V.
19
GND
Analog and Digital Grounds.
20–27
28
D13 to D6
VDD
Digital Input Data Bits D13 to D6. Signal level must be ≤ VDD + 0.3 V.
Positive power supply input. Specified range of operation: 2.7 V to 5.5 V.
tWR
WR
DATA
tDH
tDS
tLWD
LDAC
tLDAC
tRS
RS
Figure 5. AD5546/AD5556 Timing Diagram
Table 5. AD5546 Parallel Input Data Format
MSB
B15
D15
LSB
B0
D0
Bit Position
Data Word
B14
D14
B13
D13
B12
D12
B11
D11
B10
D10
B9
D9
B8
D8
B7
D7
B6
D6
B5
D5
B4
D4
B3
D3
B2
D2
B1
D1
Table 6. AD5556 Parallel Input Data Format
MSB
LSB
Bit Position
Data Word
B13
D13
B12 B11
D12 D11
B10 B9
D10 D9
B8
B7 B6
B5 B4
D5 D4
B3
D3
B2 B1
D2 D1
B0
D0
D8 D7 D6
Table 7. Control Inputs
RS WR
ꢀDAC Register Operation
0
1
1
1
1
X
0
1
0
X
0
1
1
Reset output to 0, with MSB pin = 0. Midscale with MSB pin = 1.
Load input register with data bits.
Load DAC register with the contents of the input register.
Input and DAC registers are transparent.
When LDAC and WR are tied together and programmed as a pulse, the data bits are loaded into the input register on
the falling edge of the pulse, and then loaded into the DAC register on the rising edge of the pulse.
No register operation.
1
1
0
Rev. 0 | Page 7 of 16
AD5546/AD5556
TYPICAL PERFORMANCE CHARACTERISTICS
1.0
1.0
0.8
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0
0
–0.2
–0.4
–0.6
–0.8
–1.0
–0.2
–0.4
–0.6
–0.8
–1.0
0
8192 16384 24576 32768 40960 49152 57344 65536
CODE (Decimal)
0
0248 4096
6144
8192 10240 12288 14336 16384
CODE (Decimal)
Figure 9. AD5556 Differential Nonlinearity Error
Figure 6. AD5546 Integral Nonlinearity Error
1.5
1.0
1.0
0.8
V
T
= 2.5V
= 25°C
REF
A
0.6
0.4
0.5
0.2
INL
0
0
DNL
–0.2
–0.4
–0.6
–0.8
–1.0
–0.5
–1.0
–1.5
GE
2
4
6
8
10
0
8192 16384 24576 32768 40960 49152 57344 65536
CODE (Decimal)
SUPPLY VOLTAGE V (V)
DD
Figure 10. Linearity Error vs. VDD
Figure 7. AD5546 Differential Nonlinearity Error
1.0
0.8
5
4
3
2
V
= 5V
= 25°C
DD
T
A
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
1
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
IH
4.0
4.5
5.0
0
2048
4096
6144
8192 10240 12288 14336 16384
LOGIC INPUT VOLTAGE V (V)
CODE (Decimal)
Figure 8. AD5556 Integral Nonlinearity Error
Figure 11. Supply Current vs. Logic Input Voltage
Rev. 0 | Page 8 of 16
AD5546/AD5556
3.0
2.5
2.0
1.5
1.0
0.5
0
LDAC (5V/DIV)
0x5555
0x8000
V
V
= 5V
DD
= 10V
REF
CODES 0x8000 ↔0x7FFF
0xFFFF
0x0000
V
(50mV/DIV)
OUT
10k
100k
1M
CLOCK FREQUENCY (Hz)
10M
100M
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
TIME (µs)
Figure 12. AD5546 Supply Current vs. Clock Frequency
Figure 15. AD5546 Midscale Transition and Digital Feedthrough
REF LEVEL
0.000dB
/DIV
12.000dB
MARKER 4 41 677.200Hz
MAG (A/R) –2.939db
90
80
70
60
50
40
30
20
10
0
0xFFFF
0x8000
0x4000
0x2000
0x1000
0x0800
0x0400
0x0200
0x0100
0x0080
0x0040
0x0020
0x0010
0x0008
0x0004
0x0002
0x0001
V
V
= 5V ± 10%
DD
–12dB
–24dB
–36dB
–48dB
–60dB
–72dB
–84dB
–96dB
–108dB
= 10V
REF
0x0000
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
START 10.000Hz
STOP 50 000 000.000Hz
Figure 16. AD5546 Unipolar Reference Multiplying Bandwidth
Figure 13. Power Supply Rejection Ratio vs. Frequency
REF LEVEL
0.000dB
/DIV
12.000dB
0
ALL BITS ON
D15 AND D14 ON
D15 AND D13 ON
D15 AND D12 ON
D15 AND D11 ON
D15 AND D10 ON
–12
–24
–36
–48
–60
–72
–84
–96
–108
–120
LDAC
1
D15 AND D9 ON
D15 AND D8 ON
D15 AND D7 ON
D15 AND D6 ON
D15 AND D5 ON
2
D15 AND D4 ON
D15 AND D3 ON
D15 AND D2 ON
D15 AND D1 ON
V
OUT
D15 AND D0 ON
D15 ON
CH1 5.00V CH2 2.00V M 200ns
A CH1 2.70V
B CH1 –6.20V
400.00ns
10
100
1k
10k
100k
1M
10M
START 10.000Hz
STOP 10 000 000.000Hz
Figure 17. AD5546 Bipolar Reference Multiplying Bandwidth
(Codes from Midscale to Full Scale)
Figure 14. Settling Time from Full Scale to Zero Scale
Rev. 0 | Page 9 of 16
AD5546/AD5556
REF LEVEL
0.000dB
/DIV
12.000dB
0
–12
–24
–36
–48
–60
–72
–84
–96
–108
–120
ALL BITS OFF
D14 ON
D14 AND D13 ON
D14 AND D12 ON
D14 AND D11 ON
D14 AND D10 ON
D14 AND D9 ON
D14 AND D8 ON
D14 AND D7 ON
D14 AND D6 ON
D14 AND D5 ON
D14 AND D4 ON
D14 AND D3 ON
D14 AND D2 ON
D14 AND D1 ON
D14 AND D0 ON
D14 ON
10
100
1k
10k
100k
1M
10M
START 10.000Hz
STOP 10 000 000.000Hz
Figure 18. AD5546 Bipolar Reference Multiplying Bandwidth
(Codes from Midscale to Zero Scale)
Rev. 0 | Page 10 of 16
AD5546/AD5556
CIRCUIT OPERATION
The reference voltage inputs exhibit a constant input resistance
of 5 kΩ 2ꢀ0. The DAC output, IOUT, impedance is code depen-
dent. External amplifier choice should take into account the
variation of the AD5546/AD5556 output impedance. The
feedback resistance in parallel with the DAC ladder resistance
dominates output voltage noise. To maintain good analog
performance, it is recommended to bypass the power supply
with a ꢀ.ꢀ1 µF to ꢀ.1 µF ceramic or chip capacitor in parallel
with a 1 µF tantulum capacitor. Also, to minimize gain error,
PCB metal traces between VREF and RFB should match.
D/A CONVERTER SECTION
The AD5546/AD5556 are 16-/14-bit multiplying, current out-
put, and parallel input DACs. The devices operate from a single
2.7 V to 5.5 V supply, and provide both unipolar ꢀ V to –VREF, or
ꢀ V to +VREF, and bipolar VREF output ranges from a –18 V to
+18 V reference. In addition to the precision conversion RFB
commonly found in current output DACs, there are three addi-
tional precision resistors for 4-quadrant bipolar applications.
The AD5546/AD5556 consist of two groups of precision R-2R
ladders, which make up the 12/1ꢀ LSBs, respectively. Further-
more, the four MSBs are decoded into 15 segments of resistor
value 2R. Figure 19 shows the architecture of the 16-bit
AD5546. Each of the 16 segments in the R-2R ladder carries an
equally weighted current of one-sixteenth of full scale. The
feedback resistor, RFB, and 4-quadrant resistor, ROFS, have values
of 1ꢀ kΩ. Each 4-quadrant resistor, R1 and R2, equals 5 kΩ. In
4-quadrant operation, R1, R2, and an external op amp work
together to invert the reference voltage and apply it to the REF
input. With ROFS and RFB connected as shown in Figure 2, the
Every code change of the DAC corresponds to a step function;
gain peaking at each output step may occur if the op amp has
limited GBP and excessive parasitic capacitance present at the
op amp inverting node. A compensation capacitor, therefore,
may be needed between the I-V op amp inverting and output
nodes to smooth the step transition. Such a compensation
capacitor should be found empirically, but a 2ꢀ pF capacitor is
generally adequate for the compensation.
The VDD power is used primarily by the internal logic and to
drive the DAC switches. Note that the output precision degrades
if the operating voltage falls below the specified voltage. Users
should also avoid using switching regulators because device
power supply rejection degrades at higher frequencies.
output can swing from –VREF to +VREF
.
REF
2R
2R
2R
2R
80kΩ
R2
5kΩ
80kΩ 80kΩ 80kΩ
RCOM
R1
5kΩ
4 MSB
15 SEGMENTS
R1
R
R
R
R
R
R
R
R
40kΩ 40kΩ 40kΩ 40kΩ 40kΩ 40kΩ 40kΩ 40kΩ
2R 2R 2R 2R 2R 2R 2R 2R 2R
80kΩ 80kΩ 80kΩ 80kΩ 80kΩ 80kΩ 80kΩ 80kΩ 80kΩ
8-BIT R2R
ROFS
RFB
RA
RB
R
R
R
R
2R
2R
2R
2R
2R
80kΩ 80kΩ 80kΩ 80kΩ 80kΩ
10kΩ 10kΩ
4-BIT R2R
IOUT
GND
16
8
4
ADDRESS DECODER
LDAC
WR
LDAC
WR
DAC REGISTER
RS
RS
RS
INPUT REGISTER
D15 D14
D0
Figure 19. 16-Bit AD5546 Equivalent R-2R DAC Circuit with Digital Section
Rev. 0 | Page 11 of 16
AD5546/AD5556
DIGITAꢀ SECTION
AMPꢀIFIER SEꢀECTION
The AD5546/AD5556 have 16-/14-bit parallel inputs. The
devices are double-buffered with 16-/14-bit registers. The
double-buffered feature allows the update of several AD5546/
AD5556 simultaneously. For AD5546, the input register is
In addition to offset voltage, the bias current is important in op
amp selection for precision current output DACs. An input bias
current of 3ꢀ nA in the op amp contributes to 1 LSB in the
AD5546’s full-scale error. Op amps OP1177 and AD8628 are
good candidates for the I-V conversion.
loaded directly from a 16-bit controller bus when the
pin is
WR
brought low. The DAC register is updated with data from the
input register when LDAC is brought high. Updating the DAC
register updates the DAC output with the new data (see
REFERENCE SEꢀECTION
The initial accuracy and the rated output of the voltage refer-
ence determine the full span adjustment. The initial accuracy is
usually a secondary concern in precision, as it can be trimmed.
Figure 25 shows an example of a trimming circuit. The zero
scale error can also be minimized by standard op amp nulling
techniques.
Figure 19). To make both registers transparent, tie
low and
WR
LDAC high. The asynchronous
pin resets the part to zero
RS
scale if MSB pin = ꢀ, and midscale if MSB pin = 1.
ESD PROTECTION CIRCUITS
All logic input pins contain back-biased ESD protection Zeners
connected to ground (GND) and VDD, as shown in Figure 2ꢀ. As
a result, the voltage level of the logic input should not be greater
than the supply voltage.
The voltage reference temperature coefficient and long-term
drift are primary considerations. For example, a 5 V reference
with a TC of 5 ppm/oC means that the output changes by 25 µV
per degree Celsius. As a result, the reference that operates at
55oC contributes an additional 75ꢀ µV full-scale error.
V
DD
DIGITAL
INPUTS
Similarly, the same 5 V reference with a 5ꢀ ppm long-term
drift means that the output may change by 25ꢀ µV over time.
Therefore, it is practical to calibrate a system periodically to
maintain its optimum precision.
5kΩ
DGND
Figure 20. Equivalent ESD Protection Circuits
Rev. 0 | Page 12 of 16
AD5546/AD5556
APPLICATIONS
2-Quadrant Multiplying Mode, VOUT = 0 V to +VREF
UNIPOꢀAR MODE
The AD5546/AD5556 are designed to operate with either
positive or negative reference voltages. As a result, positive
output can be achieved with an additional op amp, (see
Figure 22), and the output becomes
2-Quadrant Multiplying Mode, VOUT = 0 V to –VREF
The AD5546/AD5556 DAC architecture uses a current-steering
R-2R ladder design that requires an external reference and op
amp to convert the unipolar mode of output voltage to
V
OUT = +VREF × D/65,536 (AD5546)
(3)
(4)
VOUT = –VREF × D/65,536 (AD5546)
OUT = –VREF × D/16,384 (AD5556)
(1)
(2)
VOUT = +VREF × D/16,384 (AD5556)
V
Table 9 shows the positive output versus code for the AD5546.
where D is the decimal equivalent of the input code.
Table 9. AD5546 Unipolar Mode Positive Output vs. Code
The output voltage polarity is opposite to the VREF polarity in
this case (see Figure 21). Table 8 shows the negative output
versus code for the AD5546.
D in Binary
VOUT (V)
1111 1111 1111 1111
1000 0000 0000 0000
0000 0000 0000 0001
0000 0000 0000 0000
+VREF(65,535/65,536)
+VREF/2
+VREF(1/65,536)
0
Table 8. AD5546 Unipolar Mode Negative Output vs. Code
D in Binary
VOUT (V)
1111 1111 1111 1111
1000 0000 0000 0000
0000 0000 0000 0001
0000 0000 0000 0000
–VREF(65,535/65,536)
–VREF/2
–VREF(1/65,536)
0
+5V
2
VIN
C1
1µF
C2
0.1µF
U3
ADR03
5
TRIM
VOUT
GND
4
R1
RCOM
REF
ROFS
RFB
RFB
C6
2.2pF
R1
R2
ROFS
VDD
C3
0.1µF
IOUT
–
16/14-BIT
V+
U2
AD8628
U1
AD5546/AD5556
VOUT
–2.5V TO 0V
GND
V–
+
C4
0.1µF
16/14 DATA
WR LDAC RS MSB
C5
1µF
WR
LDAC
RS
–5V
MSB
Figure 21. Unipolar 2-Quadrant Multiplying Mode, VOUT = 0 to –VREF
Rev. 0 | Page 13 of 16
AD5546/AD5556
+
V+
U2A
AD8628
V–
C8
0.1µF
–
+5V
2
VIN
C1
1µF
C2
0.1µF
U3
ADR03
C9
1µF
5
6
–2.5V
–5V
+2.5V
TRIM
C7
VOUT
GND
4
R1A
RCOMA
REFA
ROFSA RFBA
+5V
C4
1µF
C6
R1
R2
ROFS
RFB
VDD
C5
C3
0.1µF
IOUT
0.1µF
–
16/14-BIT
V+
U1
U2B
AD5546/AD5556
VOUT
0V TO +2.5V
AD8628
GND
V–
+
16/14 DATA
WR LDAC RS MSB
WR
LDAC
RS
MSB
Figure 22. Unipolar 2-Quadrant Multiplying Mode, VOUT = 0 to +VREF
+15V
2
+
VIN
C1
1µF
C2
0.1µF
U2A
AD8512
U3
ADR01
5
6
–
–10V
REF
+10V
TRIM
C8
VOUT
GND
4
R1
RCOM
ROF
RFB
RFB
+15V
C4
1µF
R1
R2
ROFS
C9
+5V
VDD
C5
C3
IOUT
0.1µF
0.1µF
–
16/14-BIT
V+
U1
U2B
AD5546/AD5556
VOUT
AD8512
–10V TO +10V
GND
V–
+
C6
0.1µF
16/14 DATA
WR LDAC RS MSB
C7
1µF
WR
LDAC
RS
–15V
MSB
Figure 23. 4-Quadrant Multiplying Mode, VOUT = –VREF to +VREF
BIPOꢀAR MODE
4-Quadrant Multiplying Mode, VOUT = –VREF to +VREF
The AD5546/AD5556 contain on-chip all the 4-quadrant
resistors necessary for the precision bipolar multiplying
operation. Such a feature minimizes the number of exponent
components to only a voltage reference, dual op amp, and
compensation capacitor (see Figure 23). For example, with a
1ꢀ V reference, the circuit yields a precision, bipolar –1ꢀ V to
+1ꢀ V output.
VOUT = (D/32768 − 1) × VREF (AD5546)
VOUT = (D/16384 − 1) × VREF (AD5556)
(5)
(6)
Rev. 0 | Page 14 of 16
AD5546/AD5556
Table 1ꢀ shows some of the results for the 16-bit AD5546.
ac reference signals for signal attenuation, channel equalization,
and waveform generation applications. The maximum signal
range can be up to 18 V (see Figure 24).
Table 10. AD5546 Output vs. Code
D in Binary
VOUT
1111 1111 1111 1111
1000 0000 0000 0001
1000 0000 0000 0000
0111 1111 1111 1111
0000 0000 0000 0000
+VREF(32,767/32,768)
+VREF(1/32,768)
0
–VREF(1/32,768)
–VREF
SYSTEM CAꢀIBRATION
The initial accuracy of the system can be adjusted by trimming
the voltage reference ADRꢀx with a digital potentiometer (see
Figure 25). The AD517ꢀ provides an OTP (one time program-
mable), 8-bit adjustment that is ideal and reliable for such cali-
bration. ADI’s OTP digital potentiometer comes with program-
mable software that simplifies the factory calibration process.
AC REFERENCE SIGNAꢀ ATTENUATOR
Besides handling digital waveforms decoded from parallel input
data, the AD5546/AD5556 handle equally well low frequency
+
U2A
OP2177
–
+10V
–10V
C7
R1A
R1
RCOMA
VREFA
ROFSA RFBA
+15V
C4
1µF
C6
R2
ROFS
RFB
+5V
VDD
C5
C1
1µF
C2
IOUT
0.1µF
0.1µF
–
16/14-BIT
V+
U1
U2B
AD5546/AD5556
VOUT
OP2177
GND
V–
+
16/14 DATA
C8
1µF
WR LDAC RS MSB
WR
LDAC
RS
C9
0.1µF
–15V
MSB
Figure 24. Signal Attenuator with AC Reference
+5V
2
+
V+
VIN
U4
AD5170
C1
1µF
C2
0.1µF
U2A
AD8628
U3
ADR03
R3
470kΩ
V–
C8
0.1µF
5
6
–
10kΩ
TRIM
B
R7
VOUT
GND
4
1kΩ
C9
–2.5V
1µF
–5V
C7
+2.5V
R1A
R1
RCOMA
VREFA
ROFSA RFBA
+5V
C4
1µF
C6
R2
ROFS
RFB
VDD
C5
C3
0.1µF
IOUT
0.1µF
–
16/14-BIT
V+
U1
U2B
AD5546/AD5556
VOUT
0V TO +2.5V
AD8628
GND
V–
+
16/14 DATA
WR LDAC RS MSB
WR
LDAC
RS
MSB
Figure 25. Full Span Calibration
Rev. 0 | Page 15 of 16
AD5546/AD5556
OUTLINE DIMENSIONS
9.80
9.70
9.60
28
15
4.50
4.40
4.30
6.40 BSC
1
14
PIN 1
0.65
BSC
1.20 MAX
0.15
0.05
8°
0°
0.75
0.60
0.45
0.30
0.19
0.20
0.09
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AE
Figure 26. 28-Lead Thin Shrink Small Outline Package [TSSOP]
RU-28
Dimensions shown in millimeters
ORDERING GUIDE
Temperature
Range (°C)
Ordering
Quantity
Package
Description
Package
Option
Model
RES (Bit)
DNꢀ (ꢀSB)
INꢀ (ꢀSB)
AD5546BRU
16
16
14
14
1
1
1
1
2
2
1
1
–40 to +125
–40 to +125
–40 to +125
–40 to +125
50
TSSOP-28
TSSOP-28
TSSOP-28
TSSOP-28
RU-28
RU-28
RU-28
RU-28
AD5546BRU-REEL7
AD5556CRU
1000
50
AD5556CRU-REEL7
1000
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D03810-0-1/04(0)
Rev. 0 | Page 16 of 16
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