AD626AR-REEL [ADI]
Low Cost, Single Supply Differential Amplifier; 低成本，单电源差分放大器
| 型号： | AD626AR-REEL |
| 厂家： | 
ADI |
| 描述： | Low Cost, Single Supply Differential Amplifier |
| 文件： | 总12页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost, Single Supply
Differential Amplifier
a
AD626
CONNECTION DIAGRAM
8-Lead Plastic Mini-DIP (N)
and SOIC (SO) Packages
FEATURES
Pin Selectable Gains of 10 and 100
True Single Supply Operation
Single Supply Range of +2.4 V to +10 V
Dual Supply Range of ؎1.2 V to ؎6 V
Wide Output Voltage Range of 30 mV to 4.7 V
Optional Low-Pass Filtering
200k⍀
200k⍀
+IN
1
2
3
4
–IN
8
7
6
5
1/6
Excellent DC Performance
ANALOG
GND
G = 100
Low Input Offset Voltage: 500 V max
Large Common-Mode Range: 0 V to +54 V
Low Power: 1.2 mW (VS = +5 V)
Good CMR of 90 dB typ
AC Performance
Fast Settling Time: 24 s (0.01%)
Includes Input Protection
G = 30
+V
S
–V
S
100k⍀
=
FILTER
G
2
OUT
AD626
Series Resistive Inputs (RIN = 200 k⍀)
RFI Filters Included
Allows 50 V Continuous Overload
APPLICATIONS
Current Sensing
Interface for Pressure Transducers, Position Indicators,
Strain Gages, and Other Low Level Signal Sources
The amplifier’s inputs are protected against continuous overload
of up to 50 V, and RFI filters are included in the attenuator
network. The output range is +0.03 V to +4.9 V using a +5 V
supply. The amplifier provides a preset gain of 10, but gains be-
tween 10 to 100 can be easily configured with an external resis-
tor. Furthermore, a gain of 100 is available by connecting the G
= 100 pin to analog ground. The AD626 also offers low-pass
filter capability by connecting a capacitor between the filter pin
and analog ground.
PRODUCT DESCRIPTION
The AD626 is a low cost, true single supply differential ampli-
fier designed for amplifying and low-pass filtering small differen-
tial voltages from sources having a large common-mode voltage.
The AD626 can operate from either a single supply of +2.4 V to
+10 V, or dual supplies of ±1.2 V to ±6 V. The input common-
mode range of this amplifier is equal to 6 (+VS – 1 V) which
provides a +24 V CMR while operating from a +5 V supply.
Furthermore, the AD626 features a CMR of 90 dB typ.
The AD626A and AD626B operate over the industrial tempera-
ture range of –40°C to +85°C. The AD626 is available in two
8-lead packages: a plastic mini-DIP and SOIC.
25
160
140
20
100
G = 10,100
؎V
FOR SINGLE
CM
15
10
5
V
= +5V
S
AND DUAL SUPPLIES
80
60
40
20
0
G = 100
V
= ؎5V
S
G = 10
= ؎5V
؎V
FOR DUAL
CM
V
S
SUPPLIES ONLY
0
1
2
3
4
5
0.1
1
10
100
1k
10k
100k
1M
POWER SUPPLY VOLTAGE – ؎Volts
FREQUENCY – Hz
Common-Mode Rejection vs. Frequency
Input Common-Mode Range vs. Supply
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 1999
AD626–SPECIFICATIONS
SINGLE SUPPLY
(@ +VS = +5 V and TA = +25؇C)
Model
AD626A
Min Typ
AD626B
Max Min Typ
Parameter
Condition
Max
Units
GAIN
Gain Accuracy
Total Error
Gain = 10
Gain = 100
Over Temperature, TA = TMIN–TMAX
@ VOUT ≥ 100 mV dc
@ VOUT ≥ 100 mV dc
G = 10
0.4
0.1
1.0
1.0
50
0.2
0.5
0.6
0.6
30
%
%
ppm/°C
ppm/°C
G = 100
150
120
Gain Linearity
Gain = 10
Gain = 100
@ VOUT ≥ 100 mV dc
@ VOUT ≥ 100 mV dc
0.014
0.014
0.016
0.02
0.014
0.014
0.016
0.02
%
%
OFFSET VOLTAGE
Input Offset Voltage
vs. Temperature
vs. Temperature
vs. Supply Voltage (PSR)
+PSR
1.9
2.5
2.9
6
1.9
2.5
2.9
6
mV
mV
µV/°C
TMIN–TMAX, G = 10 or 100
TMIN–TMAX, G = 10 or 100
74
64
80
66
74
64
80
66
dB
dB
–PSR
COMMON-MODE REJECTION
+CMR Gain = 10, 100
RL = 10 kΩ
f = 100 Hz, VCM = +24 V
f = 10 kHz, VCM = 6 V
f = 100 Hz, VCM = –2 V
66
55
60
90
64
85
80
55
73
90
64
85
dB
dB
dB
±CMR Gain = 10, 100
–CMR Gain = 10, 1001
COMMON-MODE VOLTAGE RANGE
+CMV Gain = 10
–CMV Gain = 10
CMR > 85 dB
CMR > 85 dB
+24
–2
+24
–2
V
V
INPUT
Input Resistance
Differential
Common Mode
200
100
6 (VS – l)
200
100
6 (VS – l)
kΩ
kΩ
V
Input Voltage Range (Common Mode)
OUTPUT
Output Voltage Swing
Positive
RL = 10 kΩ
Gain = 10
Gain = 100
Gain = 10
Gain = 100
4.7 4.90
4.7 4.90
0.03
4.7 4.90
4.7 4.90
0.03
V
V
V
V
Negative
0.03
0.03
Short Circuit Current
+ISC
12
12
mA
NOISE
Voltage Noise RTI
Gain = 10
Gain = 100
Gain = 10
f = 0.1 Hz–10 Hz
f = 0.1 Hz–10 Hz
f = 1 kHz
2
2
0.25
0.25
2
2
0.25
0.25
µV p-p
µV p-p
µV/√Hz
µV/√Hz
Gain = 100
f = 1 kHz
DYNAMIC RESPONSE
–3 dB Bandwidth
Slew Rate, TMIN to TMAX
VOUT = +1 V dc
Gain = 10
Gain = 100
100
0.17 0.22
0.1 0.17
24
100
0.17 0.22
0.1 0.17
22
kHz
V/µs
V/µs
µs
Settling Time
to 0.01%, 1 V Step
POWER SUPPLY
Operating Range
Quiescent Current
TA = TMIN–TMAX
Gain = 10
Gain = 100
2.4
5
0.16
0.23
12
0.20
0.29
2.4
5
0.16
0.23
10
0.20
0.29
V
mA
mA
TRANSISTOR COUNT
NOTES
# of Transistors
46
46
1At temperatures above +25°C, –CMV degrades at the rate of 12 mV/°C; i.e., @ +25°C CMV = –2 V, @ +85°C CMV = –1.28 V.
Specifications subject to change without notice.
–2–
REV. C
AD626
(@ +V =
؎5 V and TA = +25؇C)
DUAL SUPPLY
S
Model
AD626A
Min Typ
AD626B
Max Min Typ
Parameter
Condition
Max
Units
GAIN
Gain Accuracy
Gain = 10
Gain = 100
Total Error
RL = 10 kΩ
0.2
0.25
0.5
1.0
50
0.1
0.15
0.3
0.6
30
%
%
ppm/°C
ppm/°C
Over Temperature, TA = TMIN–TMAX
G = 10
G = 100
100
80
Gain Linearity
Gain = 10
Gain = 100
0.045
0.01
0.055
0.015
0.045
0.01
0.055
0.015
%
%
OFFSET VOLTAGE
Input Offset Voltage
vs. Temperature
vs. Temperature
vs. Supply Voltage (PSR)
+PSR
50
500
1.0
50
250
0.5
µV
mV
µV/°C
TMIN–TMAX, G = 10 or 100
TMIN–TMAX, G = 10 or 100
1.0
0.5
74
64
80
66
74
64
80
66
dB
dB
–PSR
COMMON-MODE REJECTION
±CMR Gain = 10, 100
±CMR Gain = 10, 100
RL = 10 kΩ
f = 100 Hz, VCM = +24 V
f = 10 kHz, VCM = 6 V
66
55
90
60
80
55
90
60
dB
dB
COMMON-MODE VOLTAGE RANGE
+CMV Gain = 10
–CMV Gain = 10
CMR > 85 dB
CMR > 85 dB
26.5
32.5
26.5
32.5
V
V
INPUT
Input Resistance
Differential
Common Mode
200
110
6 (VS – 1)
200
110
6 (VS – 1)
kΩ
kΩ
V
Input Voltage Range (Common Mode)
OUTPUT
Output Voltage Swing
Positive
Negative
RL = 10 kΩ
Gain = 10, 100
Gain = 10
4.7 4.90
1.65 2.1
1.45 1.8
4.7 4.90
1.65 2.1
1.45 1.8
V
V
V
Gain = 100
Short Circuit Current
+ISC
–ISC
12
0.5
12
0.5
mA
mA
NOISE
Voltage Noise RTI
Gain = 10
Gain = 100
Gain = 10
f = 0.1 Hz–10 Hz
f = 0.1 Hz–10 Hz
f = 1 kHz
2
2
0.25
0.25
2
2
0.25
0.25
µV p-p
µV p-p
µV/√Hz
µV/√Hz
Gain = 100
f = 1 kHz
DYNAMIC RESPONSE
–3 dB Bandwidth
Slew Rate, TMIN to TMAX
VOUT = +1 V dc
Gain = 10
Gain = 100
100
0.17 0.22
0.1 0.17
24
100
0.17 0.22
0.1 0.17
22
kHz
V/µs
V/µs
µs
Settling Time
to 0.01%, 1 V Step
POWER SUPPLY
Operating Range
Quiescent Current
TA = TMIN–TMAX
Gain = 10
Gain = 100
±1.2 ±5
1.5
±6
2
2
±1.2 ±5
1.5
±6
2
2
V
mA
mA
1.5
1.5
TRANSISTOR COUNT
# of Transistors
46
46
Specifications subject to change without notice.
REV. C
–3–
AD626
ABSOLUTE MAXIMUM RATINGS1
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+36 V
Internal Power Dissipation2
Peak Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Maximum Reversed Supply Voltage Limit . . . . . . . . . . . . –34 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD626A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
2 8-Lead Plastic Package: θJA = 100°C/W, θJC = 50°C/W.
8-Lead SOIC Package: θJA = 155°C/W, θJC = 40°C/W.
ESD SUSCEPTIBILITY
An ESD classification per method 3015.6 of MIL STD 883C
has been performed on the AD626, which is a Class 1 device.
ORDERING GUIDE
Temperature
Range
Package
Descriptions
Package
Options
Model
AD626AN
AD626AR
AD626BN
AD626AR-REEL
AD626AR-REEL7
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Plastic DIP
Small Outline IC
Plastic DIP
13" Tape and Reel
7" Tape and Reel
N-8
SO-8
N-8
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
–4–
REV. C
Typical Performance Characteristics–AD626
6
25
20
15
10
5
V
= ؎5V
S
5
4
3
GAIN = 10, 100
؎V
FOR SINGLE
CM
AND DUAL SUPPLIES
2
1
؎V
FOR DUAL
CM
SUPPLIES ONLY
0
–1
0
1
2
3
4
5
10
100
1k
10k
LOAD RESISTANCE – ⍀
SUPPLY VOLTAGE – ؎Volts
Figure 4. Positive Output Voltage Swing vs. Resistive Load
Figure 1. Input Common-Mode Range vs. Supply
5
–6
–5
–4
T
= +25؇C
A
4
3
2
1
0
SINGLE AND
DUAL SUPPLY
–3
–2
–1
GAIN = 10
GAIN = 100
DUAL SUPPLY
ONLY
0
1
0
1
2
3
4
5
100
1k
10k
100k
LOAD RESISTANCE – ⍀
SUPPLY VOLTAGE – Volts
Figure 5. Negative Output Voltage Swing vs. Resistive Load
Figure2. PositiveOutputVoltageSwingvs. SupplyVoltage
30
–5
T
= +25؇C
A
–4
–3
–2
–1
0
20
10
0
DUAL SUPPLY
ONLY
0
1
2
3
4
5
0
1
2
3
4
5
SUPPLY VOLTAGE – Volts
WARM-UP TIME – Minutes
Figure 3. Negative Output Voltage Swing vs. Supply
Voltage
Figure 6. Change in Input Offset Voltage vs. Warm-Up
Time
REV. C
–5–
AD626–Typical Performance Characteristics
100
95
90
85
80
75
70
65
1000
V
= ؎5V
S
DUAL SUPPLY
GAIN = 100
GAIN = 10
100
10
0
V
= +5V
S
SINGLE SUPPLY
V
= ؎5
S
V
= ؎5V
DUAL SUPPLY
S
20
22
24
26
28
30
10
100
1k
10k
100k
1M
FREQUENCY – Hz
INPUT COMMON-MODE VOLTAGE – Volts
Figure 7. Closed-Loop Gain vs. Frequency
Figure 10. Common-Mode Rejection vs. Input Common-
Mode Voltage for Dual Supply Operation
160
100
140
100
80
60
40
20
0
G = 10, 100
90
G = 10,100
= +5
V
S
G = 100
= ؎5
80
70
60
V
S
G = 10
= ؎5
V
S
0.1
1
10
100
1k
10k
100k
1M
0
20
40
60
80
FREQUENCY – Hz
INPUT SOURCE RESISTANCE MISMATCH – ⍀
Figure 8. Common-Mode Rejection vs. Frequency
Figure 11. Common-Mode Rejection vs. Input Source
Resistance Mismatch
100
0.7
G = 10, 100
CURVE APPLIES TO
ALL SUPPLY VOLTAGES
AND GAINS BETWEEN 10 AND 100
95
0.6
90
85
80
0.5
TOTAL GAIN ERROR =
GAIN ACCURACY (FROM SPEC TABLE)
+ ADDITIONAL GAIN ERROR
0.4
0.3
0.2
V
= +5
S
75
70
65
0.1
0.0
–5
0
5
10
15
20
25
10
100
1k
SOURCE RESISTANCE MISMATCH – ⍀
INPUT COMMON-MODE VOLTAGE – Volts
Figure 12. Additional Gain Error vs. Source Resistance
Mismatch
Figure 9. Common-Mode Rejection vs. Input Common-
Mode Voltage for Single Supply Operation
–6–
REV. C
AD626
0.16
0.15
0.14
0.13
0.12
G = 10
1
2
3
4
5
5 SECONDS PER HORIZONTAL DIVISION
SUPPLY VOLTAGE – Volts
Figure 16. 0.1 Hz to 10 Hz RTI Voltage Noise. VS = ±5 V,
Gain = 100
Figure 13. Quiescent Supply Current vs. Supply Voltage
for Single Supply Operation
100
80
2.0
1.5
1.0
0.5
0
FOR V = ؎5V AND +5V
S
60
40
20
0
1
10
100
1k
10k
100k
1M
؎1
؎2
؎3
؎4
؎5
VALUE OF RESISTOR R – ⍀
G
SUPPLY VOLTAGE – Volts
Figure 17. Closed-Loop Gain vs. RG
Figure 14. Quiescent Supply Current vs. Supply Voltage
for Dual Supply Operation
140
10
ALL CURVES FOR
GAINS OF 10 OR 100
120
100
80
1.0
SINGLE & DUAL
GAIN = 10, 100
–PSRR
60
0.1
SINGLE
+PSRR
V
= ؎5V DUAL SUPPLY
40
20
S
+PSRR
DUAL
0.01
0.1
1
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
FREQUENCY – Hz
FREQUENCY – Hz
Figure 15. Noise Voltage Spectral Density vs. Frequency
Figure 18. Power Supply Rejection vs. Frequency
REV. C
–7–
AD626
100
90
100
90
10
10
0%
0%
Figure 22. Large Signal Pulse Response. VS = +5 V,
G = 100
Figure 19. Large Signal Pulse Response. VS = ±5 V,
G = 10
100
90
100
90
10
10
0%
0%
Figure 23. Settling Time. VS = ±5 V, G = 10
Figure 20. Large Signal Pulse Response. VS = ±5 V,
G = 100
100
90
100
90
10
10
0%
0%
Figure 24. Settling Time. VS = ±5 V, G = 100
Figure 21. Large Signal Pulse Response. VS = +5 V,
G = 10
–8–
REV. C
AD626
ERROR
OUT
10k⍀
10k⍀
100
90
2k⍀
+V
S
10k⍀
INPUT
20V p–p
AD626
1k⍀
10
–V
S
0%
Figure 27. Settling Time Test Circuit
THEORY OF OPERATION
Figure 25. Settling Time. VS = +5 V, G = 10
The AD626 is a differential amplifier consisting of a precision
balanced attenuator, a very low drift preamplifier (A1), and an
output buffer amplifier (A2). It has been designed so that small
differential signals can be accurately amplified and filtered in the
presence of large common-mode voltages (VCM), without the
use of any other active components.
100
90
Figure 28 shows the main elements of the AD626. The signal
inputs at Pins 1 and 8 are first applied to dual resistive attenuators
R1 through R4 whose purpose is to reduce the peak common-
mode voltage at the input to the preamplifier—a feedback stage
based on the very low drift op amp A1. This allows the differen-
tial input voltage to be accurately amplified in the presence of
large common-mode voltages six times greater than that which
can be tolerated by the actual input to A1. As a result, the input
CMR extends to six times the quantity (VS – 1 V). The overall
common-mode error is minimized by precise laser-trimming of
R3 and R4, thus giving the AD626 a common-mode rejection
ratio (CMRR) of at least 10,000:1 (80 dB).
10
0%
Figure 26. Settling Time. VS = +5 V, G = 100
To minimize the effect of spurious RF signals at the inputs due
to rectification at the input to A1, small filter capacitors C1 and
C2 are included.
+V
S
FILTER
C1
5pF
AD626
R1
200k⍀
R12
100k⍀
+IN
–IN
A1
A2
OUT
R2
200k⍀
C2
5pF
R17
95k⍀
R3
41k⍀
R4
41k⍀
R15
10k⍀
R9
10k⍀
R5
4.2k⍀
R7
500⍀
R10
10k⍀
R13
10k⍀
R8
10k⍀
R14
555⍀
R11
10k⍀
R6
500⍀
GAIN = 100
–V
GND
S
Figure 28. Simplified Schematic
REV. C
–9–
AD626
+INPUT
–INPUT
The output of A1 is connected to the input of A2 via a 100 kΩ
(R12) resistor to facilitate the low-pass filtering of the signal of
interest (see Low-Pass Filtering section).
200k⍀
200k⍀
+IN
–IN
1
2
3
8
7
6
5
The 200 kΩ input impedance of the AD626 requires that the
source resistance driving this amplifier be low in value (<1 kΩ)—
this is necessary to minimize gain error. Also, any mismatch
between the total source resistance at each input will affect gain
accuracy and common-mode rejection (CMR). For example:
when operating at a gain of 10, an 80 Ω mismatch in the source
resistance between the inputs will degrade CMR to 68 dB.
1/6
ANALOG
GND
NOT
CONNECTED
G = 100
G=30
–V
+V
S
–V
S
+V
S
S
0.1F
100k⍀
FILTER
0.1F
OUT
=
OUTPUT
G
2
4
The output buffer, A2, operates at a gain of 2 or 20, thus setting
the overall, precalibrated gain of the AD626 (with no external
components) at 10 or 100. The gain is set by the feedback net-
work around amplifier A2.
AD626
Figure 29. AD626 Configured for a Gain of 10
+INPUT
The output of amplifier A2 relies on a 10 kΩ resistor to –VS for
“pulldown.” For single supply operation, (–VS = “GND”), A2
can drive a 10 kΩ ground referenced load to at least +4.7 V.
The minimum, nominally “zero,” output voltage will be 30 mV.
For dual supply operation (±5 V), the positive output voltage
swing will be the same as for a single supply. The negative swing
will be to –2.5 V, at G = 100, limited by the ratio:
200k⍀
200k⍀
+IN
–IN
–INPUT
1
2
3
8
7
6
5
1/6
ANALOG
GND
G = 100
G=30
–V
+V
–V
S
+V
S
S
R15 + R14
–VS ×
S
0.1F
100k⍀
FILTER
0.1F
OUTPUT
R13 + R14 + R15
OUT
=
G
2
4
The negative range can be extended to –3.3 V (G = 100) and
–4 V (G = 10) by adding an external 10 kΩ pulldown from the
output to –VS. This will add 0.5 mA to the AD626’s quiescent
current, bringing the total to 2 mA.
AD626
Figure 30. AD626 Configured for a Gain of 100
The AD626’s 100 kHz bandwidth at G = 10 and 100 (a 10 MHz
gain bandwidth) is much higher than can be obtained with low
power op amps in discrete differential amplifier circuits. Fur-
thermore, the AD626 is stable driving capacitive loads up to
50 pF (G10) or 200 pF (G100). Capacitive load drive can be
increased to 200 pF (G10) by connecting a 100 Ω resistor in
series with the AD626’s output and the load.
+INPUT
200k⍀
200k⍀
+IN
–IN
–INPUT
8
7
6
5
1
2
3
1/6
R
H
ANALOG
GND
G = 100
R
G
G=30
–V
+V
–V
S
+V
S
S
S
ADJUSTING THE GAIN OF THE AD626
100k⍀
FILTER
0.1F
0.1F
The AD626 is easily configured for gains of 10 or 100. Figure
29 shows that for a gain of 10, Pin 7 is simply left unconnected;
similarly, for a gain of 100, Pin 7 is grounded, as shown in Fig-
ure 30.
OUT
=
G
OUTPUT
2
4
CF
FILTER
(OPTIONAL)
AD626
1
CORNER FREQUENCY OF FILTER =
Gains between 10 and 100 are easily set by connecting a vari-
able resistance between Pin 7 and Analog GND, as shown in
Figure 31. Because the on-chip resistors have an absolute toler-
ance of ±20% (although they are ratio matched to within 0.1%),
at least a 20% adjustment range must be provided. The values
shown in the table in Figure 31 provide a good trade-off be-
tween gain set range and resolution, for gains from 11 to 90.
2CF (100k⍀)
RESISTOR VALUES FOR GAIN ADJUSTMENT
GAIN RANGE
R
(⍀)
R (⍀)
H
G
4.99k
802
80
11 – 20
20 – 40
40 – 80
80 – 100
100k
10k
1k
2
100
Figure 31. Recommended Circuit for Gain Adjustment
–10–
REV. C
AD626
SINGLE-POLE LOW-PASS FILTERING
A low-pass filter can be easily implemented by using the features
provided by the AD626.
BRIDGE APPLICATION
Figure 34 shows the AD626 in a typical bridge application.
Here, the AD626 is set to operate at a gain of 100, using dual
supply voltages and offering the option of low-pass filtering.
By simply connecting a capacitor between Pin 4 and ground, a
single-pole low-pass filter is created, as shown in Figure 32.
+V
S
+INPUT
200k⍀
200k⍀
+IN
–IN
1
2
3
8
7
6
5
200k⍀
200k⍀
+IN
–IN
–INPUT
1
2
3
8
7
6
5
1/6
ANALOG
GND
G = 100
1/6
G=30
ANALOG
GND
G = 100
G=30
–5V
0.1F
–V
S
+V
S
+5V
0.1F
100k⍀
FILTER
–V
S
+V
S
+10V
0.1F
OUT
CF
OPTIONAL
LOW-PASS
FILTER
=
G
OUTPUT
2
100k⍀
FILTER
4
OUT
AD626
=
G
OUTPUT
2
4
CF
AD626
Figure 34. A Typical Bridge Application
1
CORNER FREQUENCY OF FILTER =
2CF (100k⍀)
Figure 32. A One-Pole Low-Pass Filter Circuit Which
Operates from a Single +10 V Supply
CURRENT SENSOR INTERFACE
A typical current sensing application, making use of the large
common-mode range of the AD626, is shown in Figure 33. The
current being measured is sensed across resistor RS. The value
of RS should be less than 1 kΩ and should be selected so that
the average differential voltage across this resistor is typically
100 mV.
To produce a full-scale output of +4 V, a gain of 40 is used
adjustable by ±20% to absorb the tolerance in the sense resistor.
Note that there is sufficient headroom to allow at least a 10%
overrange (to +4.4 V).
CURRENT IN
CURRENT
R
S
SENSOR
CURRENT OUT
200k⍀
200k⍀
+IN
–IN
1
2
3
8
7
6
5
1/6
R
H
ANALOG
GND
G = 100
R
G
G=30
–V
–V
S
+V
S
+V
S
S
0.1F
100k⍀
FILTER
0.1F
OUT
CF
OPTIONAL
LOW-PASS
FILTER
=
G
OUTPUT
2
4
AD626
Figure 33. Current Sensor Interface
REV. C
–11–
AD626
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
1
5
4
0.2440 (6.20)
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
PIN 1
0.0196 (0.50)
0.0099 (0.25)
0.0500 (1.27)
BSC
؋
45؇ 0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
8؇
0؇
0.0500 (1.27)
0.0160 (0.41)
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
8-Lead Plastic Dual-In Line (PDIP)
(N-8)
0.430 (10.92)
0.348 (8.84)
8
5
4
0.280 (7.11)
0.240 (6.10)
1
0.325 (8.25)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.210
(5.33)
MAX
0.195 (4.95)
0.115 (2.93)
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.022 (0.558)
0.014 (0.356)
SEATING
PLANE
0.070 (1.77)
0.045 (1.15)
–12–
REV. C
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