AD627ARZ-REEL7 [ADI]
INSTRUMENTATION AMPLIFIER, 200uV OFFSET-MAX, 0.08MHz BAND WIDTH, PDSO8, MS-012AA, SOIC-8;
| 型号： | AD627ARZ-REEL7 |
| 厂家： | 
ADI |
| 描述： | INSTRUMENTATION AMPLIFIER, 200uV OFFSET-MAX, 0.08MHz BAND WIDTH, PDSO8, MS-012AA, SOIC-8 放大器 光电二极管 |
| 文件： | 总25页 (文件大小：1129K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Micropower, Single- and Dual-Supply,
Rail-to-Rail Instrumentation Amplifier
AD627
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Micropower, 85 μA maximum supply current
Wide power supply range (+2.2 V to 18 V)
Easy to use
Gain set with one external resistor
Gain range 5 (no resistor) to 1000
Higher performance than discrete designs
Rail-to-rail output swing
High accuracy dc performance
AD627
R
1
2
3
4
8
7
6
5
R
G
G
–IN
+IN
+V
S
OUTPUT
REF
–V
S
Figure 1. 8-Lead PDIP (N) and SOIC_N (R)
100
90
80
70
60
50
40
30
20
10
0
0.03% typical gain accuracy (G = +5) (AD627A)
10 ppm/°C typical gain drift (G = +5)
125 μV maximum input offset voltage (AD627B dual supply)
200 μV maximum input offset voltage (AD627A dual supply)
1 μV/°C maximum input offset voltage drift (AD627B)
3 μV/°C maximum input offset voltage drift (AD627A)
10 nA maximum input bias current
Noise: 38 nV/√Hz RTI noise @ 1 kHz (G = +100)
Excellent ac specifications
AD627A: 77 dB minimum CMRR (G = +5)
AD627B: 83 dB minimum CMRR (G = +5)
80 kHz bandwidth (G = +5)
AD627
TRADITIONAL
LOW POWER
DISCRETE DESIGN
135 μs settling time to 0.01% (G = +5, 5 V step)
1
10
100
1k
10k
FREQUENCY (Hz)
Figure 2. CMRR vs. Frequency, ±± ꢀS, Gain = +±
APPLICATIONS
4 to 20 mA loop-powered applications
Low power medical instrumentation—ECG, EEG
Transducer interfacing
Thermocouple amplifiers
Industrial process controls
Low power data acquisition
Portable battery-powered instruments
ideal for battery-powered applications. Its rail-to-rail output
stage maximizes dynamic range when operating from low
supply voltages. Dual-supply operation (±±5 Vꢀ and low power
consumption make the AD627 ideal for industrial applications,
including 4 to 20 mA loop-powered systems.
GENERAL DESCRIPTION
The AD627 is an integrated, micropower instrumentation
amplifier that delivers rail-to-rail output swing on single and
dual (+2.2 V to ±±1 Vꢀ supplies. The AD627 provides excellent
ac and dc specifications while operating at only 15 μA maximum.
The AD627 does not compromise performance, unlike other
micropower instrumentation amplifiers. Low voltage offset,
offset drift, gain error, and gain drift minimize errors in the
system. The AD627 also minimizes errors over frequency by
providing excellent CMRR over frequency. Because the CMRR
remains high up to 200 Hz, line noise and line harmonics are
rejected.
The AD627 offers superior flexibility by allowing the user to set
the gain of the device with a single external resistor while con-
forming to the 1-lead industry-standard pinout configuration.
With no external resistor, the AD627 is configured for a gain of 5.
With an external resistor, it can be set to a gain of up to ±000.
A wide supply voltage range (+2.2 V to ±±1 Vꢀ and micropower
current consumption make the AD627 a perfect fit for a wide
range of applications. Single-supply operation, low power
consumption, and rail-to-rail output swing make the AD627
The AD627 provides superior performance, uses less circuit
board area, and costs less than micropower discrete designs.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2007 Analog Devices, Inc. All rights reserved.
IMPORTANT LINKS for the AD627*
Last content update 04/29/2013 06:21 pm
Newer Alternatives: AD8420 : (8-Lead MSOP) low-cost instrumentation amplifier with 80 micro-Amp supply current and 2.7V to +/-18V
operation.
PARAMETRIC SELECTION TABLES
DESIGN TOOLS, MODELS, DRIVERS & SOFTWARE
In-Amp Error Calculator
Find Similar Products By Operating Parameters
Looking for a wide-supply, micropower in amp with a smaller
footprint and lower cost? Consider the AD8420.
In-Amp Common Mode Calculator
AD627A SPICE Macro-Model
Looking for a single-supply in amp with 40 micro-Amp supply current
and 1.8V operation? Consider the AD8235 (WLCSP) or the AD8236
8-lead MSOP.
AD627B SPICE Macro-Model
DESIGN COLLABORATION COMMUNITY
DOCUMENTATION
AN-282: Fundamentals of Sampled Data Systems
Collaborate Online with the ADI support team and other designers
about select ADI products.
AN-244: A User’s Guide to I.C. Instrumentation Amplifiers
AN-245: Instrumentation Amplifiers Solve Unusual Design Problems
AN-671: Reducing RFI Rectification Errors in In-Amp Circuits
AN-589: Ways to Optimize the Performance of a Difference Amplifier
A Designer’s Guide to Instrumentation Amplifiers
Follow us on Twitter: www.twitter.com/ADI_News
Like us on Facebook: www.facebook.com/AnalogDevicesInc
UG-261: Evaluation Boards for the AD62x, AD822x and AD842x Series
MS-2178: Discussion Between CareFusion and Analog Devices:
Optimizing Performance and Lowering Power in an EEG Amplifer
DESIGN SUPPORT
Auto-Zero Amplifiers
Submit your support request here:
Linear and Data Converters
High-performance Adder Uses Instrumentation Amplifiers
Piezoresistive Sensing ICs in Portable Infusion Pumps
Oscillometric Blood Pressure Measurement
Protecting Instrumentation Amplifiers
Embedded Processing and DSP
Telephone our Customer Interaction Centers toll free:
Americas:
Europe:
China:
1-800-262-5643
00800-266-822-82
4006-100-006
1800-419-0108
8-800-555-45-90
The AD8221 - Setting a New Industry Standard for Instrumentation
Amplifiers
India:
Russia:
Input Filter Prevents Instrumentation-amp RF-Rectification Errors
Quality and Reliability
Lead(Pb)-Free Data
Applying Instrumentation Amplifiers Effectively: The Importance of an
Input Ground Return
Leading Inside Advertorials: Applying Instrumentation Amplifiers
Effectively—The Importance of an Input Ground Return
SAMPLE & BUY
AD627
EVALUATION KITS & SYMBOLS & FOOTPRINTS
View the Evaluation Boards and Kits page for documentation and
purchasing
View Price & Packaging
Request Evaluation Board
Request Samples Check Inventory & Purchase
Symbols and Footprints
Find Local Distributors
* This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet.
Note: Dynamic changes to the content on this page (labeled 'Important Links') does not
constitute a change to the revision number of the product data sheet.
This content may be frequently modified.
AD627
TABLE OF CONTENTS
Features .............................................................................................. ±
Reference Terminal .................................................................... ±6
Input Range Limitations in Single-Supply Applications....... ±6
Output Buffering ........................................................................ ±7
Input and Output Offset Errors................................................ ±7
Make vs. Buy: A Typical Application Error Budget............... ±1
Errors Due to AC CMRR .......................................................... ±9
Ground Returns for Input Bias Currents ................................ ±9
Layout and Grounding .............................................................. 20
Input Protection ......................................................................... 2±
RF Interference ........................................................................... 2±
Applications Circuits...................................................................... 22
Classic Bridge Circuit ................................................................ 22
4 to 20 mA Single-Supply Receiver.......................................... 22
Thermocouple Amplifier .......................................................... 22
Outline Dimensions....................................................................... 24
Ordering Guide .......................................................................... 24
Applications....................................................................................... ±
Functional Block Diagram .............................................................. ±
General Description......................................................................... ±
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Single Supply................................................................................. 3
Dual Supply................................................................................... 5
Dual and Single Supplies ............................................................. 6
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configurations and Function Descriptions ........................... 1
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... ±4
Using the AD627 ............................................................................ ±5
Basic Connections...................................................................... ±5
Setting the Gain .......................................................................... ±5
REVISION HISTORY
11/07—Rev. C to Rev. D
Rev. A to Rev. B
Changes to Features.......................................................................... ±
Changes to Figure 29 to Figure 34 Captions............................... ±3
Changes to Setting the Gain Section............................................ ±5
Changes to Input Range Limitations in Single-Supply
Applications Section....................................................................... ±6
Changes to Table 7.......................................................................... ±7
Changes to Figure 4±...................................................................... ±1
Changes to Figure 4 and Table I, Resulting Gain column......... ±±
Change to Figure 9 ......................................................................... ±3
11/05—Rev. B to Rev. C
Updated Format..................................................................Universal
Added Pin Configurations and Function
Descriptions Section ........................................................................ 1
Change to Figure 33 ....................................................................... ±3
Updated Outline Dimensions....................................................... 24
Changes to Ordering Guide .......................................................... 24
Rev. D | Page 2 of 24
AD627
SPECIFICATIONS
SINGLE SUPPLY
Typical @ 25°C single supply, VS = 3 V and 5 V, and RL = 20 kΩ, unless otherwise noted.
Table 1.
AD627A
Typ
AD627B
Typ
Parameter
GAIN
Conditions
Min
Max
Min
Max
Unit
G = +5 + (200 kΩ/RG)
Gain Range
Gain Error1
G = +5
G = +10
G = +100
G = +1000
Nonlinearity
G = +5
G = +100
Gain vs. Temperature1
5
1000
5
1000
V/V
VOUT = (−VS) + 0.1 to (+VS) − 0.15
0.03
0.15
0.15
0.50
0.10
0.35
0.35
0.70
0.01
0.10
0.10
0.25
0.06
0.25
0.25
0.35
%
%
%
%
10
20
100
100
10
20
100
100
ppm
ppm
G = +5
G > +5
10
−75
20
10
−75
20
ppm/°C
ppm/°C
VOLTAGE OFFSET
Input Offset, VOSI
2
50
250
445
3
1000
1650
10
25
150
215
1
500
1150
10
μV
μV
μV/°C
μV
μV
Over Temperature
Average TC
VCM = VREF = +VS/2
0.1
0.1
Output Offset, VOSO
Over Temperature
Average TC
Offset Referred to the
Input vs. Supply (PSRR)
2.5
2.5
μV/°C
G = +5
G = +10
G = +100
G = +1000
86
100
120
125
125
86
100
120
125
125
dB
dB
dB
dB
100
110
110
100
110
110
INPUT CURRENT
Input Bias Current
Over Temperature
Average TC
Input Offset Current
Over Temperature
Average TC
3
10
15
3
10
15
nA
nA
pA/°C
nA
nA
20
0.3
20
0.3
1
2
1
2
1
1
pA/°C
INPUT
Input Impedance
Differential
Common-Mode
Input Voltage Range3
20||2
20||2
20||2
20||2
GΩ||pF
GΩ||pF
V
VS = 2.2 V to 36 V
(−VS) − 0.1
(+VS) − 1
(−VS) − 0.1
(+VS) – 1
Common-Mode Rejection VREF = VS/2
Ratio3 DC to 60 Hz with
1 kΩ Source Imbalance
G = +5
G = +5
VS = 3 V, VCM = 0 V to 1.9 V
VS = 5 V, VCM = 0 V to 3.7 V
77
77
90
90
83
83
96
96
dB
dB
OUTPUT
Output Swing
RL = 20 kΩ
RL = 100 kΩ
Short circuit to ground
(−VS) + 25
(−VS) + 7
(+VS) − 70 (−VS) + 25
(+VS) − 25 (−VS) + 7
(+VS) − 70 mV
(+VS) − 25 mV
mA
Short-Circuit Current
25
25
Rev. D | Page 3 of 24
AD627
AD627A
Typ
AD627B
Typ
Parameter
Conditions
Min
Max
Min
Max
Unit
DYNAMIC RESPONSE
Small Signal −3 dB
Bandwidth
G = +5
G = +100
G = +1000
Slew Rate
80
3
80
3
0.4
kHz
kHz
kHz
V/μs
0.4
+0.05/−0.07
+0.05/−0.07
Settling Time to 0.01%
G = +5
G = +100
Settling Time to 0.01%
G = +5
G = +100
VS = 3 V, 1.5 V output step
VS = 5 V, 2.5 V output step
50% input overload
65
290
65
290
μs
μs
85
330
3
85
330
3
μs
μs
μs
Overload Recovery
1 Does not include effects of External Resistor RG.
2 See Table 8 for total RTI errors.
3 See the Using the AD627 section for more information on the input range, gain range, and common-mode range.
Rev. D | Page 4 of 24
AD627
DUAL SUPPLY
Typical @ 25°C dual supply, VS = ±5 V and ±±5 V, and RL = 20 kΩ, unless otherwise noted.
Table 2.
AD627A
Typ
AD627B
Typ
Parameter
GAIN
Conditions
Min
Max
Min
Max
Unit
G = +5 + (200 kΩ/RG)
Gain Range
Gain Error1
5
1000
5
1000
V/V
VOUT = (−VS) + 0.1 to
(+VS) − 0.15
G = +5
G = +10
G = +100
G = +1000
Nonlinearity
G = +5
0.03
0.15
0.15
0.50
0.10
0.35
0.35
0.70
0.01
0.10
0.10
0.25
0.06
0.25
0.25
0.35
%
%
%
%
VS = 5 V/ 15 V
VS = 5 V/ 15 V
10/25
10/15
100
100
10/25
10/15
100
100
ppm
ppm
G = +100
Gain vs. Temperature1
G = +5
G > +5
10
–75
20
10
−75
20
ppm/°C
ppm/°C
VOLTAGE OFFSET
Total RTI error =
VOSI + VOSO/G
2
Input Offset, VOSI
25
200
395
3
1000
1700
10
25
125
190
1
500
1100
10
μV
μV
μV/°C
μV
μV
Over Temperature
Average TC
VCM = VREF = 0 V
0.1
0.1
Output Offset, VOSO
Over Temperature
Average TC
Offset Referred to the Input
vs. Supply (PSRR)
2.5
2.5
μV/°C
G = +5
G = +10
G = +100
G = +1000
86
100
120
125
125
86
100
120
125
125
dB
dB
dB
dB
100
110
110
100
110
110
INPUT CURRENT
Input Bias Current
Over Temperature
Average TC
Input Offset Current
Over Temperature
Average TC
2
10
15
2
10
15
nA
nA
pA/°C
nA
nA
20
0.3
20
0.3
1
5
1
5
5
5
pA/°C
INPUT
Input Impedance
Differential
Common Mode
Input Voltage Range3
20||2
20||2
20||2
20||2
GΩ||pF
GΩ||pF
V
VS = 1.1 V to 18 V
(−VS) − 0.1
(+VS) − 1
(−VS) − 0.1
(+VS) − 1
Common-Mode Rejection
Ratio3 DC to 60 Hz with
1 kΩ Source Imbalance
G = +5 to +1000
VS = 5 V, VCM
−4 V to +3.0 V
VS = 15 V, VCM
=
77
77
90
90
83
83
96
96
dB
dB
G = +5 to +1000
=
−12 V to +10.9 V
OUTPUT
Output Swing
RL = 20 kΩ
RL = 100 kΩ
Short circuit to ground
(−VS) + 25
(−VS) + 7
(+VS) − 70 (−VS) + 25
(+VS) − 25 (−VS) + 7
(+VS) − 70 mV
(+VS) − 25 mV
mA
Short-Circuit Current
25
25
Rev. D | Page 5 of 24
AD627
AD627A
Typ
AD627B
Typ
Parameter
Conditions
Min
Max
Min
Max
Unit
DYNAMIC RESPONSE
Small Signal −3 dB
Bandwidth
G = +5
G = +100
G = +1000
Slew Rate
80
3
0.4
80
3
0.4
kHz
kHz
kHz
V/μs
+0.05/−0.06
+0.05/−0.06
Settling Time to 0.01%
VS = 5 V,
+5 V output step
G = +5
G = +100
135
350
135
350
μs
μs
Settling Time to 0.01%
VS = 15 V,
+15 V output step
G = +5
G = +100
Overload Recovery
330
560
3
330
560
3
μs
μs
μs
50% input overload
1 Does not include effects of External Resistor RG.
2 See Table 8 for total RTI errors.
3 See the Using the AD627 section for more information on the input range, gain range, and common-mode range.
DUAL AND SINGLE SUPPLIES
Table 3.
AD627A
AD627B
Parameter
Conditions
Min
Typ
Max Min
Typ
Max Unit
NOISE
Voltage Noise, 1 kHz
2
2
Total RTI Noise =
(
eni
)
+
(
eno / RG
)
Input, Voltage Noise, eni
Output, Voltage Noise, eno
RTI, 0.1 Hz to 10 Hz
G = +5
G = +1000
Current Noise
0.1 Hz to 10 Hz
REFERENCE INPUT
RIN
Gain to Output
Voltage Range1
POWER SUPPLY
Operating Range
38
177
38
177
nV/√Hz
nV/√Hz
1.2
0.56
50
1.2
0.56
50
μV p-p
μV p-p
fA/√Hz
pA p-p
f = 1 kHz
RG = ∞
1.0
1.0
125
1
125
1
kΩ
Dual supply
Single supply
1.1
2.2
18
36
1.1
2.2
18
36
V
V
Quiescent Current
Over Temperature
60
200
85
60
200
85
μA
nA/°C
TEMPERATURE RANGE
For Specified Performance
−40
+85
−40
+85
°C
1 See Using the AD627 section for more information on the reference terminal, input range, gain range, and common-mode range.
Rev. D | Page 6 of 24
AD627
ABSOLUTE MAXIMUM RATINGS
Table 4.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
Supply Voltage
Internal Power Dissipation1
PDIP (N-8)
18 V
1.3 W
SOIC_N (R-8)
0.8 W
−IN, +IN
Common-Mode Input Voltage
−VS − 20 V to +VS + 20 V
−VS − 20 V to +VS + 20 V
Differential Input Voltage (+IN − (−IN)) +VS − (−VS)
ESD CAUTION
Output Short-Circuit Duration
Storage Temperature Range (N, R)
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Indefinite
−65°C to +125°C
−40°C to +85°C
300°C
1 Specification is for device in free air:
8-lead PDIP package: θJA = 90°C/W.
8-lead SOIC_N package: θJA = 155°C/W.
Rev. D | Page 7 of 24
AD627
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
R
1
2
3
4
8
7
6
5
R
G
G
R
1
2
3
4
8
7
6
5
R
G
G
AD627
–IN
+IN
+V
AD627
S
+V
–IN
+IN
S
TOP VIEW
TOP VIEW
OUTPUT
REF
(Not to Scale)
OUTPUT
REF
(Not to Scale)
–V
S
–V
S
Figure 3. 8-Lead PDIP Pin Configuration
Figure 4. 8-Lead SOIC_N Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic Description
1
2
3
4
5
6
7
8
RG
External Gain Setting Resistor. Place gain setting resistor across RG pins to set the gain.
Negative Input.
Positive Input.
Negative Voltage Supply Pin.
Reference Pin. Drive with low impedance voltage source to level shift the output voltage.
Output Voltage.
Positive Supply Voltage.
−IN
+IN
−VS
REF
OUTPUT
+VS
RG
External Gain Setting Resistor. Place gain setting resistor across RG pins to set the gain.
Rev. D | Page 8 of 24
AD627
TYPICAL PERFORMANCE CHARACTERISTICS
At 25°C, VS = ±5 V, RL = 20 kΩ, unless otherwise noted.
100
90
–5.5
–5.0
–4.5
–4.0
–3.5
–3.0
–2.5
–2.0
–1.5
80
70
V
= +5V
S
60
GAIN = +5
V
= ±5V
S
50
40
30
GAIN = +100
20
V
= ±15V
S
GAIN = +1000
10
0
1
10
100
1k
10k
100k
0
–60 –40 –20
20
40
60
80
100 120 140
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure ±. ꢀoltage Noise Spectral Density vs. Frequency
Figure 8. Input Bias Current vs. Temperature
100
90
80
70
60
50
40
30
65.5
64.5
63.5
62.5
61.5
60.5
59.5
20
10
0
1
10
100
1k
10k
0
5
10
15
20
25
30
35
40
FREQUENCY (Hz)
TOTAL POWER SUPPLY VOLTAGE (V)
Figure 6. Current Noise Spectral Density vs. Frequency
Figure 9. Supply Current vs. Supply ꢀoltage
–3.2
–3.0
–2.8
–2.6
–2.4
–2.2
–2.0
V+
V
= ±15V
S
(V+) –1
(V+) –2
(V+) –3
(V–) +2
(V–) +1
V–
V
= ±1.5V
S
V
= ±5V
S
V
= ±2.5V
S
SOURCING
SINKING
V
= ±5V
S
V
= ±2.5V
S
V
= ±1.5V
5
S
V
= ±15V
20
S
0
–15
–10
–5
5
10
15
0
10
15
25
COMMON-MODE INPUT (V)
OUTPUT CURRENT (mA)
Figure 7. Input Bias Current vs. CMꢀ, ꢀS = ± 1± ꢀ
Figure 10. Output ꢀoltage Swing vs. Output Current
Rev. D | Page 9 of 24
AD627
120
110
500mV
1s
100
100
90
80
70
60
50
40
30
20
G = +1000
G = +100
G = +5
10
10
100
1k
FREQUENCY (Hz)
10k
100k
100k
100k
Figure 11. 0.1 Hz to 10 Hz Current Noise (0.71 pA/DIꢀ)
Figure 14. Positive PSRR vs. Frequency, ±± ꢀ
100
90
80
70
60
50
40
30
20
10
0
1s
20mV
100
G = +1000
G = +100
G = +5
10
10
100
1k
10k
FREQUENCY (Hz)
Figure 12. 0.1 Hz to 10 Hz RTI ꢀoltage Noise (400 nꢀ/DIꢀ), G = +±
Figure 1±. Negative PSRR vs. Frequency, ±± ꢀ
120
110
100
90
2V
1s
100
G = +1000
G = +100
80
70
G = +5
60
10
50
40
30
20
10
100
1k
10k
FREQUENCY (Hz)
Figure 13. 0.1 Hz to 10 Hz RTI ꢀoltage Noise (200 nꢀ/DIꢀ), G = +1000
Figure 16. Positive PSRR vs. Frequency (ꢀS = ± ꢀ, 0 ꢀ)
Rev. D | Page 10 of 24
AD627
10
400
300
200
1
100
0
0.1
0
5
10
100
1k
±2
±4
±6
±8
±10
OUTPUT PULSE (V)
GAIN (V/V)
Figure 17. Settling Time to 0.01% vs. Gain for a ± ꢀ Step at Output, RL = 20 kΩ,
CL = 100 pF, ꢀS = ± ± ꢀ
Figure 20. Settling Time to 0.01% vs. Output Swing, G = +±, RL = 20 kΩ,
CL = 100 pF
200µV
1V
100µs
1mV
1V
50µs
Figure 18. Large Signal Pulse Response and Settling Time, G = –±, RL = 20 kΩ,
CL = 100 pF (1.± mꢀ = 0.01%)
Figure 21. Large Signal Pulse Response and Settling Time, G = –100,
RL = 20 kΩ, CL = 100 pF (100 μꢀ = 0.01%)
200µV
1V
500µs
1mV
1V
50µs
Figure 19. Large Signal Pulse Response and Settling Time, G = −10,
RL = 20 kΩ, CL = 100 pF (1.0 mꢀ = 0.01%)
Figure 22. Large Signal Pulse Response and Settling Time, G = –1000,
RL = 20 kΩ, CL = 100 pF (10 μꢀ = 0.01%)
Rev. D | Page 11 of 24
AD627
120
110
100
90
A
20µs
286mV
EXT1
CH2
20mV
G = +1000
80
70
G = +100
60
50
G = +5
40
30
20
10
0
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 23. CMRR vs. Frequency, ±± ꢀS (CMꢀ = 200 mꢀ p-p)
Figure 26. Small Signal Pulse Response, G = +10, RL = 20 kΩ, CL = ±0 pF
70
A
100µs 286mV
EXT1
CH2
20mV
G = +1000
G = +100
60
50
40
30
20
10
0
G = +10
G = +5
–10
–20
–30
100
1k
10k
100k
FREQUENCY (Hz)
Figure 27. Small Signal Pulse Response, G = +100, RL = 20 kΩ, CL = ±0 pF
Figure 24. Gain vs. Frequency (ꢀS = ± ꢀ, 0 ꢀ), ꢀREF = 2.± ꢀ
A
1ms
286mV
EXT1
A
20µs
288mV
EXT1
CH2
50mV
CH2
20mV
Figure 28. Small Signal Pulse Response, G = +1000, RL = 20 kΩ, CL = ±0 pF
Figure 2±. Small Signal Pulse Response, G = +±, RL = 20 kΩ, CL = ±0 pF
Rev. D | Page 12 of 24
AD627
20µV/DIV
200µV/DIV
V
V
OUT
3V/DIV
OUT
0.5V/DIV
Figure 29. Gain Nonlinearity, Negative Input,
ꢀS = ± 2.± ꢀ, G = +± (4 ppm/DIꢀ)
Figure 32. Gain Nonlinearity, Negative Input,
ꢀS = ±1± ꢀ, G = +100 (7 ppm/DIꢀ)
40µV/DIV
200µV/DIV
V
OUT
0.5V/DIV
V
OUT
3V/DIV
Figure 30. Gain Nonlinearity, Negative Input,
ꢀS = ±2.± ꢀ, G = +100 (8 ppm/DIꢀ)
Figure 33. Gain Nonlinearity, Negative Input,
ꢀS = ± 1± ꢀ, G = +± (7 ppm/DIꢀ)
200µV/DIV
40µV/DIV
V
V
OUT
OUT
3V/DIV
3V/DIV
Figure 31. Gain Nonlinearity, Negative Input,
ꢀS = ± 1± ꢀ, G = +± (1.± ppm/DIꢀ)
Figure 34. Gain Nonlinearity, Negative Input,
ꢀS = ±1± ꢀ, G = +100 (7 ppm/DIꢀ)
Rev. D | Page 13 of 24
AD627
THEORY OF OPERATION
The AD627 is a true instrumentation amplifier, built using two
feedback loops. Its general properties are similar to those of the
classic two-op-amp instrumentation amplifier configuration but
internally the details are somewhat different. The AD627 uses a
modified current feedback scheme, which, coupled with interstage
feedforward frequency compensation, results in a much better
common-mode rejection ratio (CMRRꢀ at frequencies above
dc (notably the line frequency of 50 Hz to 60 Hzꢀ than might
otherwise be expected of a low power instrumentation amplifier.
The inverting terminal gain of A± (±.25ꢀ times the gain of A2
(−4ꢀ makes the gain from the inverting and noninverting
terminals equal.
The differential mode gain is equal to ± + R4/R3, nominally 5,
and is factory trimmed to 0.0±% final accuracy. Adding an
external gain setting resistor (RGꢀ increases the gain by an
amount equal to (R4 + R±ꢀ/RG. The output voltage of the
AD627 is given by
V
OUT = [VIN(+ꢀ – VIN(−ꢀ] × (5 + 200 kΩ/RGꢀ + VREF
(±ꢀ
In Figure 35, A± completes a feedback loop that, in conjunction
with V± and R5, forces a constant collector current in Q±. Assume
that the gain-setting resistor (RGꢀ is not present. Resistors R2
and R± complete the loop and force the output of A± to be equal
to the voltage on the inverting terminal with a gain of nearly
±.25. A2 completes a nearly identical feedback loop that forces
a current in Q2 that is nearly identical to that in Q±; A2 also
provides the output voltage. When both loops are balanced, the
gain from the noninverting terminal to VOUT is equal to 5,
whereas the gain from the output of A± to VOUT is equal to −4.
Laser trims are performed on R± through R4 to ensure that
their values are as close as possible to the absolute values in the
gain equation. This ensures low gain error and high common-
mode rejection at all practical gains.
EXTERNAL GAIN RESISTOR
R1
100kΩ
R
R4
100kΩ
G
REF
–IN
R2
25kΩ
R3
25kΩ
+V
+V
S
S
2kΩ
2kΩ
+IN
Q1
Q2
–V
–V
S
S
A1
A2
OUTPUT
R5
200kΩ
R6
200kΩ
V1
0.1V
Figure 3±. Simplified Schematic
Rev. D | Page 14 of 24
AD627
USING THE AD627
BASIC CONNECTIONS
SETTING THE GAIN
The gain of the AD627 is resistor programmed by RG, or, more
precisely, by whatever impedance appears between Pin ± and Pin 1.
Figure 36 shows the basic connection circuit for the AD627.
The +VS and −VS terminals connect to the power supply. The
supply can be either bipolar (VS = ±±.± V to ±±1 Vꢀ or single
supply (−VS = 0 V, +VS = 2.2 V to 36 Vꢀ. Capacitively decouple
the power supplies close to the power pins of the device. For
best results, use surface-mount 0.± μF ceramic chip capacitors.
The gain is set according to
Gain = 5 + (200 kΩ/RGꢀ or RG = 200 kΩ/(Gain − 5ꢀ
(2ꢀ
Therefore, the minimum achievable gain is 5 (for 200 kΩ/
(Gain − 5ꢀꢀ. With an internal gain accuracy of between 0.05%
and 0.7%, depending on gain and grade, a 0.±% external gain
The input voltage can be single-ended (tie either −IN or +IN to
groundꢀ or differential. The difference between the voltage on the
inverting and noninverting pins is amplified by the programmed
gain. The gain resistor programs the gain as described in
the Setting the Gain and Reference Terminal sections. Basic
connections are shown in Figure 36. The output signal appears
as the voltage difference between the output pin and the
externally applied voltage on the REF pin, as shown in Figure 37.
resistor is appropriate to prevent significant degradation of the
overall gain error. However, 0.±% resistors are not available in a
wide range of values and are quite expensive. Table 6 shows
recommended gain resistor values using ±% resistors. For all
gains, the size of the gain resistor is conservatively chosen as the
closest value from the standard resistor table that is higher than
the ideal value. This results in a gain that is always slightly less
than the desired gain, thereby preventing clipping of the signal
at the output due to resistor tolerance.
The internal resistors on the AD627 have a negative temperature
coefficient of −75 ppm/°C maximum for gains > 5. Using a
gain resistor that also has a negative temperature coefficient
of −75 ppm/°C or less tends to reduce the overall gain drift of
the circuit.
+V
+V
S
S
+1.1V TO +18V
+2.2V TO +36V
0.1µF
0.1µF
+IN
+IN
R
R
R
R
G
G
V
V
IN
R
G
OUTPUT
REF
R
G
OUTPUT
REF
G
V
V
OUT
IN
OUT
G
–IN
–IN
REF (INPUT)
REF (INPUT)
0.1µF
–1.1V TO –18V
–V
S
GAIN = 5 + (200kΩ/R
)
G
Figure 36. Basic Connections for Single and Dual Supplies
V+
+IN
–IN
EXTERNAL GAIN RESISTOR
V
V
DIFF
2
R
G
100kΩ
25kΩ
25kΩ
100kΩ
REF
V
CM
+V
+V
S
S
DIFF
2
–IN
2kΩ
2kΩ
+IN
Q1
Q2
V–
–V
–V
S
S
A1
A2
200kΩ
OUTPUT
200kΩ 0.1V
V
A
–V
S
Figure 37. Amplifying Differential Signals with a Common-Mode Component
Rev. D | Page 15 of 24
AD627
The voltage on A± can also be expressed as a function of the
actual voltages on the –IN and +IN pins (V− and V+ꢀ such that
Table 6. Recommended Values of Gain Resistors
VA1 = ±.25 ((V−ꢀ + 0.5 V) − 0.25 VREF − ((V+ꢀ − (V−ꢀꢀ 25 kΩ/RG (4ꢀ
1% Standard Table
Desired Gain
Value of RG
Resulting Gain
5.00
6.00
7.00
7.94
The output of A± is capable of swinging to within 50 mV of the
negative rail and to within 200 mV of the positive rail. It is clear,
from either Equation 3 or Equation 4, that an increasing VREF
(while it acts as a positive offset at the output of the AD627ꢀ
tends to decrease the voltage on A±. Figure 31 and Figure 39
show the maximum voltages that can be applied to the REF pin
for a gain of 5 for both the single-supply and dual-supply cases.
5
5
6
7
8
∞
200 kΩ
100 kΩ
68.1 kΩ
51.1 kΩ
40.2 kΩ
20 kΩ
9
8.91
9.98
10
15
20
25
30
40
50
60
70
80
90
100
200
500
1000
15.00
19.60
25.00
29.81
39.72
49.15
59.79
69.72
79.91
89.39
100.24
195.48
490.44
980.61
13.7 kΩ
10 kΩ
4
3
2
8.06 kΩ
5.76 kΩ
4.53 kΩ
3.65 kΩ
3.09 kΩ
2.67 kΩ
2.37 kΩ
2.1 kΩ
MAXIMUM V
REF
1
0
–1
–2
–3
–4
–5
MINIMUM V
REF
1.05 kΩ
412 Ω
205 Ω
0
1
2
3
4
–6
–5
–4
–3
–2
–1
V
(–) (V)
IN
Figure 38. Reference Input ꢀoltage vs. Negative Input ꢀoltage,
ꢀS = ± ± ꢀ, G = +±
REFERENCE TERMINAL
5
The reference terminal potential defines the zero output voltage
and is especially useful when the load does not share a precise
ground with the rest of the system. It provides a direct means of
injecting a precise offset to the output. The reference terminal is
also useful when amplifying bipolar signals, because it provides
a virtual ground voltage.
MAXIMUM V
REF
4
3
2
1
The AD627 output voltage is developed with respect to the poten-
tial on the reference terminal; therefore, tying the REF pin to the
appropriate local ground solves many grounding problems. For
optimal CMR, tie the REF pin to a low impedance point.
MINIMUM V
REF
INPUT RANGE LIMITATIONS IN SINGLE-SUPPLY
APPLICATIONS
0
–0.5
3.0
3.5
4.0
4.5
0
0.5
1.0
1.5
2.0
2.5
V
(–) (V)
IN
In general, the maximum achievable gain is determined by the
available output signal range. However, in single-supply applica-
tions where the input common-mode voltage is nearly or equal
to 0, some limitations on the gain can be set. Although the
Specifications section nominally defines the input, output, and
reference pin ranges, the voltage ranges on these pins are
mutually interdependent. Figure 37 shows the simplified
schematic of the AD627, driven by a differential voltage (VDIFFꢀ
that has a common-mode component, VCM. The voltage on the
A± op amp output is a function of VDIFF, VCM, the voltage on the
REF pin, and the programmed gain. This voltage is given by
Figure 39. Reference Input ꢀoltage vs. Negative Input ꢀoltage,
ꢀS = ± ꢀ, G = +±
Raising the input common-mode voltage increases the voltage
on the output of A±. However, in single-supply applications
where the common-mode voltage is low, a differential input
voltage or a voltage on REF that is too high can drive the output
of A± into the ground rail. Some low-side headroom is added
because both inputs are shifted upwards by about 0.5 V (that is,
by the VBE of Q± and Q2ꢀ. Use Equation 3 and Equation 4 to
check whether the voltage on Amplifier A± is within its
operating range.
V
A1 = ±.25 (VCM + 0.5 Vꢀ − 0.25 VREF − VDIFF (25 kΩ/RG − 0.625ꢀ (3ꢀ
Rev. D | Page 16 of 24
AD627
Table 7. Maximum Gain for Low Common-Mode, Single-Supply Applications
VIN REF Pin Supply Voltage RG (1% Tolerance) Resulting Maximum Gain Output Swing WRT 0 V
100 mV, VCM = 0 V
2 V
2 V
2 V
1 V
5 V to 15 V
5 V to 15 V
5 V to 15 V
10 V to 15 V
5 V to 15 V
5 V to 15 V
28.7 kΩ
10.7 kΩ
1.74 kΩ
78.7 kΩ
7.87 kΩ
787 Ω
12.0
23.7
119.9
7.5
31
259.1
0.8 V to 3.2 V
0.8 V to 3.2 V
0.8 V to 3.2 V
1 V to 8.5 V
1 V to 4.1 V
1 V to 3.6 V
50 mV, VCM = 0 V
10 mV, VCM = 0 V
V− = 0 V, V+ = 0 V to 1 V
V− = 0 V, V+ = 0 mV to 100 mV 1 V
V− = 0 V, V+ = 0 mV to 10 mV
1 V
Table 8. RTI Error Sources
Maximum Total RTI Offset Error (ꢀV)
MaximumTotal RTI Offset Drift (ꢀV/°C)
Total RTI Noise (nV/√Hz)
Gain
+5
+10
+20
+50
+100
+500
+1000
AD627A
AD627B
250
200
175
160
155
151
151
AD627A
AD627B
AD627A /AD627B
450
350
300
270
270
252
251
5
4
3.5
3.2
3.1
3
3
2
1.5
1.2
1.1
1
95
66
56
53
52
52
52
3
1
Table 7 gives values for the maximum gain for various single-
supply input conditions. The resulting output swings refer to
0 V. To maximize the available gain and output swing, set the
voltages on the REF pins to either 2 V or ± V. In most cases,
there is no advantage to increasing the single supply to greater
than 5 V (the exception is an input range of 0 V to ± Vꢀ.
INPUT AND OUTPUT OFFSET ERRORS
The low errors of the AD627 are attributed to two sources,
input and output errors. The output error is divided by G when
referred to the input. In practice, input errors dominate at high
gains and output errors dominate at low gains. The total offset
error for a given gain is calculated as
OUTPUT BUFFERING
Total Error RTI = Input Error + (Output Error/Gainꢀ (5ꢀ
The AD627 is designed to drive loads of 20 kΩ or greater but
can deliver up to 20 mA to heavier loads at lower output voltage
swings (see Figure ±0ꢀ. If more than 20 mA of output current is
required at the output, buffer the AD627 output with a precision
op amp, such as the OP±±3. Figure 40 shows this for a single
supply. This op amp can swing from 0 V to 4 V on its output
while driving a load as small as 600 Ω.
Total Error RTO = (Input Error × Gꢀ + Output Error
(6ꢀ
RTI offset errors and noise voltages for different gains are listed
in Table 1.
+V
S
0.1µF
0.1µF
V
R
IN
G
AD627
REF
R
V
G
OP113
OUT
0.1µF
0.1µF
–V
S
–V
S
Figure 40. Output Buffering
Rev. D | Page 17 of 24
AD627
The errors associated with each implementation (see Table 9ꢀ
show the integrated in-amp to be more precise at both ambient
and overtemperature. Note that the discrete implementation is
more expensive, primarily due to the relatively high cost of the
low drift precision resistor network.
MAKE vs. BUY: A TYPICAL APPLICATION ERROR
BUDGET
The example in Figure 4± serves as a good comparison between
the errors associated with an integrated and a discrete in-amp
implementation. A ±±00 mV signal from a resistive bridge
(common-mode voltage = 2.5 Vꢀ is amplified. This example
compares the resulting errors from a discrete two-op-amp
instrumentation amplifier and the AD627. The discrete
implementation uses a four-resistor precision network
(±% match, 50 ppm/°C trackingꢀ.
The input offset current of the discrete instrumentation amplifier
implementation is the difference in the bias currents of the two-
op amplifiers, not the offset currents of the individual op amps.
In addition, although the values of the resistor network are chosen
so that the inverting and noninverting inputs of each op amp
see the same impedance (about 350 Ωꢀ, the offset current of
each op amp adds another error that must be characterized.
+5V
+5V
+5V
350Ω
350Ω
350Ω
350Ω
LT10781SB
R
G
V
1/2
OUT
40.2kΩ
1%
+10ppm/°C
LT10781SB
AD627A
V
OUT
±100mV
1/2
+2.5V
3.15kΩ*
350Ω*
350Ω*
3.15kΩ*
+2.5V
AD627A GAIN = 9.98 (5+(200kΩ/R ))
HOMEBREW IN-AMP, G = +10
*1% RESISTOR MATCH, 50ppm/°C TRACKING
G
Figure 41. Make vs. Buy
Table 9. Make vs. Buy Error Budget
Total Error
AD627
(ppm)
Total Error
Homebrew
(ppm)
Error Source
AD627 Circuit Calculation
Homebrew Circuit Calculation
ABSOLUTE ACCURACY at TA = 25°C
Total RTI Offset Voltage, mV
Input Offset Current, nA
Internal Offset Current
(Homebrew Only)
(250 ꢀV + (1000 ꢀV/10))/100 mV
1 nA × 350 Ω/100 mV
Not applicable
(180 ꢀV × 2)/100 mV
20 nA × 350 Ω/100 mV
0.7 nA × 350 Ω/100 mV
3,500
3.5
3,600
70
2.45
CMRR, dB
Gain
(1% match × 2.5 V)/10/100 mV
1% match
3,531
25,000
10,000
38,672
77 dB→141 ppm × 2.5 V/100 mV
0.35% + 0.1%
13,500
20,535
Total Absolute Error
DRIFT TO 85°C
Gain Drift, ppm/°C
Total RTI Offset Voltage, mV/°C (3.0 ꢀV/°C + (10 ꢀV/°C/10)) ×
60°C/100 mV
(−75 + 10) ppm/°C × 60°C
50 ppm/°C × 60°C
(2 × 3.5 ꢀV/°C × 60°C)/100 mV
3,900
2,600
3,000
4,200
Input Offset Current, pA/°C
(16 pA/°C × 350 Ω × 60°C)/100 mV (33 pA/°C × 350 Ω × 60°C)/100 mV
3.5
7
Total Drift Error
Grand Total Error
6,504
27,039
7,207
45,879
Rev. D | Page 18 of 24
AD627
ERRORS DUE TO AC CMRR
GROUND RETURNS FOR INPUT BIAS CURRENTS
In Table 9, the error due to common-mode rejection results
from the common-mode voltage from the bridge 2.5 V. The
ac error due to less than ideal common-mode rejection cannot
be calculated without knowing the size of the ac common-mode
voltage (usually interference from 50 Hz/60 Hz mains frequenciesꢀ.
Input bias currents are dc currents that must flow to bias the
input transistors of an amplifier. They are usually transistor base
currents. When amplifying floating input sources, such as
transformers or ac-coupled sources, there must be a direct dc
path into each input so that the bias current can flow. Figure 44,
Figure 45, and Figure 46 show how to provide a bias current
path for the cases of, respectively, transformer coupling, a
thermocouple application, and capacitive ac-coupling.
A mismatch of 0.±% between the four gain setting resistors
determines the low frequency CMRR of a two-op-amp
instrumentation amplifier. The plot in Figure 43 shows the
practical results of resistor mismatch at ambient temperature.
In dc-coupled resistive bridge applications, providing this path
is generally not necessary because the bias current simply flows
from the bridge supply through the bridge and into the amplifier.
However, if the impedance that the two inputs see are large, and
differ by a large amount (>±0 kΩꢀ, the offset current of the input
stage causes dc errors compatible with the input offset voltage of
the amplifier.
The CMRR of the circuit in Figure 42 (Gain = +±±ꢀ was
measured using four resistors with a mismatch of nearly 0.±%
(R± = 9999.5 Ω, R2 = 999.76 Ω, R3 = ±000.2 Ω, R4 = 9997.7 Ωꢀ.
As expected, the CMRR at dc was measured at about 14 dB
(calculated value is 15 dBꢀ. However, as frequency increases,
CMRR quickly degrades. For example, a 200 mV p-p harmonic
of the mains frequency at ±10 Hz would result in an output
voltage of about 100 μV. To put this in context, a ±2-bit data
acquisition system, with an input range of 0 V to 2.5 V, has an
LSB weighting of 6±0 μV.
+V
S
–INPUT
2
1
7
R
G
6
V
OUT
AD627
5
8
3
+INPUT
REFERENCE
4
By contrast, the AD627 uses precision laser trimming of internal
resistors, along with patented CMR trimming, to yield a higher
dc CMRR and a wider bandwidth over which the CMRR is flat
(see Figure 23ꢀ.
LOAD
–V
S
TO POWER
SUPPLY
GROUND
Figure 44. Ground Returns for Bias Currents with Transformer Coupled Inputs
+5V
+V
S
–INPUT
2
1
7
A2
VIN–
VIN+
1/2
OP296
R
G
6
V
OUT
AD627
V
OUT
5
A1
8
3
+INPUT
1/2
REFERENCE
4
OP296
LOAD
–V
S
TO POWER
SUPPLY
GROUND
–5V
R2
R1
R3
1000.2Ω
R4
9997.7Ω
9999.5Ω 999.76Ω
Figure 4±. Ground Returns for Bias Currents with Thermocouple Inputs
+V
S
–INPUT
Figure 42. 0.1% Resistor Mismatch Example
2
1
7
120
R
G
6
V
OUT
AD627
110
100
90
5
8
3
+INPUT
REFERENCE
4
LOAD
100kΩ
–V
S
TO POWER
SUPPLY
GROUND
80
70
60
50
40
Figure 46. Ground Returns for Bias Currents with AC-Coupled Inputs
30
20
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 43. CMRR over Frequency of Discrete In-Amp in Figure 42
Rev. D | Page 19 of 24
AD627
If there is only one power supply available, it must be shared by
both digital and analog circuitry. Figure 41 shows how to minimize
interference between the digital and analog circuitry. As in the
previous case, use separate analog and digital ground planes or
use reasonably thick traces as an alternative to a digital ground
plane. Connect the ground planes at the ground pin of the power
supply. Run separate traces (or power planesꢀ from the power
supply to the supply pins of the digital and analog circuits. Ideally,
each device should have its own power supply trace, but they
can be shared by multiple devices if a single trace is not used to
route current to both digital and analog circuitry.
LAYOUT AND GROUNDING
The use of ground planes is recommended to minimize the
impedance of ground returns (and hence, the size of dc errorsꢀ.
To isolate low level analog signals from a noisy digital environment,
many data acquisition components have separate analog and
digital ground returns (see Figure 47ꢀ. Return all ground pins
from mixed-signal components, such as analog-to-digital
converters, through the high quality analog ground plane.
Digital ground lines of mixed-signal components should also
be returned through the analog ground plane. This may seem
to break the rule of separating analog and digital grounds;
however, in general, there is also a requirement to keep the
voltage difference between digital and analog grounds on a
converter as small as possible (typically, <0.3 Vꢀ. The increased
noise, caused by the digital return currents of the converter
flowing through the analog ground plane, is generally negligible.
To maximize isolation between analog and digital, connect the
ground planes back at the supplies.
ANALOG POWER SUPPLY
DIGITAL POWER SUPPLY
+5V
–5V
GND
GND
+5V
0.1µF 0.1µF
0.1µF
0.1µF
7
4
2
3
1
6
14
AGND
V
V
V
DD
6
4
3
AD627
DGND
12
IN1
DD
AGND
5
MICRO-
PROCESSOR
V
ADC
IN2
AD7892-2
Figure 47. Optimal Grounding Practice for a Bipolar Supply Environment with Separate Analog and Digital Supplies
POWER SUPPLY
5V
GND
0.1µF
0.1µF
0.1µF
7
1
4
2
3
V
V
AGND
DGND
12
DGND
MICRO-
DD
DD
6
4
V
AD627
IN
ADC
AD7892-2
5
PROCESSOR
Figure 48. Optimal Ground Practice in a Single-Supply Environment
Rev. D | Page 20 of 24
AD627
Capacitor C3 is needed to maintain common-mode rejection at
low frequencies. R±/R2 and C±/C2 form a bridge circuit whose
output appears across the input pins of the in-amp. Any mismatch
between C± and C2 unbalances the bridge and reduces common-
mode rejection. C3 ensures that any RF signals are common
mode (the same on both in-amp inputsꢀ and are not applied
differentially. This second low-pass network, R± + R2 and C3,
has a −3 dB frequency equal to
INPUT PROTECTION
As shown in the simplified schematic (see Figure 35ꢀ, both the
inverting and noninverting inputs are clamped to the positive
and negative supplies by ESD diodes. In addition, a 2 kΩ series
resistor on each input provides current limiting in the event of
an overvoltage. These ESD diodes can tolerate a maximum
continuous current of ±0 mA. So an overvoltage (that is, the
amount by which the input voltage exceeds the supply voltageꢀ
of ±20 V can be tolerated. This is true for all gains, and for
power on and off. This last case is particularly important
because the signal source and amplifier can be powered
separately.
±/(2π((R± + R2ꢀ × C3ꢀꢀ
(1ꢀ
+V
S
0.33µF
0.01µF
C1
1000pF
5%
R1
20kΩ
1%
If the overvoltage is expected to exceed 20 V, use additional
external series current-limiting resistors to keep the diode
current below ±0 mA.
+IN
–IN
R2
20kΩ
1%
C3
R
V
G
AD627
OUT
0.022µF
RF INTERFERENCE
REFERENCE
0.01µF
C2
1000pF
5%
All instrumentation amplifiers can rectify high frequency out-
of-band signals. Once rectified, these signals appear as dc offset
errors at the output. The circuit in Figure 49 provides good RFI
suppression without reducing performance within the pass
band of the instrumentation amplifier. Resistor R± and
Capacitor C± (and likewise, R2 and C2ꢀ form a low-pass RC
filter that has a –3 dB BW equal to
0.33µF
–V
S
Figure 49. Circuit to Attenuate RF Interference
Using a C3 value of 0.022 μF, as shown in Figure 49, the −3 dB
signal bandwidth of this circuit is approximately 200 Hz. The
typical dc offset shift over frequency is less than ± mV and the
RF signal rejection of the circuit is better than 57 dB. To increase
the 3 dB signal bandwidth of this circuit, reduce the value of
Resistor R± and Resistor R2. The performance is similar to that
when using 20 kΩ resistors, except that the circuitry preceding
the in-amp must drive a lower impedance load.
f = ±/(2π(R1 × C1ꢀꢀ
(7ꢀ
Using the component values shown in Figure 49, this filter has
a –3 dB bandwidth of approximately 1 kHz. Resistor R± and
Resistor R2 were selected to be large enough to isolate the circuit
input from the capacitors but not large enough to significantly
increase circuit noise. To preserve common-mode rejection in
the amplifier pass band, Capacitor C± and Capacitor C2 must
be 5% mica units, or low cost 20% units can be tested and binned
to provide closely matched devices.
When building a circuit like that shown in Figure 49, use a PC
board with a ground plane on both sides. Make all component
leads as short as possible. Resistor R± and Resistor R2 can be
common ±% metal film units, but Capacitor C± and Capacitor C2
must be ±5% tolerance devices to avoid degrading the common-
mode rejection of the circuit. Either the traditional 5% silver mica
units or Panasonic ±2% PPS film capacitors are recommended.
Rev. D | Page 21 of 24
AD627
APPLICATIONS CIRCUITS
CLASSIC BRIDGE CIRCUIT
4 TO 20 mA SINGLE-SUPPLY RECEIVER
Figure 5± shows how a signal from a 4 to 20 mA transducer can
be interfaced to the ADuC1±2, a ±2-bit ADC with an embedded
microcontroller. The signal from a 4 to 20 mA transducer is
single-ended, which initially suggests the need for a simple
shunt resistor to convert the current to a voltage at the high
impedance analog input of the converter. However, any line
resistance in the return path (to the transducerꢀ adds a current
dependent offset error; therefore, the current must be sensed
differentially.
Figure 50 shows the AD627 configured to amplify the signal
from a classic resistive bridge. This circuit works in dual-supply
mode or single-supply mode. Typically, the same voltage that
powers the instrumentation amplifiers excites the bridge.
Connecting the bottom of the bridge to the negative supply of
the instrumentation amplifiers (usually 0 V, −5 V, −±2 V, or
−±5 Vꢀ, sets up an input common-mode voltage that is
optimally located midway between the supply voltages. It is
also appropriate to set the voltage on the REF pin to midway
between the supplies, especially if the input signal is bipolar.
However, the voltage on the REF pin can be varied to suit the
application. For example, the REF pin is tied to the VREF pin of
an analog-to-digital converter (ADCꢀ whose input range is
(VREF ± VINꢀ. With an available output swing on the AD627 of
(−VS + ±00 mVꢀ to (+VS − ±50 mVꢀ, the maximum programmable
gain is simply this output range divided by the input range.
In this example, a 24.9 Ω shunt resistor generates a maximum
differential input voltage to the AD627 of between ±00 mV
(for 4 mA inꢀ and 500 mV (for 20 mA inꢀ. With no gain resistor
present, the AD627 amplifies the 500 mV input voltage by a
factor of 5, to 2.5 V, the full-scale input voltage of the ADC. The
zero current of 4 mA corresponds to a code of 1±9 and the LSB
size is 6±0 ꢁA.
+V
S
THERMOCOUPLE AMPLIFIER
0.1µF
Because the common-mode input range of the AD627 extends
0.± V below ground, it is possible to measure small differential
signals that have a low, or no, common-mode component.
Figure 5± shows a thermocouple application where one side of
the J-type thermocouple is grounded.
200kΩ
GAIN–5
R
V
G =
V
AD627
OUT
DIFF
V
REF
0.1µF
Over a temperature range from −200°C to +200°C, the J-type
thermocouple delivers a voltage ranging from −7.190 mV to
+±0.777 mV. A programmed gain on the AD627 of ±00 (RG =
2.± kΩꢀ and a voltage on the AD627 REF pin of 2 V result in the
output voltage of the AD627 ranging from ±.±±0 V to 3.077 V
relative to ground. For a different input range or different
voltage on the REF pin, it is important to verify that the voltage
on Internal Node A± (see Figure 37ꢀ is not driven below
ground. This can be checked using the equations in the Input
Range Limitations in Single-Supply Applications section.
5V
–V
S
Figure ±0. Classic Bridge Circuit
0.1µF
J-TYPE
THERMOCOUPLE
R
2.1kΩ
G
V
AD627
OUT
REF
V
REF
Figure ±1. Amplifying Bipolar Signals with Low Common-Mode ꢀoltage
Rev. D | Page 22 of 24
AD627
5V
5V
5V
0.1µF
0.1µF
0.1µF
V
AV
DV
DD
REF
DD
ADuC812
MICROCONVERTER®
AIN 0
to AIN 7
4–20mA
TRANSDUCER
LINE
IMPEDANCE
4–20mA
24.9Ω
G = +5
AD627
REF
AGND
DGND
Figure ±2. 4 to 20 mA Receiver Circuit
Rev. D | Page 23 of 24
AD627
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
5.00 (0.1968)
4.80 (0.1890)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
8
1
5
4
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
SEATING
PLANE
45°
1.75 (0.0688)
1.35 (0.0532)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.25 (0.0098)
0.10 (0.0040)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-001
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure ±3. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body (N-8)
Figure ±4. 8-Lead Small Standard Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in inches (and millimeters)
Dimensions shown in millimeters (and inches)
ORDERING GUIDE
Model
AD627AN
AD627ANZ1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
8-Lead Small Standard Outline [SOIC_N]
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
AD627AR
AD627AR-REEL
AD627AR-REEL7
AD627ARZ1
AD627ARZ-R71
AD627ARZ-RL1
AD627BN
AD627BNZ1
AD627BR
AD627BR-REEL
AD627BR-REEL7
AD627BRZ1
AD627BRZ-RL1
AD627BRZ-R71
1 Z = RoHS Compliant part.
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00782-0-11/07(D)
Rev. D | Page 24 of 24
相关型号：
AD627BRZ-REEL7
INSTRUMENTATION AMPLIFIER, 190uV OFFSET-MAX, 0.08MHz BAND WIDTH, PDSO8, MS-012AA, SOIC-8
ADI
©2020 ICPDF网 联系我们和版权申明