AD706ARZ-REEL [ADI]
Dual Picoampere Input Current Bipolar Op Amp; 双Picoampere输入电流双极运算放大器
| 型号： | AD706ARZ-REEL |
| 厂家： | 
ADI |
| 描述： | Dual Picoampere Input Current Bipolar Op Amp |
| 文件： | 总12页 (文件大小：220K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual Picoampere Input
Current Bipolar Op Amp
AD706
FEATURES
CONNECTION DIAGRAM
High DC Precision
100 ꢀV Max Offset Voltage
1.5 ꢀV/ꢁC Max Offset Drift
200 pA Max Input Bias Current
0.5 ꢀV p-p Voltage Noise, 0.1 Hz to 10 Hz
750 ꢀA Supply Current
Available in 8-Lead Plastic Mini-DlP
and Surface-Mount (SOIC) Packages
Available in Tape and Reel in Accordance with
EIA-481A Standard
Plastic Mini-DIP (N) and
Plastic SOIC (R) Packages
AMPLIFIER 1
AMPLIFIER 2
AD706
OUTPUT
–IN
1
2
3
4
8
7
6
5
Vꢂ
OUTPUT
–IN
ꢂIN
V–
ꢂIN
Quad Version: AD704
TOP VIEW
APPLICATIONS
Low Frequency Active Filters
Precision Instrumentation
Precision Integrators
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD706 is a dual, low power, bipolar op amp that has the
low input bias current of a JFET amplifier, but which offers a
significantly lower IB drift over temperature. It utilizes superbeta
bipolar input transistors to achieve picoampere input bias current
levels (similar to FET input amplifiers at room temperature),
while its IB typically only increases by 5ϫ at 125°C (unlike a
JFET amp, for which IB doubles every 10°C for a 1000ϫ
increase at 125°C). The AD706 also achieves the microvolt
offset voltage and low noise characteristics of a precision bipolar
input amplifier.
1. The AD706 is a dual low drift op amp that offers JFET
level input bias currents, yet has the low IB drift of a bipolar
amplifier. It may be used in circuits using dual op amps
such as the LT1024.
2. The AD706 provides both low drift and high dc precision.
3. The AD706 can be used in applications where a chopper
amplifier would normally be required but without the
chopper’s inherent noise.
Since it has < 200 pA of bias current, the AD706 does not
require the commonly used “balancing” resistor. Furthermore,
the current noise is only 50 fA/√Hz, which makes this amplifier
usable with very high source impedances. At 600 A max supply
current (per amplifier), the AD706 is well suited for today’s
high density boards.
100
10
TYPICAL JFET AMP
1
The AD706 is an excellent choice for use in low frequency
active filters in 12-bit and 14-bit data acquisition systems, in
precision instrumentation, and as a high quality integrator. The
AD706 is internally compensated for unity gain and is available
in five performance grades. The AD706J is rated over the
commercial temperature range of 0°C to +70°C. The AD706A is
rated for the extended industrial temperature range of –40°C
to +85°C.
0.1
AD706
0.01
–55
+25
+110
+125
TEMPERATURE – ꢁC
The AD706 is offered in two varieties of an 8-lead package:
plastic mini-DIP and surface-mount (SOIC).
Figure 1. Input Bias Current vs. Temperature
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
(@ TA = +25ꢁC, VCM = 0 V and ꢃ15 V dc, unless otherwise noted.)
AD706–SPECIFICATIONS
AD706J/A
Parameter
Conditions
Min
Typ
Max
Unit
INPUT OFFSET VOLTAGE
Initial Offset
Offset
vs. Temperature, Average TC
vs. Supply (PSRR)
TMIN to TMAX
30
40
0.2
132
126
0.3
100
150
1.5
µV
TMIN to TMAX
µV
µV/°C
dB
dB
µV/Month
VS = 2 V to 18 V
VS = 2.5 V to 18 V
110
106
Long Term Stability
INPUT BIAS CURRENT1
VCM = 0 V
50
200
250
pA
pA
VCM
=
13.5 V
vs. Temperature, Average TC
TMIN to TMAX
TMIN to TMAX
0.3
pA/°C
VCM = 0 V
VCM 13.5 V
300
400
pA
=
pA
INPUT OFFSET CURRENT
V
CM = 0 V
30
150
250
pA
pA
VCM 13.5 V
=
vs. Temperature, Average TC
TMIN to TMAX
TMIN to TMAX
0.6
80
80
pA/°C
VCM = 0 V
VCM 13.5 V
250
350
pA
=
pA
MATCHING CHARACTERISTICS
Offset Voltage
150
250
300
500
µV
µV
pA
pA
dB
dB
dB
dB
TMIN to TMAX
TMIN to TMAX
TMIN to TMAX
Input Bias Current2
Common-Mode Rejection
Power Supply Rejection
Crosstalk (Figure 2a)
106
106
106
104
TMIN to TMAX
@ f = 10 Hz
RL = 2 kΩ
150
dB
FREQUENCY RESPONSE
Unity Gain Crossover Frequency
Slew Rate
0.8
0.15
0.15
MHz
V/µs
V/µs
G = –1
TMIN to TMAX
INPUT IMPEDANCE
Differential
Common Mode
40||2
300||2
MΩ||pF
GΩ||pF
INPUT VOLTAGE RANGE
Common-Mode Voltage
Common-Mode Rejection Ratio
13.5
110
108
14
132
128
V
dB
dB
VCM
TMIN to TMAX
=
13.5 V
INPUT CURRENT NOISE
INPUT VOLTAGE NOISE
0.1 Hz to 10 Hz
f = 10 Hz
3
50
pA p-p
fA/√Hz
0.1 Hz to 10 Hz
f = 10 Hz
f = 1 kHz
0.5
17
15
µV p-p
nV/√Hz
nV/√Hz
22
OPEN-LOOP GAIN
VO = 12 V
RLOAD = 10 kΩ
TMIN to TMAX
VO = 10 V
200
150
2000
1500
V/mV
V/mV
RLOAD = 2 kΩ
TMIN to TMAX
200
150
1000
1000
V/mV
V/mV
OUTPUT CHARACTERISTICS
Voltage Swing
RLOAD = 10 kΩ
TMIN to TMAX
Short Circuit
Gain = +1
13
13
14
14
15
V
V
mA
pF
Current
Capacitive Load Drive Capability
10,000
–2–
REV. E
AD706
SPECIFICATIONS (continued)
AD706J/A
Typ
Parameter
Conditions
Min
Max
Unit
POWER SUPPLY
Rated Performance
Operating Range
15
V
V
mA
mA
2.0
18
1.2
1.4
Quiescent Current, Total
0.75
0.8
TMIN to TMAX
TRANSISTOR COUNT
Number of Transistors
90
NOTES
1Bias current specifications are guaranteed maximum at either input.
2Input bias current match is the difference between corresponding inputs (IB of –IN of Amplifier 1 minus IB of –IN of Amplifier 2).
∆VOS1
∆VCM
∆VOS2
∆VCM
CMRR match is the difference between
for Amplifier 1 and
for Amplifier 2, expressed in dB.
∆VOS1
∆VOS2
∆VSUPPLY
PSRR match is the difference between
for Amplifier 1 and
for Amplifier 2, expressed in dB.
∆VSUPPLY
All min and max specifications are guaranteed.
Specifications subject to change without notice.
ORDERING GUIDE
Temperature
ABSOLUTE MAXIMUM RATINGS1
Package
Description Option
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Internal Power Dissipation
Model
Range
AD706JN
AD706JR
AD706JR-REEL
AD706JR-REEL7 0°C to 70°C
AD706AR
AD706AR-REEL
0°C to 70°C
0°C to 70°C
0°C to 70°C
Plastic DIP
SOIC
N-8
R-8
(Total: Both Amplifiers)2 . . . . . . . . . . . . . . . . . . . . 650 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS
Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . +0.7 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Operating Temperature Range
Tape and Reel R-8
Tape and Reel R-8
–40°C to +85°C SOIC
R-8
–40°C to +85°C Tape and Reel R-8
AD706AR-REEL7 –40°C to +85°C Tape and Reel R-8
AD706J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD706A . . . . . . . . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C
Lead Temperature (Soldering 10 secs) . . . . . . . . . . . . . 300°C
AD706ARZ-REEL* –40°C to +85°C Tape and Reel R-8
*Lead-free part.
NOTES
METALIZATION PHOTOGRAPH
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air:
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
1
OUTPUT A
+V
8-Lead Plastic Package: θJA = 100°C/W
8
S
8-Lead Small Outline Package: θJA = 155°C/W
3The input pins of this amplifier are protected by back-to-back diodes. If the
differential voltage exceeds 0.7 V, external series protection resistors should be
added to limit the input current to less than 25 mA.
2
–INPUT A
+INPUT A
OUTPUT B
7
3
6
5
–INPUT B
+INPUT B
–V
S
4
0.074 (1.88)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD706 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. E
–3–
AD706–Typical Performance Characteristics
(Default Conditions: ꢃ5 V, CL = 5 pF, G = 2, Rg = Rf = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, Frequency = 1 MHz, TA = 25ꢁC)
1000
800
600
400
200
0
1000
800
600
400
200
0
1000
800
600
400
200
0
SAMPLE SIZE: 2400
SAMPLE
SAMPLE
SIZE: 3000
SIZE: 5100
–80
–40
0
40
80
–160
–80
0
80
160
–120
–60
0
60
120
INPUT OFFSET VOLTAGE – ꢀV
INPUT BIAS CURRENT – pA
INPUT OFFSET CURRENT – pA
TPC 1. Typical Distribution
of Input Offset Voltage
TPC 2. Typical Distribution
of Input Bias Current
TPC 3. Typical Distribution
of Input Offset Current
ꢂV
35
30
25
20
15
10
5
100
10
S
–0.5
–1.0
–1.5
SOURCE RESISTANCE
MAY BE EITHER BALANCED
OR UNBALANCED
FOR INDUSTRIAL
TEMPERATURE
RANGE
ꢂ1.5
ꢂ1.0
ꢂ0.5
1.0
–V
S
0
0.1
1k
10k
100k
1M
0
5
10
15
20
1k
10k
100k
1M
10M
100M
FREQUENCY – Hz
SOURCE RESISTANCE – ꢄ
SUPPLY VOLTAGE – ꢃVolts
TPC 4. Input Common-Mode Voltage
Range vs. Supply Voltage
TPC 5. Large Signal Frequency
Response
TPC 6. Offset Voltage Drift
vs. Source Resistance
4
3
60
200
SAMPLE SIZE: 375
–55ꢁC TO ꢂ125ꢁC
40
20
160
120
80
40
0
POSITIVE I
B
0
2
1
0
–20
NEGATIVE I
B
–40
–60
0
1
2
3
4
5
–15 –10
–5
0
5
10
15
–0.8
–0.4
0
0.4
0.8
OFFSET VOLTAGE DRIFT – ꢀV/ꢁC
WARM-UP TIME – Minutes
COMMON-MODE VOLTAGE – Volts
TPC 7. Typical Distribution
of Offset Voltage Drift
TPC 8. Change in Input Offset
Voltage vs. Warm-Up Time
TPC 9. Input Bias Current vs.
Common-Mode Voltage
–4–
REV. E
AD706
1000
100
10
1000
100
10
0.5ꢀV
100ꢄ
10kꢄ
20Mꢄ
VOUT
1
1
5
0
10
1
10
100
1000
1
10
100
1000
TIME – Seconds
FREQUENCY – Hz
FREQUENCY – Hz
TPC 10. Input Noise Voltage
Spectral Density
TPC 11. Input Noise Current
Spectral Density
TPC 12. 0.1 Hz to 10 Hz
Noise Voltage
1000
160
140
120
100
80
180
160
140
120
100
80
900
800
700
600
+125ꢁC
+25ꢁC
– PSRR
60
+ PSRR
40
60
20
40
–55ꢁC
0
0.1
20
0.1
0
5
10
15
20
1
10
100 1k
10k 100k 1M
1
10
100 1k
10k 100k 1M
SUPPLY VOLTAGE – ꢃ Volts
FREQUENCY – Hz
FREQUENCY – Hz
TPC 13. Quiescent Supply
Current vs. Supply Voltage
TPC 14. Common-Mode Rejection
Ratio vs. Frequency
TPC 15. Power Supply Rejection
Ratio vs. Frequency
0
140
120
100
80
+V
S
10M
–0.5
–1.0
–1.5
30
–55ꢁC
60
PHASE
+25ꢁC
90
+125ꢁC
60
120
150
180
210
240
1M
40
+1.5
+1.0
+0.5
GAIN
20
0
–V
S
–20
0.01 0.1
100k
1
10 100 1k 10k 100k 1M 10M
FREQUENCY – Hz
0
5
10
15
20
1
2
4
6
8 10
100
SUPPLY VOLTAGE – ꢃ Volts
LOAD RESISTANCE – kꢄ
TPC 17. Open-Loop Gain and
Phase Shift vs. Frequency
TPC 18. Output Voltage Swing vs.
Supply Voltage
TPC 16. Open-Loop Gain vs. Load
Resistance vs. Load Resistance
REV. E
–5–
AD706
–80
1000
100
10
–100
–120
–140
–160
AV = –1000
1
AV = + 1
0.1
0.01
I
= +1mA
100
OUT
0.001
10
100
1k
10k
100k
1
10
1k
10k
100k
FREQUENCY – Hz
FREQUENCY – Hz
Figure 2a. Crosstalk vs. Frequency
Figure 3. Magnitude of Closed-Loop Output
Impedance vs. Frequency
+V 0.1ꢀF
S
R
F
2
3
V
OUT1
1/2
1
AD706
20V p-p
+V
8
S
4
0.1ꢀF
R
2kꢄ
0.1ꢀF
L
SINE WAVE
GENERATOR
V
OUT
–V
1/2
S
AD706
V
4
IN
R
L
C
L
2kꢄ
20kꢄ
+V
S
0.1ꢀF
SQUARE
WAVE
INPUT
–V
S
1ꢀF
0.1ꢀF
2.21kꢄ
8
6
V
OUT2
Figure 4a. Unity Gain Follower (For large signal
applications, resistor RF limits the current
through the input protection diodes.)
1/2
AD706
5
7
V
V
OUT2
CROSSTALK = 20 LOG
–20dB
10
OUT1
Figure 2b. Crosstalk Test Circuit
Figure 4b. Unity Gain Follower Large
Signal Pulse Response, RF = 10 kΩ,
CL = 1,000 pF
Figure 4c. Unity Gain Follower
Small Signal Pulse Response,
RF = 0 Ω, CL = 100 pF
Figure 4d. Unity Gain Follower
Small Signal Pulse Response,
RF = 0 Ω, CL = 1000 pF
–6–
REV. E
AD706
10kꢄ
+V
S
+
0.1ꢀF
10kꢄ
V
–
IN
8
V
OUT
1/2
AD706
R
2.5kꢄ
4
L
+
C
L
SQUARE
WAVE
INPUT
0.1µF
–V
S
Figure 5a. Unity Gain Inverter Connection
Figure 5b. Unity Gain Inverter Large
Signal Pulse Response, CL = 1,000 pF
Figure 5c. Unity Gain Inverter Small
Signal Pulse Response, CL = 100 pF
Figure 5d. Unity Gain Inverter Small
Signal Pulse Response, CL = 1000 pF
Figure 6 shows an in-amp circuit that has the obvious advantage
of requiring only one AD706, rather than three op amps, with
subsequent savings in cost and power consumption. The transfer
function of this circuit (without RG) is
CMR is still dependent upon the ratio matching of Resistors R1
through R4. Resistor values for this circuit, using the optional
gain resistor, RG, can be calculated using
R1= R4 = 49.9kΩ
49.9kΩ
0.9G −1
99.8kΩ
0.06 G
R
4
R2 = R3 =
V
= (V − V ) 1+
OUT
IN1
IN2
R3
for R1 = R4 and R2 = R3.
RG =
Input resistance is high, thus permitting the signal source to
have an unbalanced output impedance.
where G = The desired circuit gain.
Table I provides practical 1% resistance values. Note that
without resistor RG, R2 and R3 = 49.9 kΩ/G–1.
R
(OPTIONAL)
R3
G
R1
R2
R4
Table I. Operating Gains of Amplifiers A1 and A2 and
Practical 1% Resistor Values for the Circuit of Figure 6
49.9kꢄ
49.9kꢄ
+V
S
0.1ꢀF
1/2
AD706
8
Circuit Gain Gain of A1 Gain of A2 R2, R3
R1, R4
2
3
–
+
1
5
6
–
A1
R
*
P
1.10
1.33
1.50
2.00
10.1
101.0
1001
11.00
4.01
3.00
2.00
1.11
1.01
1.001
1.10
1.33
1.50
2.00
10.10
101.0
1001
499 kΩ
150 kΩ
100 kΩ
49.9 kΩ
49.9 kΩ
49.9 kΩ
V
A2
7
IN1
1/2
AD706
OUTPUT
1kꢄ
+
4
R
*
P
V
IN2
0.1ꢀF
49.9 kΩ 49.9 kΩ
5.49 kΩ 49.9 kΩ
–V
S
1kꢄ
R4
R3
2R4
)
V
= (V
– V ) (1+
IN2
) + (
OUT
IN1
R
G
499 Ω
49.9 Ω
49.9 kΩ
49.9 kΩ
FOR R1 = R4, R2 = R3
*OPTIONAL INPUT PROTECTION RESISTOR FOR GAINS GREATER
THAN 100 OR INPUT VOLTAGES EXCEEDING THE SUPPLY VOLTAGE.
For a much more comprehensive discussion of in-amp applica-
tions, refer to the Instrumentation Amplifier Applications Guide—
available free from Analog Devices, Inc.
Figure 6. Two Op Amp Instrumentation Amplifier
Furthermore, the circuit gain may be fine trimmed using an
optional trim resistor, RG. Like the three op amp circuit, CMR
increases with gain, once initial trimming is accomplished—but
REV. E
–7–
AD706
C1
+
+V
S
C3
R1
R2
1Mꢄ
0.1ꢀF
1Mꢄ
R3
1Mꢄ
R4
3
2
INPUT
1Mꢄ
1/2
8
1/2
AD706
–
C2
1
5
6
AD706
–
7
4
C4
OUTPUT
*WITHOUT THE NETWORK,
PINS 1 AND 2, AND 6 AND 7
OF THE AD706 ARE TIED
TOGETHER.
0.1ꢀF
–V
S
R6
2Mꢄ
C6
0.01ꢀF
R5
2Mꢄ
C5
0.01ꢀF
CAPACITORS C1 AND C2
ARE SOUTHERN ELECTRONICS
MPCC, POLYCARB ꢃ5%, 50V
OPTIONAL BALANCE
RESISTOR NETWORKS*
Figure 7. 1 Hz, 4-Pole Active Filter
180
1 Hz, 4-Pole, Active Filter
Figure 7 shows the AD706 in an active filter application. An
important characteristic of the AD706 is that both the input bias
current, input offset current, and their drift remain low over
most of the op amp’s rated temperature range. Therefore, for
most applications, there is no need to use the normal balancing
resistor. Adding the balancing resistor enhances performance at
high temperatures, as shown by Figure 8.
WITHOUT OPTIONAL
120
60
0
BALANCE RESISTOR, R3
WITH OPTIONAL BALANCE
RESISTOR, R3
–60
–120
–180
–40
0
40
TEMPERATURE – ꢁC
80
120
Figure 8. VOS vs. Temperature Performance
of the 1 Hz Filter
Table II. 1 Hz, 4-Pole, Low Pass Filter Recommended Component Values
Section 1
Frequency
(Hz)
Section 2
Frequency
(Hz)
Desired Low
Pass Response
C1
(ꢀF)
C2
(ꢀF)
C3
(ꢀF)
C4
(ꢀF)
Q
Q
Bessel
Butterworth
0.1 dB Chebychev
0.2 dB Chebychev
0.5 dB Chebychev
1.0 dB Chebychev
1.43
1.00
0.648
0.603
0.540
0.492
0.522
0.541
0.619
0.646
0.705
0.785
1.60
1.00
0.948
0.941
0.932
0.925
0.806 0.116
0.107
0.147
0.198
0.204
0.209
0.206
0.160
0.416
0.733
0.823
1.00
0.0616
0.0609
0.0385
0.0347
0.0290
0.0242
1.31
2.18
2.44
2.94
3.56
0.172
0.304
0.341
0.416
0.508
1.23
NOTE
Specified Values are for a –3 dB point of 1.0 Hz. For other frequencies simply scale capacitors C1 through C4 directly, i.e. for 3 Hz
Bessel response, C1 = 0.0387 µF, C2 = 0.0357 µF, C3 = 0.0533 µF, C4 = 0.0205 µF.
–8–
REV. E
AD706
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
ꢅ 45ꢁ
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8ꢁ
0.51 (0.0201)
0.31 (0.0122)
0ꢁ 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Plastic Dual-in-Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
1
5
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
4
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015
(0.38)
MIN
0.180
(4.57)
MAX
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
REV. E
–9–
AD706
Revision History
Location
Page
10/03–Data Sheet changed from REV. D to REV. E
Removed the K Version . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Updated FEATURES list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Updated PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Renumbered TPCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Renumbered Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
10/02–Data Sheet changed from REV. C to REV. D
Deleted 8-Lead CERDIP (Q-8) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
–10–
REV. E
–11–
–12–
相关型号：
AD706JCHIPS
IC DUAL OP-AMP, 150 uV OFFSET-MAX, 0.8 MHz BAND WIDTH, UUC, DIE, Operational Amplifier
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DUAL OP-AMP, 150 uV OFFSET-MAX, 0.8 MHz BAND WIDTH, PDSO8, PLASTIC, MS-012AA, SOIC-8
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AD706JRZ
DUAL OP-AMP, 150 uV OFFSET-MAX, 0.8 MHz BAND WIDTH, PDSO8, ROHS COMPLIANT, PLASTIC, MS-012AA, SOIC-8
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