AD706_02 [ADI]
Dual Picoampere Input Current Bipolar Op Amp; 双Picoampere输入电流双极运算放大器型号: | AD706_02 |
厂家: | ADI |
描述: | Dual Picoampere Input Current Bipolar Op Amp |
文件: | 总12页 (文件大小:351K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Dual Picoampere Input
Current Bipolar Op Amp
a
AD706
FEATURE
CO NNECTIO N D IAGRAM
HIGH DC PRECISION
P lastic Mini-D IP (N) and
P lastic SO IC (R) P ackages
50 ꢁV max Offset Voltage
0.6 ꢁV/ꢂC max Offset Drift
110 pA max Input Bias Current
AMPLIFIER 1
AMPLIFIER 2
LOW NOISE
0.5 ꢁV p-p Voltage Noise, 0.1 Hz to 10 Hz
AD706
OUTPUT
–IN
1
2
3
4
8
7
6
5
Vꢀ
LOW POWER
750 ꢁA Supply Current
Available in 8-Lead Plastic Mini-DlP, Hermetic Cerdip
and Surface Mount (SOIC) Packages
Available in Tape and Reel in Accordance with
EIA-481A Standard
OUTPUT
–IN
ꢀIN
V–
ꢀIN
TOP VIEW
Quad Version: AD704
APPLICATIONS
Low Frequency Active Filters
Precision Instrumentation
Precision Integrators
P RO D UCT D ESCRIP TIO N
P RO D UCT H IGH LIGH TS
T he AD706 is a dual, low power, bipolar op amp that has the
low input bias current of a BiFET amplifier, but which offers a
significantly lower IB drift over temperature. It utilizes superbeta
bipolar input transistors to achieve picoampere input bias cur-
rent levels (similar to FET input amplifiers at room tempera-
ture), while its IB typically only increases by 5¥ at 125∞C (unlike
a BiFET amp, for which IB doubles every 10∞C for a 1000¥
increase at 125∞C). T he AD706 also achieves the microvolt
offset voltage and low noise characteristics of a precision bipolar
input amplifier.
1. T he AD706 is a dual low drift op amp that offers BiFET
level input bias currents, yet has the low IB drift of a bipolar
amplifier. It may be used in circuits using dual op amps such
as the LT 1024.
2. T he AD706 provides both low drift and high dc precision.
3. T he AD706 can be used in applications where a chopper
amplifier would normally be required but without the
chopper’s inherent noise.
100
Since it has only 1/20 the input bias current of an OP07, the
AD706 does not require the commonly used “balancing” resis-
tor. Furthermore, the current noise is 1/5 that of the OP07,
which makes this amplifier usable with much higher source
impedances. At 1/6 the supply current (per amplifier) of the
OP07, the AD706 is better suited for today’s higher density
boards.
10
TYPICAL JFET AMP
1
T he AD706 is an excellent choice for use in low frequency
active filters in 12- and 14-bit data acquisition systems, in preci-
sion instrumentation and as a high quality integrator. T he
AD706 is internally compensated for unity gain and is available
in five performance grades. T he AD706J and AD706K are rated
over the commercial temperature range of 0∞C to +70∞C.
0.1
AD706
0.01
–55
+25
+110
+125
T he AD706 is offered in two varieties of an 8-lead package:
plastic mini-DIP and surface mount (SOIC). “J” grade chips are
also available.
TEMPERATURE – ꢂC
Figure 1. Input Bias Current vs. Temperature
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2002
(@ TA = +25ꢀC, VCM = 0 V and ꢁ15 V dc, unless otherwise noted)
AD706–SPECIFICATIONS
AD706J
Typ
AD706K
Typ
Parameter
Conditions
Min
Max
Min
Max
Units
INPUT OFFSET VOLTAGE
Initial Offset
Offset
vs. Temp, Average TC
vs. Supply (PSRR)
TMIN to TMAX
30
40
0.2
132
126
0.3
100
150
1.5
10
25
0.2
132
126
0.3
50
100
0.6
mV
mV
mV/∞C
dB
dB
TMIN to TMAX
V
S = ±2 V to ±18 V
110
106
112
108
VS = ±2.5 V to ±18 V
Long Term Stability
mV/Month
INPUT BIAS CURRENT1
VCM = 0 V
VCM = ±13.5 V
50
200
250
30
110
160
pA
pA
vs. Temp, Average TC
TMIN to TMAX
TMIN to TMAX
0.3
0.2
pA/∞C
pA
pA
VCM = 0 V
VCM = ±13.5 V
300
400
200
300
INPUT OFFSET CURRENT
VCM = 0 V
VCM = ±13.5 V
30
150
250
30
100
200
pA
pA
vs. Temp, Average TC
TMIN to TMAX
TMIN to TMAX
0.6
80
80
0.4
80
80
pA/∞C
pA
pA
VCM = 0 V
VCM = ±13.5 V
250
350
200
300
MATCHING CHARACTERISTICS
Offset Voltage
150
250
300
500
75
mV
mV
pA
pA
dB
dB
dB
dB
T
T
MIN to TMAX
MIN to TMAX
150
150
250
Input Bias Current2
Common-Mode Rejection
Power Supply Rejection
106
106
106
104
110
108
110
106
TMIN to TMAX
MIN to TMAX
T
Crosstalk
@ f = 10 Hz
(Figure 19a)
RL = 2 kW
150
150
dB
FREQUENCY RESPONSE
Unity Gain Crossover
Frequency
0.8
0.15
0.15
0.8
0.15
0.15
MHz
V/ms
V/ms
Slew Rate
G = –1
TMIN to TMAX
INPUT IMPEDANCE
Differential
Common Mode
40ʈ2
300ʈ2
40ʈ2
300ʈ2
MWʈpF
GWʈpF
INPUT VOLTAGE RANGE
Common-Mode Voltage
Common-Mode Rejection
Ratio
±13.5
±14
±13.5
±14
V
V
CM = ±13.5 V
110
108
132
128
114
108
132
128
dB
dB
TMIN to TMAX
INPUT CURRENT NOISE
INPUT VOLTAGE NOISE
0.1 Hz to 10 Hz
f = 10 Hz
3
50
3
50
pA p-p
fA/÷Hz
0.1 Hz to 10 Hz
f = 10 Hz
f = 1 kHz
0.5
17
15
0.5
17
15
1.0
22
mV p-p
nV/÷Hz
nV/÷Hz
22
OPEN-LOOP GAIN
VO = ±12 V
RLOAD = 10 kW
TMIN to TMAX
VO = ±10 V
RLOAD = 2 kW
TMIN to TMAX
200
150
2000
1500
400
300
2000
1500
V/mV
V/mV
200
150
1000
1000
300
200
1000
1000
V/mV
V/mV
OUTPUT CHARACTERISTICS
Voltage Swing
RLOAD = 10 kW
TMIN to TMAX
Short Circuit
±13
±13
±14
±14
±15
±13
±13
±14
±14
±15
V
V
mA
Current
Capacitive Load
Drive Capability
Gain = +1
10,000
10,000
pF
REV. D
–2–
AD706
AD706J
Typ
AD706K
Typ
Parameter
Conditions
Min
Max
Min
Max
Units
POWER SUPPLY
Rated Performance
Operating Range
±15
±15
V
V
mA
mA
±2.0
±18
1.2
1.4
±2.0
±18
1.2
1.4
Quiescent Current, Total
0.75
0.8
0.75
0.8
TMIN to TMAX
TRANSISTOR COUNT
NOTES
# of Transistors
90
90
lBias current specifications are guaranteed maximum at either input.
2Input bias current match is the difference between corresponding inputs (IB of –IN of Amplifier #1 minus IB of –IN of Amplifier #2).
DVOS #1
DVOS #2
CMRR match is the difference between
for amplifier #1 and
for amplifier #l and
for amplifier #2 expressed in dB.
for amplifier #2 expressed in dB.
DV
DV
CM
CM
DVOS #1
DVSUPPLY
DVOS #2
DVSUPPLY
PSRR match is the difference between
All min and max specifications are guaranteed.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGSl
ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Temperature
Range
Package
Description Option*
Internal Power Dissipation
(Total: Both Amplifiers)2 . . . . . . . . . . . . . . . . . . . . 650 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . +0.7 Volts
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (N, R) . . . . . . . –65∞C to +125∞C
Operating Temperature Range
Model
AD706JN
AD706KN
AD706JR
0∞C to +70∞C
0∞C to +70∞C
0∞C to +70∞C
Plastic DIP
Plastic DIP
SOIC
N-8
N-8
RN-8
AD706JR-REEL 0∞C to +70∞C
–40∞C to +85∞C SOIC
AD706AR-REEL –40∞C to +85∞C Tape and Reel
Tape and Reel
AD706AR
RN-8
AD706J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0∞C to +70∞C
Lead Temperature (Soldering 10 secs) . . . . . . . . . . . . +300∞C
*N = Plastic DIP; RN = SOIC Package.
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air:
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
8-Lead Plastic Package: qJA = 100∞C/Watt
8-Lead Small Outline Package: qJA = 155∞C/Watt
3The input pins of this amplifier are protected by back-to-back diodes. If the
differential voltage exceeds ±0.7 volts, external series protection resistors should
be added to limit the input current to less than 25 mA.
1
OUTPUT A
+V
8
S
2
–INPUT A
+INPUT A
OUTPUT B
7
3
6
5
–INPUT B
+INPUT B
–V
S
4
0.074 (1.88)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD706 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. D
–3–
AD706–Typical Performace Characteristics(@ +25ꢀC, V = ꢁ15 V, unless otherwise noted)
S
1000
800
600
400
200
0
1000
800
600
400
200
0
1000
800
600
400
200
0
SAMPLE
SAMPLE SIZE: 2400
SAMPLE
SIZE: 3000
SIZE: 5100
–80
–40
0
40
80
–160
–80
0
80
160
–120
–60
0
60
120
INPUT OFFSET VOLTAGE – ꢂV
INPUT BIAS CURRENT – pA
INPUT OFFSET CURRENT – pA
Figure 2. Typical Distribution of Input
Offset Voltage
Figure 3. Typical Distribution of
Input Bias Current
Figure 4. Typical Distribution of
Input Offset Current
ꢃV
35
30
25
20
15
10
5
100
S
–0.5
–1.0
–1.5
SOURCE RESISTANCE
MAY BE EITHER BALANCED
OR UNBALANCED
10
FOR INDUSTRIAL
TEMPERATURE
RANGE
ꢃ1.5
ꢃ1.0
ꢃ0.5
1.0
–V
S
0
0.1
1k
10k
100k
1M
0
5
10
15
20
1k
10k
100k
1M
10M
100M
FREQUENCY – Hz
SOURCE RESISTANCE – ꢄ
SUPPLY VOLTAGE – ꢁVolts
Figure 5. Input Common-Mode
Voltage Range vs. Supply Voltage
Figure 6. Large Signal Frequency
Response
Figure 7. Offset Voltage Drift vs.
Source Resistance
4
3
60
200
SAMPLE SIZE: 375
–55ꢀC TO ꢃ125ꢀC
40
160
120
80
40
0
POSITIVE I
20
B
0
2
1
0
–20
NEGATIVE I
B
–40
–60
0
1
2
3
4
5
–15 –10
–5
0
5
10
15
–0.8
–0.4
0
0.4
0.8
OFFSET VOLTAGE DRIFT – ꢂV/ꢀC
WARM-UP TIME – Minutes
COMMON-MODE VOLTAGE – Volts
Figure 8. Typical Distribution of
Offset Voltage Drift
Figure 9. Change in Input Offset
Voltage vs. Warm-Up Time
Figure 10. Input Bias Current vs.
Common-Mode Voltage
REV. D
–4–
AD706
1000
100
10
1000
100
10
0.5ꢂV
100ꢄ
10kꢄ
20Mꢄ
VOUT
1
1
5
0
10
1
10
100
1000
1
10
100
1000
TIME – Seconds
FREQUENCY – Hz
FREQUENCY – Hz
Figure 11. Input Noise Voltage
Spectral Density
Figure 12. Input Noise Current
Spectral Density
Figure 13. 0.1 Hz to 10 Hz Noise
Voltage
1000
900
+160
+140
+120
+100
+80
+60
+40
+20
0
180
160
140
120
100
800
+125ꢀC
– PSRR
80
+25ꢀC
+ PSRR
60
40
20
700
–55ꢀC
600
0
5
10
15
20
0.1
1
10
100 1k
10k 100k 1M
0.1
1
10
100 1k
10k 100k 1M
SUPPLY VOLTAGE – ꢁ Volts
FREQUENCY – Hz
FREQUENCY – Hz
Figure 14. Quiescent Supply Current
vs. Supply Voltage
Figure 15. Common-Mode Rejection
Ratio vs. Frequency
Figure 16. Power Supply Rejection
Ratio vs. Frequency
0
140
120
100
80
10M
+V
S
30
–0.5
–1.0
–1.5
–55ꢀC
60
+25ꢀC
PHASE
90
+125ꢀC
60
120
150
180
210
240
1M
40
+1.5
+1.0
+0.5
GAIN
20
0
–V
S
–20
100k
1
2
4
6
8 10
100
0.01 0.1
1
10 100 1k 10k 100k 1M 10M
FREQUENCY – Hz
0
5
10
15
20
LOAD RESISTANCE – kꢄ
SUPPLY VOLTAGE – ꢁ Volts
Figure 18. Open-Loop Gain and
Phase Shift vs. Frequency
Figure 17. Open-Loop Gain vs. Load
Resistance vs. Load Resistance
Figure 19. Output Voltage Swing vs.
Supply Voltage
REV. D
–5–
AD706
–80
1000
100
10
–100
–120
–140
–160
AV = –1000
1
AV = + 1
0.1
0.01
I
= +1mA
100
OUT
0.001
10
100
1k
10k
100k
1
10
1k
10k
100k
FREQUENCY – Hz
FREQUENCY – Hz
Figure 20a. Crosstalk vs. Frequency
Figure 21. Magnitude of Closed-Loop Output Impedance
vs. Frequency
+V 0.1ꢂF
S
R
F
+V
S
2
3
V
#1
OUT
1/2
1
0.1ꢂF
AD706
20V p-p
4
8
0.1ꢂF
V
OUT
R
1/2
L
2kꢄ
SINE WAVE
AD706
4
GENERATOR
V
IN
R
–V
L
S
C
L
2kꢄ
0.1ꢂF
20kꢄ
SQUARE
WAVE
–V
S
INPUT
+V
S
Figure 22a. Unity Gain Follower (For Large Signal
Applications, Resistor RF Limits the Current
Through the Input Protection Diodes)
1ꢂF
0.1ꢂF
2.21kꢄ
8
6
5
V
#2
OUT
1/2
AD706
7
V
V
#2
#1
OUT
OUT
CROSSTALK = 20 LOG
10
–20dB
Figure 20b. Crosstalk Test Circuit
Figure 22b. Unity Gain Follower
Large Signal Pulse Response, RF =
10 kW, CL = 1,000 pF
Figure 22d. Unity Gain Follower
Small Signal Pulse Response, RF =
0 W, CL = 1000 pF
Figure 22c. Unity Gain Follower
Small Signal Pulse Response, RF =
0 W, CL = 100 pF
–6–
REV. D
AD706
10kꢄ
+V
S
+
0.1ꢂF
10kꢄ
V
–
IN
8
V
OUT
1/2
AD706
R
4
L
+
C
L
2.5kꢄ
SQUARE
WAVE
0.1µF
INPUT
–V
S
Figure 23a. Unity Gain Inverter Connection
Figure 23b. Unity Gain Inverter Large
Signal Pulse Response, CL = 1,000 pF
Figure 23c. Unity Gain Inverter Small
Signal Pulse Response, CL = 100 pF
Figure 23d. Unity Gain Inverter Small
Signal Pulse Response, CL = 1000 pF
Figure 24 shows an in-amp circuit that has the obvious advan-
tage of requiring only one AD706, rather than three op amps,
with subsequent savings in cost and power consumption. The
transfer function of this circuit (without RG) is:
increases with gain, once initial trimming is accomplished—but
CMR is still dependent upon the ratio matching of Resistors R1
through R4. Resistor values for this circuit, using the optional
gain resistor, RG, can be calculated using:
Ê
ˆ
R
4
R1= R4 = 49.9kW
VOUT = (VIN#1 - VIN#2 ) 1+
Á
˜
R3
49.9kW
0.9G -1
Ë
¯
R2 = R3 =
for R1 = R4 and R2 = R3
99.8kW
0.06 G
Input resistance is high, thus permitting the signal source to
have an unbalanced output impedance.
RG =
where G = Desired Circuit Gain
R
(OPTIONAL)
R3
G
Table I provides practical 1% resistance values. (Note that
without resistor RG, R2 and R3 = 49.9 kW/G–1.)
R1
R2
R4
49.9kꢄ
49.9kꢄ
+V
S
Table I. Operating Gains of Amplifiers A1 and A2 and
Practical 1% Resistor Values for the Circuit of Figure 24
0.1ꢂF
1/2
8
2
3
–
+
AD706
1
5
6
–
A1
1/2
R *
Circuit Gain Gain of A1 Gain of A2 R2, R3
R1, R4
P
A2
7
V
IN#1 1kꢄ
OUTPUT
0.1ꢂF
1.10
1.33
1.50
2.00
10.1
101.0
1001
11.00
4.01
3.00
2.00
1.11
1.01
1.001
1.10
1.33
1.50
499 kW
150 kW
100 kW
49.9 kW
49.9 kW
49.9 kW
+
4
AD706
R *
P
–V
V
1kꢄ
S
IN#2
R4
R3
2R4
)
2.00
49.9 kW 49.9 kW
5.49 kW 49.9 kW
V
= (V
– V
IN#1
) (1+
IN#2
) + (
OUT
FOR R1 = R4, R2 = R3
R
G
10.10
101.0
1001
499 W
49.9 W
49.9 kW
49.9 kW
*OPTIONAL INPUT PROTECTION RESISTOR FOR GAINS GREATER
THAN 100 OR INPUT VOLTAGES EXCEEDING THE SUPPLY VOLTAGE.
Figure 24. A Two Op-Amp Instrumentation Amplifier
For a much more comprehensive discussion of in-amp applica-
tions, refer to the Instrumentation Amplifier Applications Guide—
available free from Analog Devices, Inc.
Furthermore, the circuit gain may be fine trimmed using an
optional trim resistor, RG. Like the three op-amp circuit, CMR
REV. D
–7–
AD706
C1
+
+V
S
C3
R1
R2
0.1ꢂF
1Mꢄ
1Mꢄ
R3
R4
3
2
INPUT
1Mꢄ
1Mꢄ
1/2
8
1/2
AD706
–
C2
1
5
6
AD706
7
–
4
C4
OUTPUT
*WITHOUT THE NETWORK,
PINS 1 & 2, AND 6 & 7 OF THE
AD706 ARE TIED TOGETHER.
0.1ꢂF
–V
S
CAPACITORS C1 & C2
R6
2Mꢄ
C6
R5
ARE SOUTHERN ELECTRONICS
C5
0.01ꢂF
2Mꢄ
0.01ꢂF
MPCC, POLYCARB ꢁ5%, 50 VOLT
OPTIONAL BALANCE
RESISTOR NETWORKS*
Figure 25. A 1 Hz, 4-Pole Active Filter
180
A 1 Hz, 4-Pole, Active Filter
Figure 25 shows the AD706 in an active filter application. An
important characteristic of the AD706 is that both the input bias
current, input offset current and their drift remain low over
most of the op amp’s rated temperature range. Therefore, for
most applications, there is no need to use the normal balancing
resistor. Adding the balancing resistor enhances performance at
high temperatures, as shown by Figure 26.
WITHOUT OPTIONAL
120
60
0
BALANCE RESISTOR, R3
WITH OPTIONAL BALANCE
RESISTOR, R3
–60
–120
–180
–40
0
+40
TEMPERATURE – ꢀC
+80
+120
Figure 26. VOS vs. Temperature Performance
of the 1 Hz Filter
Table II. 1 Hz, 4-Pole, Low Pass Filter Recommended Component Values
Section 1
Frequency
(Hz)
Section 2
Frequency
(Hz)
Desired Low
Pass Response
C1
(ꢂF)
C2
(ꢂF)
C3
(ꢂF)
C4
(ꢂF)
Q
Q
Bessel
Butterworth
0.1 dB Chebychev
0.2 dB Chebychev
0.5 dB Chebychev
1.0 dB Chebychev
1.43
1.00
0.648
0.603
0.540
0.492
0.522
0.541
0.619
0.646
0.705
0.785
1.60
1.00
0.948
0.941
0.932
0.925
0.806
1.31
2.18
2.44
2.94
3.56
0.116 0.107 0.160
0.172 0.147 0.416
0.304 0.198 0.733
0.341 0.204 0.823
0.416 0.209 1.00
0.508 0.206 1.23
0.0616
0.0609
0.0385
0.0347
0.0290
0.0242
NOTE
Specified Values are for a –3 dB point of 1.0 Hz. For other frequencies simply scale capacitors C1 through C4 directly, i.e.: for 3 Hz
Bessel response, C1 = 0.0387 mF, C2 = 0.0357 mF, C3 = 0.0533 mF, C4 = 0.0205 mF.
–8–
REV. D
AD706
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
8-Lead Plastic Dual-in-Line Package [PDIP]
Narrow Body
(RN-8)
(N-8)
Dimensions shown in inches and (millimeters).
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
8
1
5
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
4
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
ꢅ 45ꢀ
0.100 (2.54)
BSC
1.75 (0.0688)
1.35 (0.0532)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.25 (0.0098)
0.015
(0.38)
MIN
0.10 (0.0040)
0.180
(4.57)
MAX
8ꢀ
0.51 (0.0201)
0.33 (0.0130)
0ꢀ 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.19 (0.0075)
SEATING
PLANE
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.41 (0.0160)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES)
REV. D
–9–
AD706
Revision History
Location
Page
10/02–Data Sheet changed from REV. C to REV. D
Deleted 8-Lead CerDIP (Q-8) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
–10–
REV. D
–11–
–12–
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