AD8031AR-EBZ [ADI]
2.7 V, 800 muA, 80 MHz Rail-to-Rail I/O Amplifiers; 2.7 V , 800 MUA , 80 MHz轨到轨输入/输出放大器型号: | AD8031AR-EBZ |
厂家: | ADI |
描述: | 2.7 V, 800 muA, 80 MHz Rail-to-Rail I/O Amplifiers |
文件: | 总21页 (文件大小:635K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
2.7 V, 800 µA, 80 MHz
Rail-to-Rail I/O Amplifiers
Data Sheet
AD8031/AD8032
FEATURES
CONNECTION DIAGRAMS
Low power
NC
–IN
+IN
1
2
3
4
AD8032
– +
8
7
6
5
NC
+V
OUT1
–IN1
+IN1
1
2
3
4
8
7
6
5
+V
S
–
+
Supply current 800 µA/amplifier
Fully specified at +2.7 V, +5 V, and 5 V supplies
High speed and fast settling on 5 V
80 MHz, −3 dB bandwidth (G = +1)
30 V/µs slew rate
OUT2
–IN2
+IN2
S
OUT
NC
+ –
–V
S
AD8031
–V
S
NC = NO CONNECT
Figure 1. 8-Lead PDIP (N) and
SOIC_N (R)
Figure 2. 8-Lead PDIP (N),
SOIC_N (R), and MSOP (RM)
125 ns settling time to 0.1%
Rail-to-rail input and output
No phase reversal with input 0.5 V beyond supplies
Input CMVR extends beyond rails by 200 mV
Output swing to within 20 mV of either rail
Low distortion
AD8031
V
1
2
3
5
4
+V
S
OUT
–V
S
–
+
+IN
–IN
Figure 3. 5-Lead SOT-23 (RJ-5)
−62 dB @ 1 MHz, VO = 2 V p-p
−86 dB @ 100 kHz, VO = 4.6 V p-p
Output current: 15 mA
High grade option: VOS (maximum) = 1.5 mV
Operating on supplies from +2.7 V to +12 V and dual supplies
up to 6 V, the AD8031/AD8032 are ideal for a wide range of
applications, from battery-operated systems with large bandwidth
requirements to high speed systems where component density
requires lower power dissipation. The AD8031/AD8032 are
available in 8-lead PDIP and 8-lead SOIC_N packages and
operate over the industrial temperature range of −40°C to
+85°C. The AD8031A is also available in the space-saving
5-lead SOT-23 package, and the AD8032A is available in an
8-lead MSOP package.
APPLICATIONS
High speed, battery-operated systems
High component density systems
Portable test instruments
A/D buffers
Active filters
High speed, set-and-demand amplifiers
V
= 4.85V p-p
V
= 4.65V p-p
IN
OUT
G = +1
GENERAL DESCRIPTION
The AD8031 (single) and AD8032 (dual) single-supply, voltage
feedback amplifiers feature high speed performance with
80 MHz of small signal bandwidth, 30 V/µs slew rate, and 125 ns
settling time. This performance is possible while consuming less
than 4.0 mW of power from a single 5 V supply. These features
increase the operation time of high speed, battery-powered
systems without compromising dynamic performance.
2µs/DIV
2µs/DIV
Figure 4. Input VIN
Figure 5. Output VOUT
+5V
The products have true single-supply capability with rail-to-rail
input and output characteristics and are specified for +2.7 V, +5 V,
and 5 V supplies. The input voltage range can extend to 500 mV
beyond each rail. The output voltage swings to within 20 mV of
each rail providing the maximum output dynamic range.
–
+
V
OUT
V
IN
1kΩ
1.7pF
+2.5V
Figure 6. Rail-to-Rail Performance at 100 kHz
The AD8031/AD8032 also offer excellent signal quality for only
800 µA of supply current per amplifier; THD is −62 dBc with a
2 V p-p, 1 MHz output signal, and –86 dBc for a 100 kHz,
4.6 V p-p signal on +5 V supply. The low distortion and fast
settling time make them ideal as buffers to single-supply ADCs.
Rev. F
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IMPORTANT LINKS for the AD8031_8032*
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DOCUMENTATION
PARAMETRIC SELECTION TABLES
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EVALUATION KITS & SYMBOLS & FOOTPRINTS
View the Evaluation Boards and Kits page for the AD8031
View the Evaluation Boards and Kits page for the AD8032
Symbols and Footprints for the AD8031
MT-059: Compensating for the Effects of Input Capacitance on VFB
and CFB Op Amps Used in Current-to-Voltage Converters
MT-058: Effects of Feedback Capacitance on VFB and CFB Op Amps
MT-056: High Speed Voltage Feedback Op Amps
Symbols and Footprints for the AD8032
MT-053: Op Amp Distortion: HD, THD, THD + N, IMD, SFDR, MTPR
MT-052: Op Amp Noise Figure: Don’t Be Mislead
MT-050: Op Amp Total Output Noise Calculations for Second-Order
System
DESIGN SUPPORT
A Stress-Free Method for Choosing High-Speed Op Amps
View the AD8031 Product Page for more documentation
FOR THE AD8031
Submit your support request here:
Linear and Data Converters
Embedded Processing and DSP
Telephone our Customer Interaction Centers toll free:
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CN0247: 12-Bit ,1 MSPS SAR ADC and Driver with Total Power
Dissipation Less than 5 mW
Quality and Reliability
Lead(Pb)-Free Data
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UG-127: Universal Evaluation Board for High Speed Op Amps in
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AD8032
FOR THE AD8032
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AD8031/AD8032
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation ...................................................................... 13
Input Stage Operation................................................................ 13
Overdriving the Input Stage...................................................... 13
Applications....................................................................................... 1
General Description ......................................................................... 1
Connection Diagrams...................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
+2.7 V Supply................................................................................ 3
+5 V Supply ................................................................................... 4
5 V Supply ................................................................................... 5
Absolute Maximum Ratings............................................................ 6
Maximum Power Dissipation ..................................................... 6
ESD Caution.................................................................................. 6
Typical Performance Characteristics ............................................. 7
Output Stage, Open-Loop Gain and Distortion vs. Clearance
from Power Supply..................................................................... 14
Output Overdrive Recovery...................................................... 14
Driving Capacitive Loads.......................................................... 15
Applications..................................................................................... 16
A 2 MHz Single-Supply, Biquad Band-Pass Filter ................. 16
High Performance, Single-Supply Line Driver........................... 16
Outline Dimensions....................................................................... 18
Ordering Guide .......................................................................... 20
REVISION HISTORY
8/13—Rev. E to Rev. F
Changed Input Current Noise at f = 100 kHz from 2.4 pA/√Hz
to 0.4 pA/√Hz (Throughout) .......................................................... 3
6/13—Rev. D to Rev. E
Changes to DC Performance Parameter, Table 1 ......................... 3
Updated Outline Dimensions....................................................... 19
Changes to Ordering Guide .......................................................... 20
11/08—Rev. C to Rev. D
Change to Table 3 Column Heading.............................................. 5
Change to Ordering Guide............................................................ 20
7/06—Rev. B to Rev. C
Updated Format..................................................................Universal
Updated Outline Dimensions....................................................... 18
Change to Ordering Guide............................................................ 20
9/99—Rev. A to Rev. B
Rev. F | Page 2 of 20
Data Sheet
AD8031/AD8032
SPECIFICATIONS
+2.7 V SUPPLY
@ TA = 25°C, VS = 2.7 V, RL = 1 kΩ to 1.35 V, RF = 2.5 kΩ, unless otherwise noted.
Table 1.
AD8031A/AD8032A
AD8031B/AD8032B
Parameter
Conditions
Min Typ
Max
Min Typ
Max
Unit
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth
Slew Rate
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
G = +1, VO < 0.4 V p-p
G = −1, VO = 2 V step
G = −1, VO = 2 V step, CL = 10 pF
54
25
80
30
125
54
25
80
30
125
MHz
V/µs
ns
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 100 kHz, VO = 2 V p-p, G = +2
f = 1 kHz
f = 100 kHz
f = 1 kHz
−62
−86
15
0.4
5
−62
−86
15
0.4
5
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
dB
Input Voltage Noise
Input Current Noise
Crosstalk (AD8032 Only)
DC PERFORMANCE
f = 5 MHz
−60
−60
Input Offset Voltage
VCM = VCC/2; VOUT = 1.35 V
TMIN to TMAX
VCM = VCC/2; VOUT = 1.35 V
VCM = VCC/2; VOUT = 1.35 V
TMIN to TMAX
1
6
10
0.45
6
10
0.5
1.6
10
1.5
2.5
mV
mV
µV/°C
µA
µA
nA
Offset Drift
Input Bias Current
2
0.45
2
2.2
500
2.2
500
Input Offset Current
Open-Loop Gain
50
80
50
80
VCM = VCC/2; VOUT = 0.35 V to 2.35 V
TMIN to TMAX
76
74
76
74
dB
dB
INPUT CHARACTERISTICS
Common-Mode Input Resistance
Differential Input Resistance
Input Capacitance
40
280
1.6
−0.5 to
+3.2
40
280
1.6
−0.5 to
+3.2
MΩ
kΩ
pF
V
Input Voltage Range
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
−0.2 to
+2.9
64
74
−0.2 to
+2.9
64
74
V
VCM = 0 V to 2.7 V
VCM = 0 V to 1.55 V
46
58
46
58
dB
dB
V
Differential Input Voltage
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
Output Voltage Swing High
Output Voltage Swing Low
Output Voltage Swing High
Output Current
3.4
3.4
RL = 10 kΩ
RL = 1 kΩ
0.05 0.02
2.6 2.68
0.15 0.08
0.05 0.02
2.6 2.68
0.15 0.08
V
V
V
V
mA
mA
mA
pF
2.55 2.6
2.55 2.6
15
21
−34
15
15
21
−34
15
Short Circuit Current
Sourcing
Sinking
G = +2 (See Figure 46)
Capacitive Load Drive
POWER SUPPLY
Operating Range
2.7
12
2.7
12
V
Quiescent Current per Amplifier
Power Supply Rejection Ratio
750
86
1250
750
86
1250 μA
dB
VS− = 0 V to −1 V or
75
75
VS+ = +2.7 V to +3.7 V
Rev. F | Page 3 of 20
AD8031/AD8032
Data Sheet
+5 V SUPPLY
@ TA = 25°C, VS = 5 V, RL = 1 kΩ to 2.5 V, RF = 2.5 kΩ, unless otherwise noted.
Table 2.
AD8031A/AD8032A
AD8031B/AD8032B
Parameter
Conditions
Min Typ
Max
Min Typ
Max
Unit
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Slew Rate
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
G = +1, VO < 0.4 V p-p
G = −1, VO = 2 V step
G = −1, VO = 2 V step, CL = 10 pF
54
27
80
32
125
54
27
80
32
125
MHz
V/µs
ns
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 100 kHz, VO = 2 V p-p, G = +2
f = 1 kHz
f = 100 kHz
f = 1 kHz
RL = 1 kΩ
RL = 1 kΩ
f = 5 MHz
−62
−86
15
0.4
5
0.17
0.11
−60
−62
−86
15
0.4
5
0.17
0.11
−60
dBc
dBc
Input Voltage Noise
Input Current Noise
nV/√Hz
pA/√Hz
pA/√Hz
%
Degrees
dB
Differential Gain
Differential Phase
Crosstalk (AD8032 Only)
DC PERFORMANCE
Input Offset Voltage
VCM = VCC/2; VOUT = 2.5 V
TMIN to TMAX
VCM = VCC/2; VOUT = 2.5 V
VCM = VCC/2; VOUT = 2.5 V
TMIN to TMAX
1
6
5
0.45
6
10
0.5
1.6
5
1.5
2.5
mV
mV
µV/°C
µA
µA
nA
Offset Drift
Input Bias Current
1.2
2.0
350
0.45
1.2
2.0
250
Input Offset Current
Open-Loop Gain
50
82
50
82
VCM = VCC/2; VOUT = 1.5 V to 3.5 V
TMIN to TMAX
76
74
76
74
dB
dB
INPUT CHARACTERISTICS
Common-Mode Input Resistance
Differential Input Resistance
Input Capacitance
40
280
1.6
−0.5 to
+5.5
40
280
1.6
−0.5 to
+5.5
MΩ
kΩ
pF
V
Input Voltage Range
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
−0.2 to
+5.2
70
80
−0.2 to
+5.2
70
80
V
VCM = 0 V to 5 V
VCM = 0 V to 3.8 V
56
66
56
66
dB
dB
V
Differential Input Voltage
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
Output Voltage Swing High
Output Voltage Swing Low
Output Voltage Swing High
Output Current
3.4
3.4
RL = 10 kΩ
RL = 1 kΩ
0.05 0.02
4.95 4.98
0.05 0.02
4.95 4.98
V
V
V
V
mA
mA
mA
pF
0.2
4.8
0.1
4.9
15
28
−46
15
0.2
4.8
0.1
4.9
15
28
−46
15
Short Circuit Current
Sourcing
Sinking
G = +2 (See Figure 46)
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
2.7
75
12
1400
2.7
75
12
V
800
86
800
86
1400 µA
dB
VS− = 0 V to −1 V or
VS+ = +5 V to +6 V
Rev. F | Page 4 of 20
Data Sheet
AD8031/AD8032
5 V SUPPLY
@ TA = 25°C, VS = 5 V, RL = 1 kΩ to 0 V, RF = 2.5 kΩ, unless otherwise noted.
Table 3.
AD8031A/AD8032A
AD8031B/AD8032B
Parameter
Conditions
Min
Typ
Max Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Slew Rate
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
G = +1, VO < 0.4 V p-p
G = −1, VO = 2 V step
G = −1, VO = 2 V step, CL = 10 pF
54
30
80
35
125
54
30
80
35
125
MHz
V/µs
ns
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 100 kHz, VO = 2 V p-p, G = +2
f = 1 kHz
f = 100 kHz
f = 1 kHz
RL = 1 kΩ
RL = 1 kΩ
f = 5 MHz
−62
−86
15
0.4
5
0.15
0.15
−60
−62
−86
15
0.4
5
0.15
0.15
−60
dBc
dBc
Input Voltage Noise
Input Current Noise
nV/√Hz
pA/√Hz
pA/√Hz
%
Degrees
dB
Differential Gain
Differential Phase
Crosstalk (AD8032 Only)
DC PERFORMANCE
Input Offset Voltage
VCM = 0 V; VOUT = 0 V
TMIN to TMAX
VCM = 0 V; VOUT = 0 V
VCM = 0 V; VOUT = 0 V
TMIN to TMAX
1
6
5
0.45
6
10
0.5
1.6
5
1.5 mV
2.5 mV
µV/°C
Offset Drift
Input Bias Current
1.2
2.0
350
0.45
1.2
2.0
250
µA
µA
nA
dB
dB
Input Offset Current
Open-Loop Gain
50
80
50
80
VCM = 0 V; VOUT
TMIN to TMAX
=
2 V
76
74
76
74
INPUT CHARACTERISTICS
Common-Mode Input Resistance
Differential Input Resistance
Input Capacitance
40
280
1.6
−5.5 to
+5.5
40
280
1.6
−5.5 to
+5.5
MΩ
kΩ
pF
V
Input Voltage Range
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
−5.2 to
+5.2
80
90
−5.2 to
+5.2
80
90
V
VCM = −5 V to +5 V
VCM = −5 V to +3.5 V
60
66
60
66
dB
dB
V
Differential/Input Voltage
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
Output Voltage Swing High
Output Voltage Swing Low
Output Voltage Swing High
Output Current
3.4
3.4
RL = 10 kΩ
RL = 1 kΩ
−4.94 −4.98
+4.94 +4.98
−4.94 −4.98
+4.94 +4.98
V
V
V
V
mA
mA
mA
pF
−4.7
+4.7
−4.85
+4.75
15
35
−50
15
−4.7
+4.7
−4.85
+4.75
15
35
−50
15
Short Circuit Current
Sourcing
Sinking
G = +2 (See Figure 46)
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
1.35
76
6
1600
1.35
76
6
V
900
86
900
86
1600 µA
dB
VS− = −5 V to −6 V or
VS+ = +5 V to +6 V
Rev. F | Page 5 of 20
AD8031/AD8032
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
MAXIMUM POWER DISSIPATION
Rating
The maximum power that can be safely dissipated by the
AD8031/AD8032 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass
transition temperature of the plastic, approximately 150°C.
Exceeding this limit temporarily can cause a shift in parametric
performance due to a change in the stresses exerted on the die
by the package. Exceeding a junction temperature of 175°C for
an extended period can result in device failure.
Supply Voltage
12.6 V
Internal Power Dissipation1
8-Lead PDIP (N)
8-Lead SOIC_N (R)
8-Lead MSOP (RM)
5-Lead SOT-23 (RJ)
Input Voltage (Common Mode)
Differential Input Voltage
Output Short-Circuit Duration
1.3 W
0.8 W
0.6 W
0.5 W
VS 0.5 V
3.4 V
Observe Power
Derating Curves
−65°C to +125°C
300°C
While the AD8031/AD8032 are internally short-circuit
protected, this may not be sufficient to guarantee that the
maximum junction temperature (150°C) is not exceeded under
all conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves shown in Figure 7.
Storage Temperature Range (N, R, RM, RJ)
Lead Temperature (Soldering 10 sec)
1 Specification is for the device in free air:
8-Lead PDIP: θJA = 90°C/W.
8-Lead SOIC_N: θJA = 155°C/W.
8-Lead MSOP: θJA = 200°C/W.
5-Lead SOT-23: θJA = 240°C/W.
2.0
T
= +150°C
J
8-LEAD PDIP
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
1.5
1.0
8-LEAD SOIC
8-LEAD MSOP
0.5
0
5-LEAD SOT-23
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE (°C)
Figure 7. Maximum Power Dissipation vs. Temperature
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. F | Page 6 of 20
Data Sheet
AD8031/AD8032
TYPICAL PERFORMANCE CHARACTERISTICS
90
800
600
400
200
0
80
N = 250
70
60
50
40
30
20
10
0
V
= 10V
S
V
= 2.7V
V = 5V
S
S
–200
–400
–600
–800
0
1
2
3
4
5
6
7
8
9
10
–5
–4
–3
–2
–1
0
1
2
3
4
5
COMMON-MODE VOLTAGE (V)
V
(mV)
OS
Figure 8. Typical VOS Distribution @ VS = 5 V
Figure 11. Input Bias Current vs. Common-Mode Voltage
2.5
2.3
2.1
1.9
1.7
1.5
0
V
= 5V
S
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
V
= +5V
S
V
= ±5V
S
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
COMMON-MODE VOLTAGE (V)
Figure 9. Input Offset Voltage vs. Temperature
Figure 12. VOS vs. Common-Mode Voltage
1.00
0.95
0.90
1000
±I , V = ±5V
S
S
950
900
850
800
V
= 5V
S
0.85
0.80
+I , V = +5V
S
S
0.75
0.70
0.65
750
700
650
600
+I , V = +2.7V
S
S
0.60
0.55
0.50
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
Figure 13. Supply Current vs. Temperature
Figure 10. Input Bias Current vs. Temperature
Rev. F | Page 7 of 20
AD8031/AD8032
Data Sheet
0
1.2
1.0
0.8
0.6
0.4
V
= 2.7V
CC
V
V
CC
EE
–0.5
–1.0
–1.5
V
= 10V
V
CC
OUT
V
IN
R
LOAD
V
= 5V
CC
V
CC
2
V
V
CC
EE
V
= 5V
CC
V
V
= 10V
OUT
CC
V
IN
R
LOAD
–2.0
–2.5
0.2
0
V
CC
V
= 2.7V
CC
2
100
1k
10k
100
1k
10k
R
(Ω)
LOAD
R
(Ω)
LOAD
Figure 14. +Output Saturation Voltage vs. RLOAD @ +85°C
Figure 17. −Output Saturation Voltage vs. RLOAD @ +85°C
0
1.2
V
= 2.7V
CC
V
V
CC
EE
1.0
0.8
0.6
0.4
–0.5
–1.0
–1.5
V
V
= 10V
OUT
CC
V
IN
R
LOAD
V
= 5V
CC
V
CC
2
V
V
CC
EE
V
CC
= 5V
V
V
= 10V
OUT
CC
V
IN
R
LOAD
–2.0
–2.5
0.2
0
V
CC
V
= 2.7V
CC
2
100
1k
10k
100
1k
10k
R
(Ω)
LOAD
R
(Ω)
LOAD
Figure 18. −Output Saturation Voltage vs. RLOAD @ +25°C
Figure 15. +Output Saturation Voltage vs. RLOAD @ +25°C
1.2
0
V
= 2.7V
CC
V
V
CC
EE
1.0
0.8
0.6
0.4
–0.5
–1.0
–1.5
V
V
= 10V
OUT
CC
V
IN
R
LOAD
V
= 5V
CC
V
CC
2
V
V
CC
V
= 5V
CC
V
V
= 10V
OUT
CC
V
IN
R
LOAD
–2.0
–2.5
0.2
0
EE
V
CC
V
= 2.7V
CC
2
100
1k
10k
100
1k
10k
R
(Ω)
LOAD
R
(Ω)
LOAD
Figure 16. +Output Saturation Voltage vs. RLOAD @ −40°C
Figure 19. −Output Saturation Voltage vs. RLOAD @ −40°C
Rev. F | Page 8 of 20
Data Sheet
AD8031/AD8032
110
105
100
95
V
= 5V
S
500mV
1V
100
90
–A
OL
10
0
90
+A
OL
85
80
V
= 5V
S
75
10
–10
0%
70
65
500mV
2.5
60
0
2k
4k
6k
(Ω)
8k
10k
–1.5
0.5
4.5
6.5
R
LOAD
INPUT VOLTAGE (V)
Figure 20. Open-Loop Gain (AOL) vs. RLOAD
Figure 23. Differential Input Overvoltage I-V Characteristics
86
84
82
80
0.05
0
V
R
= 5V
= 1kΩ
S
L
–0.05
–0.10
–A
OL
–0.15
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
+A
0.10
0.05
OL
0
78
76
–0.05
–0.10
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
Figure 21. Open Loop Gain vs. (AOL) Temperature
Figure 24. Differential Gain and Phase @ VS = 5 V; RL = 1 kΩ
110
100
90
100
30
10
3
V
= 5V
S
V
= 5V
R
= 10kΩ
S
LOAD
100
10
1
VOLTAGE NOISE
R
= 1kΩ
LOAD
80
70
60
50
CURRENT NOISE
1
0.1
0.3
10
100
1k
10k
100k
1M
10M
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
(V)
FREQUENCY (Hz)
V
OUT
Figure 25. Input Voltage Noise vs. Frequency
Figure 22. Open-Loop Gain (AOL) vs. VOUT
Rev. F | Page 9 of 20
AD8031/AD8032
Data Sheet
5
40
30
20
10
0
V
= 5V
4
3
S
G = +1
R
= 1kΩ
L
GAIN
2
1
0
–10
–20
–90
–135
–180
–225
–1
–2
–3
–4
PHASE
–5
0.3
1
10
FREQUENCY (MHz)
100
0.1
1
10
100
FREQUENCY (MHz)
Figure 29. Open-Loop Frequency Response
Figure 26. Unity Gain, −3 dB Bandwidth
–20
–30
–40
–50
–60
–70
–80
3
2
V
V
= 5V
S
= –16dBm
IN
+85°C
V
CC
2
G = +1, R = 2kΩ TO
1
L
0
–40°C
+25°C
1.3V p-p
= 2.7V
–1
–2
–3
–4
–5
V
2.5V p-p
= 2.7V
S
V
S
V
S
2V p-p
= 2.7V
2kΩ
V
S
V
OUT
V
IN
50Ω
4.8V p-p
= 5V
V
S
1k
10k
100k
1M
10M
0.1
1
10
100
FREQUENCY (MHz)
FUNDAMENTAL FREQUENCY (Hz)
Figure 27. Closed-Loop Gain vs. Temperature
Figure 30. Total Harmonic Distortion vs. Frequency; G = +1
2
1
–20
V
= +2.7V
S
V
R
= +5V
S
R
+ C TO 1.35V
L
L
–30
+ C
L
L
G = +2
TO 2.5V
0
V
= 5V
S
V
CC
2
–40
–50
–60
–70
–80
–90
–100
R
= 1kΩ TO
V
= ±5V
L
S
–1
–2
–3
–4
–5
–6
–7
–8
4.8V p-p
1V p-p
G = +1
C
R
= 5pF
= 1kΩ
L
L
4.6V p-p
4V p-p
100k
1M
10M
FREQUENCY (Hz)
100M
1k
10k
100k
1M
10M
FUNDAMENTAL FREQUENCY (Hz)
Figure 28. Closed-Loop Gain vs. Supply Voltage
Figure 31. Total Harmonic Distortion vs. Frequency; G +2
Rev. F | Page 10 of 20
Data Sheet
AD8031/AD8032
10
0
V
= ±5V
S
–20
–40
8
V
= 5V
S
6
V
V
= +5V
–60
S
4
–80
= +2.7V
S
–100
–120
2
0
1k
10k
100k
FREQUENCY (Hz)
1M
10M
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 32. Large Signal Response
Figure 35. PSRR vs. Frequency
V
= 5V
S
R
= 10kΩ TO 2.5V
= 6V p-p
L
RB = 50Ω
100
50
V
T
IN
5.5
G = +1
4.5
3.5
2.5
1.5
10
1
0.5
RB
T
0.1
V
–0.5
OUT
RB = 0Ω
T
0.1
1
10
100 200
FREQUENCY (MHz)
10µs/DIV
Figure 33. ROUT vs. Frequency
Figure 36. Output Voltage
0
–20
–40
–60
–80
V
= 5V
V
= 5V
S
S
INPUT
G = +1
INPUT = 650mV
BEYOND RAILS
5.5
4.5
3.5
2.5
1.5
0.5
–0.5
–100
100
1k
10k
100k
1M
10M
10µs/DIV
FREQUENCY (Hz)
Figure 37. Output Voltage Phase Reversal Behavior
Figure 34. CMRR vs. Frequency
Rev. F | Page 11 of 20
AD8031/AD8032
Data Sheet
G = +1
R
+2.5V
TO
L
R
R
C
= 0Ω
F
L
L
S
= 2kΩ TO 2.5V
= 5pF TO 2.5V
= 5V
2.56
2.54
2.52
2.50
2.48
2.46
2.44
V
V
R
= +5V
= 1kΩ
S
L
G = –1
R
TO GND
L
0
50ns/DIV
10µs/DIV
Figure 41. 100 mV Step Response
Figure 38. Output Swing
–50
–60
G = +2
R
R
C
= R = 2.5kΩ
F
L
L
S
G
= 2kΩ
= 5pF
= 5V
3.1
2.9
2.7
2.5
2.3
2.1
1.9
–70
V
V
V
= ±2.5V
S
–80
= +10dBm
IN
–90
–100
2.5kΩ 2.5kΩ
2.5kΩ
2.5kΩ
V
OUT
V
IN
1kΩ
50Ω
RECEIVER
50Ω
TRANSMITTER
1
0..11
1100
100 200
50ns/DIV
FREQUENCY (MHz)
Figure 39. 1 V Step Response
Figure 42. Crosstalk vs. Frequency
V
= 2.7V
S
R
= 1kΩ
L
G = –1
2.85
2.35
1.85
1.35
0.85
0.35
R
1.35V
TO
L
R
TO GND
L
10µs/DIV
Figure 40. Output Swing
Rev. F | Page 12 of 20
Data Sheet
AD8031/AD8032
THEORY OF OPERATION
The AD8031/AD8032 are single and dual versions of high
speed, low power, voltage feedback amplifiers featuring an
innovative architecture that maximizes the dynamic range
capability on the inputs and outputs. The linear input common-
mode range exceeds either supply voltage by 200 mV, and the
amplifiers show no phase reversal up to 500 mV beyond supply.
The output swings to within 20 mV of either supply when
driving a light load; 300 mV when driving up to 5 mA.
Switching to the NPN pair as the common-mode voltage is
driven beyond 1 V within the positive supply allows the amplifier
to provide useful operation for signals at either end of the
supply voltage range and eliminates the possibility of phase
reversal for input signals up to 500 mV beyond either power
supply. Offset voltage also changes to reflect the offset of the
input pair in control. The transition region is small, approximately
180 mV. These sudden changes in the dc parameters of the
input stage can produce glitches that adversely affect distortion.
Fabricated on Analog Devices, Inc. eXtra Fast Complementary
Bipolar (XFCB) process, the amplifier provides an impressive
80 Hz bandwidth when used as a follower and a 30 V/µs slew
rate at only 800 µA supply current. Careful design allows the
amplifier to operate with a supply voltage as low as 2.7 V.
OVERDRIVING THE INPUT STAGE
Sustained input differential voltages greater than 3.4 V should
be avoided as the input transistors can be damaged. Input clamp
diodes are recommended if the possibility of this condition
exists.
INPUT STAGE OPERATION
A simplified schematic of the input stage appears in Figure 43.
For common-mode voltages up to 1.1 V within the positive
supply (0 V to 3.9 V on a single 5 V supply), tail current I2
flows through the PNP differential pair, Q13 and Q17. Q5 is cut
off; no bias current is routed to the parallel NPN differential
pair, Q2 and Q3. As the common-mode voltage is driven within
1.1 V of the positive supply, Q5 turns on and routes the tail
current away from the PNP pair and to the NPN pair. During
this transition region, the input current of the amplifier changes
magnitude and direction. Reusing the same tail current ensures
that the input stage has the same transconductance, which
determines the gain and bandwidth of the amplifier, in both
regions of operation.
The voltages at the collectors of the input pairs are set to
200 mV from the power supply rails. This allows the amplifier
to remain in linear operation for input voltages up to 500 mV
beyond the supply voltages. Driving the input common-mode
voltage beyond that point will forward bias the collector junction of
the input transistor, resulting in phase reversal. Sustaining this
condition for any length of time should be avoided because it is
easy to exceed the maximum allowed input differential voltage
when the amplifier is in phase reversal.
V
CC
R1
2kΩ
I3
25µA
R2
2kΩ
I2
90µA
Q9
1.1V
R5
50kΩ
V
Q3
R8
Q2
R9
Q6
Q10
IN
1
1
R6
R7
Q8
850Ω
850Ω
Q7
Q5
4
4
4
4
850Ω 850Ω
V
Q13
Q17
I4
25µA
IP
OUTPUT STAGE,
COMMON-MODE
FEEDBACK
Q14
Q11
1
1
Q15
Q16
R4
2kΩ
R3
2kΩ
I1
5µA
Q18
Q4
V
EE
Figure 43. Simplified Schematic of AD8031 Input Stage
Rev. F | Page 13 of 20
AD8031/AD8032
Data Sheet
OUTPUT STAGE, OPEN-LOOP GAIN AND
DISTORTION vs. CLEARANCE FROM POWER
SUPPLY
The open-loop gain of the AD8031 decreases approximately
linearly with load resistance and depends on the output voltage.
Open-loop gain stays constant to within 250 mV of the positive
power supply, 150 mV of the negative power supply, and then
decreases as the output transistors are driven further into
saturation.
The AD8031 features a rail-to-rail output stage. The output
transistors operate as common-emitter amplifiers, providing the
output drive current as well as a large portion of the amplifier’s
open-loop gain.
The distortion performance of the AD8031/AD8032 amplifiers
differs from conventional amplifiers. Typically, the distortion
performance of the amplifier degrades as the output voltage
amplitude increases.
I2
25µA
I1
25µA
Q51
Q42
Q47
DIFFERENTIAL
DRIVE
Q37
Q38
Used as a unity gain follower, the output of the AD8031/
AD8032 exhibits more distortion in the peak output voltage
region around VCC − 0.7 V. This unusual distortion characteristic is
caused by the input stage architecture and is discussed in detail
in the Input Stage Operation section,
FROM
C9
5pF
Q68
INPUT STAGE
R29
300Ω
Q20
Q27
Q21
V
OUT
C5
1.5pF
Q43
Q48
Q49
I4
25µA
OUTPUT OVERDRIVE RECOVERY
I5
25µA
Output overdrive of an amplifier occurs when the amplifier
attempts to drive the output voltage to a level outside its normal
range. After the overdrive condition is removed, the amplifier
must recover to normal operation in a reasonable amount of
time. As shown in Figure 45, the AD8031/AD8032 recover
within 100 ns from negative overdrive and within 80 ns from
positive overdrive.
Q50
Q44
Figure 44. Output Stage Simplified Schematic
The output voltage limit depends on how much current the
output transistors are required to source or sink. For applications
with low drive requirements (for instance, a unity gain follower
driving another amplifier input), the AD8031 typically swings
within 20 mV of either voltage supply. As the required current
load increases, the saturation output voltage increases linearly as
R
R
F
G
R
= R = 2kΩ
G
F
V
OUT
V
IN
R
L
I
LOAD × RC
where:
LOAD is the required load current.
50Ω
I
RC is the output transistor collector resistance.
For the AD8031, the collector resistances for both output
transistors are typically 25 Ω. As the current load exceeds the
rated output current of 15 mA, the amount of base drive current
required to drive the output transistor into saturation reaches its
limit, and the amplifier’s output swing rapidly decreases.
V
V
R
= ±2.5V
S
= ±2.5V
IN
= 1kΩ TO GND
1V
L
100ns
Figure 45. Overdrive Recovery
Rev. F | Page 14 of 20
Data Sheet
AD8031/AD8032
1000
R
= 5Ω
S
DRIVING CAPACITIVE LOADS
V
= 5V
S
200mV STEP
Capacitive loads interact with an op amp’s output impedance to
create an extra delay in the feedback path. This reduces circuit
stability and can cause unwanted ringing and oscillation. A
given value of capacitance causes much less ringing when the
amplifier is used with a higher noise gain.
WITH 30% OVERSHOOT
R
= 0Ω
S
100
10
R
= 20Ω
S
R
= 20Ω
S
The capacitive load drive of the AD8031/AD8032 can be
increased by adding a low valued resistor in series with the
capacitive load. Introducing a series resistor tends to isolate the
capacitive load from the feedback loop, thereby diminishing its
influence. Figure 46 shows the effects of a series resistor on the
capacitive drive for varying voltage gains. As the closed-loop
gain is increased, the larger phase margin allows for larger
capacitive loads with less overshoot. Adding a series resistor at
lower closed-loop gains accomplishes the same effect. For large
capacitive loads, the frequency response of the amplifier is
dominated by the roll-off of the series resistor and capacitive load.
R
R
F
G
R
V
S
OUT
L
R
= 0Ω, 5Ω
S
C
1
0
1
2
3
4
5
CLOSED-LOOP GAIN (V/V)
Figure 46. Capacitive Load Drive vs. Closed-Loop Gain
Rev. F | Page 15 of 20
AD8031/AD8032
APPLICATIONS
Data Sheet
A 2 MHz SINGLE-SUPPLY, BIQUAD BAND-PASS
FILTER
0
–10
–20
–30
Figure 47 shows a circuit for a single-supply, biquad band-pass
filter with a center frequency of 2 MHz. A 2.5 V bias level is
easily created by connecting the noninverting inputs of all three
op amps to a resistor divider consisting of two 1 kΩ resistors
connected between 5 V and ground. This bias point is also
decoupled to ground with a 0.1 µF capacitor. The frequency
response of the filter is shown in Figure 48.
To maintain an accurate center frequency, it is essential that the
op amp have sufficient loop gain at 2 MHz. This requires the
choice of an op amp with a significantly higher unity gain,
crossover frequency. The unity gain, crossover frequency of the
AD8031/AD8032 is 40 MHz. Multiplying the open-loop gain by
the feedback factors of the individual op amp circuits yields the
loop gain for each gain stage. From the feedback networks of
the individual op amp circuits, it can be seen that each op amp
has a loop gain of at least 21 dB. This level is high enough to
ensure that the center frequency of the filter is not affected by
the op amp’s bandwidth. If, for example, an op amp with a gain
bandwidth product of 10 MHz was chosen in this application,
the resulting center frequency would shift by 20% to 1.6 MHz.
–40
–50
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 48. Frequency Response of 2 MHz Band-Pass Filter
HIGH PERFORMANCE, SINGLE-SUPPLY LINE DRIVER
Even though the AD8031/AD8032 swing close to both rails, the
AD8031 has optimum distortion performance when the signal
has a common-mode level half way between the supplies and
when there is about 500 mV of headroom to each rail. If low
distortion is required in single-supply applications for signals
that swing close to ground, an emitter-follower circuit can be
used at the op amp output.
R6
1kΩ
C1
50pF
5V
10µF
R2
2kΩ
R4
2kΩ
5V
0.1µF
5V
0.1µF
C2
50pF
R1
3kΩ
0.1µF
7
3
V
R3
2kΩ
IN
V
6
IN
2N3904
R5
2kΩ
49.9Ω
2
1kΩ
AD8031
4
AD8031
1/2
AD8032
49.9Ω
200Ω
2.49kΩ
1/2
AD8032
2.49kΩ
V
OUT
49.9Ω
0.1µF
1kΩ
V
OUT
Figure 49. Low Distortion Line Driver for Single-Supply, Ground Referenced Signals
Figure 47. A 2 MHz, Biquad Band-Pass Filter Using AD8031/AD8032
Figure 49 shows the AD8031 configured as a single-supply, gain-
of-2 line driver. With the output driving a back-terminated
50 Ω line, the overall gain from VIN to VOUT is unity. In addition
to minimizing reflections, the 50 Ω back termination resistor
protects the transistor from damage if the cable is short circuited.
The emitter follower, which is inside the feedback loop, ensures
that the output voltage from the AD8031 stays about 700 mV
above ground. Using this circuit, low distortion is attainable
even when the output signal swings to within 50 mV of ground.
The circuit was tested at 500 kHz and 2 MHz.
Rev. F | Page 16 of 20
Data Sheet
AD8031/AD8032
Figure 50 and Figure 51 show the output signal swing and
frequency spectrum at 500 kHz. At this frequency, the output
signal (at VOUT), which has a peak-to-peak swing of 1.95 V
(50 mV to 2 V), has a THD of −68 dB (SFDR = −77 dB).
This circuit could also be used to drive the analog input of a
single-supply, high speed ADC whose input voltage range is
referenced to ground (for example, 0 V to 2 V or 0 V to 4 V). In
this case, a back termination resistor is not necessary (assuming
a short physical distance from transistor to ADC); therefore, the
emitter of the external transistor would be connected directly to
the ADC input. The available output voltage swing of the circuit
would therefore be doubled.
100
90
2V
1.5V
100
90
10
0%
50mV
1µs
0.5V
Figure 50. Output Signal Swing of Low Distortion Line Driver at 500 kHz
10
0%
+9dBm
0.2V
200ns
50mV
Figure 52. Output Signal Swing of Low Distortion Line Driver at 2 MHz
+7dBm
START 0Hz
STOP 5MHz
Figure 51. THD of Low Distortion Line Driver at 500 kHz
Figure 52 and Figure 53 show the output signal swing and
frequency spectrum at 2 MHz. As expected, there is some
degradation in signal quality at the higher frequency. When the
output signal has a peak-to-peak swing of 1.45 V (swinging
from 50 mV to 1.5 V), the THD is −55 dB (SFDR = −60 dB).
START 0Hz
STOP 20MHz
Figure 53. THD of Low Distortion Line Driver at 2 MHz
Rev. F | Page 17 of 20
AD8031/AD8032
Data Sheet
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 54. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body (N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 55. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
Rev. F | Page 18 of 20
Data Sheet
AD8031/AD8032
3.00
2.90
2.80
5
1
4
3
3.00
2.80
2.60
1.70
1.60
1.50
2
0.95 BSC
1.90
BSC
1.30
1.15
0.90
0.20 MAX
0.08 MIN
1.45 MAX
0.95 MIN
0.55
0.45
0.35
0.15 MAX
0.05 MIN
10°
5°
0°
SEATING
PLANE
0.60
BSC
0.50 MAX
0.35 MIN
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 56. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.80
0.55
0.40
0.15
0.05
0.23
0.09
6°
0°
0.40
0.25
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 57. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. F | Page 19 of 20
AD8031/AD8032
Data Sheet
ORDERING GUIDE
Model1
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
Package Option
Branding
AD8031ANZ
AD8031AR
AD8031ARZ
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
N-8
R-8
R-8
R-8
R-8
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
N-8
R-8
AD8031ARZ-REEL
AD8031ARZ-REEL7
AD8031ART-R2
AD8031ART-REEL7
AD8031ARTZ-R2
AD8031ARTZ-REEL
AD8031ARTZ-REEL7
AD8031BNZ
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
5-Lead SOT-23
5-Lead SOT-23, 7" Tape and Reel
5-Lead SOT-23
5-Lead SOT-23, 13" Tape and Reel
5-Lead SOT-23, 7" Tape and Reel
8-Lead PDIP
H0A
H0A
H04
H04
H04
AD8031BR
AD8031BRZ
8-Lead SOIC_N
8-Lead SOIC_N
R-8
R-8
R-8
AD8031BRZ-REEL
AD8031BRZ-REEL7
AD8031AR-EBZ
AD8031ART-EBZ
AD8032ANZ
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC Evaluation Board
5-Lead SOT-23 Evaluation Board
8-Lead PDIP
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-8
AD8032AR
AD8032AR-REEL7
AD8032ARZ
AD8032ARZ-REEL
AD8032ARZ-REEL7
AD8032ARM
AD8032ARM-REEL
AD8032ARM-REEL7
AD8032ARMZ
AD8032ARMZ-REEL
AD8032ARMZ-REEL7
AD8032BNZ
AD8032BR
AD8032BR-REEL7
AD8032BRZ
8-Lead SOIC_N
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC_N
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
8-Lead MSOP
8-Lead MSOP, 13" Tape and Reel
8-Lead MSOP, 7" Tape and Reel
8-Lead MSOP
8-Lead MSOP, 13" Tape and Reel
8-Lead MSOP, 7" Tape and Reel
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC_N
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
N-8
R-8
R-8
R-8
R-8
H9A
H9A
H9A
H9A#
H9A#
H9A#
AD8032BRZ-REEL
AD8032BRZ-REEL7
AD8032AR-EBZ
AD8032ARM-EBZ
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC Evaluation Board
8-Lead MSOP Evaluation Board
R-8
1 Z = RoHS Compliant Part, # denotes lead-free product may be top or bottom marked.
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D01056-0-8/13(F)
Rev. F | Page 20 of 20
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