AD8057_15 [ADI]
Low Cost, High Performance Voltage Feedback, 325 MHz Amplifier;
| 型号： | AD8057_15 |
| 厂家： | 
ADI |
| 描述： | Low Cost, High Performance Voltage Feedback, 325 MHz Amplifier |
| 文件： | 总16页 (文件大小：352K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost, High Performance
Voltage Feedback, 325 MHz Amplifier
AD8057/AD8058
Data Sheet
FEATURES
CONNECTION DIAGRAMS
Low cost single (AD8057) and dual (AD8058)
High speed
325 MHz, −3 dB bandwidth (G = +1)
1000 V/μs slew rate
Gain flatness: 0.1 dB to 28 MHz
Low noise
7 nV/√Hz
AD8057
V
1
2
3
+V
S
5
OUT
–V
S
4
–IN
+IN
(Not to Scale)
Figure 1. RT-5 (SOT-23)
AD8057
Low power
1
2
3
4
8
7
6
5
NC
–IN
+IN
NC
+V
5.4 mA/amplifier typical supply current at 5 V
Low distortion
−85 dBc at 5 MHz, RL = 1 kΩ
Wide supply range from 3 V to 12 V
Small packaging
S
V
OUT
–V
NC
S
(Not to Scale)
NC = NO CONNECT
AD8057 is available in an 8-lead SOIC and 5-lead SOT-23
AD8058 is available in an 8-lead SOIC and an 8-lead MSOP
Figure 2. R-8 (SOIC)
AD8058
OUT1
1
2
3
4
+V
S
8
APPLICATIONS
–IN1
+IN1
7
6
5
OUT2
–IN2
Imaging
DVD/CD
Photodiode preamp
Analog-to-digital driver
Professional cameras filters
+IN2
–V
S
(Not to Scale)
Figure 3. RM-8 (MSOP) and R-8 (SOIC)
GENERAL DESCRIPTION
5
4
The AD8057 (single) and AD8058 (dual) are very high perfor-
mance amplifiers with a very low cost. The balance between
cost and performance make them ideal for many applications.
The AD8057 and AD8058 reduce the need to qualify a variety
of specialty amplifiers. The AD8057 and AD8058 are voltage
feedback amplifiers with the bandwidth and slew rate normally
found in current feedback amplifiers. The AD8057 and AD8058
are low power amplifiers having low quiescent current and a wide
supply range from 3 V to 12 V. They have noise and distortion
performance required for high end video systems as well as dc
performance parameters rarely found in high speed amplifiers.
3
2
1
G = +1
0
–1
–2
–3
–4
–5
G = +5
G = +2
G = +10
The AD8057 and AD8058 are available in standard SOIC
packaging as well as tiny 5-lead SOT-23 (AD8057) and 8-lead
MSOP (AD8058) packages. These amplifiers are available in the
industrial temperature range of −40°C to +85°C.
1
10
100
1000
FREQUENCY (MHz)
Figure 4. Small Signal Frequency Response
Rev. E
Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2010–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
AD8057/AD8058
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................6
Test Circuits..................................................................................... 12
Applications Information.............................................................. 13
Driving Capacitive Loads.......................................................... 13
Video Filter.................................................................................. 13
Differential Analog-to-Digital Driver ..................................... 14
Layout .......................................................................................... 14
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 15
Applications....................................................................................... 1
Connection Diagrams...................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Maximum Power Dissipation ..................................................... 5
ESD Caution.................................................................................. 5
REVISION HISTORY
3/14—Rev. D to Rev. E
8/03—Rev. A to Rev. B
Change to Figure 48 .........................................................................14
Renumbered Figures and TPCs........................................Universal
Changes to Ordering Guide.............................................................4
Change to Figure 8 ......................................................................... 12
Update Outline Dimensions ......................................................... 14
9/13—Rev. C to Rev. D
Changes to Output Voltage Swing Parameter, Table 3 .................4
Updated Outline Dimensions ........................................................15
Changes to Ordering Guide ...........................................................16
10/10—Rev. B to Rev. C
Updated Format..................................................................Universal
Change to Third-Order Intercept Parameter, Table 1 ................. 3
Changes to Input Common-Mode Voltage Range Parameter,
Table 2 ................................................................................................ 4
Changes to Figure 32...................................................................... 10
Changes to Figure 35...................................................................... 11
Changes to Figure 41 and Figure 42............................................. 12
Changes to Figure 44 and Figure 45............................................. 13
Changes to Ordering Guide .......................................................... 16
Rev. E | Page 2 of 16
Data Sheet
AD8057/AD8058
SPECIFICATIONS
At TA = 25°C, VS = 5 V, RL = 100 Ω, RF = 0 Ω, gain = +1, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth
G = +1, VO = 0.2 V p-p
G = –1, VO = 0.2 V p-p
G = +1, VO = 2 V p-p
G = +1, VO = 0.2 V p-p
G = +1, VO = 2 V step, RL = 2 kΩ
G = +1, VO = 4 V step, RL = 2 kΩ
G = +2, VO = 2 V step
325
95
175
30
850
1150
30
MHz
MHz
MHz
MHz
V/µs
V/µs
ns
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
fC = 5 MHz, VO = 2 V p-p, RL = 1 kΩ
fC = 20 MHz, VO = 2 V p-p, RL = 1 kΩ
f = 5 MHz, VO = 2 V p-p, RL = 150 Ω
f = 5 MHz, VO = 2 V p-p
f = 5 MHz, G = +2
–85
–62
–68
−35
−60
7
dBc
dBc
dB
dBm
dB
nV/√Hz
pA/√Hz
%
SFDR
Third-Order Intercept
Crosstalk, Output to Output
Input Voltage Noise
Input Current Noise
Differential Gain Error
f = 100 kHz
f = 100 kHz
0.7
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 1 kΩ
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 1 kΩ
VIN = 200 mV p-p, G = +1
0.01
0.02
0.15
0.01
30
%
Differential Phase Error
Degrees
Degrees
ns
Overload Recovery
DC PERFORMANCE
Input Offset Voltage
1
2.5
3
0.5
3.0
5
mV
mV
μV/°C
µA
TMIN to TMAX
Input Offset Voltage Drift
Input Bias Current
2.5
TMIN to TMAX
µA
Input Offset Current
Open-Loop Gain
0.75 µA
VO = 2.5 V, RL = 2 kΩ
VO = 2.5 V, RL = 150 Ω
50
50
55
52
dB
dB
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
10
2
MΩ
pF
V
+Input
RL = 1 kΩ
−4.0
48
+4.0
+4.0
VCM
=
2.5 V
60
dB
RL = 2 kΩ
−4.0
V
RL = 150 Ω
30% overshoot
3.9
30
V
pF
Capacitive Load Drive
POWER SUPPLY
Operating Range
1.5
54
5.0
6.0
14.0
59
6
7.5
15
V
Quiescent Current for AD8057
Quiescent Current for AD8058
Power Supply Rejection Ratio
mA
mA
dB
VS = 5 V to 1.5 V
Rev. E | Page 3 of 16
AD8057/AD8058
Data Sheet
At TA = 25°C, VS = 5 V, R L = 100 Ω, RF = 0 Ω, gain = +1, unless otherwise noted.
Table 2.
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth
G = +1, VO = 0.2 V p-p
G = +1, VO = 2 V p-p
VO = 0.2 V p-p
G = +1, VO = 2 V step, RL = 2 kΩ
G = +2, VO = 2 V step
300
155
28
700
35
MHz
MHz
MHz
V/µs
ns
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
fC = 5 MHz, VO = 2 V p-p, RL = 1 kΩ
fC = 20 MHz, VO = 2 V p-p, RL = 1 kΩ
f = 5 MHz, G = +2
f = 100 kHz
f = 100 kHz
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 1 kΩ
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 1 kΩ
–75
–54
−60
7
dBc
dBc
dB
nV/√Hz
pA/√Hz
%
Crosstalk, Output to Output
Input Voltage Noise
Input Current Noise
0.7
Differential Gain Error
0.05
0.05
0.10
0.02
%
Differential Phase Error
Degrees
Degrees
DC PERFORMANCE
Input Offset Voltage
1
2.5
3
0.5
3.0
5
mV
mV
μV/°C
µA
TMIN to TMAX
Input Offset Voltage Drift
Input Bias Current
2.5
TMIN to TMAX
µA
Input Offset Current
Open-Loop Gain
0.75
µA
dB
VO = 1.5 V, RL = 2 kΩ to midsupply
50
55
52
VO = 1.5 V, RL = 150 Ω to midsupply 45
dB
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
10
2
0.9 to 3.4
60
MΩ
pF
V
+Input
RL = 1 kΩ
VCM
=
2.5 V
48
dB
RL = 2 kΩ
RL = 150 Ω
30% overshoot
0.9 to 3.8
1.2 to 3.4
30
V
V
pF
Capacitive Load Drive
POWER SUPPLY
Operating Range
3
5.0
5.4
13.5
58
10
7.0
14
V
Quiescent Current for AD8057
Quiescent Current for AD8058
Power Supply Rejection Ratio
mA
mA
dB
54
Rev. E | Page 4 of 16
Data Sheet
AD8057/AD8058
ABSOLUTE MAXIMUM RATINGS
Table 3.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8057/AD8058 is limited by the associated rise in junction
temperature. Exceeding a junction temperature of 175°C for
an extended period can result in device failure. Although the
AD8057/AD8058 is internally short-circuit protected, this may
not be sufficient to guarantee that the maximum junction temper-
ature (150°C) is not exceeded under all conditions. To ensure
proper operation, it is necessary to observe the maximum power
derating curves.
Parameter
Rating
Supply Voltage (+VS to –VS)
Internal Power Dissipation1
SOIC Package (R)
SOT-23-5 Package (RT)
MSOP Package (RM)
Input Voltage (Common Mode)
Differential Input Voltage
Output Short-Circuit Duration
12.6 V
0.8 W
0.5 W
0.6 W
VS
4.0 V
Observe power
derating curves
2.0
T
= 150°C
J
Storage Temperature Range (R)
−65°C to +125°C
Operating Temperature Range (A Grade) −40°C to +85°C
1.5
1.0
0.5
0
Lead Temperature (Soldering 10sec)
300°C
8-LEAD SOIC
8-LEAD MSOP
1 Specification is for device in free air:
8-lead SOIC package: θJA = 160°C/W
5-lead SOT-23-5 package: θJA = 240°C/W
8-Lead MSOP package: θJA = 200°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
SOT-23-5
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE (°C)
Figure 5. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. E | Page 5 of 16
AD8057/AD8058
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
–5.0
4.5
–1.5V SWING R = 150Ω
L
(+) OUTPUT
VOLTAGE
4.0
3.5
–2.5V SWING R = 150Ω
L
ABS (–)
3.0
2.5
2.0
1.5
1.0
0.5
0
OUTPUT
–5V SWING R = 150Ω
L
10
100
1k
LOAD RESISTANCE (Ω)
10k
100k
–40 –30 –20 –10
0
10 20 30 40 50 60 70 8085
TEMPERATURE (°C)
Figure 6. Output Swing vs. Load Resistance
Figure 9. Negative Output Voltage Swing vs. Temperature
–3.0
–3.5
–4.0
–4.5
–5.0
–5.5
–6.0
–6.5
–7.0
–7.5
–8.0
6
4
2
0
V
@ ±1.5V
–I
SUPPLY
@ ±1.5V
OS
V
@ ±5V
OS
–I
@ ±5V
SUPPLY
–2
–4
–6
–40 –30 –20 –10
0
10 20 30 40 50 60 70 8085
TEMPERATURE (°C)
–40 –30 –20 –10
0
10 20 30 40 50 60 70 8085
TEMPERATURE (°C)
Figure 7. −ISUPPLY vs. Temperature
Figure 10. VOS vs. Temperature
5.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
A
@ ±5V
VOL
+5V SWING R = 150Ω
L
A
@ ±2.5V
VOL
+2.5V SWING R = 150Ω
L
+1.5V SWING R = 150Ω
L
–40 –30 –20 –10
0
10 20 30 40 50 60 70 8085
TEMPERATURE (°C)
–40 –30 –20 –10
0
10 20 30 40 50 60 70 8085
TEMPERATURE (°C)
Figure 11. Open-Loop Gain vs. Temperature
Figure 8. Positive Output Voltage Swing vs. Temperature
Rev. E | Page 6 of 16
Data Sheet
AD8057/AD8058
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
100mV
20mV/DIV
+I @ ±5V
B
+I @ ±2.5V
B
–I @ ±2.5V
B
–I @ ±5V
B
+I @ ±1.5V
B
–I @ ±1.5V
B
–0.7
–0.8
–100mV
–40 –30 –20 –10
0
10 20 30 40 50 60 70 8085
TEMPERATURE (°C)
4ns/DIV
Figure 15. Small Signal Step Response G = +1, RL = 1 kΩ, VS = 5 V,
See Figure 41 for Test Circuit
Figure 12. Input Bias Current vs. Temperature
4
3
2
1
0
5V
PSRR @ ±1.5V ±5V
1V/DIV
–5V
–40 –30 –20 –10
0
10 20 30 40 50 60 70 8085
TEMPERATURE (°C)
4ns/DIV
Figure 16. Large Signal Step Response G = +1,RL = 1 kΩ, VS = 5.0 V,
See Figure 41 for Test Circuit
Figure 13. PSRR vs. Temperature
0
–10
–20
–30
–40
–50
–60
100mV
20mV/DIV
0V
–PSRR V = ±2.5V
S
+PSRR V = ±2.5V
S
–100mV
0.1
1
10
100
1000
4ns/DIV
FREQUENCY (MHz)
Figure 14. PSRR vs. Frequency
Figure 17. Small Signal Step Response G = –1, RL = 1 kΩ,
See Figure 42 for Test Circuit
Rev. E | Page 7 of 16
AD8057/AD8058
Data Sheet
5
4
5V
3
2
1
1V/DIV
G = –2
G = –1
0
–1
–2
–3
–4
–5
G = –5
G = –10
10
–5V
1
100
FREQUENCY (MHz)
1000
4ns/DIV
Figure 21. Large Signal Frequency Response
Figure 18. Large Signal Step Response G = –1, RL = 1 kΩ ,
See Figure 42 for Test Circuit
5
4
0.5
0.4
V
= 0.2V
OUT
G = +2
R
R
= 1.0kΩ
= 1.0kΩ
L
F
3
0.3
2
0.2
1
0.1
G = +1
0
0
–1
–2
–3
–4
–5
–0.1
–0.2
–0.3
–0.4
–0.5
G = +5
G = +2
G = +10
1
10
100
1000
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 19. Small Signal Frequency Response, VOUT = 0.2 V p-p
Figure 22. 0.1 dB Flatness G = +2
5
4
3
2
1
–50
–60
THD
–70
SECOND
G = +1
0
–1
–80
THIRD
G = +5
–90
–2
–3
–4
–5
G = +2
–100
–110
G = +10
1
10
100
1000
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 20. Large Signal Frequency Response, VOUT = 2 V p-p
Figure 23. Distortion vs. Frequency, RL = 150 Ω
Rev. E | Page 8 of 16
Data Sheet
AD8057/AD8058
–40
V
= –1V TO + 1V OR +1V TO –1V
OUT
0.4%
0.3%
0.2%
0.1%
0%
G = +2
= 100Ω/1kΩ
R
L
–50
–60
–70
–80
20MHz
–0.1%
–0.2%
–0.3%
–0.4%
5MHz
0
10
20
30
40
50
60
0
0.4
0.8
1.2
1.6
V
2.0
2.4
2.8
3.2
3.6
4.0
TIME (ns)
(V p-p)
OUT
Figure 24. Distortion vs. VOUT at 20 MHz, 5 MHz, RL = 150 Ω, VS = 5.0 V
Figure 27. Settling Time
5.0
4.5
4.0
3.5
3.0
2.5
V
R
= ±2.5V
= 1kΩ
S
L
INPUT SIGNAL
G = +1
2.5V
OUTPUT RESPONSE
500mV/
DIV
2.0
0V
FALL TIME
1.5
1.0
RISE TIME
0.5
0
20ns/DIV
0
1
2
3
4
V
(V p-p)
OUT
Figure 28. Input Overload Recovery, VS = 2.5 V
Figure 25. Rise Time and Fall Time vs. VOUT, G = +1, RL = 1 kΩ, RF = 0 Ω
5
V
= ±5.0V
S
R
= 1kΩ
L
G = +1
4
3
INPUT SIGNAL 5V
5.0V
1V/DIV
OUTPUT SIGNAL = 4.0V
RISE TIME
2
FALL TIME
0V
1
0
20ns/DIV
0
1
2
3
4
V
(V p-p)
OUT
Figure 29. Output Overload Recovery, VS = 5.0 V
Figure 26. Rise Time and Fall Time vs. VOUT, G = +2, RL = 100 Ω, RF = 402 Ω
Rev. E | Page 9 of 16
AD8057/AD8058
Data Sheet
0
–10
–20
–30
–40
–50
–60
–70
0
–20
–40
–60
–80
SIDE B DRIVEN
SIDE A DRIVEN
–100
–120
0.1
1
10
FREQUENCY (MHz)
100
0.1
1
10
FREQUENCY (MHz)
100
Figure 30. CMRR vs. Frequency
Figure 33. Crosstalk (Output-to-Output) vs. Frequency
1.8V
DIFFERENTIAL GAIN (%)
0.015
OUTPUT SIGNAL 1.7V
V
= ±2.5V
S
R1 = 1kΩ
G = +4
0.010
0.005
0
V
R
= ±5.0V
= 150Ω
S
L
–0.005
–0.010
–0.015
200mV/
DIV
INPUT SIGNAL = 0.6V
DIFFERENTIAL PHASE (Degrees)
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
V
R
= ± 5.0V
= 150Ω
S
L
20ns/DIV
–0.02
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
DIFFERENTIAL GAIN (%)
Figure 31. Output Overload Recovery, VS = 2.5 V
0.015
0.010
0.005
0
V
= ±5.0V
S
4.5V
R
= 1kΩ
L
V
= ±5V
S
R1 = 1kΩ
G = +4
–0.005
–0.010
–0.015
500mV/
DIV
DIFFERENTIAL PHASE (Degrees)
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
V
R
= ±5.0V
= 1kΩ
S
L
–0.02
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
20ns/DIV
Figure 32. Output Overload Recovery, VS = 5.0 V
Figure 34. Differential Gain and Differential Phase One Back Terminated
Load (150 Ω) (Video Op Amps Only)
Rev. E | Page 10 of 16
Data Sheet
AD8057/AD8058
180
100
10
1
80
60
40
20
0
135
90
45
GAIN
0
–45
–90
0.1
–20
10
100
1k
10k
100k
1M
10M
100M
100M
1000
0.01
0.1
1
10
100
1000
FREQUENCY (Hz)
FREQUENCY (MHz)
Figure 35. Open-Loop Gain and Phase vs. Frequency
Figure 38. Voltage Noise vs. Frequency
DIFFERENTIAL GAIN (%)
100
10
1
0.01
V
R
= +5V
0
–0.01
–0.02
–0.03
–0.04
–0.05
S
= 150Ω
L
DIFFERENTIAL PHASE (Degrees)
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
V
= +5V
S
R
= 150Ω
L
0.1
10
100
1k
10k
100k
1M
10M
–0.02
FREQUENCY (Hz)
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
Figure 36. Differential Gain and Differential Phase, RL = 150 Ω
Figure 39. Current Noise vs. Frequency
DIFFERENTIAL GAIN (%)
0.01
100
10
1
V
R
= +5V
= 1kΩ
0
–0.01
–0.02
–0.03
–0.04
–0.05
S
L
DIFFERENTIAL PHASE (Degrees)
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
V
R
= +5V
= 1kΩ
S
L
0.1
0.1
1
10
100
–0.02
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
FREQUENCY (MHz)
Figure 37. Differential Gain and Differential Phase, RL = 1 kΩ
Figure 40. Output Impedance vs. Frequency
Rev. E | Page 11 of 16
AD8057/AD8058
TEST CIRCUITS
Data Sheet
1kΩ
+V
S
4.7µF
+V
S
4.7µF
0.01µF
0.01µF
HP8130A
PULSE
GENERATOR
0.001µF
V
0.001µF
IN
HP8130A
PULSE
GENERATOR
V
IN
1kΩ
V
OUT
AD8057
AD8058
50Ω
V
T
/T = 1ns
OUT
AD8057
AD8058
R
F
50Ω
T
/T = 1ns
R
F
0.001µF
1kΩ
0.001µF
1kΩ
0.01µF
4.7µF
0.01µF
4.7µF
–V
S
–V
S
Figure 42. Test Circuit, G = −1, RL = 1 kΩ
Figure 41. Test Circuit, G = +1, RL = 1 kΩ
Rev. E | Page 12 of 16
Data Sheet
AD8057/AD8058
APPLICATIONS INFORMATION
DRIVING CAPACITIVE LOADS
Table 4. Recommended Value for Resistors RS, RF, RG vs.
Capacitive Load, CL, Which Results in 30% Overshoot
When driving a capacitive load, most op amps exhibit overshoot in
their pulse response. Figure 43 shows the relationship between
the capacitive load that results in 30% overshoot and the closed-
loop gain of an AD8058. It can be seen that, under the gain = +2
condition, the device is stable with capacitive loads of up to 69 pF.
Gain
RF
RG
CL (RS = 0 Ω)
CL (RS = 2.4 Ω)
1
2
3
4
5
10
100 Ω
100 Ω
100 Ω
100 Ω
100 Ω
100 Ω
11 pF
51 pF
104 pF
186 pF
245 pF
870 pF
13 pF
69 pF
153 pF
270 pF
500 pF
1580 pF
100 Ω
50 Ω
33.2 Ω
25 Ω
In general, to minimize peaking or to ensure device stability for
larger values of capacitive loads, a small series resistor (RS) can
be added between the op amp output and the load capacitor
(CL) as shown in Figure 44.
11 Ω
+OVERSHOOT
29.0%
For the setup shown in Figure 44, the relationship between RS
and CL was empirically derived and is shown in Table 4.
200mV
100mV
500
400
300
200
–100mV
–200mV
100mV/DIV
R
= 2.4Ω
50ns/DIV
S
100
0
Figure 45. Typical Pulse Response with CL = 65 pF, Gain = +2, and VS = 2.5
R
= 0Ω
S
VIDEO FILTER
1
2
3
4
5
Some composite video signals that are derived from a digital
source contain some clock feedthrough that can cause problems
with downstream circuitry. This clock feedthrough is usually at
27 MHz, which is a standard clock frequency for both NTSC
and PAL video systems. A filter that passes the video band and
rejects frequencies at 27 MHz can be used to remove these fre-
quencies from the video signal.
CLOSED-LOOP GAIN
Figure 43. Capacitive Load Drive vs. Closed-Loop Gain
R
F
+2.5V
0.1µF
10µF
R
G
Figure 46 shows a circuit that uses an AD8057 to create a single
5 V supply, 3-pole Sallen-Key filter. This circuit uses a single RC
pole in front of a standard 2-pole active section. To shift the dc
operating point to midsupply, ac coupling is provided by R4, R5,
and C4.
FET PROBE
R
S
V
OUT
AD8058
V
= 200mV p-p
IN
C
L
0.1µF
10µF
C2
680pF
–2.5V
R
F
1kΩ
Figure 44. Capacitive Load Drive Circuit
+5V
7
+
10µF
0.1µF
6
+5V
R4
2
3
C4
0.1µF
R1
200Ω
R2
499Ω
R3
49.9Ω
10kΩ
AD8057
4
C3
36pF
C1
100pF
R5
10kΩ
Figure 46. Low-Pass Filter for Video
Rev. E | Page 13 of 16
AD8057/AD8058
Data Sheet
+2.5V
+
1kΩ
Figure 47 shows a frequency sweep of this filter. The response is
down 3 dB at 5.7 MHz; therefore, it passes the video band with
little attenuation. The rejection at 27 MHz is 42 dB, which
provides more than a factor of 100 in suppression of the clock
components at this frequency.
+5V
0.1µF
10µF
+5V
+
0.1µF
10µF
8
1kΩ
1kΩ
3
2
REF
50Ω
1
V
IN
VINA
AD8058
0V
10
1kΩ
1kΩ
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
AD9225
1kΩ
1kΩ
6
5
50Ω
7
VINB
AD8058
4
0.1µF
10µF
+
1kΩ
–5V
Figure 48. Schematic Circuit for Driving AD9225
In this circuit, one of the op amps is configured in the inverting
mode whereas the other is in the noninverting mode. However,
to provide better bandwidth matching, each op amp is configured
for a noise gain of +2. The inverting op amp is configured for a
gain of −1 and the noninverting op amp is configured for a gain
of +2. Each of these produces a noise gain of +2, which is deter-
mined only by the inverse of the feedback ratio. The input signal to
the noninverting op amp is divided by two to normalize its level
and make it equal to the inverting output.
For 0 V input, the outputs of the op amps want to be at 2.5 V,
which is the midsupply level of the ADCs. This is accomplished by
first taking the 2.5 V reference output of the ADC and dividing it
by two by a pair of 1 kΩ resistors. The resulting 1.25 V is applied to
the positive input of each op amp. This voltage is then multiplied by
the gain of +2 of the op amps to provide a 2.5 V level at each output.
The assumption for this circuit is that the input signal is bipolar
with respect to ground and the circuit must be dc-coupled thereby
implying the existence of a negative supply elsewhere in the system.
This circuit uses −5 V as the negative supply for the AD8058.
Tying the negative supply of the AD8058 to ground causes a
problem at the input of the noninverting op amp. The input
common-mode voltage can only go to within 1 V of the negative
rail. Because this circuit requires that the positive inputs operate
with a 1.25 V bias, there is not enough room to swing this voltage
in the negative direction. The inverting stage does not have this
problem because its common-mode input voltage remains fixed
at 1.25 V. If dc coupling is not required, various ac coupling
techniques can be used to eliminate this problem.
100k
1M
10M
100M
FREQUENCY (MHz)
Figure 47. Video Filter Response
DIFFERENTIAL ANALOG-TO-DIGITAL DRIVER
As system supply voltages are dropping, many ADCs provide
differential analog inputs to increase the dynamic range of the
input signal while still operating on a low supply voltage.
Differential driving can also reduce second and other even-
order distortion products.
Analog Devices, Inc., offers an assortment of 12- and 14-bit
high speed converters that have differential inputs and can be
run from a single 5 V supply. These include the AD9220, AD9221,
AD9223, AD9224, and AD9225 at 12 bits, and the AD9240,
AD9241, and AD9243 at 14 bits. Although these devices can
operate over a range of common-mode voltages at their analog
inputs, they work best when the common-mode voltage at the
input is at the midsupply or 2.5 V.
Op amp architectures that require upwards of 2 V of headroom
at the output have significant problems when trying to drive
such ADCs while operating with a 5 V positive supply. The low
headroom output design of the AD8057 and AD8058 make
them ideal for driving these types of ADCs.
The AD8058 can be used to make a dc-coupled, single-ended-
to-differential driver for one of these ADCs. Figure 48 is a
schematic of such a circuit for driving an AD9225, 12-bit,
25 MSPS ADC.
LAYOUT
The AD8057 and AD8058 are high speed op amps for use in a
board layout that follows standard high speed design rules. Make
all signal traces as short and direct as possible. In particular, keep
the parasitic capacitance on the inverting input of each device
to a minimum to avoid excessive peaking and other undesirable
performance. Bypass the power supplies very close to the power pins
of the package with a 0.1 µF capacitor in parallel with a larger
(approximately 10 µF) tantalum capacitor. Connect these capacitors
to a ground plane that either is on an inner layer or fills the area
of the board that is not used for other signals.
Rev. E | Page 14 of 16
Data Sheet
AD8057/AD8058
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.80
0.55
0.40
0.15
0.05
0.23
0.09
6°
0°
0.40
0.25
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 49. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 50. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
Rev. E | Page 15 of 16
AD8057/AD8058
Data Sheet
3.00
2.90
2.80
5
1
4
3
3.00
2.80
2.60
1.70
1.60
1.50
2
0.95 BSC
1.90
BSC
1.30
1.15
0.90
0.20 MAX
0.08 MIN
1.45 MAX
0.95 MIN
0.55
0.45
0.35
0.15 MAX
0.05 MIN
10°
5°
0°
SEATING
PLANE
0.60
BSC
0.50 MAX
0.35 MIN
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 51. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
ORDERING GUIDE
Temperature
Range
Package
Option
Model1
Notes
Package Description
Branding
AD8057AR
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
8-Lead SOIC_N
R-8
R-8
R-8
R-8
R-8
R-8
Waffle Pak
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
AD8057AR-REEL
AD8057AR-REEL7
AD8057ARZ
8-Lead SOIC_N, 13”Tape and Reel
8-Lead SOIC_N, 7”Tape and Reel
8-Lead SOIC_N
8-Lead SOIC_N, 13”Tape and Reel
8-Lead SOIC_N, 7”Tape and Reel
Die
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
AD8057ARZ-REEL
AD8057ARZ-REEL7
AD8057ACHIPS
AD8057ART-R2
AD8057ART-REEL7
AD8057ARTZ-R2
AD8057ARTZ-REEL
AD8057ARTZ-REEL7
AD8057AR-EBZ
AD8057ART-EBZ
AD8058AR
AD8058AR-REEL7
AD8058ARZ
AD8058ARZ-REEL
AD8058ARZ-REEL7
AD8058ACHIPS
AD8058ARM
H7A
H7A
H08
H08
H08
5-Lead SOT-23
8-Lead SOIC_N Evaluation Board
5-Lead SOT-23 Evaluation Board
8-Lead SOIC_N
8-Lead SOIC_N, 7”Tape and Reel
8-Lead SOIC_N
8-Lead SOIC_N, 13”Tape and Reel
8-Lead SOIC_N, 7”Tape and Reel
Die
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
R-8
R-8
R-8
R-8
R-8
Waffle Pak
RM-8
RM-8
RM-8
RM-8
RM-8
H8A
H8A
H8A
H8A
H8A
AD8058ARM-REEL7
AD8058ARMZ-REEL7
AD8058ARMZ
AD8058ARMZ-REEL
AD8058AR-EBZ
AD8058ARM-EBZ
2
2
2
8-Lead MSOP
8-Lead SOIC_N Evaluation Board
8-Lead MSOP Evaluation Board
1 Z = RoHS Compliant Part.
2 Bottom mark has # sign before date code.
©2010–2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D01064-0-3/14(E)
Rev. E | Page 16 of 16
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