AD818AR-REEL [ADI]

Low Cost, Low Power Video Op Amp; 低成本,低功耗视频运算放大器
AD818AR-REEL
型号: AD818AR-REEL
厂家: ADI    ADI
描述:

Low Cost, Low Power Video Op Amp
低成本,低功耗视频运算放大器

商用集成电路 运算放大器 光电二极管
文件: 总12页 (文件大小:353K)
中文:  中文翻译
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Low Cost, Low Power  
Video Op Amp  
a
AD818  
CONNECTION DIAGRAMS  
8-Lead Plastic Mini-DIP (N), and  
SOIC (R) Packages  
FEATURES  
Low Cost  
Excellent Video Performance  
55 MHz 0.1 dB Bandwidth (Gain = +2)  
0.01% & 0.05؇ Differential Gain & Phase Errors  
High Speed  
130 MHz Bandwidth (3 dB, G = +2)  
100 MHz Bandwidth (3 dB, G+ = –1)  
500 V/s Slew Rate  
80 ns Settling Time to 0.01% (VO = 10 V Step)  
High Output Drive Capability  
50 mA Minimum Output Current  
Ideal for Driving Back Terminated Cables  
Flexible Power Supply  
NULL  
8
NULL  
IN  
1
2
AD818  
+V  
7
6
S
+IN  
OUTPUT  
NC  
3
4
5
V  
S
TOP VIEW  
NC = NO CONNECT  
Specified for Single (+5 V) and Dual (؎5 V to ؎15 V)  
Power Supplies  
Low Power: 7.5 mA max Supply Current  
Available in 8-Lead SOIC and 8-Lead Plastic Mini-DIP  
and 500 V/µs slew rate make the AD818 useful in many high  
speed applications including: video monitors, CATV, color  
copiers, image scanners and fax machines.  
PRODUCT DESCRIPTION  
The AD818 is a low cost, video op amp optimized for use in  
video applications which require gains equal to or greater than  
+2 or –1. The AD818 low differential gain and phase errors,  
single supply functionality, low power and high output drive  
make it ideal for cable driving applications such as video cam-  
eras and professional video equipment.  
The AD818 is fully specified for operation with a single +5 V  
power supply and with dual supplies from 5 V to 15 V. This  
power supply flexibility, coupled with a very low supply current  
of 7.5 mA and excellent ac characteristics under all power  
supply conditions, make the AD818 the ideal choice for many  
demanding yet power sensitive applications.  
With video specs like 0.1 dB flatness to 55 MHz and low differ-  
ential gain and phase errors of 0.01% and 0.05°, along with  
50 mA of output current, the AD818 is an excellent choice for  
any video application. The 130 MHz 3 dB bandwidth (G = +2)  
The AD818 is a voltage feedback op amp and excels as a gain  
stage in high speed and video systems (gain = >2 or –1). It  
achieves a settling time of 45 ns to 0.1%, with a low input offset  
voltage of 2 mV max.  
The AD818 is available in low cost, small 8-lead plastic mini-  
DIP and SOIC packages.  
+15V  
0.02  
0.01µF  
2.2µF  
DIFF GAIN  
0.01  
7
V
Rbt  
75Ω  
IN  
3
2
75  
6
AD818  
0.06  
0.05  
0.00  
4
Rt  
75  
DIFF PHASE  
0.1µF  
2.2µF  
0.04  
0.03  
–15V  
1kΩ  
5
10  
15  
1k  
SUPPLY VOLTAGE Vꢀols  
AD818 Video Line Driver  
AD818 Differential Gain and Phase vs. Supply  
REV. B  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  
(@ TA = +25؇C, unless otherwise noted)  
AD818–SPECIFICATIONS  
AD818A  
Typ  
Parameter  
Conditions  
VS  
Min  
Max  
Units  
DYNAMIC PERFORMANCE  
–3 dB Bandwidth  
Gain = +2  
5 V  
70  
100  
40  
50  
70  
30  
20  
40  
10  
18  
40  
10  
95  
130  
55  
70  
100  
50  
43  
55  
18  
34  
72  
19  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
15 V  
0, +5 V  
5 V  
15 V  
0, +5 V  
5 V  
15 V  
0, +5 V  
5 V  
15 V  
0, +5 V  
Gain = –1  
Bandwidth for 0.1 dB Flatness  
Gain = +2  
CC = 2 pF  
Gain = –1  
CC = 2 pF  
Full Power Bandwidth1  
Slew Rate  
VOUT = 5 V p-p  
RLOAD = 500 Ω  
VOUT = 20 V p-p  
RLOAD = 1 kΩ  
RLOAD = 1 kΩ  
Gain = –1  
5 V  
25.5  
MHz  
15 V  
5 V  
15 V  
0, +5 V  
5 V  
15 V  
5 V  
8.0  
MHz  
V/µs  
V/µs  
V/µs  
ns  
ns  
ns  
350  
450  
250  
400  
500  
300  
45  
45  
80  
Settling Time to 0.1%  
to 0.01%  
–2.5 V to +2.5 V  
0 V–10 V Step, AV = –1  
–2.5 V to +2.5 V  
0 V–10 V Step, AV = –1  
15 V  
15 V  
15 V  
5 V  
0, +5 V  
15 V  
5 V  
80  
63  
ns  
dB  
%
%
Total Harmonic Distortion  
Differential Gain Error  
(RL = 150 )  
F
C = 1 MHz  
NTSC  
Gain = +2  
0.005  
0.01  
0.08  
0.045  
0.06  
0.1  
0.01  
0.02  
%
Differential Phase Error  
(RL = 150 )  
NTSC  
Gain = +2  
0.09  
0.09  
Degrees  
Degrees  
Degrees  
pF  
0, +5 V  
Cap Load Drive  
10  
INPUT OFFSET VOLTAGE  
5 V to 15 V  
5 V, 15 V  
5 V, 15 V  
5 V  
0.5  
2
3
mV  
mV  
µV/°C  
T
MIN to TMAX  
Offset Drift  
10  
INPUT BIAS CURRENT  
3.3  
6.6  
10  
4.4  
nA  
nA  
nA/°C  
TMIN  
TMAX  
INPUT OFFSET CURRENT  
25  
300  
500  
nA  
nA  
nA/°C  
TMIN to TMAX  
Offset Current Drift  
OPEN-LOOP GAIN  
0.3  
VOUT  
= 2.5 V  
RLOAD = 500 Ω  
TMIN to TMAX  
RLOAD = 150 Ω  
3
2
2
5
4
9
V/mV  
V/mV  
V/mV  
VOUT  
=
10 V  
15 V  
15 V  
RLOAD = 1 kΩ  
TMIN to TMAX  
6
3
V/mV  
V/mV  
VOUT  
= 7.5 V  
RLOAD = 150 Ω  
(50 mA Output)  
3
5
V/mV  
COMMON-MODE REJECTION  
POWER SUPPLY REJECTION  
VCM  
VCM  
TMIN to TMAX  
=
=
2.5 V  
12 V  
5 V  
15 V  
15 V  
82  
86  
84  
100  
120  
100  
dB  
dB  
dB  
VS = 5 V to 15 V  
TMIN to TMAX  
80  
80  
90  
dB  
dB  
INPUT VOLTAGE NOISE  
INPUT CURRENT NOISE  
f = 10 kHz  
f = 10 kHz  
5 V, 15 V  
5 V, 15 V  
10  
nV/Hz  
pA/Hz  
1.5  
–2–  
REV. B  
AD818  
AD818A  
Typ  
Parameter  
Conditions  
VS  
Min  
Max  
Units  
INPUT COMMON-MODE VOLTAGE  
RANGE  
5 V  
+3.8  
–2.7  
+13  
–12  
+3.8  
+1.2  
+4.3  
–3.4  
+14.3  
–13.4  
+4.3  
+0.9  
V
V
V
V
V
V
15 V  
0, +5 V  
OUTPUT VOLTAGE SWING  
Output Current  
R
LOAD = 500 Ω  
5 V  
5 V  
15 V  
15 V  
0, +5 V  
3.3  
3.2  
13.3  
12.8  
+1.5,  
+3.5  
50  
3.8  
3.6  
13.7  
13.4  
V
V
V
V
RLOAD = 150 Ω  
R
RLOAD = 500 Ω  
RLOAD = 500 Ω  
LOAD = 1 kΩ  
V
15 V  
5 V  
0, +5 V  
15 V  
mA  
mA  
mA  
mA  
50  
30  
Short-Circuit Current  
INPUT RESISTANCE  
INPUT CAPACITANCE  
OUTPUT RESISTANCE  
90  
300  
1.5  
8
kΩ  
pF  
Open Loop  
POWER SUPPLY  
Operating Range  
Dual Supply  
Single Supply  
2.5  
+5  
18  
+36  
7.5  
7.5  
7.5  
7.5  
V
V
mA  
mA  
mA  
mA  
Quiescent Current  
5 V  
5 V  
15 V  
15 V  
7.0  
7.0  
TMIN to TMAX  
TMIN to TMAX  
NOTE  
1Full power bandwidth = slew rate/2 π VPEAK  
.
2.0  
1.5  
1.0  
0.5  
0
Specifications subject to change without notice.  
T
J
= 150°C  
8-LEAD MINI-DIP PACKAGE  
ABSOLUTE MAXIMUM RATINGS1  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V  
Internal Power Dissipation2  
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . See Derating Curves  
Small Outline (R) . . . . . . . . . . . . . . . . . See Derating Curves  
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VS  
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 V  
Output Short Circuit Duration . . . . . . . . See Derating Curves  
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C  
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C  
8-LEAD SOIC PACKAGE  
Lead Temperature Range (Soldering 10 seconds) . . . . +300°C  
NOTES  
50 40 30 20 10  
0 +10 +20 +30 +40 +50 +60 +70 +80 +90  
1Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only; functional operation of the  
device at these or any other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect device reliability.  
2Specification is for device in free air: 8-lead plastic package, θJA = 90°C/W; 8-lead  
SOIC package, θJA = 155°C/W.  
AMBIENT TEMPERATURE °C  
Maximum Power Dissipation vs. Temperature for Differ-  
ent Package Types  
ESD SUSCEPTIBILITY  
ORDERING GUIDE  
ESD (electrostatic discharge) sensitive device. Electrostatic  
charges as high as 4000 volts, which readily accumulate on the  
human body and on test equipment, can discharge without de-  
tection. Although the AD818 features proprietary ESD protec-  
tion circuitry, permanent damage may still occur on these  
devices if they are subjected to high energy electrostatic dis-  
charges. Therefore, proper ESD precautions are recommended  
to avoid any performance degradation or loss of functionality.  
Temperature  
Range  
Package  
Description  
Package  
Option  
Model  
AD818AN  
–40°C to +85°C  
–40°C to +85°C  
8-Lead  
Plastic DIP  
8-Lead  
N-8  
AD818AR  
SO-8  
Plastic SOIC  
13" Tape & Reel  
7" Tape & Reel  
AD818AR-REEL –40°C to +85°C  
AD818AR-REEL7 –40°C to +85°C  
SO-8  
SO-8  
REV. B  
–3–  
AD818 –Typical Characteristics  
METALIZATION PHOTOGRAPH  
Dimensions shown in inches and (mm).  
600  
500  
20  
15  
10  
+V  
CM  
400  
300  
200  
V  
CM  
5
0
0
5
10  
SUPPLY VOLTAGE Vꢀols  
15  
20  
0
15  
SUPPLY VOLTAGE Vꢀols  
20  
5
10  
Figure 3. Slew Rate vs. Supply Voltage  
Figure 1. Common-Mode Voltage Range vs. Supply  
30  
20  
15  
10  
5
25  
V
= 15V  
S
20  
15  
10  
5
R
= 500Ω  
L
= 150  
R
L
V
= 5V  
S
0
0
10  
100  
1k  
10k  
5
10  
15  
20  
0
SUPPLY VOLTAGE Vꢀols  
LOAD RESISTANCE Ω  
Figure 2. Output Voltage Swing vs. Load Resistance  
Figure 4. Output Voltage Swing vs. Supply  
–4–  
REV. B  
AD818  
70  
60  
50  
95  
8.0  
7.5  
7.0  
PHASE MARGIN  
85  
75  
+85°C  
+25°C  
-40°C  
GAIN/BANDWIDTH  
40  
30  
65  
6.5  
6.0  
55  
60 40 20  
0
20  
40  
60  
80  
100 120 140  
5
10  
SUPPLY VOLTAGE Vꢀols  
15  
20  
0
TEMPERATURE – °C  
Figure 8. –3 dB Bandwidth and Phase Margin vs.  
Temperature. Gain = +2  
Figure 5. Quiescent Supply Current vs. Supply Voltage  
9
100  
15V  
8
10  
1
7
5V  
6
5
0.1  
4
3
0.01  
100  
1k  
10k  
1k  
10k  
100k  
1M  
10M  
100M  
FREQUENCY Hz  
LOAD RESISTANCE Ohms  
Figure 9. Open-Loop Gain vs. Load Resistance  
Figure 6. Closed-Loop Output Impedance vs. Frequency  
130  
7
6
5
110  
SOURCE CURRENT  
90  
4
3
2
SINK CURRENT  
70  
50  
30  
1
60 40 20  
0
60 40 20  
20  
40  
60  
80  
100 120 140  
20  
40  
60  
80  
100 120 140  
0
TEMPERATURE –  
°C  
TEMPERATURE – °C  
Figure 7. Input Bias Current vs. Temperature  
Figure 10. Short Circuit Current vs. Temperature  
REV. B  
–5–  
AD818–Typical Characteristics  
10  
8
100  
+100  
+80  
PHASE 5V OR  
15V SUPPLIES  
80  
6
4
15V SUPPLIES  
= 1k  
60  
40  
20  
0
+60  
+40  
+20  
0
R
1%  
1%  
0.1%  
0.1%  
L
0.01%  
0.01%  
2
0
2  
4  
5V SUPPLIES  
= 1k Ω  
R
L
6  
8  
10  
20  
20  
40  
60  
80  
100  
120  
140  
160  
0
1k  
10k  
100k  
1M  
10M  
100M  
1G  
SETTLING TIME ns  
FREQUENCY Hz  
Figure 11. Open-Loop Gain and Phase Margin vs.  
Frequency  
Figure 14. Output Swing and Error vs. Settling Time  
50  
40  
100  
90  
80  
+SUPPLY  
70  
30  
20  
60  
50  
SUPPLY  
40  
10  
0
30  
20  
10  
1
10  
100  
1k  
10k  
100k  
1M  
10M  
100  
1k  
10k  
100k  
1M  
10M  
100M  
FREQUENCY Hz  
FREQUENCY Hz  
Figure 12. Power Supply Rejection vs. Frequency  
Figure 15. Input Voltage Noise Spectral Density vs.  
Frequency  
120  
30  
R = 1k  
L
100  
80  
20  
10  
R = 150Ω  
L
60  
40  
0
100k  
1k  
10k  
100k  
1M  
10M  
1M  
10M  
100M  
FREQUENCY Hz  
FREQUENCY Hz  
Figure 16. Output Voltage vs. Frequency  
Figure 13. Common-Mode Rejection vs. Frequency  
–6–  
REV. B  
AD818  
40  
50  
C
C
10  
9
8
7
6
5
4
3
2
1
V
C
0.1dB  
Foalness  
S
C
R
= 150Ω  
L
1k  
AD818  
1k  
IN  
2V p-p  
V
OUT  
؎15V 2pF 55 MHz  
؎5V 1pF 43 MHz  
+5V 1pF 18 MHz  
V
150  
60  
70  
2nd HARMONIC  
؎15V  
؎5V  
80  
90  
3rd HARMONIC  
+5V  
100  
100  
1k  
10k  
100k  
1M  
10M  
1M  
10M  
100M  
1G  
FREQUENCY Hz  
FREQUENCY Hz  
Figure 20. Closed-Loop Gain vs. Frequency (G = +2)  
Figure 17. Harmonic Distortion vs. Frequency  
650  
10  
2pF  
V
0.1dB  
8
6
4
2
0
S
FLATNESS  
1k  
1k  
15V 72 MHz  
5V 34 MHz  
V
OUT  
550  
450  
350  
250  
V
AD818  
IN  
+5V 19 MHz  
150  
15V  
2  
4  
6  
+5V  
5V  
8  
10  
60 40 20  
20  
40  
60  
80  
100 120 140  
0
1G  
1M  
10M  
100M  
TEMPERATURE – °C  
FREQUENCY Hz  
Figure 18. Slew Rate vs. Temperature  
Figure 21. Closed-Loop Gain vs. Frequency (G = –1)  
0.02  
0.01  
DIFF GAIN  
0.00  
0.06  
0.05  
0.04  
DIFF PHASE  
0.03  
5
10  
15  
SUPPLY VOLTAGE Vꢀols  
Figure 19. Differential Gain and Phase vs. Supply Voltage  
REV. B  
–7–  
AD818–Typical Characteristics  
C
F
1k  
S
5V  
50ns  
+V  
3.3µF  
100  
90  
0.01µF  
HP  
V
1kΩ  
IN  
PULSE (LS)  
OR FUNCTION  
(SS)  
7
2
3
TEKTRONIX  
7A24  
PREAMP  
TEKTRONIX  
P6201 FET  
PROBE  
6
GENERATOR  
AD818  
50  
V
OUT  
10  
4
0.01µF  
0%  
R
5V  
L
3.3µF  
V  
S
Figure 22. Inverting Amplifier Connection  
Figure 25. Inverter Large Signal Pulse Response 15 VS,  
CF = 1 pF, RL = 1 kΩ  
2V  
50ns  
200mV  
10ns  
100  
90  
100  
90  
10  
10  
0%  
0%  
200mV  
2V  
Figure 26. Inverter Small Signal Pulse Response 15 VS,  
Figure 23. Inverter Large Signal Pulse Response 5 VS,  
CF = 1 pF, RL = 150 Ω  
CF = 1 pF, RL = 1 kΩ  
200mV  
200mV  
10ns  
10ns  
100  
90  
100  
90  
10  
10  
0%  
0%  
200mV  
200mV  
Figure 24. Inverter Small Signal Pulse Response 5 VS,  
Figure 27. Inverter Small Signal Pulse Response 5 VS,  
CF = 1 pF, RL = 150 Ω  
CF = 0 pF, RL = 150 Ω  
–8–  
REV. B  
AD818  
C
F
1k  
1k  
S
5V  
50ns  
3.3µF  
+V  
100  
90  
0.01µF  
7
2
3
TEKTRONIX  
P6201 FET  
PROBE  
TEKTRONIX  
7A24  
PREAMP  
6
HP  
AD818  
V
100  
PULSE (LS)  
OR FUNCTION  
(SS)  
IN  
V
OUT  
4
10  
0.01µF  
GENERATOR  
0%  
50  
R
L
5V  
3.3µF  
V  
S
Figure 28. Noninverting Amplifier Connection  
Figure 31. Noninverting Large Signal Pulse Response  
15 V, CF = 1 pF, RL = 1 kΩ  
2V  
50ns  
100mV  
10ns  
100  
90  
100  
90  
10  
10  
0%  
0%  
200mV  
2V  
Figure 29. Noninverting Large Signal Pulse Response  
Figure 32. Noninverting Small Signal Pulse Response  
5 V, CF = 1 pF, RL = 1 kΩ  
15 V, CF = 1 pF, RL = 150 Ω  
100mV  
10ns  
100mV  
10ns  
100  
90  
100  
90  
10  
10  
0%  
0%  
200mV  
200mV  
Figure 30. Noninverting Small Signal Pulse Response  
Figure 33. Noninverting Small Signal Pulse Response  
5 V, CF = 1 pF, RL = 150 Ω  
5 V, CF = 0 pF, RL = 150 Ω  
REV. B  
–9–  
AD818  
+V  
may result in peaking. A small capacitance (1–5 pF) may be  
used in parallel with the feedback resistor to neutralize this  
effect.  
S
Power supply leads should be bypassed to ground as close as  
possible to the amplifier pins. Ceramic disc capacitors of  
0.1 µF are recommended.  
OUTPUT  
IN  
+V  
S
7
2
3
+IN  
AD818  
6
8
1
4
10k  
V  
S
V
ADJUST  
OS  
V  
S
NULL 1  
NULL 8  
Figure 35. Offset Null Configuration  
OFFSET NULLING  
Figure 34. AD818 Simplified Schematic  
THEORY OF OPERATION  
The input offset voltage of the AD818 is inherently very low.  
However, if additional nulling is required, the circuit shown in  
Figure 35 can be used. The null range of the AD818 in this  
configuration is 10 mV.  
The AD818 is a low cost, video operational amplifier designed  
to excel in high performance, high output current video  
applications.  
The AD818 (Figure 34) consists of a degenerated NPN differ-  
ential pair driving matched PNPs in a folded-cascode gain stage.  
The output buffer stage employs emitter followers in a class AB  
amplifier which delivers the necessary current to the load, while  
maintaining low levels of distortion.  
SINGLE SUPPLY OPERATION  
Another exciting feature of the AD818 is its ability to perform  
well in a single supply configuration. The AD818 is ideally  
suited for applications that require low power dissipation and  
high output current.  
The AD818 will drive terminated cables and capacitive loads of  
10 pF or less. As the closed-loop gain is increased, the AD818  
will drive heavier cap loads without oscillating.  
Referring to Figure 36, careful consideration should be given to  
the proper selection of component values. The choices for  
this particular circuit are: R1 + R3ʈR2 combine with C1 to  
form a low frequency corner of approximately 10 kHz. C4 was  
inserted in series with R4 to maintain amplifier stability at high  
frequency.  
INPUT CONSIDERATIONS  
An input protection resistor (RIN in Figure 28) is required in  
circuits where the input to the AD818 will be subjected to tran-  
sient of continuous overload voltages exceeding the 6 V maxi-  
mum differential limit. This resistor provides protection for the  
input transistors by limiting their maximum base current.  
Combining R3 with C2 forms a low pass filter with a corner  
frequency of approximately 500 Hz. This is needed to maintain  
amplifier PSRR, since the supply is connected to VIN through  
the input divider. The values for R2 and C2 were chosen to  
demonstrate the AD818’s exceptional output drive capability. In  
this configuration, the output is centered around 2.5 V. In order  
to eliminate the static dc current associated with this level, C3  
was inserted in series with RL.  
For high performance circuits, it is recommended that a “bal-  
ancing” resistor be used to reduce the offset errors caused by  
bias current flowing through the input and feedback resistors.  
The balancing resistor equals the parallel combination of RIN  
and RF and thus provides a matched impedance at each input  
terminal. The offset voltage error will then be reduced by more  
than an order of magnitude.  
+V  
S
R3  
100  
GROUNDING AND BYPASSING  
SELECT C1, R1, R2  
R4  
1k⍀  
When designing high frequency circuits, some special precau-  
tions are in order. Circuits must be built with short interconnect  
leads. When wiring components, care should be taken to pro-  
vide a low resistance, low inductance path to ground. Sockets  
should be avoided, since their increased interlead capacitance  
can degrade circuit bandwidth.  
FOR DESIRED LOW  
1k⍀  
3.3F  
FREQUENCY CORNER.  
C2  
C4  
0.001F  
3.3F  
0.01F  
R1  
7
2
3
3.3k⍀  
C1  
0.01F  
V
6
AD818  
OUT  
R
L
V
IN  
4
Feedback resistors should be of low enough value (1 k) to  
assure that the time constant formed with the inherent stray  
capacitance at the amplifier’s summing junction will not limit  
performance. This parasitic capacitance, along with the parallel  
resistance of RF/RIN, form a pole in the loop transmission which  
150⍀  
R2  
3.3k⍀  
C3  
0.1F  
Figure 36. Single Supply Amplifier Configuration  
–10–  
REV. B  
AD818  
15pF  
1M  
2×  
ERROR AMPLIFIER  
ERROR  
HP2835  
V
OUTPUT × 10  
5
AD829  
7
3
2
SHORT, DIRECT  
CONNECTION TO  
TEKTRONIX TYPE 11402  
OSCILLOSCOPE PREAMP  
INPUT SECTION  
100  
2×  
ERROR  
SIGNAL  
OUTPUT  
6
HP2835  
4
0.47µF  
0.01µF  
0.01µF  
0 TO 10V  
POWER  
SUPPLY  
0.47µF  
EI&S  
V  
S
DL1A05GM  
MERCURY  
RELAY  
FALSE  
SUMMING  
NODE  
+V  
NULL  
ADJUST  
S
1.9k  
7, 8  
1kΩ  
100Ω  
1kΩ  
100Ω  
500Ω  
2
SETTLING  
OUTPUT  
NOTE:  
USE CIRCUIT BOARD  
WITH GROUND PLANE  
50  
13  
TTL LEVEL  
SIGNAL  
COAX  
CABLE  
518pF  
DEVICE  
UNDER  
TEST  
1, 14  
GENERATOR  
50Hz  
500Ω  
50Ω  
TEKTRONIX P6201  
2
FET PROBE TO  
OUTPUT  
AD818  
TEKTRONIX TYPE 11402  
OSCILLOSCOPE  
6
10pF  
4
3
PREAMP INPUT SECTION  
SCOPE PROBE  
CAPACITANCE  
DIGITAL  
7
GROUND  
2.2µF  
0.01µF  
ANALOG  
GROUND  
V  
S
2.2µF  
0.01µF  
+V  
S
Figure 37. Settling Time Test Circuit  
DIFFERENTIAL LINE RECEIVER  
AD818 SETTLING TIME  
Settling time is comprised primarily of two regions. The first is  
the slew time in which the amplifier is overdriven, where the  
output voltage rate of change is at its maximum. The second is  
the linear time period required for the amplifier to settle to  
within a specified percent of the final value.  
The differential receiver circuit of Figure 39 is useful for many  
applications from audio to video. It allows extraction of a low  
level signal in the presence of common-mode noise. As shown  
in Figure 40, the AD818 provides this function with only  
10 nV/Hz noise at the output.  
Measuring the rapid settling time of AD818 (45 ns to 0.1% and  
80 ns to 0.01%—10 V step) requires applying an input pulse  
with a very fast edge and an extremely flat top. With the AD818  
configured in a gain of –1, a clamped false summing junction  
responds when the output error is within the sum of two diode  
voltages (approximately 1 volt). The signal is then amplified 20  
times by a clamped amplifier whose output is connected directly  
to a sampling oscilloscope.  
2pF  
1k  
1k⍀  
+5V  
2.2F  
2.2F  
0.01F  
7
2
DIFFERENTIAL  
AD818  
OUTPUT  
6
0.01F  
1k⍀  
V
INPUT  
OUT  
3
4
A High Performance Video Line Driver  
The buffer circuit shown in Figure 38 will drive a back-termi-  
nated 75 video line to standard video levels (1 V p-p) with  
0.1 dB gain flatness to 55 MHz with only 0.05° and 0.01%  
differential phase and gain at the 3.58 MHz NTSC subcarrier  
frequency. This level of performance, which meets the require-  
ments for high-definition video displays and test equipment, is  
achieved using only 7 mA quiescent current.  
5V  
1k⍀  
2pF  
Figure 39. Differential Line Receiver  
+15V  
100  
90  
2.2µF  
0.01µF  
20ns  
1V  
2V  
7
Rbl  
V
75  
2
IN  
75  
AD818  
Rl  
6
75  
Rl  
75Ω  
3
4
2.2µF  
0.01µF  
15V  
1kΩ  
10  
0%  
1k  
Figure 38. Video Line Driver  
Figure 40. Performance of Line Receiver, RL = 150 ,  
G = +2  
REV. B  
–11–  
AD818  
A HIGH SPEED, THREE OP AMP IN AMP  
OUTLINE DIMENSIONS  
Dimensions shown in inches and (mm).  
The circuit of Figure 41 uses three high speed op amps: two  
AD818s and an AD817. This high speed circuit lends itself well  
to CCD imaging and other video speed applications. It has the  
optional flexibility of both dc and ac trims for common-mode  
rejection, plus the ability to adjust for minimum settling time.  
8-Lead Plastic Mini-DIP (N) Package  
8
5
0.25  
(6.35)  
0.31  
(7.87)  
PIN 1  
EACH  
AMPLIFIER  
1
4
PIN 7  
+15V  
10µF  
+V  
EACH  
S
AMPLIFIER  
0.30 (7.62)  
REF  
1µF  
1µF  
0.1µF  
0.39 (9.91) MAX  
0.1µF  
0.035 0.01  
(0.89 0.25)  
COMMON  
0.165 0.01  
(4.19 0.25)  
0.1µF  
10µF  
0.1µF  
PIN 4  
0.011 0.003  
(0.28 0.08)  
0.18 0.03  
(4.57 0.76)  
15V  
V  
0.125  
(3.18)  
MIN  
EACH  
S
AMPLIFIER  
15°  
0°  
0.018 0.003  
(0.46 0.08) (2.54)  
0.10  
0.033  
(0.84)  
NOM  
V  
IN  
SEATING  
PLANE  
SETTLING  
A1  
AD818  
TIME A.C.  
BSC  
2-8 pF  
CMR ADJUST  
1k  
8-Lead SOIC (R) Package  
1k⍀  
1k⍀  
0.1968 (5.00)  
0.1890 (4.80)  
V
OUT  
5pF  
5pF  
A3  
AD817  
R
2pF  
G
1k⍀  
8
1
5
4
R
2k⍀  
L
0.2440 (6.20)  
0.2284 (5.80)  
0.1574 (4.00)  
0.1497 (3.80)  
3pF  
1k⍀  
970⍀  
PIN 1  
0.0196 (0.50)  
0.0099 (0.25)  
0.0500 (1.27)  
BSC  
A2  
؋
 45؇  
50⍀  
D.C. CMR  
ADJUST  
AD818  
0.0688 (1.75)  
0.0532 (1.35)  
+V  
IN  
0.0098 (0.25)  
0.0040 (0.10)  
SEATING  
PLANE  
8؇  
0؇  
0.0500 (1.27)  
0.0160 (0.41)  
0.0192 (0.49)  
0.0138 (0.35)  
0.0098 (0.25)  
0.0075 (0.19)  
BANDWIDTH, SETTLING TIME, & TOTAL HARMONIC DISTORTION VS. GAIN  
SMALL  
SETTLING THD + NOISE  
CADJ  
(pF)  
SIGNAL  
TIME  
BELOW INPUT LEVEL  
GAIN  
R
BANDWIDTH  
TO 0.1%  
@ 10kHz  
G
200ns  
370ns  
2.5µs  
3
10  
100  
1k2-8  
2222-8  
202-8  
14.7 MHz  
4.5 MHz  
960 kHz  
82 dB  
81 dB  
71 dB  
Figure 41. High Speed 3 Op Amp In Amp  
–12–  
REV. B  

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