AD818 [ADI]
Low Cost, Low Power Video Op Amp; 低成本，低功耗视频运算放大器
| 型号： | AD818 |
| 厂家： | 
ADI |
| 描述： | Low Cost, Low Power Video Op Amp |
| 文件： | 总16页 (文件大小：927K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost, Low Power
Video Op Amp
AD818
FEATURES
CONNECTION DIAGRAM
Low Cost
8-Lead Plastic Mini-DIP (N) and SOIC (R) Packages
Excellent Video Performance
55 MHz 0.1 dB Bandwidth (Gain = +2)
0.01% and 0.05؇ Differential Gain and Phase Errors
High Speed
130 MHz Bandwidth (3 dB, G = +2)
100 MHz Bandwidth (3 dB, G+ = –1)
500 V/s Slew Rate
80 ns Settling Time to 0.01% (VO = 10 V Step)
High Output Drive Capability
50 mA Minimum Output Current
Ideal for Driving Back Terminated Cables
Flexible Power Supply
NULL
NULL
8
7
6
5
1
2
3
4
AD818
+V
S
–IN
+IN
OUTPUT
NC
–V
S
TOP VIEW
NC = NO CONNECT
any video application. The 130 MHz 3 dB bandwidth (G = +2)
and 500 V/ms slew rate make the AD818 useful in many high speed
applications including video monitors, CATV, color copiers,
image scanners, and fax machines.
Specified for Single (+5 V) and Dual (؎5 V to ؎15 V)
Power Supplies
Low Power: 7.5 mA Max Supply Current
Available in 8-Lead SOIC and 8-Lead PDIP
The AD818 is fully specified for operation with a single +5 V
power supply and with dual supplies from ±5 V to ±15 V. This
power supply flexibility, coupled with a very low supply current
of 7.5 mA and excellent ac characteristics under all power sup-
ply conditions, make the AD818 the ideal choice for many
demanding yet power sensitive applications.
GENERAL DESCRIPTION
The AD818 is a low cost video op amp optimized for use in
video applications that require gains equal to or greater than +2
or –1. The AD818’s low differential gain and phase errors,
single supply functionality, low power, and high output drive
make it ideal for cable driving applications such as video
cameras and professional video equipment.
The AD818 is a voltage feedback op amp and excels as a gain
stage in high speed and video systems (gain ≥ 2, or gain £ –1). It
achieves a settling time of 45 ns to 0.1%, with a low input offset
voltage of 2 mV max.
With video specs like 0.1 dB flatness to 55 MHz and low differ-
ential gain and phase errors of 0.01% and 0.05∞, along with
50 mA of output current, the AD818 is an excellent choice for
The AD818 is available in low cost, small 8-lead PDIP and
SOIC packages.
+15V
0.02
0.01F
2.2F
DIFF GAIN
0.01
R
BT
75⍀
V
IN
75⍀
AD818
0.06
0.05
0.04
0.03
0.00
R
75⍀
T
DIFF PHASE
0.1F
2.2F
–15V
1k⍀
5
10
15
1k⍀
SUPPLY VOLTAGE (؎V)
Figure 2. Differential Gain and Phase vs. Supply
Figure 1. Video Line Driver
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
AD818–SPECIFICATIONS
(@ TA = 25؇C, unless otherwise noted.)
AD818A
Typ
Parameter
Conditions
VS
Min
Max
Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Gain = +2
±5 V
70
100
40
50
70
30
20
40
10
18
40
10
95
130
55
70
100
50
43
55
18
34
72
19
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
±15 V
0 V, +5 V
±5 V
Gain = –1
±15 V
0 V, +5 V
±5 V
Bandwidth for 0.1 dB Flatness
Gain = +2
CC = 2 pF
±15 V
0 V, +5 V
±5 V
Gain = –1
CC = 2 pF
±15 V
0 V, +5 V
Full Power Bandwidth*
VOUT = 5 V p-p
RLOAD = 500 W
VOUT = 20 V p-p
±5 V
25.5
MHz
R
LOAD = 1 kW
±15 V
±5 V
±15 V
0 V, +5 V
±5 V
±15 V
±5 V
±15 V
±15 V
±15 V
±5 V
8.0
MHz
V/ms
V/ms
V/ms
ns
ns
ns
ns
dB
%
%
Slew Rate
RLOAD = 1 kW
Gain = –1
350
450
250
400
500
300
45
45
80
Settling Time to 0.1%
Settling Time to 0.01%
–2.5 V to +2.5 V
0 V–10 V Step, AV = –1
–2.5 V to +2.5 V
0 V–10 V Step, AV = –1
FC = 1 MHz
80
63
Total Harmonic Distortion
Differential Gain Error
(RL = 150 W)
NTSC
Gain = +2
0.005
0.01
0.08
0.045
0.06
0.1
0.01
0.02
0 V, +5 V
±15 V
±5 V
%
Differential Phase Error
(RL = 150 W)
NTSC
Gain = +2
0.09
0.09
Degrees
Degrees
Degrees
pF
0 V, +5 V
Cap Load Drive
10
INPUT OFFSET VOLTAGE
±5 V to ±15 V
±5 V, ±15 V
±5 V, ±15 V
±5 V
0.5
2
3
mV
mV
mV/∞C
TMIN to TMAX
Offset Drift
10
INPUT BIAS CURRENT
3.3
6.6
10
4.4
mA
mA
mA
TMIN
TMAX
INPUT OFFSET CURRENT
25
300
500
nA
nA
nA/∞C
TMIN to TMAX
Offset Current Drift
OPEN-LOOP GAIN
0.3
VOUT = ±2.5 V
R
LOAD = 500 W
3
2
2
5
4
9
V/mV
V/mV
V/mV
TMIN to TMAX
RLOAD = 150 W
V
OUT = ±10 V
±15 V
±15 V
RLOAD = 1 kW
TMIN to TMAX
6
3
V/mV
V/mV
V
OUT = ±7.5 V
RLOAD = 150 W
(50 mA Output)
3
5
V/mV
COMMON-MODE REJECTION
V
CM = ±2.5 V
±5 V
±15 V
±15 V
82
86
84
100
120
100
dB
dB
dB
VCM = ±12 V
TMIN to TMAX
–2–
REV. C
AD818
AD818A
Typ
Parameter
Conditions
VS
Min
Max
Unit
POWER SUPPLY REJECTION
VS = ±5 V to ±15 V
TMIN to TMAX
80
80
90
dB
dB
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
f = 10 kHz
f = 10 kHz
±5 V, ±15 V
±5 V, ±15 V
10
nV/÷Hz
pA/÷Hz
1.5
INPUT COMMON-MODE
VOLTAGE RANGE
±5 V
+3.8
–2.7
+13
–12
+3.8
+1.2
+4.3
–3.4
+14.3
–13.4
+4.3
+0.9
V
V
V
V
V
V
±15 V
0 V, +5 V
OUTPUT VOLTAGE SWING
Output Current
R
LOAD = 500 W
±5 V
3.3
3.2
13.3
12.8
1.5, 3.5
50
3.8
3.6
13.7
13.4
±V
±V
±V
±V
V
mA
mA
mA
mA
RLOAD = 150 W
±5 V
RLOAD = 1 kW
±15 V
±15 V
0 V, +5 V
±15 V
±5 V
0 V, +5 V
±15 V
R
LOAD = 500 W
RLOAD = 500 W
50
30
Short-Circuit Current
INPUT RESISTANCE
INPUT CAPACITANCE
OUTPUT RESISTANCE
90
300
1.5
8
kW
pF
W
Open Loop
POWER SUPPLY
Operating Range
Dual Supply
Single Supply
±2.5
+5
±18
+36
7.5
7.5
7.5
7.5
V
V
mA
mA
mA
mA
Quiescent Current
±5 V
7.0
7.0
TMIN to TMAX
TMIN to TMAX
±5 V
±15 V
±15 V
*Full power bandwidth = slew rate/(2p VPEAK).
Specifications subject to change without notice.
REV. C
–3–
AD818
ABSOLUTE MAXIMUM RATINGS1
2.0
1.5
1.0
0.5
0
T
= 150 C
J
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
8-LEAD MINI-DIP PACKAGE
Internal Power Dissipation2
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . See Derating Curves
Small Outline (R) . . . . . . . . . . . . . . . . . See Derating Curves
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±6 V
Output Short-Circuit Duration . . . . . . . . See Derating Curves
Storage Temperature Range (N, R) . . . . . . . . –65∞C to +125∞C
Operating Temperature Range . . . . . . . . . . . . –40∞C to +85∞C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300∞C
8-LEAD SOIC PACKAGE
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air: 8-lead plastic package, JA = 90∞C/W; 8-lead
SOIC package, JA = 155∞C/W.
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE (؇C)
Figure 3. Maximum Power Dissipation vs. Temperature
for Different Package Types
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
AD818AN
AD818AR
AD818AR-REEL
AD818AR-REEL7
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
8-Lead Plastic PDIP
8-Lead Plastic SOIC
13" Tape and Reel
7" Tape and Reel
N-8
R-8
R-8
R-8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD818 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
METALLIZATION PHOTOGRAPH
Dimensions shown in inches and (mm)
OFFSET OFFSET
+V
7
NULL
1
NULL
8
S
–INPUT
+INPUT
2
3
0.0523
(1.33)
6
OUTPUT
4
–V
S
0.0559 (1.42)
–4–
REV. C
Typical Performance Characteristics–AD818
20
20
15
15
10
R
= 500⍀
L
+V
CM
10
5
–V
CM
R
= 150⍀
L
5
0
0
0
5
10
SUPPLY VOLTAGE (؎V)
15
20
0
5
10
SUPPLY VOLTAGE (؎V)
15
20
TPC 1. Common-Mode Voltage Range vs. Supply
TPC 4. Output Voltage Swing vs. Supply
30
25
8.0
7.5
7.0
6.5
6.0
V
= ؎15V
S
20
+85؇C
+25؇C
15
10
–40؇C
V
= ؎5V
S
5
0
10
100
1k
10k
0
5
10
SUPPLY VOLTAGE (؎V)
15
20
LOAD RESISTANCE (⍀)
TPC 2. Output Voltage Swing vs. Load Resistance
TPC 5. Quiescent Supply Current vs. Supply Voltage
600
100
10
500
400
300
200
1
0.1
0.01
0
5
10
15
20
1k
10k
100k
1M
10M
100M
SUPPLY VOLTAGE (؎V)
FREQUENCY (Hz)
TPC 3. Slew Rate vs. Supply Voltage
TPC 6. Closed-Loop Output Impedance vs. Frequency
REV. C
–5–
AD818
7
130
110
90
6
5
4
3
2
1
SOURCE CURRENT
SINK CURRENT
70
50
30
–60 –40 –20
0
20
40
60
80
100 120 140
–60 –40 –20
0
20
40
60
80
100 120 140
TEMPERATURE (؇C)
TEMPERATURE (؇C)
TPC 7. Input Bias Current vs. Temperature
TPC 10. Short-Circuit Current vs. Temperature
100
100
80
60
40
20
0
70
60
50
95
85
75
PHASE ؎5V OR
؎15V SUPPLIES
80
60
40
20
0
PHASEMARGIN
؎15V SUPPLIES
= 1k⍀
R
L
؎5V SUPPLIES
= 1k⍀
R
L
GAIN/BANDWIDTH
40
30
65
55
–20
1k
10k
100k
1M
10M
100M
1G
–60 –40 –20
0
20
40
60
80
100 120 140
FREQUENCY (Hz)
TEMPERATURE (؇C)
TPC 8. –3 dB Bandwidth and Phase Margin vs.
Temperature, Gain = +2
TPC 11. Open-Loop Gain and Phase Margin vs.
Frequency
9
100
90
؎15V
8
80
+SUPPLY
7
70
؎5V
60
6
5
4
3
–SUPPLY
50
40
30
20
10
100
1k
10k
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
LOAD RESISTANCE (⍀)
TPC 12. Power Supply Rejection vs. Frequency
TPC 9. Open-Loop Gain vs. Load Resistance
–6–
REV. C
AD818
120
30
20
10
R
= 1k⍀
L
100
80
R
= 150⍀
L
60
0
100k
40
1M
10M
FREQUENCY (Hz)
100M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
TPC 13. Common-Mode Rejection vs. Frequency
TPC 16. Output Voltage vs. Frequency
10
8
–40
–50
–60
–70
–80
–90
–100
R
= 150⍀
L
2V p-p
6
4
1%
1%
0.1%
0.1%
0.01%
0.01%
2
0
SECOND HARMONIC
–2
–4
–6
–8
–10
THIRD HARMONIC
0
20
40
60
80
100
120
140
160
100
1k
10k
100k
1M
10M
SETTLING TIME (ns)
FREQUENCY (Hz)
TPC 14. Output Swing and Error vs. Settling Time
TPC 17. Harmonic Distortion vs. Frequency
50
40
650
550
450
350
250
30
20
10
0
1
10
100
1k
10k
100k
1M
10M
–60 –40 –20
0
20
40
60
80
100 120 140
FREQUENCY (Hz)
TEMPERATURE (؇C)
TPC 15. Input Voltage Noise Spectral Density vs.
Frequency
TPC 18. Slew Rate vs. Temperature
REV. C
–7–
AD818
C
F
0.02
0.01
1k⍀
DIFF GAIN
+V
S
3.3F
0.00
0.06
0.01F
HP
V
IN
PULSE (LS)
OR FUNCTION
(SS)
1k⍀
0.05
0.04
TEKTRONIX
7A24
PREAMP
TEKTRONIX
P6201 FET
PROBE
DIFF PHASE
AD818
GENERATOR
50⍀
V
OUT
0.01F
3.3F
R
L
0.03
5
10
15
SUPPLY VOLTAGE (؎V)
–V
S
TPC 19. Differential Gain and Phase vs. Supply Voltage
TPC 22. Inverting Amplifier Connection
C
C
0.1dB
10
9
V
C
FLATNESS
2V
50ns
S
C
1k⍀
1k⍀
؎15V 2pF 55MHz
؎5V 1pF 43MHz
+5V 1pF 18MHz
V
OUT
100
90
AD818
8
V
IN
150⍀
7
6
5
؎15V
؎5V
4
10
3
0%
+5V
2
2V
1
1M
10M
100M
1G
FREQUENCY (Hz)
TPC 20. Closed-Loop Gain vs. Frequency (G = +2)
TPC 23. Inverter Large Signal Pulse Response;
VS = ±5 V, CF = 1 pF, RL = 1 kW
10
0.1dB
FLATNESS
2pF
8
6
200mV
10ns
V
S
؎15V 72MHz
1k⍀
1k⍀
100
90
؎5V
+5V
34MHz
19MHz
V
OUT
AD818
4
V
IN
150⍀
2
0
–2
–4
–6
–8
–10
؎15V
+5V
10
0%
؎5V
200mV
1M
10M
100M
1G
FREQUENCY (Hz)
TPC 24. Inverter Small Signal Pulse Response;
VS = ±5 V, CF = 1 pF, RL = 150 W
TPC 21. Closed-Loop Gain vs. Frequency (G = –1)
–8–
REV. C
AD818
C
F
1k⍀
1k⍀
5V
50ns
+V
S
3.3F
100
90
0.01F
TEKTRONIX
TEKTRONIX
P6201 FET
PROBE
7A24
HP
AD818
V
IN
PREAMP
PULSE (LS)
OR FUNCTION
(SS)
100⍀
50⍀
V
OUT
10
0%
GENERATOR
0.01F
3.3F
5V
R
L
–V
S
TPC 25. Inverter Large Signal Pulse Response;
VS = ±15 V, CF = 1 pF, RL = 1 kW
TPC 28. Noninverting Amplifier Connection
200mV
10ns
1V
50ns
100
90
100
90
10
10
0%
0%
200mV
2V
TPC 26. Inverter Small Signal Pulse Response;
VS = ±15 V, CF = 1 pF, RL = 150 W
TPC 29. Noninverting Large Signal Pulse Response;
VS = ±5 V, CF = 1 pF, RL = 1 kW
200mV
10ns
100mV
10ns
100
90
100
90
10
10
0%
0%
200mV
200mV
TPC 27. Inverter Small Signal Pulse Response;
VS = ±5 V, CF = 0 pF, RL = 150 W
TPC 30. Noninverting Small Signal Pulse
Response; VS = ±5 V, CF = 1 pF, RL = 150 W
REV. C
–9–
AD818
5V
50ns
100mV
10ns
100
90
100
90
10
10
0%
0%
5V
200mV
TPC 31. Noninverting Large Signal Pulse Response;
TPC 33. Noninverting Small Signal Pulse Response;
VS = ±15 V, CF = 1 pF, RL = 1 kW
VS = ±5 V, CF = 0 pF, RL = 150 W
100mV
10ns
100
90
10
0%
200mV
TPC 32. Noninverting Small Signal Pulse Response;
VS = ±15 V, CF = 1 pF, RL = 150 W
–10–
REV. C
AD818
+V
S
may result in peaking. A small capacitance (1 pF–5 pF) may be
used in parallel with the feedback resistor to neutralize this effect.
Power supply leads should be bypassed to ground as close as
possible to the amplifier pins. Ceramic disc capacitors of 0.1 mF
are recommended.
OUTPUT
+V
S
–IN
+IN
AD818
10k⍀
V
ADJUST
–V
S
OS
–V
S
NULL 1
NULL 8
Figure 5. Offset Null Configuration
OFFSET NULLING
The input offset voltage of the AD818 is inherently very low.
However, if additional nulling is required, the circuit shown
in Figure 5 can be used. The null range of the AD818 in this
configuration is ±10 mV.
Figure 4. AD818 Simplified Schematic
THEORY OF OPERATION
The AD818 is a low cost video operational amplifier designed to
excel in high performance, high output current video applications.
The AD818 (Figure 4) consists of a degenerated NPN differen-
tial pair driving matched PNPs in a folded-cascode gain stage.
The output buffer stage employs emitter followers in a class
AB amplifier that delivers the necessary current to the load, while
maintaining low levels of distortion.
SINGLE SUPPLY OPERATION
Another exciting feature of the AD818 is its ability to perform
well in a single supply configuration. The AD818 is ideally
suited for applications that require low power dissipation and
high output current.
The AD818 will drive terminated cables and capacitive loads of
10 pF or less. As the closed-loop gain is increased, the AD818
will drive heavier capacitive loads without oscillating.
Referring to Figure 6, careful consideration should be given to
the proper selection of component values. The choices for this
particular circuit are: R1 + R3ʈR2 combine with C1 to form a
low frequency corner of approximately 10 kHz. C4 was inserted
in series with R4 to maintain amplifier stability at high frequency.
INPUT CONSIDERATIONS
An input protection resistor (RIN in TPC 28) is required in
circuits where the input to the AD818 will be subjected to tran-
sients of continuous overload voltages exceeding the ±6 V
maximum differential limit. This resistor provides protection for
the input transistors by limiting their maximum base current.
Combining R3 with C2 forms a low-pass filter with a corner
frequency of approximately 500 Hz. This is needed to maintain
amplifier PSRR, since the supply is connected to VIN through
the input divider. The values for R2 and C2 were chosen to
demonstrate the AD818’s exceptional output drive capability.
In this configuration, the output is centered around 2.5 V. In
order to eliminate the static dc current associated with this level,
C3 was inserted in series with R L.
For high performance circuits, it is recommended that a “bal-
ancing” resistor be used to reduce the offset errors caused by
bias current flowing through the input and feedback resistors.
The balancing resistor equals the parallel combination of RIN
and RF and thus provides a matched impedance at each input
terminal. The offset voltage error will then be reduced by more
than an order of magnitude.
V
S
R3
GROUNDING AND BYPASSING
SELECT C1, R1, R2
FOR DESIRED LOW
FREQUENCY CORNER.
100⍀
1k⍀
R4
3.3F
When designing high frequency circuits, some special precautions
are in order. Circuits must be built with short interconnect leads.
When wiring components, care should be taken to provide a low
resistance, low inductance path to ground. Sockets should be
avoided, since their increased interlead capacitance can degrade
circuit bandwidth.
1k⍀
C2
3.3F
C4
0.001F
0.01F
R1
3.3k⍀
V
OUT
C1
0.01F
AD818
C3
0.1F
V
IN
Feedback resistors should be of low enough value (£1 kW) to
ensure that the time constant formed with the inherent stray
capacitance at the amplifier’s summing junction will not limit
performance. This parasitic capacitance, along with the parallel
resistance of RFʈRIN, forms a pole in the loop transmission, which
R2
R
3.3k⍀
L
150⍀
Figure 6. Single-Supply Amplifier Configuration
REV. C
–11–
AD818
15pF
1M⍀
2
؋
HP2835
ERROR AMPLIFIER
ERROR
V
OUTPUT
؋
10 SHORT, DIRECT CONNECTION
TO TEKTRONIX TYPE 11402
OSCILLOSCOPE PREAMP
INPUT SECTION
100⍀
2
؋
HP2835
ERROR
SIGNAL
OUTPUT
AD829
0.47F
0.01F
0.47F
0 TO ؎10V
POWER
SUPPLY
0.01F
EI&S
–V
S
DL1A05GM
MERCURY
RELAY
FALSE
SUMMING
NODE
+V
NULL
S
1.9k⍀
ADJUST
1k⍀
7, 8
NOTE
1k⍀
100⍀
100⍀
500⍀
USE CIRCUIT BOARD
WITH GROUND PLANE
TTL LEVEL
SIGNAL
GENERATOR
50Hz
OUTPUT
50⍀
COAX
CABLE
5pF–18pF
DEVICE
UNDER
TEST
1, 14
500⍀
50⍀
TEKTRONIX P6201
FET PROBE TO
AD818
TEKTRONIX TYPE 11402
OSCILLOSCOPE
PREAMP INPUT SECTION
10pF
SCOPE PROBE
CAPACITANCE
DIGITAL
GROUND
2.2F
0.01F
ANALOG
GROUND
–V
S
0.01F
2.2F
+V
S
Figure 7. Settling Time Test Circuit
AD818 SETTLING TIME
A High Performance Video Line Driver
Settling time primarily comprises two regions. The first is the slew
time in which the amplifier is overdriven, where the output voltage
rate of change is at its maximum. The second is the linear time
period required for the amplifier to settle to within a specified
percentage of the final value.
The buffer circuit shown in Figure 8 will drive a back-terminated
75 W video line to standard video levels (1 V p-p) with 0.1 dB
gain flatness to 55 MHz with only 0.05∞ and 0.01% differential
phase and gain at the 3.58 MHz NTSC subcarrier frequency.
This level of performance, which meets the requirements for
high definition video displays and test equipment, is achieved
using only 7 mA quiescent current.
Measuring the rapid settling time of the AD818 (45 ns to 0.1%
and 80 ns to 0.01%—10 V step) requires applying an input pulse
with a very fast edge and an extremely flat top. With the AD818
configured in a gain of –1, a clamped false summing junction
responds when the output error is within the sum of two diode
voltages (approximately 1 V). The signal is then amplified 20 times
by a clamped amplifier whose output is connected directly to a
sampling oscilloscope.
+15V
0.01F
2.2F
R
BT
75⍀
V
IN
75⍀
AD818
R
75⍀
T
R
T
75⍀
2.2F
0.01F
–15V
1k⍀
1k⍀
Figure 8. Video Line Driver
–12–
REV. C
AD818
DIFFERENTIAL LINE RECEIVER
A HIGH SPEED, 3-OP AMP IN AMP
The differential receiver circuit of Figure 9 is useful for many
applications—from audio to video. It allows extraction of a low
level signal in the presence of common-mode noise, as shown in
Figure 10.
The circuit of Figure 11 uses three high speed op amps: two
AD818s and an AD817. This high speed circuit lends itself well
to CCD imaging and other video speed applications. It has the
optional flexibility of both dc and ac trims for common-mode
rejection, plus the ability to adjust for minimum settling time.
2pF
EACH AMPLIFIER
PIN 7
1k⍀
1k⍀
V
B
+15V
+V
EACH
S
+5V
AMPLIFIER
0.1F
0.1F
1F
10F
10F
0.01F
2.2F
2.2F
COMMON
–15V
1F
0.1F
0.1F
DIFFERENTIAL
INPUT
AD818
OUTPUT
PIN 4
V
OUT
–V
EACH
S
AMPLIFIER
0.01F
1k⍀
–5V
2pF
–V
IN
SETTLING
A1
AD818
1k⍀
TIME AC
CMR ADJUST
2pF–8pF
V
A
1k⍀
1k⍀
Figure 9. Differential Line Receiver
1k⍀
1k⍀
V
OUT
5pF
5pF
A3
AD818
R
2pF
G
R
2k⍀
L
3pF
100
90
1k⍀
970⍀
20ns
1V
2V
A2
AD818
50⍀
DC CMR
ADJUST
V
A
+V
IN
BANDWIDTH, SETTLING TIME, AND TOTAL HARMONIC DISTORTION VS. GAIN
10
SMALL
SETTLING THD + NOISE
0%
CADJ
(pF)
SIGNAL
TIME
BELOW INPUT LEVEL
GAIN
R
BANDWIDTH
TO 0.1%
@ 10kHz
G
OUTPUT
200ns
370ns
2.5s
1k⍀
222⍀
20⍀
14.7MHz
4.5MHz
960kHz
3
10
100
2–8
2–8
2–8
82dB
81dB
71dB
Figure 10. Performance of Line Receiver, RL = 150 W,
G = +2
Figure 11. High Speed 3-Op Amp In Amp
REV. C
–13–
AD818
OUTLINE DIMENSIONS
8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
1
5
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
4
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015
(0.38)
MIN
0.180
(4.57)
MAX
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
؋
45؇ 1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8؇
0.51 (0.0201)
0.31 (0.0122)
0؇ 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
–14–
REV. C
AD818
Revision History
Location
Page
5/03—Data Sheet changed from REV. B to REV. C.
Renumbered Figures and TPCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Changes to Figures 9 and 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
REV. C
–15–
–16–
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