AD8225AR [ADI]

Precision Gain of 5 Instrumentation Amplifier; 5仪表放大器的增益精度
AD8225AR
型号: AD8225AR
厂家: ADI    ADI
描述:

Precision Gain of 5 Instrumentation Amplifier
5仪表放大器的增益精度

仪表放大器
文件: 总16页 (文件大小:276K)
中文:  中文翻译
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Precision Gain of 5  
Instrumentation Amplifier  
AD8225  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
No External Components Required  
Highly Stable, Factory Trimmed Gain of 5  
Low Power, 1.2 mA Max Supply Current  
Wide Power Supply Range (1.7 V to 18 V)  
Single- and Dual-Supply Operation  
Excellent Dynamic Performance  
High CMRR  
AD8225  
1
2
3
4
8
7
6
5
NC  
+V  
NC  
–IN  
+IN  
S
V
OUT  
–V  
S
REF  
NC = NO CONNECT  
86 dB Min @ DC  
80 dB Min to 10 kHz  
Wide Bandwidth  
900 kHz  
4 V to 36 V Single Supply  
High Slew Rate  
5 V/s Min  
Outstanding DC Precision  
Low Gain Drift  
5 ppm/C Max  
Low Input Offset Voltage  
150 V Max  
Low Offset Drift  
2 V/C Max  
140  
130  
120  
110  
100  
90  
AD8225  
HIGH PERFORMANCE IN AMP  
@ GAIN OF 5  
80  
70  
Low Input Bias Current  
1.2 nA Max  
60  
50  
40  
APPLICATIONS  
Patient Monitors  
30  
1
10  
100  
1k  
10k  
100k  
Current Transmitters  
Multiplexed Systems  
4 to 20 mA Converters  
Bridge Transducers  
Sensor Signal Conditioning  
FREQUENCY – Hz  
Figure 1. Typical CMRR vs. Frequency  
GENERAL DESCRIPTION  
CMRR performance of the AD8225 rejects noise from utility  
systems, motors, and repair equipment on factory floors, switch-  
ing power supplies, and medical equipment.  
The AD8225 is an instrumentation amplifier with a fixed gain  
of 5, which sets new standards of performance. The superior  
CMRR of the AD8225 enables rejection of high frequency  
common-mode voltage (80 dB Min @ 10 kHz). As a result,  
higher ambient levels of noise from utility lines, industrial  
equipment, and other radiating sources are rejected. Extended  
CMV range enables the AD8225 to extract low level differential  
signals in the presence of high common-mode dc voltage levels  
even at low supply voltages.  
Low input bias currents combined with a high slew rate of 5 V/µs  
make the AD8225 ideally suited for multiplexed applications.  
The AD8225 provides excellent dc precision, with maximum  
input offset voltage of 150 µV and drift of 2 µV/°C. Gain drift is  
5 ppm/°C or less.  
Operating on either single or dual supplies, the fixed gain of 5  
and wide input common-mode voltage range make the AD8225  
well suited for patient monitoring applications.  
Ambient electrical noise from utility lines is present at 60 Hz  
and harmonic frequencies. Power systems operating at 400 Hz  
create high noise environments in aircraft instrument clusters.  
Good CMRR performance over frequency is necessary if power  
system generated noise is to be rejected. The dc to 10 kHz  
The AD8225 is packaged in an 8-lead SOIC package and is  
specified over the standard industrial temperature range, 40°C  
to +85°C.  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  
(TA = 25C, VS = 15 V, RL = 2 k, unless otherwise noted.)  
AD8225–SPECIFICATIONS  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
GAIN  
Gain  
5
V/V  
%
ppm  
Gain Error  
Nonlinearity  
vs. Temperature  
0.1  
+0.05  
2
1
+0.1  
10  
5
ppm/°C  
OFFSET VOLTAGE (RTI)  
Offset Voltage  
vs. Temperature  
50  
0.3  
100  
150  
2
µV  
µV/°C  
vs. Supply (PSRR)  
90  
dB  
INPUT  
Input Operating Impedance  
Differential  
Common Mode  
Input Voltage Range  
(Common-Mode)  
vs. Temperature  
10  
10  
ʈ
ʈ
2
2
GΩ  
GΩ  
V
ʈ
ʈ
pF  
pF  
VS + 1.6  
VS + 2.2  
+VS 1.0  
+VS 1.2  
V
Input Bias Current  
vs. Temperature  
Input Offset Current  
vs. Temperature  
Common-Mode Rejection Ratio  
0.5  
3
0.15  
1.5  
94  
1.2  
nA  
pA/°C  
nA  
pA/°C  
dB  
dB  
0.5  
86  
83  
80  
TA = TMIN to TMAX  
f = 10 kHz*  
dB  
OUTPUT  
Operating Voltage Range  
vs. Temperature  
Operating Voltage Range  
vs. Temperature  
RL = 2 kΩ  
VS + 1.4  
VS + 1.5  
VS + 1.0  
VS + 1.2  
+VS 1.4  
+VS 1.6  
+VS 1.1  
+VS 1.0  
V
V
V
V
RL = 10 kΩ  
Short Circuit Current  
18  
mA  
DYNAMIC RESPONSE  
Small Signal 3 dB Bandwidth  
Full Power Bandwidth  
Settling Time (0.01%)  
Settling Time (0.001%)  
Slew Rate  
900  
75  
3.4  
kHz  
kHz  
µs  
V
OUT = 20 V p-p  
10 V Step  
10 V Step  
4.8  
µs  
5
V/µs  
NOISE (RTI)  
Voltage  
0.1 Hz to 10 Hz  
Spectral Density, 1 kHz  
0.1 Hz to 10 Hz  
1.5  
45  
4
µV p-p  
nV/Hz  
pA p-p  
fA/Hz  
Current  
Spectral Density, 1 kHz  
50  
REFERENCE INPUT  
RIN  
IIN  
VIN+, VREF = 0  
18  
60  
kΩ  
µA  
V
Voltage Range  
Gain to Output  
VS + 1.4  
0.999  
+VS 1.4  
1.001  
1
POWER SUPPLY  
Operating Range  
Quiescent Current  
1.7  
18  
1.2  
V
mA  
1.05  
TEMPERATURE RANGE  
For Specified Performance  
40  
+85  
°C  
*Pin 1 connected to Pin 4. See Applications section.  
Specifications subject to change without notice.  
–2–  
REV. A  
AD8225  
(TA = 25C, VS = 5 V, RL = 2 k, unless otherwise noted.)  
SPECIFICATIONS  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
GAIN  
Gain  
5
V/V  
%
ppm  
Gain Error  
Nonlinearity  
vs. Temperature  
0.1  
+0.05  
2
1
+0.1  
10  
5
ppm/°C  
VOLTAGE OFFSET (RTI)  
Offset Voltage  
vs. Temperature  
125  
100  
325  
2
µV  
µV/°C  
vs. Supply  
90  
dB  
INPUT  
Input Operating Impedance  
Differential  
Common-Mode  
Input Operating Voltage Range  
vs. Temperature  
Input Bias Current  
vs. Temperature  
Input Offset Current  
vs. Temperature  
Common-Mode Rejection Ratio  
10  
10  
ʈ
ʈ
2
2
GΩ  
GΩ  
V
V
nA  
pA/°C  
nA  
pA/°C  
dB  
dB  
ʈ
ʈ
pF  
pF  
VS + 1.6  
VS + 2.1  
+VS 1.0  
+VS 1.5  
1.2  
0.5  
3
0.15  
1.5  
94  
0.5  
86  
83  
80  
TA = TMIN to TMAX  
f = 10 kHz*  
dB  
OUTPUT  
Operating Voltage Range  
vs. Temperature  
Operating Voltage Range  
vs. Temperature  
RL = 2 kΩ  
VS + 0.9  
VS + 1.0  
VS + 0.8  
VS + 0.9  
+VS 1.0  
+VS 1.2  
+VS 1.0  
+VS 1.0  
V
V
V
V
RL = 10 kΩ  
Short Circuit Current  
18  
mA  
DYNAMIC RESPONSE  
Small Signal 3 dB Bandwidth  
Full Power Bandwidth  
Settling Time (0.01%)  
Settling Time (0.001%)  
Slew Rate  
900  
170  
3
kHz  
kHz  
µs  
V
OUT = 7.8 V p-p  
7 V Step  
7 V Step  
4.3  
µs  
5
V/µs  
NOISE (RTI)  
Voltage  
0.1 Hz to 10 Hz  
Spectral Density, 1 kHz  
0.1 Hz to 10 Hz  
1.5  
45  
4
µV p-p  
nV/Hz  
pA p-p  
fA/Hz  
Current  
Spectral Density, 1 kHz  
50  
REFERENCE INPUT  
RIN  
IIN  
18  
60  
kΩ  
µA  
V
VINT, VREF = 0  
Voltage Range  
VS + 0.9  
+VS 1.0  
Gain to Output  
0.999  
1
1.001  
POWER SUPPLY  
Operating Range  
Quiescent Current  
1.7  
18  
1.2  
V
mA  
1.05  
TEMPERATURE RANGE  
For Specified Performance  
40  
+85  
°C  
*Pin 1 connected to Pin 4. See Applications section.  
Specifications subject to change without notice.  
REV. A  
–3–  
AD8225  
(T = 25C, V = 5 V, R = 2 k, unless otherwise noted.)  
SPECIFICATIONS  
A
S
L
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
GAIN  
Gain  
5
V/V  
%
ppm  
Gain Error  
Nonlinearity  
vs. Temperature  
0.1  
+0.05  
2
1
+0.1  
10  
5
ppm/°C  
OFFSET VOLTAGE (RTI)  
Offset Voltage  
vs. Temperature  
150  
100  
375  
2
µV  
µV/°C  
vs. Supply  
90  
dB  
INPUT  
Input Operating Impedance  
Differential  
Common Mode  
Input Voltage Range  
(Common-Mode)  
vs. Temperature  
10  
10  
ʈ
ʈ
2
2
GΩ  
GΩ  
V
ʈ
ʈ
pF  
pF  
1.6  
1.7  
VS 1.05  
VS 1.0  
V
Input Bias Current  
vs. Temperature  
Input Offset Current  
vs. Temperature  
Common-Mode Rejection Ratio  
0.5  
3
0.15  
1.5  
94  
1.2  
nA  
pA/°C  
nA  
pA/°C  
dB  
dB  
0.5  
86  
83  
80  
TA = TMIN to TMAX  
f = 10 kHz*  
dB  
OUTPUT  
Operating Voltage Range  
vs. Temperature  
Operating Voltage Range  
vs. Temperature  
RL = 2 kΩ  
0.8  
0.9  
0.8  
0.9  
VS 1.05  
VS 1.2  
VS 1.0  
VS 1.0  
V
V
V
V
RL = 10 kΩ  
Short Circuit Current  
18  
mA  
DYNAMIC RESPONSE  
Small Signal 3 dB Bandwidth  
Full Power Bandwidth  
Settling Time (0.01%)  
Settling Time (0.001%)  
Slew Rate  
900  
420  
3.3  
5.1  
kHz  
kHz  
µs  
VOUT = 3.2 V p-p  
2 V Step  
2 V Step  
µs  
5
V/µs  
NOISE (RTI)  
Voltage  
0.1 Hz to 10 Hz  
Spectral Density, 1 kHz  
0.1 Hz to 10 Hz  
1.5  
45  
4
µV p-p  
nV/Hz  
pA p-p  
fA/Hz  
Current  
Spectral Density, 1 kHz  
50  
REFERENCE INPUT  
RIN  
IIN  
18  
60  
kΩ  
µA  
V
Voltage Range  
Gain to Output  
0.4  
0.999  
VS 0.9  
1.001  
1
POWER SUPPLY  
Operating Range  
Quiescent Current  
3.4  
36  
1.2  
V
mA  
1.05  
TEMPERATURE RANGE  
For Specified Performance  
40  
+85  
°C  
*Pin 1 connected to Pin 4. See Applications section.  
Specifications subject to change without notice.  
–4–  
REV. A  
AD8225  
ABSOLUTE MAXIMUM RATINGS*  
PIN FUNCTION DESCRIPTIONS  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V  
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . 650 mW  
Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . . VS  
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 25 V  
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite  
Storage Temperature . . . . . . . . . . . . . . . . . . 65ºC to +125ºC  
Operating Temperature Range . . . . . . . . . . . 40ºC to +85ºC  
Lead Temperature Range (10 sec Soldering) . . . . . . . . . 300ºC  
*Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only and functional operation of  
the device at these or any other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect device reliability.  
Pin Number Mnemonic Function  
1
NC  
May be Connected to Pin 4 to  
Balance CIN  
2
3
4
5
IN  
+IN  
VS  
Inverting Input  
Noninverting Input  
Negative Supply Voltage  
REF  
Connect to Desired Output  
CMV  
6
7
8
VOUT  
+VS  
NC  
Output  
Positive Supply Voltage  
1.5  
1.0  
0.5  
0
T
= 150 C  
J
8-LEAD SOIC PACKAGE  
80 90  
–50 –40 –30  
–10  
0
10 20 30 40 50 60 70  
–20  
AMBIENT TEMPERATURE –  
C
Figure 2. Maximum Power Dissipation vs. Temperature  
ORDERING GUIDE  
Package Description  
Model  
Temperature Range  
Package Options  
AD8225AR  
40ºC to +85ºC  
40ºC to +85ºC  
40ºC to +85ºC  
8-Lead SOIC  
8-Lead SOIC  
8-Lead SOIC  
Evaluation Board  
RN-8  
AD8225AR-REEL  
AD8225AR-REEL7  
AD8225-EVAL  
13" REEL  
7" REEL  
RN-8  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although the  
AD8225 features proprietary ESD protection circuitry, permanent damage may occur on devices  
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended  
to avoid performance degradation or loss of functionality.  
REV. A  
–5–  
(T = 25C, R = 2 k, V = 15 V, unless otherwise noted.)  
AD8225–Typical Performance Characteristics  
A
L
S
50  
250  
LOT SIZE = 3775  
45  
200  
150  
100  
50  
40  
35  
30  
25  
20  
15  
10  
5
+BIAS CURRENT  
–BIAS CURRENT  
0
0
–50  
–60  
–40  
–20  
0
20  
40  
60  
80  
100  
–140–120–100 –80 –60 –40 –20  
0
20 40 60 80 100 120  
INPUT OFFSETVOLTAGE – V  
TEMPERATURE –  
C
TPC 4. Bias Current vs. Temperature  
TPC 1. Typical Distribution of Input Offset Voltage,  
VS = 15 V  
8
6
4
2
0
50  
LOT SIZE = 7550  
45  
40  
35  
30  
25  
20  
15  
10  
5
0
0
1
2
3
4
5
–200 –100  
0
100 200 300 400 500 600 700 800  
INPUT BIAS CURRENT – pA  
WARM-UPTIME – Min  
TPC 5. Offset Voltage vs. Warm-Up Time  
TPC 2. Typical Distribution of Input Bias Current,  
VS = 15 V  
1000  
100  
0
50  
LOT SIZE = 3775  
45  
40  
35  
30  
25  
20  
15  
10  
5
0
1
10  
100  
1k  
10k  
100k  
–500 –400 –300 –200 –100  
0
100  
200  
300  
400  
FREQUENCY – Hz  
INPUT OFFSET CURRENT – pA  
TPC 6. Voltage Noise Spectral Density vs. Frequency (RTI)  
TPC 3. Typical Distribution of Input Offset Current,  
VS = 15 V  
–6–  
REV. A  
AD8225  
1000  
100  
0
130  
120  
110  
100  
90  
80  
70  
60  
50  
40  
30  
1
10  
100  
1k  
10k  
1
10  
100  
1k  
10k  
100k  
FREQUENCY – Hz  
FREQUENCY – Hz  
TPC 7. Input Current Noise Spectral Density vs.  
Frequency  
TPC 10. CMR vs. Frequency, RTI  
0.10  
0.08  
0.06  
0.04  
0.02  
0
4
1S  
3
100  
90  
2
1
0
–0.02  
–0.04  
–0.06  
–0.08  
–0.10  
–1  
10  
–2  
0
–3  
–4  
–40  
–20  
0
20  
40  
60  
80  
100  
0
5
10  
TEMPERATURE –  
C
TIME – sec  
TPC 11. CMRR vs. Temperature  
TPC 8. 0.1 Hz to 10 Hz Voltage Noise, RTI  
15  
8
V
= 15V  
1S  
S
10  
5
6
100  
90  
4
V
= 5V  
2
0
S
0
–2  
–5  
–10  
–15  
10  
–4  
0
–6  
–8  
0
OUTPUTVOLTAGE V  
10  
15  
–15  
–10  
–5  
5
0
5
10  
TIME – sec  
TPC 12. CMV Range vs. VOUT, Dual Supplies  
TPC 9. 0.1 Hz to 10 Hz Current Noise  
REV. A  
–7–  
AD8225  
40  
30  
5
20  
4
3
2
1
V
= 5V  
S
10  
0
–10  
–20  
–30  
–40  
–50  
–60  
0
0
100  
1k  
10k  
100k  
1M  
10M  
1
2
3
4
5
FREQUENCY – Hz  
OUTPUTVOLTAGE V  
TPC 13. CMV vs. VOUT, Single Supply  
TPC 16. Large Signal Frequency Response,  
OUT = 4 V p-p  
V
140  
120  
100  
80  
+V –0.0  
S
–0.5  
–1.0  
–1.5  
+V  
S
–2.0  
2.0  
0
5
10  
15  
20  
60  
–V  
S
1.5  
1.0  
0.5  
40  
20  
–V +0.0  
S
0
0
5
10  
15  
20  
0.1  
1
10  
100  
1k  
10k  
100k  
1M  
SUPPLYVOLTAGE – V  
FREQUENCY – Hz  
TPC 14. PSRR vs. Frequency, RTI  
TPC 17. Input Common Mode Voltage Range vs.  
Supply Voltage  
40  
30  
+V  
0
S
–0.5  
–1.0  
–1.5  
R
= 10kꢃ  
= 2kꢃ  
20  
L
10  
R
L
0
–2.0  
2.0  
–10  
–20  
–30  
–40  
–50  
0
2
4
6
8
10  
12  
14  
16  
18  
20  
1.5  
1.0  
0.5  
R
= 2kꢃ  
= 10kꢃ  
6
L
R
L
–60  
100  
–V  
0
S
1k  
10k  
100k  
1M  
10M  
0
2
4
8
10  
12  
14  
16  
18  
20  
FREQUENCY – Hz  
SUPPLYVOLTAGE – V  
TPC 18. Output Voltage Swing vs. Supply Voltage  
and Load Resistance  
TPC 15. Small Signal Frequency Response,  
OUT = 200 mV p-p  
V
–8–  
REV. A  
AD8225  
30  
25  
20  
15  
10  
5
10  
9
8
7
6
5
4
3
2
1
0
0.001%  
0.01%  
0
10  
1k  
100  
LOAD RESISTANCE ꢃ  
100k  
0
5
10  
15  
20  
STEP SIZE V  
TPC 19. Output Voltage Swing vs. Load Resistance  
TPC 22. Settling Time vs. Step Size  
4
HORIZ  
(4s/DIV)  
100mV  
2V  
CH 1 = 5V/DIV  
3
2
100  
90  
100  
90  
OUTPUT (5V/DIV)  
1
0
TEST  
CIRCUIT  
OUTPUT  
(0.001%/DIV)  
CH 2 = 10mV/DIV  
–1  
10  
0
–2  
10  
0
–3  
–4  
–10  
0
10  
OUTPUT VOLTAGE – V  
TPC 20. Large Signal Pulse Response and Settling  
Time to 0.001%  
TPC 23. Gain Nonlinearity  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
INPUT  
100  
90  
1
+85 C  
+25 C  
–40 C  
OUTPUT  
10  
0
2
CH 1 = 10mV, CH 2 = 20mV, H = 2s  
0
2
4
6
8
10  
12  
14  
16  
18  
20  
SUPPLYVOLTAGE –  
V
TPC 21. Small Signal Pulse Response, CL = 100 pF  
TPC 24. ISUPPLY vs. VSUPPLY and Temperature  
REV. A  
–9–  
AD8225  
Test Circuits  
4k  
G = 101  
AD829  
G = 100  
AD797  
100⍀  
20k⍀  
G = 100  
LPF  
G = 5  
SCOPE  
AD8225  
G = 5  
2k⍀  
AD8225  
20⍀  
2k⍀  
Test Circuit 2. Settling Time to 0.01%  
Test Circuit 1. 1 Hz to 10 Hz Voltage Noise Test  
–10–  
REV. A  
AD8225  
+V  
S
APPLICATIONS  
Precision V-to-I Converter  
+V  
–V  
+V  
–V  
S
S
V
B
When small analog voltages are transmitted across significant  
distances, errors may develop due to ambient electrical noise,  
stray capacitance, or series impedance effects. If the desired  
voltage is converted to a current, however, the effects of ambient  
noise are mitigated. All that is required is a voltage to current  
conversion at the source, and an I-to-V conversion at the other  
end to reverse the process.  
+IN  
Q1  
–IN  
Q2  
A1  
A2  
R1  
+V  
–V  
R2  
C2  
C1  
S
S
S
3kꢃ  
V
REF  
15kꢃ  
Figure 5 illustrates how the AD8225 may be used as the trans-  
mitter and receiver in a current loop system. The full-scale  
output is 5 mA.  
+V  
S
A3  
15kꢃ  
S
3kꢃ  
OUT  
R
FULL SCALE  
3
2
SH  
I
OUT  
e
CURRENT = 5mA  
–V  
IN  
20ꢃ  
S
3
2
AD8225  
200mV  
pk FS  
6
1kꢃ  
V
SH  
6
8ꢃ  
Figure 3. Simplified Schematic  
AD8225  
5
e
OUT  
200mV  
pk FS  
5
47pF  
THEORY OF OPERATION  
The AD8225 is a monolithic, three op amp instrumentation  
9kꢃ  
GND OR  
REFV  
amplifier. Laser wafer trimming and proprietary circuit tech-  
niques enable the AD8225 to boast the lowest output offset  
voltage and drift of any currently available in amp (150 µV  
RTI), as well as a higher common-mode voltage range.  
OP27  
V
0.5 e  
IN  
SH  
I
=
=
OUT  
R
R
SH  
SH  
Figure 5. Precision Voltage-to-Current Converter  
As noted in Figure 5, an additional op amp and four resistors are  
required to complete the converter. The precision gain of 5 in the  
AD8225s, used in the transmit and receive sections, preserves  
the integrity of the desired signal, while the high frequency  
common-mode performance at the receiver rejects noise on the  
transmission line. The reference of the receiver may be connected  
to local ground or the reference pin of an A/D converter (ADC).  
Referring to Figure 3, the input buffers consist of super-beta  
NPN transistors Q1 and Q2, and op amps A1 and A2. The  
transistors are compensated so that the bias currents are  
extremely low, typically 100 pA or less. As a result, current noise  
is also low, at 50 fA/Hz. The unity gain input buffers drive a  
gain-of-five difference amplifier. Because the 3 kand 15 kΩ  
resistors are ratio matched, gain stability is better than 5 ppm/°C  
over the rated temperature range.  
Figure 6 shows bench measurements of the input and output  
voltages, and output current of the circuit of Figure 5. The  
transmission media is 10 feet of insulated hook-up wire for the  
current drive and return lines.  
The AD8225 also has five times the gain bandwidth of a typical  
in amp. This wider GBW results from compensation at a fixed  
gain of 5, which can be one fifth of that required if the amplifier  
were compensated for unity gain.  
eIN = 398mV p-p, eOUT = 398mV p-p,  
High frequency performance is also enhanced by the innovative  
pinout of the AD8225. Since Pins 1 and 8 are uncommitted,  
Pin 1 may be connected to Pin 4. Since Pin 4 is also ac com-  
mon, the stray capacitance at Pins 2 and 3 is balanced.  
I
= 10.3mA p-p  
OUT  
1
2
eIN  
eOUT  
AC  
GROUND  
AD8225  
8
NC  
I
OUT  
–IN  
+IN  
7
6
5
+V  
V
S
3
OUT  
REF  
AC  
GROUND  
CH 1 = 100mV, CH 2 = 100mV, CH 3 = 10mA,  
H = 200s  
Figure 6. V-to-I Converter Waveforms (CH1: VIN,  
CH2: VOUT, CH3: IOUT  
PIN 1 HAS NO INTERNAL CONNECTION  
)
Figure 4. Pinout for Symmetrical Input Stray Capacitance  
REV. A  
–11–  
AD8225  
Driving a High Resolution ADC  
100 pF of capacitance at its output, a 75 series resistor is  
Most high precision ADCs feature differential analog inputs.  
Differential inputs offer an inherent 6 dB improvement in S/N  
ratio and resultant bit resolution. These advantages are easy to  
realize using a pair of AD8225s.  
required at each in amp output to prevent oscillation.  
Using the Reference Input  
Note in the example in Figure 7 that Pin 5, the reference input, is  
driven by a voltage source. This is because the reference pin is  
internally connected to a 15 kresistor, which is carefully trimmed  
to optimize common-mode rejection. Any additional resistance  
connected to this node will unbalance the bridge network formed  
by the two 3 kand two 15 kresistors, resulting in an error  
voltage generated by common-mode voltages at the input pins.  
AD8225s can be configured to drive an ADC with differential  
inputs by using either single-ended or differential inputs to the  
AD8225s. Figure 7 shows the circuit connections for a differen-  
tial input. A single-ended input may be configured by connecting  
the negative input terminal to ground.  
AD8225 Used as an EKG Front End  
5V  
The topology of the instrumentation amplifier has made it the  
circuit configuration of choice for designers of EKG and other  
low level biomedical amplifiers. CMRR and common-mode  
voltage advantages of the instrumentation amplifier are tailor  
made to meet the challenges of detecting minuscule cardiac  
generated voltage levels in the presence of overwhelming levels  
of noise and dc offset voltage. The subtracter circuit of the in  
amp will extract and amplify low level signals that are virtually  
obscured by the presence of high common-mode dc and ac  
potentials.  
3
75ꢃ  
6
+IN  
AD8225  
2
2.7nF  
5
AD7675  
100kSPS  
3
2
75ꢃ  
6
–IN  
AD8225  
2.7nF  
5
ALTERNATE  
CONNECTION  
FOR SE SOURCE  
4.99kꢃ  
4.99kꢃ  
1.25V  
OP177  
A typical circuit block diagram of an EKG amplifier is shown in  
Figure 8. Using discrete op amps in the in amp and gain stages,  
the signal chain usually includes several filters, high voltage  
protection, lead-select circuitry, patient lead buffering, and an  
ADC. Designers who roll their own instrumentation amplifiers  
must provide precision custom trimmed resistor networks and  
well matched op amps.  
2.5V  
AD780  
RERERENCE  
Figure 7. Driver for Differential ADC  
The AD8225 instrumentation amplifier not only replaces all the  
components shown in the highlighted block in Figure 8, but also  
provides a solution to many of the difficult design problems  
encountered in EKG front ends. Among these are patient gener-  
ated errors from ac noise sources and errors generated by unequal  
electrode potentials. Alone, these error voltages can exceed the  
desired QRS complex by orders of magnitude.  
The AD7675 ADC illustrated in Figure 7 is a SAR type converter.  
When the input is sampled, the internal sample-and-hold capacitor  
is charged to the input voltage level. Since the output of the  
AD8225 cannot track the instantaneous current surge, a voltage  
glitch develops. To source the momentary current surge, a  
capacitor is connected from the A/D input terminal to ground.  
Since the AD8225 cannot tolerate greater than approximately  
PATIENT  
ISOLATION  
BARRIER  
INSTRUMENTATION AMPLIFIER  
G = 3TO 10  
A1  
DIGITAL DATA  
GAIN AND ADC  
TO SYSTEM  
A3  
TOTAL G = 1000  
MAINFRAME  
LEAD  
SELECT,  
HV  
PROTECTION,  
FILTERING  
A2  
Figure 8. Block Diagram, EKG Monitor Front End Using Discrete Components  
–12–  
REV. A  
AD8225  
In the classical three op amp in amp topology shown in Figure 8,  
gain is developed differentially between the two input amplifiers  
A1 and A2, sacrificing CMV (common-mode voltage) range.  
The gain of the in amp is typically 10 or less, and an additional  
gain stage increases the overall gain to approximately 1000.  
RA-LA 1  
LA-LL 2  
Gain developed in the input stage results in a trade-off in common-  
mode voltage range, constraining the ability of the amplifier to  
tolerate high dc electrode errors. Although the AD8225 is also  
a three amplifier design, its gain of 5 is developed at the output  
amplifier, improving the CMV range at the input. Using 5 V  
supplies, the CMV range of the AD8225 is from 3.4 V to  
+4 V, compared to 3.1 V to +3.8 V, a 7% improvement in  
input headroom over conventional in amps with the same gain.  
RA-LL 3  
CH 1 = 2V, CH 2 = 2V, CH 3 = 2V, H = 200ms  
Figure 10. EKG Waveform Using Circuit of Figure 9  
Benefits of Fast Slew Rates  
At 5 V/µs, the slew rate of the AD8225 is as fast as many op amp  
circuits. This is an advantage in systems applications using multiple  
sensors. For example, an analog multiplexer (see Figure 11) may  
be used to select pairs of leads connected to several sensors. If  
the AD8225 drives an ADC, the acquisition time is constrained  
by the ability of the in amp to settle to a stable level after a new  
set of leads is selected. Fast slew rates contribute greatly to  
this function, especially if the difference in input levels is large.  
AD8225  
OP77  
G = 5  
G = 200  
19.6k301ꢃ  
100ꢃ  
S1A  
S1B  
0.2V, 2V  
AD8225  
S2A  
DA  
OP77  
G = 5  
S2B  
G = 200  
1
AD8225  
ADG409  
S3A  
S3B  
S4A  
S4B  
DB  
19.6k301ꢃ  
100ꢃ  
REF  
4
AD8225  
OP77  
G = 5  
G = 200  
Figure 11. Connection to an ADG409 Analog MUX  
19.6k301ꢃ  
100ꢃ  
Figure 12 illustrates the response of an AD8225 connected to  
an ADG409 analog multiplexer in the circuit shown in Figure 11  
at two signal levels. Two of the four MUX inputs are connected  
to test dc levels. The remaining two are at ground potential so  
that the output slews as the inputs A0 and A1 are addressed. As  
can be seen, the output response settles well within 4 µs of the  
applied level.  
Figure 9. EKG Monitor Front End  
Figure 9 illustrates how an AD8225 may be used in an EKG  
front end. In a low cost system, the AD8225 can be connected to  
the patient. If buffers are required, the AD8225 can replace the  
expensive precision resistor network and op amp.  
Figure 10 shows test waveforms observed from the circuit of  
Figure 9.  
SMALL SIGNAL  
(200mV/DIV)  
INPUT  
SIGNAL  
TRAN-  
SITION  
LARGE SIGNAL  
(2V/DIV)  
CH 1 = 200mV, CH 2 = 2V, H = 500ns  
Figure 12. Slew Responses After MUX Selection  
REV. A  
–13–  
AD8225  
Evaluation Board  
or single supplies, and the input may be dc- or ac-coupled. A  
circuit is provided on the board so that the user can zero the  
output offset. If desired, a reference may be applied from an  
external voltage source.  
Figure 13 is a schematic of an evaluation board available for the  
AD8225. The board is shipped with an AD8225 already installed  
and tested. The user need only connect power and an input to  
conduct measurements. The supply may be configured for dual  
+V  
S
C1  
0.1F  
C4  
R3  
R2  
0.1F  
100k*  
100ꢃ  
+IN  
GND  
–IN  
W3  
W4  
7
3
6
R4  
100ꢃ  
A1  
4
OUTPUT  
EXT_REF  
2
5
1
R8  
R5  
C3  
0.1F  
100k*  
W12  
C2  
0.1F  
W13  
W11  
W14  
AUX  
–V  
S
USER-SUPPLIED  
+V  
AUX  
C12  
10F, 25V  
C10  
0.1F  
CS1  
J500  
240A  
W7  
+V  
+V  
S
GND  
C7  
0.1F  
OFFSET  
ADJ  
R9  
5.9k, 1%  
W6  
3
2
R1  
10kꢃ  
7
4
–V  
–V  
S
AUX  
6
C11  
10F, 25V  
A1  
R10  
5.9k, 1%  
C9  
0.1F  
C8  
0.1F  
CS2  
J500  
240A  
–V  
AUX  
NOTES  
AD707JN  
–V  
AUX  
REMOVE W3ANDW4 FORAC COUPLING  
*INSTALL FOR AC COUPLING  
Figure 13. Evaluation Board Schematic  
–14–  
REV. A  
AD8225  
OUTLINE DIMENSIONS  
8-Lead Standard Small Outline Package (SOIC)  
(RN-8)  
Dimensions shown in millimeters and (inches)  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2440)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
1.27 (0.0500)  
BSC  
0.50 (0.0196)  
0.25 (0.0099)  
45ꢂ  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8ꢂ  
0ꢂ  
0.51 (0.0201)  
0.33 (0.0130)  
1.27 (0.0500)  
0.41 (0.0160)  
COPLANARITY  
0.10  
0.25 (0.0098)  
0.19 (0.0075)  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN  
REV. A  
–15–  
AD8225  
Revision History  
Location  
Page  
2/03—Data Sheet changed from REV. 0 to REV. A.  
Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Change to TPC 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Change to TPC 20 caption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Edit to Precision V-to-I Converter section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
OUTLINE DIMENSIONS updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
–16–  
REV. A  

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