AD8264 [ADI]
Quad, 235 MHz, DC-Coupled VGA and Differential Output Amplifier; 四， 235兆赫，直流耦合VGA和差分输出放大器
| 型号： | AD8264 |
| 厂家： | 
ADI |
| 描述： | Quad, 235 MHz, DC-Coupled VGA and Differential Output Amplifier |
| 文件： | 总40页 (文件大小：1139K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Quad, 235 MHz, DC-Coupled VGA
and Differential Output Amplifier
AD8264
FUNCTIONAL BLOCK DIAGRAM
FEATURES
COMM
VPOS
VNEG
Low noise
OPP1
Voltage noise: 2.3 nV/√Hz
Current noise: 2 pA/√Hz
Wide bandwidth
Small signal: 235 MHz (VGAx); 80 MHz (differential output
amplifier)
Large signal: 80 MHz (1 V p-p)
Gain range
0 to 24 dB (input to VGA output)
6 to 30 dB (input to differential output)
Gain scaling: 20 dB/V
DC-coupled
Single-ended input and differential output
Supplies: 2.5 V to 5 V
VGA1
VOL1
+
IPP1
IPN1
PrA
6dB
ATTENUATOR
–24dB TO 0dB
+
18dB
6dB
–
–
VOH1
OFS1
GNH1
+
CH1 GAIN
CONTROL
–
OPP2
IPP2
IPN2
VGA2
VOL2
+
PrA
6dB
ATTENUATOR
–24dB TO 0dB
+
18dB
18dB
18dB
6dB
–
–
VOH2
OFS2
GNH2
+
CH2 GAIN
CONTROL
–
OPP3
IPP3
IPN3
VGA3
VOL3
+
PrA
6dB
ATTENUATOR
–24dB TO 0dB
+
6dB
Low power: 140 mW per channel @ 3.3 V
–
–
VOH3
OFS3
GNH3
+
CH3 GAIN
CONTROL
–
APPLICATIONS
OPP4
IPP4
VGA4
VOL4
Multichannel data acquisition
Positron emission tomography
Gain trim
Industrial and medical ultrasound
Radar receivers
+
ATTENUATOR
–24dB TO 0dB
PrA
6dB
+
6dB
–
IPN4
–
VOH4
OFS4
GNH4
+
CH4 GAIN
CONTROL
–
VOCM
GNLO
Figure 1.
GENERAL DESCRIPTION
The AD8264 is a 4-channel, linear-in-dB, general-purpose
variable gain amplifier (VGA) with a preamplifier (preamp),
and a flexible differential output buffer. Intended for a broad
range of applications, dc coupling combined with wide band-
width makes this amplifier a very good pulse processor.
The gain of each channel is adjusted independently, and all
channels are referenced to a single pin, GNLO. Combined with
a multi-output, digital-to-analog converter (DAC), each section
of the AD8264 can be used for active calibration or as a trim
amplifier.
Each channel includes a single-ended input preamp/VGA
section to preserve the wide bandwidth and fast slew rate for low-
distortion pulse applications. A 6 dB differential output buffer
with common-mode and offset adjustments enable direct coupling
to most modern high speed analog-to-digital converters (ADCs),
using the converter reference output for perfect dc matching levels.
The gain range of the VGA section is 24 dB. Operation from
a dual polarity power supply enables amplification of negative
voltage pulses that are generated by current-sinking pulses into
a grounded load, such as is typical of photodiodes or photo-
multiplier tubes (PMT). Delay-free processing of wide-band
video signals is also possible. The differential output amplifier
permits convenient level shifting and interfacing to single-
supply ADCs using the VOCM and OFSx pins.
The −3 dB bandwidth of the preamp/VGA is dc to 235 MHz,
and the bandwidth of the differential driver is 80 MHz. The
floating gain control interface provides a precise linear-in-dB scale
of 20 dB/V and is easy to interface to a variety of external circuits.
The AD8264 is available in a 40-lead, 6 mm × 6 mm LFCSP
with an operating temperature range of −40°C to +105°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2009 Analog Devices, Inc. All rights reserved.
AD8264
TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation ...................................................................... 28
Overview ..................................................................................... 28
Preamp......................................................................................... 28
VGA ............................................................................................. 28
Post Amplifier............................................................................. 29
Noise ............................................................................................ 29
Applications Information.............................................................. 30
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
Thermal Resistance ...................................................................... 6
Maximum Power Dissipation ..................................................... 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 8
Test Circuits..................................................................................... 20
A Low Channel Count Application Concept Using a Discrete
Reference ..................................................................................... 30
A DC Connected Concept Example........................................ 31
Evaluation Board ............................................................................ 34
Connecting and Using the AD8264-EVALZ.......................... 34
Outline Dimensions....................................................................... 38
Ordering Guide .......................................................................... 38
REVISION HISTORY
5/09—Revision 0: Initial Version
Rev. 0 | Page 2 of 40
AD8264
SPECIFICATIONS
VS = 2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V,
VOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified.
V
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
GENERAL PERFORMANCE
–3 dB Small Signal Bandwidth (VGAx)
–3 dB Large Signal Bandwidth (VGAx)
–3 dB Small Signal Bandwidth (Differential Output)1 VOUT = 100 mV p-p
–3 dB Large Signal Bandwidth (Differential Output)1 VOUT = 2 V p-p
VOUT = 10 mV p-p
VOUT = 1 V p-p
235
150
80
MHz
MHz
MHz
MHz
V/μs
V/μs
V/μs
V/μs
μA
80
Slew Rate
VGAx, VOUT = 2 V p-p
VGAx, VOUT = 1 V p-p
Differential output, VOUT = 2 V p-p
Differential output, VOUT = 1 V p-p
Pins IPPx
380
290
470
220
−5
Input Bias Current
−8
−3
Input Resistance
Input Capacitance
Pins IPPx at dc; ΔVIN/ΔIBIAS
Pins IPPx
4.2
2
MΩ
pF
Input Impedance
Pins IPPx at 10 MHz
7.9
kΩ
Input Voltage Noise
Input Current Noise
Noise Figure (Differential Output)
Output-Referred Noise (Differential Output)
2.3
2
9
72
45
3.5
<1
|VS| − 1.3
|VS| − 1.3
|VS| − 0.5
|<1|
|<5|
|<10|
nV/√Hz
pA/√Hz
dB
nV/√Hz
nV/√Hz
Ω
Ω
V
V
V
VGAIN = 0.7 V, RS = 50 Ω, unterminated
VGAIN = 0.7 V (Gain = 30 dB)
VGAIN = −0.7 V (Gain = 6 dB)
VGAx, dc to 10 MHz
Differential output, dc to 10 MHz
Preamp
VGAx, RL ≥ 500 Ω
Differential amplifier, RL ≥ 500 Ω per side
Preamp offset
Output Impedance
Output Signal Range
Output Offset Voltage
−6
−18
−38
+6
+18
+38
mV
mV
mV
VGAx offset, VGAIN = 0.7 V
Differential output offset, VGAIN = 0.7 V
DYNAMIC PERFORMANCE
Harmonic Distortion
VGAx = 1 V p-p, differential
output = 2 V p-p (measured at VGAx)
HD2
HD3
HD2
HD3
HD2
HD3
f = 1 MHz
f = 10 MHz
f = 35 MHz
−73
−68
−71
−61
−60
−53
dBc
dBc
dBc
dBc
dBc
dBc
VGAx = 1 V p-p, differential output = 2 V p-p
(measured at differential output)
HD2
HD3
HD2
HD3
HD2
HD3
f = 1 MHz
f = 10 MHz
f = 35 MHz
−78
−66
−71
−43
−56
−20
7
dBc
dBc
dBc
dBc
dBc
dBc
dBm2
dBm
Input 1 dB Compression Point
VGAIN = −0.7 V, f = 10 MHz
VGAIN = +0.7 V, f = 10 MHz
−9.6
Rev. 0 | Page 3 of 40
AD8264
Parameter
Conditions
Min
Typ
−68
−51
−49
−34
32
19
23
10
30
Max
Unit
dBc
dBc
dBc
dBc
dBm
dBVRMS
dBm
dBVRMS
dBm
dBVRMS
dBm
dBVRMS
Two-Tone Intermodulation Distortion (IMD3)
VGAx = 1 V p-p, f1 = 10 MHz, f2 = 11 MHz
VGAx = 1 V p-p, f1 = 35 MHz, f2 = 36 MHz
VOUT = 2 V p-p, f1 = 10 MHz, f2 = 11 MHz
VOUT = 2 V p-p, f1 = 35 MHz, f2 = 36 MHz
VGAx = 1 V p-p, f = 10 MHz
Output Third-Order Intercept
VGAx = 1 V p-p, f = 35 MHz
VOUT = 2 V p-p, f = 10 MHz
VOUT = 2 V p-p, f = 35 MHz
17
21
8
Overload Recovery
VGAIN = 0.7 V, VIN stepped from
0.1 V p-p to 1 V p-p
1 MHz < f < 100 MHz, full gain range
25
ns
ns
Group Delay Variation
ACCURACY
Absolute Gain Error3
1
−0.7 V < VGAIN < −0.6 V
−0.6 V < VGAIN < −0.5 V
−0.5 V < VGAIN < +0.5 V
0.5 V < VGAIN < 0.6 V
0
0.2 to 2
0.35
0.25
0.35
−0.2 to −2
0.2
3
dB
−1.25
−1
−1.25
−3
+1.25 dB
+1 dB
+1.25 dB
0.6 V < VGAIN < 0.7 V
0
dB
dB
dB
Gain Law Conformance4
−0.5 V < VGAIN < +0.5 V, 2.5 V ≤ VS ≤ 5 V
−0.5 V < VGAIN < +0.5 V, −40°C ≤TA ≤ +105°C
0.3
Channel-to-Channel Matching
Single IC, −0.5 V < VGAIN < +0.5 V,
−40°C ≤ TA ≤ +105°C
Multiple ICs, −0.5 V < VGAIN < +0.5 V,
−40°C ≤ TA ≤ +105°C
−0.5
19.5
0.1 to 0.25 +0.5
dB
dB
0.25
GAIN CONTROL INTERFACE
Gain Scaling Factor
Over Temperature
Gain Range
−0.5 V < VGAIN < +0.5 V
−40°C ≤TA ≤ +105°C
20.0
20.5
dB/V
dB/V
dB
20 0.5
24
Gain Intercept to VGAx
Over Temperature
Gain Intercept to Differential Output
Over Temperature
GNHx Input Voltage Range
Input Resistance
GNHx Input Bias Current
Over Temperature
11.5
17.5
−VS
11.9
11.9 0.4
17.9
12.2
18.2
+VS
0
dB
dB
dB
dB
−40°C ≤ TA ≤ +105°C
−40°C ≤TA ≤ +105°C
17.9 0.4
GNLO = 0 V, no gain foldover
ΔVIN/ΔIBIAS, −0.7 V < VGAIN < +0.7 V
−0.7 V < VGAIN < 0.7 V
−0.7 V < VGAIN < 0.7 V, −40°C ≤ TA ≤ +105°C
−0.7 V < VGAIN < 0.7 V
V
70
−0.4
−0.4 +0.2
−1.2
−1.2 +0.4
200
MΩ
μA
μA
μA
μA
ns
−0.9
GNLO Input Bias Current
Over Temperature
Response Time
−0.7 V < VGAIN < 0.7 V, −40°C ≤ TA ≤ +105°C
24 dB gain change
OUTPUT BUFFER
VOCM Input Bias Current
Over Temperature
VOCM Input Voltage Range
Gain (VGAx to Differential Output)
Over Temperature
0.3
1.5
1.5 0.3
2.5
nA
nA
V
dB
dB
−40°C ≤ TA ≤ +105°C
OFSx = 0 V, VGAx = 0 V
−1.4
5.75
+1.4
6.25
6
6
−40°C ≤ TA ≤ +105°C
0.5
Rev. 0 | Page 4 of 40
AD8264
Parameter
Conditions
Min
Typ
Max
Unit
POWER SUPPLY
Supply Voltage
Power Consumption
Quiescent Current
2.5
5
V
VS = 2.5 V
VS = 2.5 V, −40°C ≤ TA ≤ +105°C
VS = 3.3 V
VS = 3.3 V, −40°C ≤ TA ≤ +105°C
VS = 5 V
VS = 5 V, −40°C ≤ TA ≤ +85°C5
VS = 2.5 V
65
70
81
79
79 25
85
85 30
99
99 30
395
560
990
−15
−15
88
mA
mA
mA
mA
mA
mA
mW
mW
mW
dB
95
110
Power Dissipation
VS = 3.3 V
VS = 5 V
PSRR
From VPOS to differential output, VGAIN = 0.7 V
From VNEG to differential output, VGAIN = 0.7 V
dB
1 Differential Output = (VOHx − VOLx).
2 All dBm values are calculated with 50 Ω reference, unless otherwise noted.
3 Conformance to theoretical gain expression (see Equation 1 in the Theory of Operation section).
4 Conformance to best-fit dB linear curve.
5 For supplies greater than 3.3 V, the operating temperature range is limited to −40°C ≤ TA ≤ +85°C.
Rev. 0 | Page 5 of 40
AD8264
ABSOLUTE MAXIMUM RATINGS
Table 2.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. The θJA
values in Table 3 assume a 4-layer JEDEC standard board with
zero airflow.
Parameter
Rating
Voltage
Supply Voltage (VPOS, VNEG)
Input Voltage (INPx)
Gain Voltage (GNHx, GNLO)
Power Dissipation
Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 60 sec)
Package Glass Transition Temperature (TG)
6 V
VPOS, VNEG
VPOS, VNEG
2.5 W
Table 3. Thermal Resistance
Package Type
40-Lead LFCSP1
θJA
θJC
Unit
31.0
2.3
°C/W
−40°C to +105°C
−65°C to +150°C
300°C
1 4-Layer JEDEC board (2S2P).
MAXIMUM POWER DISSIPATION
150°C
The maximum safe power dissipation for the AD8264 is limited
by the associated rise in junction temperature (TJ) on the die. At
approximately 150°C, which is the glass transition temperature,
the properties of the plastic change. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the amplifiers. Exceeding a temperature of 150°C for an
extended period can cause changes in silicon devices, potentially
resulting in a loss of functionality.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 6 of 40
AD8264
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
40 39 38 37 36 35 34 33 32 31
IPN1
VOL1
VOH1
VOH2
VOL2
VGA2
VGA3
VOL3
VOH3
VOH4
VOL4
30
29
28
27
26
25
24
23
22
21
1
2
3
4
5
6
7
8
9
10
OPP1
OPP2
IPN2
IPP2
PIN1
INDICATOR
AD8264
TOP VIEW
IPP3
(Not to Scale)
IPN3
OPP3
OPP4
IPN4
11 12 13 14 15 16 17 18 19 20
NOTES
1. EXPOSED PADDLE (PIN 0) NEEDS AN ELECTRICAL
CONNECTION TO GROUND. FOR PROPER RF GROUNDING
AND INCREASED RELIABILITY, THE PAD MUST BE
CONNECTED TO THE GROUND PLANE.
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
0 (EP), 12, 39
COMM
Ground. Exposed paddle (EP, Pin 0) needs an electrical connection to ground. For proper RF grounding
and increased reliability, the pad must be connected to the ground plane.
1, 4, 7, 10
IPN1, IPN2,
IPN3, IPN4
Negative Preamp Inputs for Channel 1 Through Channel 4. Normally, no external connection is needed.
2, 3, 8, 9
OPP1, OPP2,
OPP3, OPP4
Preamp Output for Channel 1 Through Channel 4. This pin is internally connected to the attenuator
(VGA) input, and normally, no external connection is needed.
5, 6, 11, 40
13, 14, 37, 38
IPP1, IPP2,
IPP3, IPP4
GNH1, GNH2,
GNH3, GNH4
Positive Preamp Input for Channel 1 Through Channel 4. High impedance.
Positive Gain Control Voltage Input for Channel 1 Through Channel 4. This pin is referenced to GNLO (Pin 36).
15
16, 35
17, 34
VOCM
VPOS
VNEG
This pin sets the differential output amplifier (VOHx and VOLx) common-mode voltage.
Positive Supply (Internally Tied Together).
Negative Supply (Internally Tied Together).
18, 19, 32, 33
OFS1, OFS2,
OFS3, OFS4
Voltage sets the differential output offset for Channel 1 through Channel 4. This is the noninverting input
to the differential amplifier, and it has the same bandwidth as the inverting input (VGAx).
20, 25, 26, 31
21, 24, 27, 30
22, 23, 28, 29
36
VGA4, VGA3
VGA2, VGA1
VOL1, VOL2
VOL3, VOL4
VOH1, VOH2,
VOH3, VOH4
GNLO
VGA Output for Channel 1 Through Channel 4.
Negative Differential Amplifier Output for Channel 1 Through Channel 4.
Positive Differential Amplifier Output for Channel 1 Through Channel 4.
Negative Gain Control Input (Reference for GNHx Pins).
Rev. 0 | Page 7 of 40
AD8264
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V,
VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified.
140
120
100
36
30
24
18
12
6
V
= 0V
MEAN: –0.1dB
SD: 0.05dB
–40°C
–40°C
+25°C
+25°C
+85°C
+85°C
+105°C
+105°C
GAIN
DIFFERENTIAL
OUTPUT
80
60
40
20
0
VGA
0
–6
–0.7
–0.6
–0.4
–0.2
0
0.2
0.4
–0.5
–0.3
–0.1
0.1
(V)
0.3
0.5
0.7
0.7
0.7
GAIN ERROR (dB)
V
GAIN
Figure 6. VGA Absolute Gain Error Histogram
Figure 3. Gain vs. VGAIN vs. Temperature
2.0
MEAN: 20.1dB
SD: 0.09dB
T
T
T
= +105°C
= +25°C
= –40°C
A
A
A
180
1.5
1.0
MAX
MIN
150
120
90
60
30
0
0.5
0
–0.5
–1.0
–1.5
–2.0
19.0
19.5
20.0
20.5
21.0
–0.7
–0.5
–0.3
–0.1
0.1
(V)
0.3
0.5
GAIN SCALING (dB/V)
V
GAIN
Figure 7. Gain Scale Factor Histogram (−0.4 V < VGAIN < +0.4 V)
Figure 4. Gain Error vs. VGAIN vs. Temperature
2
1
MEAN: 11.9dB
SD: 0.08dB
1MHz
10MHz
70MHz
100MHz
150MHz
80
60
40
20
0
0
–1
–2
–3
–4
11.7
11.8
11.9
12.0
12.1
–0.7
–0.5
–0.3
–0.1
0.1
(V)
0.3
0.5
GAIN INTERCEPT (dB)
V
GAIN
Figure 5. Gain Error vs. VGAIN at Various Frequencies to VGAx
Figure 8. VGA Gain Intercept Histogram
Rev. 0 | Page 8 of 40
AD8264
700
600
500
400
300
200
100
0
30
20
V
= 0.1V p-p
CH 1 TO CH 2
CH 1 TO CH 3
CH 1 TO CH 4
V
= 0V
OUT
GAIN
10
0
–10
–20
–30
–40
C
C
C
= 0pF
= 10pF
= 22pF
L
L
L
–0.5 –0.4 –0.3 –0.2 –0.1
0
0.1
0.2
0.3
0.4
0.5
100k
1M
10M
100M
500M
GAIN ERROR MATCHING (dB)
FREQUENCY (Hz)
Figure 9. Channel-to-Channel Gain Match Histogram
Figure 12. Frequency Response to Differential Output for
Various Capacitive Loads
30
24
18
12
6
30
P
= –28dBm
V
= 0.1V p-p
IN
OUT
20
10
0
–10
–20
–30
–40
0
V
V
V
V
V
V
V
= +0.7V
= +0.5V
= +0.2V
= 0V
= –0.2V
= –0.5V
= –0.7V
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
–6
–12
–18
C
C
C
= 0pF
= 10pF
= 22pF
L
L
L
100k
1M
10M
100M
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 10. Frequency Response vs. Gain to VGAx for
Various Values of VGAIN
Figure 13. Frequency Response to Differential Output for
Various Capacitive Loads with Series R = 10 Ω
40
30
20
P
= –44dBm
V
= 0.1V p-p
OUT
IN
10
20
10
0
0
–10
–20
–30
–10
–20
–30
–40
V
= +0.7V
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
V
= +0.5V
= +0.2V
= 0V
V
V
V
V
V
C
C
C
C
= 0pF
L
L
L
L
= –0.2V
= –0.5V
= –0.7V
= 10pF
= 22pF
= 47pF
100k
1M
10M
100M
100k
1M
10M
100M
500M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 14. Small Signal Frequency Response to VGAx for
Various Capacitive Loads
Figure 11. Frequency Response vs. Gain to Differential Output for
Various Values of VGAIN
Rev. 0 | Page 9 of 40
AD8264
20
P
30
24
18
12
6
V
= 0.1V p-p
= –10dBm
OUT
IN
V
= +0.7V
= 0V
GAIN
10
0
V
GAIN
V
= –0.7V
GAIN
–10
–20
–30
0
–6
–12
–18
C
C
C
C
= 47pF
= 22pF
= 9pF
L
L
L
L
V
V
V
= ±5V
= ±3.3V
= ±2.5V
S
S
S
= 0pF
100k
1M
10M
100M
500M
100k
1M
10M
100M
500M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 15. Large Signal Frequency Response to VGAx for
Various Capacitive Loads
Figure 18. Small Signal Frequency Response vs. Gain to VGAx for
Various Supply Voltages
20
10
40
P
= –28dBm
V
= 0.1V p-p
OUT
IN
V
= +0.7V
= 0V
GAIN
30
20
V
V
GAIN
GAIN
10
= –0.7V
0
0
–10
–20
–30
–10
–20
–30
–40
C
= 47pF
L
V
V
V
= ±5V
= ±3.3V
= ±2.5V
C
C
C
= 22pF
= 10pF
= 0pF
S
S
S
L
L
L
100k
1M
10M
100M
500M
100k
1M
10M
100M
500M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 16. Small Signal Frequency Response to VGAx for
Various Capacitive Loads with Series R = 10 Ω
Figure 19. Small Signal Frequency Response vs. Gain to Differential Output
for Various Supply Voltages
20
10
36
P
= –8dBm
V
V
= 0.1V p-p
= 0.7V
IN
OUT
DIFFERENTIAL
OUTPUT
GAIN
30
24
18
12
6
VGA
0
–10
–20
–30
V
V
V
V
V
V
= ±5V
S
S
S
S
S
S
= ±3.3V
= ±2.5V
= ±5V
C
= 47pF
= 22pF
= 10pF
= 0pF
L
L
L
L
0
C
C
C
= ±3.3V
= ±2.5V
–6
100k
100k
1M
10M
100M
500M
1M
10M
100M
500M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 17. Large Signal Frequency Response to VGAx for
Various Capacitive Loads with Series R = 10 Ω
Figure 20. Large Signal Frequency Response to VGAx and
Differential Output for Various Supply Voltages
Rev. 0 | Page 10 of 40
AD8264
5
4
3
2
1
0
1
0
P
= –16dBm
IN
V
= 0V
GAIN
V
= –0.7V
= +0.7V
–1
–2
–3
GAIN
V
GAIN
V
= ±2.5V, VOHx
S
S
S
S
S
S
V
V
V
V
V
= ±3.3V, VOHx
= ±5V, VOHx
= ±2.5V, VOLx
= ±3.3V, VOLx
= ±5V, VOLx
1M
10M
100M
100k
1M
10M
FREQUENCY (Hz)
100M
FREQUENCY (Hz)
Figure 21. Frequency Response from VOCM to VOHx and VOLx for
Various Supplies
Figure 24. Group Delay vs. Frequency to VGAx
8
7
6
5
4
3
2
9
V
= 0.1V p-p
OUT
3
–3
V
V
= –0.7V
= +0.7V
GAIN
GAIN
V
= 0V
GAIN
–9
–15
V
V
V
= ±5V
= ±3.3V
= ±2.5V
S
S
S
–21
100k
1M
10M
100M
1M
10M
100M
500M
(Hz)
CY
EN
QU
FRE
FREQUENCY (Hz)
Figure 22. Frequency Response from OFSx to Differential Output for
Various Supply Voltages
Figure 25. Group Delay vs. Frequency to Differential Output
15
10
5
12
P
= –22dBm
T
T
T
= +105°C
= +25°C
= –40°C
IN
A
A
A
MAX
MIN
6
0
0
–6
–5
–10
V
V
V
= ±2.5V
= ±3.3V
= ±5V
S
S
S
–12
100k
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
1M
10M
100M
1G
FREQUENCY (Hz)
GAIN
Figure 23. Preamp Frequency Response to OPPx
Figure 26. Differential Output Offset Voltage vs. VGAIN vs. Temperature
Rev. 0 | Page 11 of 40
AD8264
10
T
100
10
1
= +105°C
= +25°C
= –40°C
A
A
A
T
T
MAX
MIN
5
0
V
= ±2.5V
S
V
= ±5V
S
–5
0.1
0.1
–10
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
1
10
FREQUENCY (MHz)
100
IN
GA
Figure 27. VGAx Output Offset Voltage vs. VGAIN vs. Temperature
Figure 30. Output Resistance (VOHx, VOLx) vs.Frequency
3000
10
V
V
V
= –0.4V
= 0V
= +0.4V
GAIN
GAIN
GAIN
2500
2000
1500
1000
500
V
= ±5V
S
V
= ±2.5V
S
0
–30
1
0.1
–20
–10
0
10
20
30
1
10
FREQUENCY (MHz)
100
OUTPUT OFFSET VOLTAGE (mV)
Figure 28. Output Offset Histogram to VGAx
Figure 31. Output Resistance (VGAx) vs. Frequency
800
700
600
500
400
300
200
100
0
100
80
60
40
20
0
V
V
V
= –0.4V
= 0V
GAIN
GAIN
GAIN
= +0.4V
DIFFERENTIAL OUTPUT
VGAx
–30
–20
–10
0
10
20
30
–0.7
–0.5
–0.3
–0.1
0.1
(V)
0.3
0.5
0.7
OUTPUT OFFSET VOLTAGE (mV)
V
GAIN
Figure 29. Output Offset Histogram to Differential Output
Figure 32. Output Referred Noise to VGAx and Differential Output vs. VGAIN
Rev. 0 | Page 12 of 40
AD8264
100
10
1
35
30
25
20
15
10
5
DIFFERENTIAL OUTPUT
(TERMINATED)
VGAx (TERMINATED)
DIFFERENTIAL OUTPUT
VGAx (UNTERMINATED)
VGAx
DIFFERENTIAL OUTPUT
(UNTERMINATED)
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
GAIN
GAIN
Figure 33. Input Referred Noise from VGAx and Differential Output vs. VGAIN
Figure 36. Noise Figure vs. VGAIN
100
–10
–20
–30
–40
–50
–60
–70
10
DIFFERENTIAL OUTPUT
VGAx
1
1
100
1k
10k
100k
1M
10M
100M
0.1
1
10
FREQUENCY (MHz)
100
FREQUENCY (Hz)
Figure 34. Input Referred Noise vs. Frequency at Maximum Gain
Figure 37. VOCM Common-Mode Rejection Ratio vs. Frequency
100
−30
HD2, V = ±2.5V
S
HD3, V = ±2.5V
S
HD2, V = ±5V
S
−40
−50
−60
−70
−80
−90
HD3, V = ±5V
S
10
DIFFERENTIAL OUTPUT
VGAx
1
1
10
100
1k
10k
0
400
800
1200
(ꢀ)
1600
2000
R
(ꢀ)
R
LOAD
SOURCE
Figure 35. Input Referred Noise vs. RSOURCE
Figure 38. Harmonic Distortion to VGAx vs. RLOAD and Various Supplies
Rev. 0 | Page 13 of 40
AD8264
−30
−40
−50
−60
−70
−80
–30
–40
–50
–60
–70
–80
–90
HD2, V = ±2.5V
S
HD3, V = ±2.5V
S
HD2, V = ±5V
S
HD3, V = ±5V
S
1MHz
10MHz
35MHz
100MHz
−90
0
10
20
30
(pF)
40
50
–0.7
–0.5
–0.3
–0.1
0.1
(V)
0.3
0.5
0.7
0.7
0.7
C
V
GAIN
LOAD
Figure 39. Harmonic Distortion to VGAx vs. CLOAD
Figure 42. HD2 vs. VGAIN vs. Frequency to VGAx
−20
−30
−40
−50
−60
−70
−80
−90
−30
−40
−50
−60
−70
−80
HD2, V = ±2.5V
S
HD3, V = ±2.5V
S
HD2, V = ±5V
S
HD3, V = ±5V
S
1MHz
10MHz
35MHz
100MHz
−90
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0
400
800
1200
(ꢀ)
1600
2000
R
GAIN
LOAD
Figure 43. HD3 vs. VGAIN vs. Frequency to VGAx
Figure 40. Harmonic Distortion to Differential Output vs.
LOAD and Various Supplies
R
−30
−40
−50
−60
−70
−80
−90
−30
−40
−50
−60
−70
−80
−90
VGAx = 0.5Vp-p
VGAx = 1Vp-p
VGAx = 2Vp-p
HD2, V = ±2.5V
S
HD3, V = ±2.5V
S
INPUT LIMITED
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0
10
20
30
(pF)
40
50
C
GAIN
LOAD
Figure 44. HD2 vs. Amplitude to VGAx
Figure 41. Harmonic Distortion to Differential Output vs. CLOAD
Rev. 0 | Page 14 of 40
AD8264
−30
−40
−50
−60
−70
−80
−90
−30
−40
−50
−60
−70
−80
−90
VGAx = 0.5V p-p
VGAx = 1V p-p
VGAx = 2V p-p
V
V
V
= 0.5V p-p
= 1V p-p
= 2V p-p
OUT
OUT
OUT
INPUT LIMITED
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
GAIN
GAIN
Figure 45. HD3 vs. Amplitude to VGAx
Figure 48. HD2 vs. Amplitude to Differential Output
−30
−40
−50
−60
−70
−80
−90
−30
−40
−50
−60
−70
−80
−90
1MHz
10MHz
35MHz
V
V
V
= 0.5V p-p
= 1V p-p
= 2V p-p
OUT
OUT
OUT
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
GAIN
GAIN
Figure 46. HD2 vs. VGAIN vs. Frequency to Differential Output
Figure 49. HD3 vs. Amplitude to Differential Output
0
0
−20
1MHz
10MHz
35MHz
V
= 1V p-p
OUT
−15
−30
−45
−60
−75
−90
−40
−60
−80
LOW TONE, f – 50kHz
HIGH TONE, f + 50kHz
−100
1M
10M
100M
–0.7
–0.5
–0.3
–0.1
0.1
(V)
0.3
0.5
0.7
FREQUENCY (Hz)
V
GAIN
Figure 47. HD3 vs. VGAIN vs. Frequency to Differential Output
Figure 50. IMD3 vs. Frequency to VGAx
Rev. 0 | Page 15 of 40
AD8264
20
15
10
5
50
40
30
20
10
f = 1MHz, OIP3L
f = 1MHz, OIP3H
f = 10MHz, OIP3L
f = 10MHz, OIP3H
f = 35MHz, OIP3L
f = 35MHz, OIP3H
f = 100MHz, OIP3L
f = 100MHz, OIP3H
0
VGAx (V = ±5V)
S
−5
−10
−15
DIFF OUT (V = ±5V)
S
VGAx (V = ±3.3V)
S
DIFF OUT (V = ±3.3V)
S
VGAx (V = ±2.5V)
S
DIFF OUT (V = ±2.5V)
S
0
–0.7
–0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
–0.5
–0.3
–0.1
V
0.1
(V)
0.3
0.5
0.7
GAIN
GAIN
Figure 54. Input P1dB vs. VGAIN
Figure 51. OIP3 vs. VGAIN vs. Frequency to VGAx
0.10
0.05
0
0
V = 0.7V
GAIN
V
= 1V p-p
OUT
−20
−40
−60
LOW TONE, f – 50kHz
–0.05
–0.10
−80
HIGH TONE, f + 50kHz
−100
–40
–20
0
20
40
60
80
100
1M
10M
FREQUENCY (Hz)
100M
TIME (ns)
Figure 52. IMD3 vs. Frequency to Differential Output
Figure 55. Small Signal Pulse Response to VGAx
50
0.15
0.10
0.05
0
V
= 0.7V
GAIN
40
30
20
10
0
–0.05
–0.10
–0.15
f = 1MHz, OIP3L
f = 1MHz, OIP3H
f = 10MHz, OIP3L
f = 10MHz, OIP3H
f = 35MHz, OIP3L
f = 35MHz, OIP3H
–0.7
–0.5
–0.3
–0.1
0.1
(V)
0.3
0.5
0.7
–40
–20
0
20
40
60
80
100
V
GAIN
TIME (ns)
Figure 53. OIP3 vs. Frequency to Differential Output
Figure 56. Small Signal Pulse Response to Differential Output
Rev. 0 | Page 16 of 40
AD8264
1.5
1.0
1.5
1.0
V
= 0.7V
GAIN
0.5
0.5
0
0
1V p-p
2V p-p
1V p-p
2V p-p
–0.5
–1.0
–1.5
–0.5
–1.0
–1.5
–40
–20
0
20
40
60
80
100
–40
–20
0
20
40
60
80
100
TIME (ns)
TIME (ns)
Figure 57. Large Signal Pulse Response to VGAx
Figure 60. OFSx Large Signal Pulse Response
1.5
1.0
1.0
0.5
V
GAIN
= 0.7V
C
C
C
= 0pF
= 10pF
= 22pF
V
= 0.7V
L
L
L
GAIN
0.5
0
0
1V p-p
2V p-p
–0.5
–1.0
–1.5
–0.5
–1.0
–40
–40
–20
0
20
40
60
80
100
–20
0
20
40
60
80
100
TIME (ns)
TIME (ns)
Figure 58. Large Signal Pulse Response to Differential Output
Figure 61. Large Signal Pulse Response to VGAx for Various Capacitive Loads
1.5
2.0
2V p-p (V
2V p-p (V
1V p-p (V
1V p-p (V
)
OL
C
C
C
= 0pF
= 10pF
= 22pF
L
L
L
)
OH
1.5
1.0
)
OL
1.0
0.5
)
OH
0.5
0
0
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
0
20
40
60
80
100
120
140
160
–40
–20
0
20
40
60
80
100
TIME (ns)
TIME (ns)
Figure 59. VOCM Large Signal Pulse Response
Figure 62. Large Signal Pulse Response to Differential Output for
Various Capacitive Loads
Rev. 0 | Page 17 of 40
AD8264
–2.0
V
1.5
1.0
= 0.7V
C
C
C
= 0pF
= 10pF
= 22pF
GAIN
L
L
L
–1.5
–1.0
–0.5
0
0.5
0
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
–40
–20
0
20
40
60
80
100
0
200
400
600
800
1000
1200
TIME (ns)
TIME (ns)
Figure 63. Large Signal Pulse Response to Differential Output for
Various Capacitive Loads with Series R = 10 Ω
Figure 66. Preamp Overdrive Recovery
1.5
1.5
1.0
1.0
V
PULSE
GAIN
0.5
0
0.5
GAIN
RESPONSE
0
–0.5
–1.0
–1.5
–0.5
–1.0
–1.5
0
400
800
1200
1600
2000
0
200
400
600
800
1000
1200
TIME (ns)
TIME (ns)
Figure 64. VGAx Response to Change in VGAIN
Figure 67. VGA Overdrive Recovery
1.5
1.0
0
–10
–20
–30
–40
–50
–60
VGAx (V
= +0.7V)
GAIN
DIFF OUT (V
VGAx (V
= +0.7V)
GAIN
= −0.7V)
GAIN
DIFF OUT (V
GAIN
= −0.7V)
0.5
GAIN
RESPONSE
0
–0.5
–1.0
–1.5
V
PULSE
GAIN
100k
1M
10M
100M
0
400
800
1200
1600
2000
FREQUENCY (Hz)
TIME (ns)
Figure 65. Differential Output Response to Change in VGAIN
Figure 68. Power Supply Rejection vs. Frequency (VPOS)
Rev. 0 | Page 18 of 40
AD8264
5
–5
135
125
115
105
95
VGAx (V
= +0.7V)
GAIN
DIFF OUT (V
VGAx (V
= +0.7V)
GAIN
= −0.7V)
GAIN
±5V
DIFF OUT (V
GAIN
= −0.7V)
–15
–25
–35
–45
–55
±2.5V
±3.3V
85
75
65
55
–40
100k
1M
10M
100M
–15
10
35
60
85
110
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 69. Power Supply Rejection vs. Frequency (VNEG)
Figure 70. Quiescent Supply Current vs. Temperature
Rev. 0 | Page 19 of 40
AD8264
TEST CIRCUITS
VS = 2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V,
VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified.
DC
METER
500ꢀ
500ꢀ
500ꢀ
AD8264
VGAx
IPPx
IPNx
+
–
PrA
6dB
VOLx
VOHx
50ꢀ
+
–
DC
METER
6dB
GNHx
GNLO
VOCM
OFSx
V
GAIN
OVEN
Figure 71. Gain vs. VGAIN vs. Temperature (See Figure 3 and Figure 4)
NETWORK ANALYZER
OSCILLOSCOPE
SIGNAL
GENERATOR
OUT
50ꢀ
CH1
CH2
CH1
CH2
50ꢀ
50ꢀ
50ꢀ
50ꢀ
DIFFERENTIAL
PROBE
DIFFERENTIAL
PROBE
DIFFERENTIAL
PROBE
AD8264
AD8264
VGAx
VGAx
IPPx
IPNx
+
–
500ꢀ
IPPx
IPNx
+
–
PrA
6dB
VOLx
50ꢀ
+
–
PrA
6dB
VOLx
VOHx
50ꢀ
+
–
500ꢀ
6dB
6dB
VOHx
500ꢀ
GNHx
GNLO
VOCM
OFSx
GNHx
GNLO
VOCM
OFSx
V
GAIN
V
GAIN
Figure 74. Frequency Response vs. Gain to Differential Output for Various
Values of VGAIN (See Figure 11)
Figure 72. Gain Error vs. VGAIN at Various Frequencies to VGAx (See Figure 5)
NETWORK ANALYZER
NETWORK ANALYZER
CH1
CH2
50ꢀ
50ꢀ
DIFFERENTIAL
PROBE
CH1
CH2
50ꢀ
50ꢀ
AD8264
DIFFERENTIAL
PROBE
VGAx
500ꢀ
IPPx
50ꢀ
IPNx
+
–
AD8264
PrA
6dB
VOLx
6dB
+
–
VGAx
VOLx
IPPx
IPNx
+
–
PrA
6dB
50ꢀ
+
–
VOHx
500ꢀ
VOHx
6dB
CL
GNHx
GNLO
VOCM
OFSx
500ꢀ
CL
GNHx
GNLO
VOCM
OFSx
V
GAIN
Figure 75. Frequency Response to Differential Output for
Various Capacitive Loads (See Figure 12)
Figure 73. Frequency Response vs. Gain to VGAx for Various Values of VGAIN
GAIN = GNHx – GNLO (See Figure 10)
,
V
Rev. 0 | Page 20 of 40
AD8264
NETWORK ANALYZER
NETWORK ANALYZER
CH1
CH2
50ꢀ
50ꢀ
DIFFERENTIAL
CH1
CH2
PROBE
50ꢀ
50ꢀ
AD8264
DIFFERENTIAL
PROBE
VGAx
VOLx
IPPx
50ꢀ
IPNx
+
–
PrA
6dB
AD8264
+
–
VGAx
6dB
IPPx
IPNx
+
–
10ꢀ
PrA
6dB
VOLx
VOHx
50ꢀ
+
–
500ꢀ
6dB
C
L
VOHx
10ꢀ
V
GNHx
OFSx
GNLO
VOCM
S
500ꢀ
V
V
GNHx
GNLO
VOCM
OFSx
C
L
GAIN
SUPPLY
Figure 76. Frequency Response to Differential Output for Various Capacitive
Loads with Series R = 10 Ω (See Figure 13)
Figure 79. Frequency Response vs. Gain to VGAx for
Various Supply Voltages (See Figure 18)
NETWORK ANALYZER
NETWORK ANALYZER
CH1
CH2
CH1
CH2
50ꢀ
50ꢀ
50ꢀ
50ꢀ
DIFFERENTIAL
PROBE
DIFFERENTIAL
PROBE
AD8264
VGAx
AD8264
500ꢀ
C
L
VGAx
IPPx
50ꢀ
IPNx
+
–
PrA
6dB
VOLx
6dB
+
–
IPPx
IPNx
+
–
PrA
6dB
VOLx
50ꢀ
+
–
500ꢀ
6dB
VOHx
VOHx
GNHx
GNLO
VOCM
OFSx
500ꢀ
GNHx
GNLO
VOCM
OFSx
V
S
V
GAIN
V
V
GAIN
SUPPLY
Figure 80. Frequency Response vs. Gain to Differential Output for
Various Supply Voltages (See Figure 19)
Figure 77. Frequency Response to VGAx for Various Capacitive Loads
(See Figure 14)
NETWORK ANALYZER
NETWORK ANALYZER
CH1
CH2
CH1
CH2
50ꢀ
50ꢀ
50ꢀ
50ꢀ
DIFFERENTIAL
PROBE
DIFFERENTIAL
PROBE
AD8264
10ꢀ
VGAx
AD8264
500ꢀ
C
L
VGAx
IPPx
50ꢀ
IPNx
+
–
PrA
6dB
VOLx
VOHx
+
–
IPPx
IPNx
+
–
PrA
6dB
VOLx
6dB
+
–
500ꢀ
6dB
VOHx
GNHx
GNLO
VOCM
OFSx
500ꢀ
GNHx
GNLO
VOCM
OFSx
V
S
V
GAIN
V
SUPPLY
50ꢀ
Figure 81. VOCM Frequency Response to Differential Output (See Figure 21)
Figure 78. Frequency Response to VGAx for Various Capacitive Loads with
Series R =10 Ω (See Figure 16)
Rev. 0 | Page 21 of 40
AD8264
NETWORK ANALYZER
CH1
CH2
SPECTRUM ANALYZER
50ꢀ
50ꢀ
CH1
CH2
DIFFERENTIAL
PROBE
50ꢀ
50ꢀ
AD8264
VGAx
IPPx
IPNx
+
–
AD8264
AD8129
10×
PrA
6dB
VOLx
VGAx
VOLx
+
–
500ꢀ
6dB
IPPx
IPNx
+
–
PrA
6dB
+
–
VOHx
6dB
AD8129
10×
500ꢀ
VOHx
GNHx
GNLO
VOCM
OFSx
V
S
GNHx
OFSx
GNLO
VOCM
V
SUPPLY
50ꢀ
V
GAIN
Figure 85. Output Referred Noise vs. VGAIN (See Figure 32)
Figure 82. OFSx Frequency Response to Differential Output (See Figure 22)
SPECTRUM ANALYZER
220ꢀ
50ꢀ
CH1
CH2
50ꢀ
50ꢀ
500ꢀ
AD8264
VGAx
IPPx
IPNx
500ꢀ
500ꢀ
+
–
PrA
6dB
VOLx
VOHx
+
–
AD8264
AD8129
10×
DC
METER
6dB
VGAx
IPPx
IPNx
+
–
PrA
6dB
VOLx
VOHx
+
–
6dB
GNHx
GNLO
VOCM
OFSx
AD8129
10×
OVEN
GNHx
OFSx
GNLO
VOCM
VGAIN
Figure 86. Input Referred Noise vs. Frequency (See Figure 34)
Figure 83. Output Offset Voltage vs. VGAIN vs. Temperature
(See Figure 26 and Figure 27)
NOISE METER
NETWORK ANALYZER
CH1
CH2
50ꢀ
NOISE
SOURCE
50ꢀ
50ꢀ
AD8264
VGAx
IPPx
IPNx
+
–
AD8264
PrA
6dB
VOLx
VOHx
50ꢀ
+
–
VGAx
VOLx
6dB
IPPx
50ꢀ
IPNx
+
–
PrA
6dB
+
–
6dB
GNHx
OFSx
GNLO
VOCM
VOHx
V
GAIN
V
GNHx
OFSx
GNLO
VOCM
S
V
SUPPLY
Figure 87. Noise Figure vs. VGAIN (See Figure 36)
Figure 84. Output Resistance vs. Frequency
(See Figure 30 and Figure 31)
Rev. 0 | Page 22 of 40
AD8264
SPECTRUM ANALYZER
220ꢀ
50ꢀ
CH1
CH2
50ꢀ
50ꢀ
50ꢀ
0.1µF
AD8264
AD8129
10×
VGAx
IPPx
IPNx
+
–
PrA
6dB
VOLx
VOHx
+
–
R
S
6dB
50ꢀ
0.1µF
AD8129
10×
50ꢀ
0.1µF
GNHx
OFSx
GNLO
VOCM
1kꢀ
1kꢀ
Figure 88. Input Referred Noise vs. RSOURCE (See Figure 35)
SPECTRUM ANALYZER
NETWORK ANALYZER
SIGNAL
GENERATOR
OUT
50ꢀ
CH1
CH1
CH2
50ꢀ
50ꢀ
50ꢀ
DIFFERENTIAL
PROBE
LPF
AD8264
10ꢀ
AD8264
VGAx
VOLx
VGAx
C
L
IPPx
+
–
PrA
6dB
IPPx
IPNx
+
–
50ꢀ
+
–
PrA
6dB
VOLx
500ꢀ
VOHx
50ꢀ
+
–
IPNx
6dB
6dB
VOHx
500ꢀ
GNHx
GNLO
VOCM
OFSx
GNHx
GNLO
VOCM
OFSx
Figure 89. VOCM Common-Mode Rejection vs. Frequency (See Figure 37)
Figure 91. Harmonic Distortion to VGAx vs. CLOAD (Figure 39)
SPECTRUM ANALYZER
SIGNAL
GENERATOR
OUT
50ꢀ
CH1
50ꢀ
SPECTRUM ANALYZER
SIGNAL
GENERATOR
OUT
CH1
50ꢀ
500ꢀ
50ꢀ
LPF
AD8264
450ꢀ
VGAx
LPF
AD8264
IPPx
IPNx
+
–
VGAx
PrA
6dB
VOLx
VOHx
50ꢀ
+
–
IPPx
IPNx
+
–
PrA
6dB
6dB
VOLx
VOHx
50ꢀ
+
–
6dB
AD8130
1×
R
R
L
V
GNHx
GNLO
VOCM
OFSx
L
S
V
GNHx
GNLO
VOCM
OFSx
S
V
V
SUPPLY
SUPPLY
Figure 90. Test Circuit Harmonic Distortion to VGAx vs.
RLOAD and Various Supplies (See Figure 38)
Figure 92. Harmonic Distortion to Differential Output vs. RLOAD and Various
Supplies (See Figure 40)
Rev. 0 | Page 23 of 40
AD8264
SPECTRUM ANALYZER
SIGNAL
GENERATOR
SPECTRUM ANALYZER
OUT
50ꢀ
SIGNAL
GENERATOR
CH1
OUT
50ꢀ
CH1
50ꢀ
50ꢀ
350ꢀ
LPF
450ꢀ
AD8264
LPF
VGAx
AD8264
VGAx
IPPx
IPNx
+
PrA
VOLx
+
IPPx
IPNx
+
–
50ꢀ
6dB
–
PrA
6dB
VOLx
+
50ꢀ
6dB
AD8130
10ꢀ
10ꢀ
1×
6dB
AD8130
1×
–
VOHx
–
VOHx
V
S
GNHx
GNLO
VOCM
OFSx
C
L
C
GNHx
GNLO
VOCM
OFSx
L
V
GAIN
Figure 93. Harmonic Distortion to Differential Output vs.
CLOAD (See Figure 41)
Figure 95. HD2 and HD3 to Differential Output (See Figure 46 through Figure 49)
SPECTRUM ANALYZER
SPECTRUM ANALYZER
SIGNAL
GENERATOR
OUT
50ꢀ
CH1
CH1
50ꢀ
50ꢀ
450ꢀ
OUT
450ꢀ
SIGNAL
GENERATOR
AD8264
LPF
50ꢀ
50ꢀ
50ꢀ
VGAx
VOLx
AD8264
IPPx
IPNx
+
–
VGAx
VOLx
PrA
6dB
+
–
OUT
SIGNAL
GENERATOR
6dB
IPPx
IPNx
+
PrA
50ꢀ
VOHx
+
–
50ꢀ
6dB
–
6dB
GNHx
GNLO
VOCM
OFSx
VOHx
V
GAIN
GNHx
GNLO
VOCM
OFSx
V
GAIN
Figure 94. HD2 and HD3 to VGAx (See Figure 42 Through Figure 45)
Figure 96. IMD3 and OIP3 to VGAx (See Figure 50 and Figure 51)
SPECTRUM ANALYZER
CH1
50ꢀ
450ꢀ
OUT
OUT
SIGNAL
GENERATOR
AD8264
50ꢀ
50ꢀ
50ꢀ
VGAx
VOLx
10ꢀ
IPPx
IPNx
+
–
PrA
6dB
+
–
SIGNAL
GENERATOR
AD8130
1×
6dB
10ꢀ
VOHx
50ꢀ
500ꢀ
500ꢀ
GNHx
GNLO
VOCM
OFSx
Figure 97. IMD3 and OIP3 to Differential Output (See Figure 52 and Figure 53)
Rev. 0 | Page 24 of 40
AD8264
OSCILLOSCOPE
NETWORK ANALYZER
CH2
CH3
CH1
CH1
50ꢀ
DIFFERENTIAL
PROBE
50ꢀ
50ꢀ 50ꢀ
500ꢀ
AD8264
VGAx
IPPx
IPNx
+
–
PrA
6dB
VOLx
500ꢀ
VOHx
50ꢀ
+
–
AD8264
6dB
VGAx
IPPx
IPNx
+
–
500ꢀ
PrA
6dB
VOLx
500ꢀ
VOHx
50ꢀ
+
GNHx
GNLO
VOCM
OFSx
6dB
OUT
PULSE
GENERATOR
–
50ꢀ
50ꢀ
500ꢀ
GNHx
GNLO
VOCM
OFSx
V
GAIN
Figure 101. VOCM Pulse Response (See Figure 59)
Figure 98. Input P1dB vs. VGAIN (See Figure 54)
OSCILLOSCOPE
OSCILLOSCOPE
PULSE
GENERATOR
OUT
CH1
CH2
CH1
50ꢀ
50ꢀ
50ꢀ
50ꢀ
DIFFERENTIAL
PROBE
DIFFERENTIAL
PROBE
DIFFERENTIAL
PROBE
AD8264
VGAx
VOLx
AD8264
IPPx
IPNx
+
–
VGAx
PrA
6dB
50ꢀ
+
–
500ꢀ
IPPx
IPNx
+
–
6dB
PrA
6dB
VOLx
VOHx
50ꢀ
+
–
VOHx
6dB
GNHx
GNLO
VOCM
OFSx
OUT
PULSE
GENERATOR
GNHx
GNLO
VOCM
OFSx
50ꢀ
50ꢀ
Figure 99. Pulse Response to VGAx, VGAIN = 0.7 V (See Figure 55 and Figure 57)
Figure 102. OFSx Pulse Response (See Figure 60)
OSCILLOSCOPE
OSCILLOSCOPE
PULSE
GENERATOR
CH1
PULSE
GENERATOR
OUT
50ꢀ
OUT
CH1
CH2
50ꢀ
50ꢀ
50ꢀ
50ꢀ
DIFFERENTIAL
PROBE
DIFFERENTIAL
PROBE
DIFFERENTIAL
PROBE
AD8264
AD8264
VGAx
VOLx
VGAx
C
IPPx
50ꢀ
+
–
L
IPPx
+
PrA
6dB
+
–
PrA
6dB
VOLx
500ꢀ
VOHx
50ꢀ
500ꢀ
+
IPNx
6dB
IPNx
–
6dB
VOHx
–
500ꢀ
GNHx
GNLO
VOCM
OFSx
GNHx
GNLO
VOCM
OFSx
Figure 100. Pulse Response to Differential Outputs, VGAIN = 0.7 V
(See Figure 56 and Figure 58)
Figure 103. Pulse Response to VGAx for Various Capacitive Loads,
VGAIN = 0.7 V (See Figure 61)
Rev. 0 | Page 25 of 40
AD8264
OSCILLOSCOPE
CH1
SIGNAL
GENERATOR
OSCILLOSCOPE
OUT
50ꢀ
PULSE
GENERATOR
DIFFERENTIAL
PROBE
50ꢀ
OUT
CH1
50ꢀ
50ꢀ
OPPx
AD8264
DIFFERENTIAL
PROBE
VGAx
VOLx
AD8264
IPPx
IPNx
+
–
VGAx
PrA
6dB
50ꢀ
+
–
IPPx
IPNx
+
–
6dB
PrA
6dB
VOLx
50ꢀ
+
–
C
500ꢀ
L
6dB
VOHx
VOHx
C
500ꢀ
L
GNHx
GNLO
VOCM
OFSx
GNHx
GNLO
VOCM
OFSx
Figure 104. Pulse Response to Differential Output for Various Capacitive
Loads, VGAIN = 0.7 V (See Figure 62)
Figure 107. Preamp Overdrive Recovery (See Figure 66)
OSCILLOSCOPE
CH1
OSCILLOSCOPE
SIGNAL
GENERATOR
PULSE
OUT
GENERATOR
OUT
50ꢀ
50ꢀ
CH1
DIFFERENTIAL
50ꢀ
PROBE
50ꢀ
DIFFERENTIAL
PROBE
AD8264
VGAx
AD8264
VGAx
IPPx
IPNx
+
–
PrA
6dB
VOLx
VOHx
50ꢀ
IPPx
+
–
10ꢀ
+
–
PrA
6dB
VOLx
VOHx
50ꢀ
+
–
C
L
6dB
500ꢀ
IPNx
6dB
10ꢀ
C
500ꢀ
L
GNHx
GNLO
VOCM
OFSx
GNHx
GNLO
VOCM
OFSx
Figure 105. Pulse Response to Differential Output for Various Capacitive
Loads with Series R = 10 Ω, VGAIN = 0.7 V (See Figure 63)
Figure 108. VGA Overdrive Recovery, VGAIN = 0.7 V (See Figure 67)
OSCILLOSCOPE
CH1
SIGNAL
GENERATOR
OUT
50ꢀ
CH2
50ꢀ 50ꢀ
DIFFERENTIAL
PROBE
AD8264
500ꢀ
VGAx
VOLx
IPPx
IPNx
+
–
PrA
6dB
50ꢀ
+
500ꢀ
6dB
–
VOHx
500ꢀ
GNHx
GNLO
VOCM
OFSx
OUT
PULSE
GENERATOR
50ꢀ
Figure 106. Gain Response to VGAx or Differential Output
(See Figure 64 and Figure 65)
Rev. 0 | Page 26 of 40
AD8264
OSCILLOSCOPE
CH2
CH3
CH1
50ꢀ 50ꢀ
50ꢀ
DMM
(+1)
DMM
(–1)
DIFFERENTIAL
PROBE
VPOS
VNEG
AD8264
AD8264
VGAx
VGAx
VOLx
VOHx
500ꢀ
IPPx
IPNx
+
–
IPPx
IPNx
+
–
PrA
6dB
VOLx
500ꢀ
50ꢀ
+
–
PrA
6dB
50ꢀ
+
–
6dB
6dB
VOHx
500ꢀ
VS
GNHx
GNLO
VOCM
OFSx
VGAIN
VSUPPLY
GNHx
GNLO
VOCM
OFSx
Figure 110. Quiescent Supply Current (See Figure 70)
Figure 109. PSRR (See Figure 68 and Figure 69)
Rev. 0 | Page 27 of 40
AD8264
THEORY OF OPERATION
OVERVIEW
VGA
The AD8264 is a dc-coupled quad channel VGA with a fixed
gain-of-2 (6 dB) preamplifier and a single-ended-to-differential
output amplifier with level shift capability that can be used as an
ADC driver. Figure 111 shows a representative block diagram of
a single channel; all four channels are identical. The supply can
operate from 2.5 V to 5 V. The primary application is as a
pulse processor for medical positron emission tomography
(PET) imaging; however, the part is useful for any dc-coupled
application that can benefit from variable gain.
The VGA has a voltage feedback architecture and uses analog
control to vary the gain. Its low gain range helps to maintain
low offset and is intended for gain trim applications. The offset
of the preamp and the VGA are trimmed; therefore, the maximum
input referred offset is <0.5 mV over temperature (see Figure 26).
Keeping the gain of each stage relatively low also allows the
bandwidth to stay high.
The gain of the VGA is adjusted using the fully differential
control inputs, GNHx and GNLO. The GNLO pin is internally
connected to all four channels and must be biased externally.
Under typical conditions, the GNLO pin is grounded. The gain
high control pins (GNHx) are independent for each channel.
The gain slope is nominally 20 dB/V. With GNLO connected to
ground, each GNHx input can have a voltage applied from VNEG
to VPOS without gain foldover.
The signal chain consists of three fundamental stages: the
preamplifier, the variable gain amplifier, and the differential
output buffer amplifier. The preamplifier has an internally fixed
gain-of-2 (6 dB). The VGA comprises an attenuator that
provides 0 dB to 24 dB of attenuation, followed by a fixed gain
18 dB (8×) amplifier. The single-ended VGA output is connected
directly to the noninverting input of the differential output
(post) amplifier, which has a differential fixed gain-of-2 (6 dB).
To make use of the full gain range of the VGA, the nominal gain
control voltage needed at GNHx is 0.65 V relative to the voltage
applied to GNLO. At the lowest supply voltage of 2.5 V, the pin
GNLO should always be grounded. With increasing supply, the
common-mode range of the gain control interface increases.
This means that GNLO can be anywhere within ±1.2 V at
±3.3 V supplies and ±2.8 V at 5 V supplies.
The gain range from the preamp input to the VGA output is
0 dB to 24 dB. The aggregate gain range from preamp input to
the differential postamplifier output is 6 dB to 30 dB.
The ideal gain equation for the gain from the single-ended
input to the output is
V
GAIN = VGNHx − VGNLO
(1)
(2)
Table 5. Gain Control Input Range
Supply Voltage (V) GNLO Voltage Range (V) VGAIN Range (V)
dB
Gain = 20
×VGAIN + ICPT
5
3.3
2.5
2.8
1.2
0.65
0.65
0.65
V
The ideal value for ICPT, or the intercept, is defined at VGAIN = 0 V.
The ICPT for the VGA output and differential amplifier outputs
equals 12.1 dB and 18.1 dB, respectively. The actual intercept
varies with any additional gain or loss along the signal path.
The measured values are both approximately 0.2 dB low.
0
For example, at 3.3 V supplies, the outputs of a single-supply
unipolar DAC, such as the 10-bit, 4-channel AD5314, can be
used to drive the GNHx pins directly, in conjunction with using
the ADR318 1.8 V reference to bias the GNLO pin at VREF/2 = 0.9.
Because the GNLO pin sources only about 1.2 μA for the four
channels (~300 nA per channel, the same as for the GNHx pins), a
simple resistive divider is generally adequate to set the voltage at
the GNLO input.
PREAMP
The preamplifier is a current feedback amplifier, designed to
drive the internal 100 Ω gain setting resistors and the resistive
attenuator, which together result in a nominal load to the
preamplifier of about 113 Ω. Normally, the negative preamp
input, IPNx, is not connected externally. The positive input
IPPx is the high impedance input of the current feedback amp.
Note that, at the largest supply voltage of 5 V, the input signal
can become so large that the preamplifier output cannot deliver
the required current to drive the 113 Ω load and, therefore, limits
at 6 V p-p. This means that the input limits at 3 V p-p.
The short-circuit input referred noise at maximum VGA gain is
about 2.3 nV/√Hz, and this accounts for all of the amplifiers and
gain setting resistors. When measuring the input referred noise
from the VGA output, the number is slightly lower at 2.1 nV/√Hz
because the noise of the postamplifier is not included in the
noise calculation.
Rev. 0 | Page 28 of 40
AD8264
COMPOSITE GAIN IS +6dB TO +30dB
PREAMP OUTPUT
(NOT USED)
SINGLE-ENDED HS
VGA OUTPUT
OPPx
VGAx
3
NONINVERTING
AMPLIFIER INPUT
FIXED GAIN VGA
AMPLIFIER
DIFFERENTIAL OUTPUT
AMPLIFIER 6dB (2×)
PREAMP
6dB (2×)
18dB (8×)
IPPx
1
IPNx
1kꢀ
2kꢀ
+
ATTENUATOR
–24dB TO 0dB
100ꢀ
–
747ꢀ
107ꢀ
VOLx
2
DIFFERENTIAL
VGA OUTPUT
INVERTING AMPLIFIER
INPUT (NOT USED)
100ꢀ
VOHx
GAIN
INTERFACE
INTERPOLATOR
VPOS
VNEG
2kꢀ
POWER
BIAS
SUPPLIES
1kꢀ
COMM
GNHx GNLO
VOCM
OFSx
DIFFERENTIAL GAIN
CONTROL INPUTS
OUTPUT COMMON-MODE
VOLTAGE ADJUSTMENT
OFFSET
ADJUST
DIFFERENTIAL OUTPUT NEVER LIMITS
BECAUSE VGA LIMITS FIRST.
DIFFERENTIAL OUTPUT SWING = 2x VGA OUT
5.2V p-p MAX @ ±2.5V
2.6V p-p MAX @ ±2.5V
4V p-p MAX @ ±3.5V TO ±3.3V
7.5V p-p MAX @ ±5V
34nV/√Hz
1.2V p-p MAX @ ±2.5V
2V p-p MAX @ ±3.5V TO ±3.3V
3V p-p MAX@ ±5V (PREAMP
DRIVE LIMITED)
1
2
3
8V p-p MAX @ ±3.5V TO ±3.3V
15V p-p MAX @ ±5V
2.3nV/√Hz
73nV/√Hz
Figure 111. Single-Channel Block Diagram
If dc offset is not desired, then the OFSx pins should be connected
to ground. However, the OFSx pins can also be used as separate
inputs if the user wants this function.
POST AMPLIFIER
From the preamp input to the VGA output (VGAx), the gain
is noninverting. As can be seen in Figure 111, the VGAx pins
drive the positive input of the differential amplifier. The gain
is inverting from the input of the preamp to the output pin at
VOLx, and the gain is noninverting to the output VOHx.
NOISE
At maximum gain, the preamplifier is the primary contributor
of noise and results in a differential output referred noise of
roughly 73 nV/√Hz. The noise at the VGAx outputs is 34 nV/√Hz,
and because of the gain-of-2, the VGA output noise is amplified
by 6 dB to 68 nV/√Hz. The differential amplifier, including the
gain setting resistors, contributes another 26 nV/√Hz, and the
rms sum results in a total noise of 73 nV/√Hz. At the lowest
gain, the noise at the VGA output is approximately 19 nV/√Hz, and
when multiplied by two, it results in 38 nV/√Hz at the differential
output; again, rms summing this with the 26 nV/√Hz of the
differential amplifier causes the total output referred noise to
be approximately 46 nV/√Hz.
Other than the input from VGAx, each differential amplifier
has two additional inputs: VOCM and OFSx. A common
VOCM pin is shared among all four postamplifiers, while
separate OFSx pins are provided for each channel.
VOCM Pin
The VOCM pin sets the common-mode voltage of the differential
output and must be biased by an external voltage. When driving
a dc-coupled ADC, the voltage typically comes from the ADC
reference, as shown in the Applications Information section.
If dc level shift is not necessary, the VOCM pin is connected
to ground.
The input referred noise to the preamplifier at maximum gain
is 2.3 nV/√Hz and increases with decreasing gain. Note that all
noise numbers include the necessary gain setting resistors.
OFSx Pins
The OFSx pins are the inverting inputs of the differential post
amplifiers and can be used to prebias a differential dc offset at
the output. This is very useful when the input is a unipolar pulse
because the user can set up the gain and the offset in such a way
as to optimally map a unipolar pulse into the full-scale input of
an ADC, while dc coupling throughout.
Rev. 0 | Page 29 of 40
AD8264
APPLICATIONS INFORMATION
A LOW CHANNEL COUNT APPLICATION CONCEPT
USING A DISCRETE REFERENCE
Figure 112 also includes the DAC output equation, which
indicates that the output can vary between 0 V and VREF = 1.25 V.
The output of the AD8264 is ideal to drive an ADC like the 1.8 V
quad-channel AD9228. If eight channels are needed, two AD8264s
with the octal AD9222 ADC achieve the same thing. The same
resistive divider can be used for two AD8264s because the bias
current flowing is now ~2 μA, but this still only introduces an
error of 1 mV with ideally matched resistors. With 20 dB/V gain
scaling, this is a gain error of only 0.02 dB, which is much
smaller than the fundamental gain error of the AD8264
(typically ~0.2 dB).
The AD8264 is particularly well suited for use in the analog
front end of medical PET imaging systems. Figure 112 shows
how the AD8264 may be used with the AD5314 (a 4-channel,
10-bit DAC) and the AD9222/AD9228 (an octal or quad, 12-bit
ADC, respectively). The DAC sets the gain of the AD8264. Note
that the full gain span of 24 dB is achieved with this setup because
the gain control input range of the AD8264 is very close to 1.25 V.
The GNLO pin must offset by 1.25/2 = 625 mV because the
gain control input is bipolar around the voltage applied at GNLO.
This is done with two 1 kΩ, 1% resistors. The approximately 1 μA
of bias current flowing from the GNLO pin does not contribute
a significant error because the basic gain error of the AD8264 is
the limiting factor.
The single-ended-to-differential amplifier of the AD8264
amplifies the VGA output signal by 6 dB and can provide the
required dc bias of the AD9222/AD9228, as shown in Figure 112.
The ADC is connected with the default internal reference because
the SENSE pin is grounded. With this connection, the AD9222/
AD9228 VREF pin is an output that provides 1 V; this is then
connected to the VOCM input of the AD8264, which sets the
output common-mode voltage of the VOHx and VOLx pins to
1 V. This voltage is very close to the recommended optimal value of
VDD/2 = 0.9 V. With this configuration, the ADC inputs are set
to a full-scale (FS) of 2 V p-p.
The ADR127 1.25 V precision reference with an input of 3.3 V
can supply −2 mA to +5 mA from −40°C to +125°C, which is
sufficient to drive both the resistive divider and the REFIN pin
of the AD5314. The AD5314 is based on the string DAC concept,
which means that the REFIN pin looks like a resistor that is
nominally 45 kΩ; this results in a current draw of 1.25V/45 kΩ =
28 μA. Even at the lowest specified resistance of 37 kΩ, this is
still only a current of 34 μA. Therefore, the total current draw from
the ADR127 is the 625 μA of the resistive divider plus ~30 μA,
which equals ~655 μA, well below the 5 mA maximum current.
ADR127
Note that the ADC VREF should not drive many loads; therefore,
for multiple AD8264s, the VREF should be buffered.
NC
NC
NC
6
5
4
1
2
3
+3.3V
GND
1.25V
1µF
V
× D
REFIN
N
2
V
=
V
V
OUT
OUT
IN
0.1µF
V
RANGE = 0V TO 1.25V
EACH
OUT
+3.3V
10µF
REFIN
V
1kꢀ
1%
DD
V
V
A
B
OUT
OUT
625mV
DAC
AD5314
1kꢀ
1%
V
C
OUT
0.1µF
V
D
OUT
GND
+3.3V
~250nA EACH
VPOS
IPPx
GNLO
R
GNH1
S
GNH2
GNH3
GNH4
R
TERM
AD8264
VGA OUTPUTS TO OTHER
SIGNAL PROCESSING
VGAx
+1.8V
VNEG VOCM OFSx VOHx VOLx
FS = 2V p-p
R
R
FILT
VDD
V
– x
ADC
IN
–3.3V
AD9222/
C
GND
FILT
10µF
0.1µF
AD9228
V
+ x
VREF SENSE
IN
FILT
OUTPUT COMMON-MODE VOLTAGE = 1V
VOHx = 1V, VOLx = 1V; VOFS = 0V
SENSE GROUNDED: VREF = 1V
Figure 112. Application Concept of the AD8264 with the AD5314 10-Bit DAC and the AD9222/AD9228 12-Bit ADC
Rev. 0 | Page 30 of 40
AD8264
Figure 113 shows how the AD8264 is connected in a PET
A DC CONNECTED CONCEPT EXAMPLE
application. The PMT generates a negative-going current pulse
that results in a voltage pulse at the preamplifier input and a
differential output pulse on VOLx and VOHx.
The dc connected concept example in Figure 113 is an application
with the 40-channel AD5381, 3 V, 12-bit DAC. The main difference
between this example and Figure 112 is that, for the same ADR127
1.25 V reference, the full-scale output of the DAC is from
0 V to 2 × VREFIN = 2.5 V. Two options for gain control
include the following:
To fully appreciate the advantages of the AD8264, note the
common-mode and polarity conversion afforded. The AD9228,
as with most modern ADCs, is a low voltage, single-polarity
device. Recall that the PMT is a high voltage device that yields a
negative pulse. To map the pulse to the input range of the ADC,
the pulse must be inverted, shifted, and amplified to the full
input range of the ADC. This is done by using the gain control,
signal offset, and common-mode features of the AD8264.
•
Use the same circuit as in Figure 112 but use only half the
DAC output voltage from 0 V to 1.25 V. This is the simplest
solution, requiring the fewest extra components. Note that
the overall gain resolution increases by one bit to 11 bits
over the 10-bit AD5314.
The full-scale input of the converter is 0 V to 2 V, with a common-
mode of 1 V. Match the VOCM voltage of the AD8264 to the
ADC common mode (VREF = 1 V), and the two devices can be
connected directly using an appropriate level of the antialiasing
filter. The PMT signal is 0 V to −0.1 V. With a gain of 20× (26 dB),
the AD8264 output signal range is 2 V p-p. Prebias the signal
negative by −0.5 V using the AD8264 OFSx inputs, which sets
VOHx = 1.5 V and VOLx = 0.5 V for VOCM = 1 V. The output
is perfectly matched to the input of the ADC.
•
Ground GNLO and scale the DAC output so that the
GNHx inputs vary from −0.652 V to +0.625 V. Figure 113
shows a possible circuit implementation using a divider
between the DAC output and a −1.25 V reference.
GNLO cannot simply be increased to 1.25 V because, for a
given supply voltage, GNLO has a limited voltage range to
achieve the full gain span (see Table 5).
However, a third possibility is to use another voltage that is
between 1.2 V and 625 mV on GNLO, such as 1 V. In this case,
the DAC must vary from 0.375 V to 1.625 V to achieve the fully
specified gain range.
Note that, by connecting VOLx to the positive ADC input and
VOHx to the negative ADC input, the negative input pulse is
inverted automatically. The VGAx output is still a negative
pulse, amplified by 20 dB for this example.
Note the gain limits when the differential gain control exceeds
0.625 V, either to 6 dB or to 30 dB. If the differential gain
control input voltage is exceeded, no gain foldover occurs.
ADR127
NC
NC
NC
6
5
4
1
2
3
+3.3V
GND
VREF = 1.25V
1µF
2 × V
× D
REFIN
V
=
OUT
V
V
OUT
IN
N
2
0.1µF
VOLTAGE FROM DAC AD5381 = 0 TO 2.5V
39
V
RANGE = 0V TO 1.25V
EACH
+3.3V
OUT
V
0
V
OUT
OUT
10µF
VARIES FROM
12.5 TO 32.5µA
REFIN
V
VOUT0
VOUT1
VOUT2
VOUT4
DD
DAC
AD5381
49.9kꢀ
49.9kꢀ
1%
~250nA
GNH4
–625mV
TO
1%
TO 9 OTHER
AD8264s
GNH1
GND
VOUT39
49.9kꢀ
1%
49.9kꢀ
1%
+625mV
0.1µF
0.1µF
EXAMPLE
0V
+3.3V
VREF = 1.25V
~250nA EACH
49.9kꢀ 49.9kꢀ
SCALE
VPOS
IPPx
GNLO
1%
1%
–0.1V
SCALE CIRCUIT
10µF 0.1µF
GNH1
SCALE CIRCUIT
SCALE CIRCUIT
SCALE CIRCUIT
SCALE CIRCUIT
CIRCUIT
GNH2
GNH3
GNH4
–1.25V
100ꢀ
+3.3V
AD8264
PMT
VGA OUTPUTS TO OTHER
SIGNAL PROCESSING
VGAx
+1.8V
VDD
AD8663
–3.3V
VNEG VOCM OFSx VOHx VOLx
FS = 2V p-p
R
R
FILT
V
+ x ADC
AD9222/
AD9228
IN
–3.3V
C
GND
FILT
V
– x
VREF SENSE
IN
VOFS = –0.5V
FILT
10µF
0.1µF
OUTPUT COMMON-MODE VOLTAGE = 1V
VOHx = 1.5V, VOLx = 0.5V; VOFx = –0.5V
SENSE GROUNDED: VREF = 1V
Figure 113. Concept Application of AD8264 with 40-Channel AD5381 12-Bit, 3 V DAC and AD9222/AD9228 12-Bit ADC
Rev. 0 | Page 31 of 40
AD8264
TO
V
RANGE = 0V TO 1.25V
EACH
OUT
+3.3V
VPOS
–3.3V
VNEG
SWITCHING
POWER
SUPPLY
+3.3V +3.3V
DVDD AVDDx
VPOS
VOUT0
VOUT1
VOUT3
VOUT4
GNH1
–INx
+INx
VOHx
GNH2
GNH3
GNH4
DAC
VOLx
USB 2.0 TO PC
ADI VISUAL
ANALOG
PARALLEL
INTERFACE
TO PC
VGA
AD5381
TO 9
OTHER
AD8264s
ADC
OUTPUTS TO
OTHER
EVAL BOARD
AD8264 VGA
AD9228
ANALYSIS
SOFTWARE
SIGNAL
PROCESSING
CONTROL
EVAL BOARD
VOUT39
EVAL KIT
IPPx
+1.0V
+2.5V
VGAx
OFSx VOCM
DGND AGNDx
VREF
GNLO
REFIN
(ON BOARD)
1.0
0.8
0.6
0V
0.4
0.2
GNLO = 625mV OFSx = −0.5V VOCM = 1.0V
–0.1V
0
INx
–0.2
–0.4
–0.6
–0.8
–1.0
PULSE
GENERATOR
0
50 100 150 200 250 300
SAMPLES
Figure 114. Evaluation Setup for DC-Coupled Analog Front-End Pulse Processing Application Using the AD8264
Figure 115. AD5381 Evaluation Software
A convenient method of verifying and customizing the signal
chains shown in Figure 112 or Figure 113 is by ordering the
corresponding evaluation boards available on www.analog.com.
The AD8264-EVALZ is a platform through which the user can
quickly become familiar with the features and performance
capabilities of the AD8264. See the Evaluation Board section for
more information.
and program such DAC parameters as input codes, offset level,
and output range based on a 2.5 V or 1.25 V reference. For
example, as shown in Figure 114, the reference can be set to 1.25 V,
with a 0 V to 1.25 V output range to drive the GNHx inputs.
The ADC evaluation kit includes the AD9228-65EBZ board and
HSC-ADC-FIFO5 board to decode the ADC output. It also
leverages the capabilities of VisualAnalog®, powerful simulation
and data analysis software that enables the user to run FFTs and
to do real-time capture of the output levels.
The EVAL-AD5381EB (40-channel DAC) includes a parallel PC
interface and software evaluation program to control the DAC.
The AD5381evaluation software allows the user to configure
Rev. 0 | Page 32 of 40
AD8264
TO
V
RANGE = 0V TO 1.25V
EACH
OUT
+3.3V
VPOS
–3.3V
VNEG
SWITCHING
POWER
+3.3V +3.3V
SUPPLY
VPOS
DVDD AVDDx
V
GNH1
–INx
+INx
OUT0
OUT1
OUT3
OUT4
V
V
V
VOHx
GNH2
GNH3
GNH4
DAC
VOLx
USB 2.0 TO PC
ADI VISUAL
ANALOG
PARALLEL
INTERFACE
TO PC
VGA
AD5381
TO 9
OTHER
AD8264S
ADC
OUTPUTS TO
OTHER
EVAL BOARD
AD8264 VGA
AD9228
ANALYSIS
SOFTWARE
SIGNAL
PROCESSING
CONTROL
EVAL BOARD
V
OUT39
EVAL KIT
IPPx
+1.0V
+2.5V
VGAx
OFSx VOCM
DGND AGNDx
VREF
GNLO
REFIN
(ON BOARD)
0
–15
–30
–45
–60
–75
–90
–105
–120
–135
–150
GNLO = 625mV
VOCM = 1.0V
INx
+
3
2
4
AC
SOURCE
1.5M 3.0M 4.5M 6.0M 7.5M 9.0M 10.5M
Figure 116. Evaluation Setup for AC Signal Processing Application Using the AD8264
Rev. 0 | Page 33 of 40
AD8264
EVALUATION BOARD
Analog Devices, Inc. provides evaluation boards to customers as
a support service so that the circuit designer can become
familiar with the device in the most efficient way possible. The
AD8264 evaluation board provides a fast, easy, and convenient
means to assess the performance of the AD8264 before going
through the hassle and expense of design and layout of a custom
board. The board is shipped fully assembled and tested, and it
provides basic functionality as shipped. Standard connectors
enable the user to attach standard lab test equipment without
having to wait for the rest of the design to be completed. Figure 117
shows a digital image of the top view, and Figure 118 shows the
schematic diagram of the AD8264 evaluation board.
CONNECTING AND USING THE AD8264-EVALZ
The AD8264 operates with bipolar power supplies from 2.5 V dc
to 5 V dc. Make sure the current capacity is ≥400 mA. Connect a
ground reference from the supplies to any of the black test loops,
the positive supply to the red test loop (+V), and the negative
supply to the blue test loop (−V).
Notice that the board is shipped with jumpers installed on the
2-pin headers marked GN1_2, GN3_4, OFS_12, OFS_34, and
VOCM. If these jumpers are missing, the offset and common-
mode functions float high, substantially increasing the
quiescent current of the board.
Apply input signals to any of the preamps at the SMA connectors,
IN1 through IN4. These connectors are terminated with 50 Ω to
accommodate typical signal generator analyzer voltage source
impedances. The gain of the AD8264 preamps is fixed at 6 dB (2×)
and can be monitored at the SMA connectors, OP1_2 and OP3_4,
if desired. Note that there are output selector switches for each pair
of preamps and 453 Ω resistors in series with the preamp outputs.
The printed circuit board (PCB) artwork for all conductor and silk-
screen layers is shown in Figure 119 to Figure 124. A description of
a typical test setup can be found in the Applications Information
section. The PCB artwork can be used as a guide for circuit
layout and placement of parts. This is particularly useful for
multiple function circuits with many pins, requiring multiple
passive components.
Figure 117. Digital Image of the AD8264-EVALZ (Top View)
Rev. 0 | Page 34 of 40
AD8264
GN12
+V
–V
OFS12
+V
–V
GND1 GND2 GND3 GND4 GND5 GND6
+
C33
10µF
C34
10µF
+
L1
FB
L2
FB
R9
DNI
R10
DNI
R32
DNI
GN1_2
OFS_12
VGA1
C20
C19
GNLO
0.1µF
0.1µF
IN_1
R51
0ꢀ
IN1
C24
0.1µF
R11
49.9ꢀ
R1
R47 R48
0ꢀ
VGA1
R49 R86
453ꢀ
0ꢀ
0ꢀ
0ꢀ
37
OPP12
R24
40
39
38
36
35
34
33
32
31
DNI
OP12
R7
R55
0ꢀ
453ꢀ
1
30
29
28
27
IPN1
OP1_2
VOL1
VOH1
VOH2
VOL2
VGA2
VGA3
VOL3
R31
DNI
R56
0ꢀ
VOUT_1
VOUT_2
2
OPP1
IN_2
IN_3
R58
0ꢀ
3
R45
49.9ꢀ
R73
0ꢀ
OPP2
R23 R22
DNI DNI
R57
0ꢀ
IN2
IN3
4
IPN2
R69
453ꢀ
VGA2
VGA2
26
25
5
IPP2
PIN 0: EXPOSED PADDLE
R78
R46
R67
453ꢀ
VGA3
0ꢀ 49.9ꢀ
6
IPP3
R25
DNI
R66
0ꢀ
VGA3
24
23
22
21
7
IPN3
R20
DNI
R65
0ꢀ
VOUT_3
8
OPP3
VOH3
VOH4
VOL4
OP34
R6
453ꢀ
R63
0ꢀ
9
OPP4
OP3_4
R19
DNI
R64
0ꢀ
VOUT_4
VGA4
10
IPN4
11
R29
DNI
OPP34
R8
453ꢀ
12
13
14
15
16
17
18
19
20
IN_4
R80
0ꢀ
R70 R71
0ꢀ 0ꢀ
R79
R17
49.9ꢀ
R72
0ꢀ
0ꢀ
C23
0.1µF
VGA4
IN4
R16
DNI
C22
0.1µF
C21
0.1µF
R12
DNI
R28
DNI
OFS_34
GN3_4
VOCM
L3
FB
L4
FB
VOCM
+V
–V
OFS34
GN34
Figure 118. AD8264-EVALZ Schematic
The SMA connectors, VGA1 through VGA4, enable signal
monitoring at these nodes, with 453 Ω resistors for protecting
the device. These resistors can be shorted at the discretion of
the user if wide bandwidth is desired. The differential outputs
are provided with 0.1” spacing 2-pin headers, which fit the low
capacitance Tektronix differential scope probe P6045 model.
quiescent gain control voltage at the GNHx pins from floating
high. The low sides of the gain controls for each channel are
internally connected in the AD8264, and a 2-pin header with
jumper is provided to connect this pin (GNLO) to ground as well.
A similar arrangement of 2-pin headers is provided for the output
offset voltage. As shipped, the offset pins are connected to ground,
preventing the pins from floating high.
Note that the gain control input of the AD8264 is differential.
Each channel has its own gain control pin (GNHx); however,
pairs of pins are connected together on the evaluation board
and connected to a test loop. The 2-pin headers are provided for
jumpers to connect the gain pins to ground, preventing the
For connecting to an ADC, remove the jumpers at the OF1_2
and OF3_4 headers and connect the appropriate offset voltage
at the test loops, OF12 and OF34. If the VOCM pin is buffered,
it can be connected to the reference of the ADC.
Rev. 0 | Page 35 of 40
AD8264
Figure 121. Component Side Silk Screen
Figure 119. Component Side Assembly
Figure 120. Component Side Copper
Figure 122. Secondary Side Copper
Rev. 0 | Page 36 of 40
AD8264
Figure 123. Ground Plane
Figure 124. Power Plane
Rev. 0 | Page 37 of 40
AD8264
OUTLINE DIMENSIONS
6.00
BSC SQ
0.60 MAX
0.60 MAX
PIN 1
INDICATOR
31
40
1
30
PIN 1
INDICATOR
0.50
BSC
TOP
VIEW
4.25
4.10 SQ
3.95
5.75
BSC SQ
EXPOSED
PAD
(BOT TOM VIEW)
0.50
0.40
0.30
21
10
20
11
0.25 MIN
4.50
REF
12° MAX
0.80 MAX
0.65 TYP
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.05 MAX
0.02 NOM
1.00
0.85
0.80
0.30
0.23
0.18
COPLANARITY
0.08
0.20 REF
SECTION OF THIS DATA SHEET.
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VJJD-2
Figure 125. 40-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
6 mm × 6 mm Body, Very Thin Quad
(CP-40-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option
CP-40-1
CP-40-1
Branding
H1V
H1V
AD8264ACPZ1
40-Lead LFCSP_VQ
AD8264ACPZ-R71
AD8264ACPZ-RL1
AD8264-EVALZ1
40-Lead LFCSP_VQ, 7”Tape and Reel
40-Lead LFCSP_VQ, 13”Tape and Reel
Evaluation Board
CP-40-1
H1V
1 Z = RoHS Compliant Part.
Rev. 0 | Page 38 of 40
AD8264
NOTES
Rev. 0 | Page 39 of 40
AD8264
NOTES
©2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07736-0-5/09(0)
Rev. 0 | Page 40 of 40
相关型号：
AD8264ACPZ
SPECIALTY ANALOG CIRCUIT, QCC40, 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40
ROCHESTER
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