AD8270ACPZ-R7 [ADI]

Precision Dual-Channel, Difference Amplifier; 精密双通道差分放大器
AD8270ACPZ-R7
型号: AD8270ACPZ-R7
厂家: ADI    ADI
描述:

Precision Dual-Channel, Difference Amplifier
精密双通道差分放大器

放大器
文件: 总20页 (文件大小:606K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Precision Dual-Channel,  
Difference Amplifier  
AD8270  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
With no external resistors  
Difference amplifier: gains of 0.5, 1, or 2  
Single ended amplifiers: over 40 different gains  
Set reference voltage at midsupply  
Excellent ac specifications  
15 MHz bandwidth  
30 V/μs slew rate  
10k  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
–IN1A 1  
–IN2A 2  
+IN2A 3  
+IN1A 4  
12 –IN1B  
11 –IN2B  
10 +IN2B  
_
+
_
+
High accuracy dc performance  
0.08% maximum gain error  
10kΩ  
10kΩ  
10 ppm/°C maximum gain drift  
80 dB minimum CMRR (G = 2)  
Two channels in small 4 mm × 4 mm LFCSP  
Supply current: 2.5 mA per channel  
Supply range: 2.5 V to 18 V  
AD8270  
9
+IN1B  
20k20kΩ  
20k20kΩ  
APPLICATIONS  
Instrumentation amplifier building blocks  
Level translators  
Figure 1.  
Automatic test equipment  
High performance audio  
Sine/Cosine encoders  
GENERAL DESCRIPTION  
Table 1. Difference Amplifiers by Category  
The AD8270 is a low distortion, dual-channel amplifier with  
internal gain setting resistors. With no external components,  
it can be configured as a high performance difference amplifier  
with gains of 0.5, 1, or 2. It can also be configured in over 40 single-  
ended configurations, with gains ranging from −2 to +3.  
High  
Speed  
High  
Voltage  
Single-Supply  
Unidirectional  
Single-Supply  
Bidirectional  
AD8270  
AD8273  
AMP03  
AD628  
AD629  
AD8202  
AD8203  
AD8205  
AD8206  
AD8216  
The AD8270 is the first dual-difference amplifier in the small  
4 mm × 4 mm LFCSP. It requires the same board area as a typical  
single-difference amplifier. The smaller package allows a 2×  
increase in channel density and a lower cost per channel, all  
with no compromise in performance.  
The AD8270 operates on both single and dual supplies and  
requires only 2.5 mA maximum supply current for each ampli-  
fier. It is specified over the industrial temperature range of  
−40°C to +85°C and is fully RoHS compliant.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2008 Analog Devices, Inc. All rights reserved.  
 
AD8270  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Circuit Information.................................................................... 13  
Driving the AD8270................................................................... 13  
Package Considerations............................................................. 13  
Power Supplies............................................................................ 13  
Input Voltage Range................................................................... 14  
Applications Information.............................................................. 15  
Difference Amplifier Configurations ...................................... 15  
Single-Ended Configurations ................................................... 15  
Differential Output .................................................................... 17  
Driving an ADC ......................................................................... 18  
Driving Cabling.......................................................................... 18  
Outline Dimensions....................................................................... 19  
Ordering Guide .......................................................................... 19  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Functional Block Diagram .............................................................. 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Difference Amplifier Configurations ........................................ 3  
Absolute Maximum Ratings............................................................ 5  
Thermal Resistance ...................................................................... 5  
Maximum Power Dissipation ..................................................... 5  
ESD Caution.................................................................................. 5  
Pin Configuration and Function Descriptions............................. 6  
Typical Performance Characteristics ............................................. 7  
Theory of Operation ...................................................................... 13  
REVISION HISTORY  
1/08—Revision 0: Initial Version  
Rev. 0 | Page 2 of 20  
 
AD8270  
SPECIFICATIONS  
DIFFERENCE AMPLIFIER CONFIGURATIONS  
VS = 15 V, VREF = 0 V, TA = 25°C, RLOAD = 2 kΩ, specifications referred to input, unless otherwise noted.  
Table 2.  
G = 0.5  
G = 1  
G = 2  
Parameter  
Conditions  
Min  
Typ Max  
Min  
Typ Max  
Min  
Typ Max  
Unit  
DYNAMIC PERFORMANCE  
Bandwidth  
Slew Rate  
Settling Time to 0.01%  
Settling Time to 0.001%  
NOISE/DISTORTION  
Harmonic Distortion  
20  
30  
15  
30  
10  
30  
MHz  
V/μs  
ns  
10 V step on output  
10 V step on output  
700 800  
750 900  
700 800  
750 900  
700 800  
750 900  
ns  
f = 1 kHz, VOUT = 10 V p-p,  
RLOAD = 600 Ω  
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
84  
145  
95  
dB  
Voltage Noise1  
2
1.5  
38  
1
μV p-p  
52  
26  
nV/√Hz  
GAIN  
Gain Error  
0.08  
0.08  
0.08  
%
Gain Drift  
TA = −40°C to +85°C  
1
10  
1
10  
1
10  
ppm/°C  
INPUT CHARACTERISTICS  
Offset2  
450 1500  
300 1000  
225 750  
μV  
Average Temperature Drift TA = −40°C to +85°C  
3
86  
2
92  
1.5  
98  
μV/°C  
dB  
Common-Mode Rejection  
Ratio  
DC to 1 kHz  
70  
76  
80  
Power Supply Rejection Ratio  
Input Voltage Range3  
Common-Mode Resistance4  
Bias Current  
2
10  
2
10  
2
10  
+15.4  
μV/V  
V
kΩ  
nA  
−15.4  
+15.4 −15.4  
+15.4 −15.4  
7.5  
10  
7.5  
500  
500  
500  
OUTPUT CHARACTERISTICS  
Output Swing  
−13.8  
−13.7  
+13.8 −13.8  
+13.7 −13.7  
+13.8 −13.8  
+13.7 −13.7  
+13.8  
+13.7  
V
V
mA  
mA  
TA = −40°C to +85°C  
Sourcing  
Sinking  
Short-Circuit Current Limit  
100  
60  
100  
60  
100  
60  
POWER SUPPLY  
Supply Current  
(per Amplifier)  
2.3  
2.5  
3
2.3  
2.5  
3
2.3  
2.5  
3
mA  
mA  
TA = −40°C to +85°C  
1 Includes amplifier voltage and current noise, as well as noise of internal resistors.  
2 Includes input bias and offset errors.  
3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the  
Input Voltage Range section for details).  
4 Internal resistors are trimmed to be ratio matched but have 20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. Common-  
mode impedance at only one input is 2× the resistance listed.  
Rev. 0 | Page 3 of 20  
 
 
 
 
AD8270  
VS = 5 V, VREF = 0 V, TA = 25°C, RLOAD = 2 kΩ, specifications referred to input, unless otherwise noted.  
Table 3.  
G = 0.5  
G = 1  
G = 2  
Parameter  
Conditions  
Min Typ Max Min Typ Max Min Typ Max Unit  
DYNAMIC PERFORMANCE  
Bandwidth  
Slew Rate  
Settling Time to 0.01%  
Settling Time to 0.001%  
NOISE/DISTORTION  
Harmonic Distortion  
20  
30  
15  
30  
10  
30  
MHz  
V/μs  
ns  
5 V step on output  
5 V step on output  
550 650  
600 750  
550 650  
600 750  
550 650  
600 750  
ns  
f = 1 kHz, VOUT = 5 V p-p,  
RLOAD = 600 Ω  
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
101  
141  
112  
dB  
Voltage Noise1  
2
1.5  
38  
1
μV p-p  
nV/√Hz  
52  
26  
GAIN  
Gain Error  
0.08  
0.08  
0.08  
%
Gain Drift  
TA = −40°C to +85°C  
1
10  
1
10  
1
10  
ppm/°C  
INPUT CHARACTERISTICS  
Offset2  
450 1500  
300 1000  
225 750  
μV  
Average Temperature Drift  
Common-Mode Rejection Ratio  
TA = −40°C to +85°C  
DC to 1 kHz  
3
86  
2
92  
1.5  
98  
μV/°C  
dB  
70  
76  
80  
Power Supply Rejection Ratio  
Input Voltage Range3  
Common-Mode Resistance4  
Bias Current  
2
10  
+5.4  
2
10  
+5.4  
2
10  
+5.4  
dB  
V
kΩ  
nA  
−5.4  
−5.4  
−5.4  
7.5  
10  
7.5  
500  
500  
500  
OUTPUT CHARACTERISTICS  
Output Swing  
−4  
+4  
−4  
+4  
−4  
+4  
V
TA = −40°C to +85°C  
Sourcing  
Sinking  
−3.9  
+3.9 −3.9  
+3.9 −3.9  
+3.9  
V
mA  
mA  
Short-Circuit Current Limit  
100  
60  
100  
60  
100  
60  
POWER SUPPLY  
Supply Current (per Amplifier)  
2.3  
2.5  
3
2.3  
2.5  
3
2.3  
2.5  
3
mA  
mA  
TA = −40°C to +85°C  
1 Includes amplifier voltage and current noise, as well as noise of internal resistors.  
2 Includes input bias and offset errors.  
3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the  
Input Voltage Range section for details).  
4 Internal resistors are trimmed to be ratio matched but have 20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. Common-  
mode impedance at only one input is 2× the resistance listed.  
Rev. 0 | Page 4 of 20  
 
AD8270  
ABSOLUTE MAXIMUM RATINGS  
Table 4.  
Parameter  
MAXIMUM POWER DISSIPATION  
Rating  
The maximum safe power dissipation for the AD8270 is limited  
by the associated rise in junction temperature (TJ) on the die. At  
approximately 130°C, which is the glass transition temperature,  
the plastic changes its properties. Even temporarily exceeding  
this temperature limit may change the stresses that the package  
exerts on the die, permanently shifting the parametric performance  
of the amplifiers. Exceeding a temperature of 130°C for an  
extended period of time can result in a loss of functionality.  
Supply Voltage  
Output Short-Circuit Current  
18 V  
See derating  
curve in Figure 2  
VS  
−65°C to +130°C  
−40°C to +85°C  
130°C  
1 kV  
1 kV  
Input Voltage Range  
Storage Temperature Range  
Specified Temperature Range  
Package Glass Transition Temperature (TG)  
ESD (Human Body Model)  
ESD (Charge Device Model)  
ESD (Machine Model)  
The AD8270 has built-in, short-circuit protection that limits the  
output current to approximately 100 mA (see Figure 19 for  
more information). While the short-circuit condition itself does  
not damage the part, the heat generated by the condition can  
cause the part to exceed its maximum junction temperature,  
with corresponding negative effects on reliability.  
0.1 kV  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
3.2  
T
MAXIMUM = 130°C  
J
2.8  
2.4  
2.0  
1.6  
PAD SOLDERED  
= 57°C/W  
θ
JA  
THERMAL RESISTANCE  
Table 5. Thermal Resistance  
Thermal Pad  
1.2  
0.8  
0.4  
0
θJA  
Unit  
PAD NOT SOLDERED  
= 96°C/W  
θ
JA  
16-Lead LFCSP with Thermal Pad  
Soldered to Board  
16-Lead LFCSP with Thermal Pad  
Not Soldered to Board  
57  
°C/W  
96  
°C/W  
–50  
–25  
0
25  
50  
75  
100  
125  
AMBIENT TEMPERATURE (°C)  
The θJA values in Table 5 assume a 4-layer JEDEC standard  
board with zero airflow. If the thermal pad is soldered to the  
board, it is also assumed it is connected to a plane. θJC at the  
exposed pad is 9.7°C/W.  
Figure 2. Maximum Power Dissipation vs. Ambient Temperature  
ESD CAUTION  
Rev. 0 | Page 5 of 20  
 
 
 
 
AD8270  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
PIN 1  
INDICATOR  
12 –IN1B  
11 –IN2B  
10 +IN2B  
–IN1A 1  
–IN2A 2  
+IN2A 3  
+IN1A 4  
AD8270  
TOP VIEW  
(Not to Scale)  
9
+IN1B  
Figure 3. Pin Configuration  
Table 6. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
3
4
5
−IN1A  
−IN2A  
+IN2A  
+IN1A  
10 kΩ Resistor Connected to Negative Terminal of Op Amp A.  
10 kΩ Resistor Connected to Negative Terminal of Op Amp A.  
10 kΩ Resistor Connected to Positive Terminal of Op Amp A.  
10 kΩ Resistor Connected to Positive Terminal of Op Amp A.  
20 kΩ Resistor Connected to Positive Terminal of Op Amp A. Most configurations use this pin as a reference  
voltage input.  
REF1A  
6
7
8
REF2A  
REF2B  
REF1B  
20 kΩ Resistor Connected to Positive Terminal of Op Amp A. Most configurations use this pin as a reference  
voltage input.  
20 kΩ Resistor Connected to Positive Terminal of Op Amp B. Most configurations use this pin as a reference  
voltage input.  
20 kΩ Resistor Connected to Positive Terminal of Op Amp B. Most configurations use this pin as a reference  
voltage input.  
9
+IN1B  
+IN2B  
−IN2B  
−IN1B  
−VS  
OUTB  
OUTA  
+VS  
10 kΩ Resistor Connected to Positive Terminal of Op Amp B.  
10 kΩ Resistor Connected to Positive Terminal of Op Amp B.  
10 kΩ Resistor Connected to Negative Terminal of Op Amp B.  
10 kΩ Resistor Connected to Negative Terminal of Op Amp B.  
Negative Supply.  
Op Amp B Output.  
Op Amp A Output.  
Positive Supply.  
10  
11  
12  
13  
14  
15  
16  
Rev. 0 | Page 6 of 20  
 
AD8270  
TYPICAL PERFORMANCE CHARACTERISTICS  
VS = 15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.  
160  
20  
N: 1043  
MEAN: –0.003  
SD: 0.28  
(0, +15)  
140  
120  
100  
80  
15  
10  
5
(–7.5, +7.5)  
(+7.5, +7.5)  
0
60  
40  
20  
0
–5  
–10  
–15  
–20  
(–7.5, –7.5)  
(+7.5, –7.5)  
(0, –15)  
–0.9  
–0.6  
–0.3  
0
0.3  
0.6  
0.9  
–10  
–5  
0
5
10  
SYSTEM OFFSET VOLTAGE (mV)  
OUTPUT VOLTAGE (V)  
Figure 4. Typical Distribution of System Offset Voltage, G = 1  
Figure 7. Common-Mode Input Voltage vs. Output Voltage,  
Gain = 0.5, 15 V Supplies  
6
N: 984  
MEAN: –1.01  
(0, +5)  
180  
SD: 27  
4
(–2.5, +2.5)  
(+2.5, +2.5)  
(0, +2.5)  
150  
120  
90  
60  
30  
0
2
0
(–1.25, –1.25)  
(+1.25, +1.25)  
= ±5  
V
= ±2.5  
V
S
S
(–1.25, –1.25)  
(+1.25, –1.25)  
–2  
–4  
–6  
(0, –2.5)  
(–2.5, –2.5)  
(+2.5, –2.5)  
(0, –5)  
0
–150  
–100  
–50  
0
50  
100  
150  
–3  
–2  
–1  
1
2
3
CMRR (µV/V)  
OUTPUT VOLTAGE (V)  
Figure 5. Typical Distribution of CMRR, G = 1  
Figure 8. Common-Mode Input Voltage vs. Output Voltage,  
Gain = 0.5, 5 V and 2.5 V Supplies  
20  
400  
350  
300  
N: 1043  
MEAN: –0.015  
SD: 0.0068  
(0, +15)  
15  
(–14.3, +7.85)  
(+14.3, +7.85)  
10  
5
250  
200  
150  
100  
50  
0
–5  
–10  
–15  
–20  
(–14.3, –7.85)  
(+14.3, –7.85)  
(0, –15)  
0
0
–0.04  
–0.02  
0
0.02  
0.04  
–20  
–15  
–10  
–5  
5
10  
15  
20  
GAIN ERROR (%)  
OUTPUT VOLTAGE (V)  
Figure 6. Typical Distribution of Gain Error, G = 1  
Figure 9. Common-Mode Input Voltage vs. Output Voltage,  
Gain = 1, 15 V Supplies  
Rev. 0 | Page 7 of 20  
 
 
AD8270  
6
140  
120  
100  
80  
(0, +5)  
GAIN = 2, 0.5  
4
2
0
(–4.3, +2.85)  
(+4.3, +2.85)  
(0, +2.5)  
GAIN = 1  
(–1.6, +1.7)  
(+1.6, +1.7)  
= ±5  
V
= ±2.5  
V
S
S
60  
40  
20  
(–1.6, –1.7)  
(+1.6, –1.7)  
–2  
–4  
–6  
(0, –2.5)  
(–4.3, –2.85)  
(+4.3, –2.85)  
(0, –5)  
0
0
10  
–5  
–4  
–3  
–2  
–1  
1
2
3
4
5
100  
1k  
10k  
100k  
1M  
OUTPUT VOLTAGE (V)  
FREQUENCY (Hz)  
Figure 10. Common-Mode Input Voltage vs. Output Voltage,  
Gain = 1, 5 V and 2.5 V Supplies  
Figure 13. Positive PSRR vs. Frequency  
20  
140  
120  
100  
80  
(0, +15)  
GAIN = 2, 0.5  
15  
(–14.3, +11.4)  
(+14.3, +11.4)  
10  
5
GAIN = 1  
0
60  
40  
20  
0
–5  
–10  
–15  
–20  
(–14.3, –11.4)  
(+14.3, –11.4)  
(0, –15)  
0
–20  
–15  
–10  
–5  
5
10  
15  
20  
10  
100  
1k  
10k  
100k  
1M  
OUTPUT VOLTAGE (V)  
FREQUENCY (Hz)  
Figure 14. Negative PSRR vs. Frequency  
Figure 11. Common-Mode Input Voltage vs. Output Voltage,  
Gain = 2, 15 V Supplies  
32  
6
(0, +5)  
V
= ±15V  
S
(–4, +4)  
(+4, +4)  
28  
24  
20  
16  
4
2
0
(0, +2.5)  
(–1.6, +2.1)  
(+1.6, +2.1)  
V
= ±2.5  
V = ±5  
S
S
12  
8
–2  
–4  
–6  
V
= ±5V  
S
(–1.6, –2.1)  
(+1.6, –2.1)  
(0, –2.5)  
4
(–4, –4)  
–4  
(+4, –4)  
(0, –5)  
0
0
100  
1k  
10k  
100k  
1M  
10M  
–5  
–3  
–2  
–1  
1
2
3
4
5
FREQUENCY (Hz)  
OUTPUT VOLTAGE (V)  
Figure 12. Common-Mode Input Voltage vs. Output Voltage,  
Gain = 2, 5 V and 2.5 V Supplies  
Figure 15. Output Voltage Swing vs. Large Signal Frequency Response  
Rev. 0 | Page 8 of 20  
AD8270  
10  
5
120  
100  
80  
I
SHORT+  
GAIN = 2  
60  
GAIN = 1  
0
40  
20  
GAIN = 0.5  
–5  
0
–20  
–40  
–60  
–80  
–100  
–120  
–10  
–15  
–20  
I
SHORT–  
–40  
–20  
0
20  
40  
60  
80  
100  
120  
100  
1k  
10k  
100k  
1M  
10M  
100M  
TEMPERATURE (°C)  
FREQUENCY (Hz)  
Figure 16. Gain vs. Frequency  
Figure 19. Short-Circuit Current vs. Temperature  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
+V  
S
+125°C  
GAIN = 2, 0.5  
GAIN = 1  
+V – 2  
S
+85°C  
–40°C  
+25°C  
+V – 4  
S
0
+125°C  
+85°C  
+25°C  
–V + 2  
S
–V + 4  
S
–40°C  
–V  
S
200  
1k  
10k  
10  
100  
1k  
10k  
100k  
1M  
10M  
R
()  
FREQUENCY (Hz)  
LOAD  
Figure 20. Output Voltage Swing vs. RLOAD  
Figure 17. CMRR vs. Frequency  
+V  
0
S
–40°C  
+25°C  
CROSSTALK (G = 1)  
–20  
–40  
–60  
+V – 3  
S
+V – 6  
S
+125°C  
+85°C  
0
–80  
–100  
–120  
+125°C  
+85°C  
+25°C  
–V + 6  
S
–V + 3  
S
–40°C  
–V  
–140  
S
0
20  
40  
60  
80  
100  
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
CURRENT (mA)  
Figure 18. Channel Separation vs. Frequency  
Figure 21. Output Voltage Swing vs. Current (IOUT)  
Rev. 0 | Page 9 of 20  
 
AD8270  
160  
V
= ±15V  
0pF  
S
140  
120  
100  
80  
100pF  
V
= ±10V  
S
18pF  
V
= ±5V  
S
V
= ±2.5V  
S
60  
40  
20  
0
V
= ±18V  
S
V
= ±15V  
50  
S
1µs/DIV  
0
10  
20  
30  
40  
60  
70  
80  
90  
100  
CAPACITIVE LOAD (pF)  
Figure 22. Small Signal Step Response, Gain = 0.5  
Figure 25. Small Signal Overshoot with Capacitive Load, Gain = 0.5  
80  
70  
V
= ±15V  
0pF  
S
220pF  
33pF  
60  
50  
40  
V
= ±10V  
S
V
= ±5V  
S
V
= ±2.5V  
S
30  
20  
10  
0
V
= ±18V  
S
V
= ±15V  
S
1µs/DIV  
0
50  
100  
150  
200  
CAPACITIVE LOAD (pF)  
Figure 26. Small Signal Overshoot with Capacitive Load, Gain = 1  
Figure 23. Small Signal Step Response, Gain = 1  
80  
V
= ±15V  
S
70  
60  
50  
470pF  
100pF  
0pF  
V
= ±10V  
S
40  
30  
20  
10  
0
V
= ±5V  
S
V
= ±2.5V  
S
V
= ±18V  
350  
S
V
= ±15V  
S
1µs/DIV  
0
50  
100  
150  
200  
250 300  
400  
450  
CAPACITIVE LOAD (pF)  
Figure 24. Small Signal Step Response, Gain = 2  
Figure 27. Small Signal Overshoot with Capacitive Load, Gain = 2  
Rev. 0 | Page 10 of 20  
AD8270  
45  
40  
35  
30  
25  
20  
15  
10  
5
V
V
= ±15V  
= ±5V  
S
IN  
+SR  
–SR  
0
1µs/DIV  
–45352515 –5  
5
15 25 35 45 55 65 75 85 95 105 115 125  
TEMPERATURE (°C)  
Figure 28. Large Signal Pulse Response Gain = 0.5  
Figure 31. Output Slew Rate vs. Temperature  
1k  
V
V
= ±15V  
= ±5V  
S
IN  
GAIN = 2  
100  
GAIN = 1  
GAIN = 0.5  
10  
1µs/DIV  
1
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
Figure 29. Large Signal Pulse Response Gain = 1  
Figure 32. Voltage Noise Spectral Density vs. Frequency, Referred to Output  
V
V
= ±15V  
S
GAIN = 2  
= ±5V  
IN  
GAIN = 1  
GAIN = 1/2  
1µV/DIV  
1s/DIV  
1µs/DIV  
Figure 30. Large Signal Pulse Response, Gain = 2  
Figure 33. 0.1 Hz to 10 Hz Voltage Noise, Referred to Output  
Rev. 0 | Page 11 of 20  
AD8270  
N: 1043  
MEAN: 4.6  
SD: 134.5  
210  
180  
150  
120  
90  
60  
30  
0
–600  
–400  
–200  
0
200  
400  
600  
0
1
2
3
4
5
6
7
8
9
10  
V
(µV)  
TIME (s)  
OSI  
Figure 34. Typical Distribution of Op Amp Voltage Offset  
Figure 37. Change in Op Amp Offset Voltage vs. Warm-Up Time  
100  
N: 1043  
MEAN: 321.6  
SD: 6.9  
80  
60  
40  
20  
0
50pA/DIV  
1s/DIV  
310  
315  
320  
325  
330  
335  
340  
I
(nA)  
BIAS  
Figure 38. 0.1 Hz to 10 Hz Current Noise of Internal Op Amp  
Figure 35. Typical Distribution of Op Amp Bias Current  
10  
160  
140  
120  
100  
N: 1043  
MEAN: 0.31  
SD: 2.59  
1
80  
60  
40  
20  
0
0.1  
–9  
–6  
–3  
0
3
6
9
12  
1
10  
100  
1k  
10k  
100k  
I
(nA)  
OFFSET  
FREQUENCY (Hz)  
Figure 39. Current Noise Spectral Density of Internal Op Amp  
Figure 36. Typical Distribution of Op Amp Offset Current  
Rev. 0 | Page 12 of 20  
AD8270  
THEORY OF OPERATION  
Size  
The AD8270 fits two op amps and 14 resistors in a 4 mm ×  
4 mm package.  
DRIVING THE AD8270  
10k  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
The AD8270 is easy to drive, with all configurations presenting  
at least several kilohms (kΩ) of input resistance. The AD8270  
should be driven with a low impedance source: for example,  
another amplifier. The gain accuracy and common-mode rejection  
of the AD8270 depend on the matching of its resistors. Even  
source resistance of a few ohms can have a substantial effect on  
these specifications.  
–IN1A 1  
–IN2A 2  
+IN2A 3  
+IN1A 4  
12 –IN1B  
11 –IN2B  
10 +IN2B  
_
+
_
+
10kΩ  
10kΩ  
AD8270  
9
+IN1B  
20k20kΩ  
20k20kΩ  
PACKAGE CONSIDERATIONS  
The AD8270 is packaged in a 4 mm × 4 mm LFCSP. Beware of  
blindly copying the footprint from another 4 mm × 4 mm LFCSP  
part; it may not have the same thermal pad size and leads. Refer  
to the Outline Dimensions section to verify that the PCB symbol  
has the correct dimensions.  
Figure 40. Functional Block Diagram  
CIRCUIT INFORMATION  
The 4 mm × 4 mm LFCSP of the AD8270 comes with a thermal  
pad. This pad is connected internally to −VS. Connecting to this  
pad is not necessary for electrical performance; the pad can be  
left unconnected or can be connected to the negative supply rail.  
The AD8270 has two channels, each consisting of a high precision,  
low distortion op amp and seven trimmed resistors. These resis-  
tors can be connected to make a wide variety of amplifier  
configurations: difference, noninverting, inverting, and more.  
The resistors on the chip can be connected in parallel for a wider  
range of options. Using the on-chip resistors of the AD8270  
provides the designer several advantages over a discrete design.  
Connecting the pad to the negative supply rail is recommended  
in high vibration applications or when good heat dissipation is  
required (for example, with high ambient temperatures or when  
driving heavy loads). For best heat dissipation performance, the  
negative supply rail should be a plane in the board. See the  
Absolute Maximum Ratings section for thermal coefficients  
with and without the pad soldered.  
DC Performance  
Much of the dc performance of op amp circuits depends on the  
accuracy of the surrounding resistors. The resistors on the AD8270  
are laid out to be tightly matched. The resistors of each part are  
laser trimmed and tested for their matching accuracy. Because  
of this trimming and testing, the AD8270 can guarantee high  
accuracy for specifications such as gain drift, common-mode  
rejection, and gain error.  
Space between the leads and thermal pad should be as wide as  
possible to minimize the risk of contaminants affecting perform-  
ance. A thorough washing of the board is recommended after the  
soldering process, especially if high accuracy performance is  
required at high temperatures.  
AC Performance  
POWER SUPPLIES  
Because feature size is much smaller in an integrated circuit than  
on a PCB board, the corresponding parasitics are smaller, as well.  
The smaller feature size helps the ac performance of the AD8270.  
For example, the positive and negative input terminals of the  
AD8270 op amp are not pinned out intentionally. By not  
connecting these nodes to the traces on the PCB board, the  
capacitance remains low, resulting in both improved loop  
stability and common-mode rejection over frequency.  
A stable dc voltage should be used to power the AD8270. Noise  
on the supply pins can adversely affect performance. A bypass  
capacitor of 0.1 μF should be placed between each supply pin  
and ground, as close as possible to each supply pin. A tantalum  
capacitor of 10 μF should also be used between each supply and  
ground. It can be farther away from the supply pins and, typically,  
it can be shared by other precision integrated circuits.  
Production Costs  
The AD8270 is specified at 15 V and 5 V, but it can be used with  
unbalanced supplies, as well. For example, −VS = 0 V, +VS = 20 V.  
The difference between the two supplies must be kept below 36 V.  
Because one part, rather than several, is placed on the PCB  
board, the board can be built more quickly.  
Rev. 0 | Page 13 of 20  
 
AD8270  
The internal op amp voltage range may be relevant in the  
following applications, and calculating the voltage at the  
internal op amp is advised.  
INPUT VOLTAGE RANGE  
The AD8270 has a true rail-to-rail input range for the majority  
of applications. Because most AD8270 configurations divide down  
the voltage before they reach the internal op amp, the op amp sees  
only a fraction of the input voltage. Figure 41 shows an example  
of how the voltage division works in the difference amplifier  
configuration.  
Difference amplifier configurations using supply voltages  
of less than 4.5 V  
Difference amplifier configurations with a reference  
voltage near the rail  
R2  
R1 + R2  
Single-ended amplifier configurations  
(V  
)
+IN  
R4  
For correct operation, the input voltages at the internal op amp  
must stay within 1.5 V of either supply rail.  
R3  
R1  
Voltages beyond the supply rails should not be applied to the  
part. The part contains ESD diodes at the input pins, which  
conduct if voltages beyond the rails are applied. Currents greater  
than 5 mA can damage these diodes and the part. For a similar  
part that can operate with voltages beyond the rails, see the  
AD8273 data sheet.  
R2  
R2  
R1 + R2  
(V  
)
+IN  
Figure 41. Voltage Division in the Difference Amplifier Configuration  
Rev. 0 | Page 14 of 20  
 
 
 
AD8270  
APPLICATIONS INFORMATION  
DIFFERENCE AMPLIFIER CONFIGURATIONS  
SINGLE-ENDED CONFIGURATIONS  
The AD8270 can be configured for a wide variety of single-  
ended configurations with gains ranging from −2 to +3.  
Table 8 shows a subset of the possible configurations.  
The AD8270 can be placed in difference amplifier configurations  
with gains of 0.5, 1, and 2. Figure 42 through Figure 44 show the  
difference amplifier configurations, referenced to ground. The  
AD8270 can also be referred to a combination of reference voltages.  
For example, the reference could be set at 2.5 V, using just 5 V  
and GND. Some of the possible configurations are shown in  
Figure 45 through Figure 47.  
Many signal gains have more than one configuration choice,  
which allows freedom in choosing the op amp closed-loop gain.  
In general, for designs that need to be stable with a large capacitive  
load on the output, choose a configuration with high loop gain.  
Otherwise, choose a configuration with low loop gain, because  
these configurations typically have lower noise, lower offset,  
and higher bandwidth.  
The layout for Channel A is shown in Figure 42 through Figure 47.  
The layout for Channel B is symmetrical. Table 7 shows the pin  
connections for Channel A and Channel B.  
16  
15  
16  
15  
5k  
5k  
10k  
10kΩ  
10kΩ  
10k  
10kΩ  
10kΩ  
1
2
3
4
1
2
3
4
10kΩ  
10kΩ  
10kΩ  
10kΩ  
–IN  
+IN  
–IN  
+IN  
–IN  
+IN  
–IN  
+IN  
=
=
10kΩ  
10kΩ  
10kΩ  
10kΩ  
5kΩ  
+V + –V  
5kΩ  
GND  
20k20kΩ  
20k20kΩ  
5
6
5
6
S
S
2
GND  
–V  
+V  
S
S
Figure 42. Gain = 0.5 Difference Amplifier, Referenced to Ground  
Figure 45. Gain = 0.5 Difference Amplifier, Referenced to Midsupply  
16  
15  
16  
15  
10k  
10kΩ  
10k  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
1
2
3
4
1
2
3
4
–IN  
NC  
NC  
+IN  
–IN  
NC  
NC  
+IN  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
–IN  
+IN  
–IN  
+IN  
=
=
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
GND  
10kΩ  
+V + –V  
20k20kΩ  
20k20kΩ  
5
6
5
6
S
S
2
–V +V  
S
GND  
S
NC = NO CONNECT  
NC = NO CONNECT  
Figure 43. Gain = 1 Difference Amplifier, Referenced to Ground  
Figure 46. Gain = 1 Difference Amplifier, Referenced to Midsupply  
16  
15  
16  
15  
10k  
10k  
10k  
10kΩ  
10kΩ  
10k  
10kΩ  
10kΩ  
1
2
3
4
1
2
3
4
5kΩ  
5kΩ  
5kΩ  
5kΩ  
–IN  
+IN  
–IN  
+IN  
–IN  
+IN  
–IN  
+IN  
=
=
10kΩ  
10kΩ  
10kΩ  
10kΩ  
20k20kΩ  
10kΩ  
GND  
20k20kΩ  
10kΩ  
+V + –V  
5
6
5
6
S
S
2
–V +V  
S
GND  
S
Figure 47. Gain = 2 Difference Amplifier, Referenced to Midsupply  
Figure 44. Gain = 2 Difference Amplifier, Referenced to Ground  
Table 7. Pin Connections for Difference Amplifier Configurations  
Channel A  
Channel B  
Gain and Reference  
Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 12 Pin 11 Pin 10 Pin 9 Pin 8 Pin 7  
Gain of 0.5, Referenced to Ground  
OUT  
−IN  
−IN  
NC  
+IN  
+IN  
NC  
GND  
−VS  
+IN  
+IN  
+IN  
+IN  
GND  
+VS  
GND  
+VS  
OUT  
OUT  
−IN  
−IN  
−IN  
−IN  
−IN  
−IN  
NC  
+IN  
+IN  
NC  
GND GND GND  
Gain of 0.5, Referenced to Midsupply OUT  
−VS  
+IN  
+IN  
+IN  
+IN  
+VS  
GND GND  
−VS +VS  
GND GND  
−VS +VS  
+VS  
Gain of 1, Referenced to Ground  
Gain of 1, Referenced to Midsupply  
Gain of 2, Referenced to Ground  
Gain of 2, Referenced to Midsupply  
−IN  
−IN  
−IN  
−IN  
GND  
−VS  
GND  
+VS  
NC  
NC  
NC  
NC  
−IN  
−IN  
+IN  
+IN  
GND  
−VS  
GND  
+VS  
−IN  
−IN  
+IN  
+IN  
Rev. 0 | Page 15 of 20  
 
 
 
 
AD8270  
Table 8. Selected Single-Ended Configurations  
Electrical Performance  
Pin Connections  
20 kΩ +  
Pin 5  
GND  
GND  
NC  
GND  
IN  
NC  
GND  
NC  
GND  
IN  
GND  
NC  
GND  
NC  
NC  
GND  
NC  
GND  
GND  
NC  
GND  
IN  
NC  
NC  
IN  
IN  
Op Amp  
Closed-Loop Gain  
Input  
Resistance  
10 kΩ −  
Pin 1  
10 kΩ −  
Pin 2  
10 kΩ +  
10 kΩ +  
Pin 4  
20 kΩ +  
Pin 6  
Signal Gain  
−2  
−1.5  
−1.4  
−1.25  
−1  
−0.8  
−0.667  
−0.6  
Pin 3  
GND  
GND  
GND  
GND  
GND  
IN  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
IN  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
IN  
NC  
GND  
IN  
GND  
GND  
IN  
GND  
IN  
IN  
IN  
NC  
IN  
3
3
3
3
3
3
2
2
5 kΩ  
4.8 kΩ  
5 kΩ  
5.333 kΩ  
5 kΩ  
5.556 kΩ  
8 kΩ  
8.333 kΩ  
8.889 kΩ  
7.5 kΩ  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
NC  
NC  
NC  
NC  
IN  
IN  
IN  
IN  
NC  
GND  
GND  
NC  
GND  
NC  
GND  
GND  
GND  
GND  
IN  
GND  
GND  
GND  
NC  
GND  
GND  
GND  
GND  
NC  
GND  
GND  
GND  
NC  
GND  
IN  
GND  
GND  
GND  
NC  
GND  
GND  
GND  
GND  
GND  
IN  
GND  
IN  
NC  
IN  
GND  
IN  
IN  
IN  
IN  
IN  
GND  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
GND  
IN  
IN  
IN  
IN  
GND  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
GND  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
GND  
GND  
IN  
GND  
IN  
IN  
GND  
IN  
GND  
IN  
IN  
GND  
GND  
GND  
GND  
GND  
IN  
−0.5  
2
2
IN  
IN  
−0.333  
−0.25  
−0.2  
−0.125  
+0.1  
+0.2  
+0.25  
+0.3  
+0.333  
+0.375  
+0.4  
+0.5  
+0.5  
1.5  
1.5  
1.5  
1.5  
2
1.5  
1.5  
2
1.5  
2
3
1.5  
3
1.5  
1.5  
2
1.5  
3
1.5  
2
1.5  
1.5  
1.5  
3
1.5  
3
1.5  
1.5  
2
3
1.5  
2
8 kΩ  
OUT  
OUT  
OUT  
OUT  
IN  
8.333 kΩ  
8.889 kΩ  
8.333 kΩ  
10 kΩ  
24 kΩ  
25 kΩ  
24 kΩ  
26.67 kΩ  
25 kΩ  
24 kΩ  
15 kΩ  
OUT  
OUT  
GND  
OUT  
GND  
GND  
OUT  
GND  
OUT  
OUT  
GND  
OUT  
GND  
OUT  
GND  
OUT  
OUT  
OUT  
IN  
OUT  
GND  
OUT  
OUT  
GND  
GND  
OUT  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
+0.6  
+0.6  
25 kΩ  
16.67 kΩ  
16 kΩ  
+0.625  
+0.667  
+0.7  
+0.75  
+0.75  
+0.8  
+0.9  
+1  
+1  
+1  
+1.125  
+1.2  
+1.2  
+1.25  
+1.333  
+1.5  
+1.5  
+1.6  
+1.667  
+1.8  
+2  
15 kΩ  
NC  
IN  
16.67 kΩ  
26.67 kΩ  
13.33 kΩ  
16.67 kΩ  
16.67 kΩ  
15 kΩ  
>1 GΩ  
>1 GΩ  
26.67 kΩ  
16.67 kΩ  
25 kΩ  
24 kΩ  
15 kΩ  
13.33 kΩ  
>1 GΩ  
25 kΩ  
NC  
GND  
GND  
NC  
GND  
GND  
IN  
GND  
GND  
NC  
NC  
GND  
IN  
IN  
IN  
NC  
NC  
IN  
GND  
GND  
GND  
GND  
NC  
GND  
GND  
NC  
NC  
GND  
NC  
GND  
GND  
GND  
GND  
IN  
IN  
IN  
GND  
IN  
IN  
IN  
GND  
IN  
NC  
IN  
GND  
GND  
IN  
NC  
IN  
NC  
IN  
IN  
NC  
IN  
GND  
GND  
IN  
2
3
2
3
3
3
3
24 kΩ  
16.67 kΩ  
>1 GΩ  
26.67 kΩ  
25 kΩ  
24 kΩ  
>1 GΩ  
IN  
IN  
IN  
IN  
IN  
+2.25  
+2.4  
+2.5  
GND  
GND  
GND  
IN  
IN  
IN  
IN  
IN  
IN  
+3  
IN  
Rev. 0 | Page 16 of 20  
 
AD8270  
+OUT –OUT  
The AD8270 Specifications section and Typical Performance  
Characteristics section show the performance of the part primarily  
when it is in the difference amplifier configuration. To get a good  
estimate of the performance of the part in a single-ended  
configuration, refer to the difference amplifier configuration  
with the corresponding closed-loop gain (see Table 9).  
16  
15  
14  
13  
V
V
– V  
–IN  
= V  
– V  
–OUT  
+IN  
+OUT  
+ V  
–OUT  
= V  
OCM  
+OUT  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
1
2
3
4
12  
11  
_
_
+
–IN  
+IN  
+IN  
–IN  
+IN  
–IN  
+OUT  
10kΩ  
10kΩ  
=
V
OCM  
10  
9
+
–OUT  
AD8270  
Table 9. Closed-Loop Gain of the Difference Amplifiers  
20k20kΩ  
20k20kΩ  
5
6
7
8
Difference Amplifier Gain  
Closed-Loop Gain  
OCM  
0.5  
1
2
1.5  
2
3
OCM  
Figure 48. Differential Output, G = 1, Common-Mode Output Voltage  
Set with Reference Voltage  
Gain of 1 Configuration  
+OUT –OUT  
The AD8270 is designed to be stable for loop gains of 1.5 and  
greater. Because a typical voltage follower configuration has  
a loop gain of 1, it may be unstable. Several stable G = 1 configu-  
rations are listed in Table 8.  
16  
15  
14  
13  
V
V
– V  
–IN  
= V  
– V  
+IN  
+OUT –OUT  
V
+ V  
B
A
+ V  
=
+OUT  
–OUT  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
2
1
2
3
4
12  
11  
_
_
+
–IN  
+IN  
A
+IN  
–IN  
A
+IN  
–IN  
+OUT  
10kΩ  
10kΩ  
=
V
OCM  
10  
9
+
DIFFERENTIAL OUTPUT  
–OUT  
AD8270  
The AD8270 can easily be configured for differential output.  
Figure 48 shows the configuration for a G = 1 differential output  
amplifier. The OCM node in the figure sets the common-mode  
output voltage. Figure 49 shows the configuration for a G = 1  
differential output amplifier, where the average of two voltages  
sets the common-mode output voltage. For example, this  
configuration can be used to set the common mode at 2.5 V,  
using just a 5 V reference and GND.  
20k20kΩ  
20k20kΩ  
5
6
7
8
V
+ V  
B
2
A
B
Figure 49. Differential Output, G = 1, Common-Mode Output Voltage  
Set as the Average of Two Voltages  
Note that these two configurations are based on the G = 0.5  
difference amplifier configurations shown in Figure 42 and  
Figure 45. A similar technique can be used to create differential  
output with a gain of 2 or 4, using the G = 1 and G = 2 difference  
amplifier configurations, respectively.  
Rev. 0 | Page 17 of 20  
 
 
 
 
AD8270  
To reduce the peaking, use a resistor between the AD8270 and the  
cable. Because cable capacitance and desired output response vary  
widely, this resistor is best determined empirically. A good starting  
point is 20 Ω.  
DRIVING AN ADC  
The AD270 high slew rate and drive capability, combined with  
its dc accuracy, make it a good ADC driver. The AD8270 can  
drive both single-ended and differential input ADCs. Many  
converters require the output to be buffered with a small value  
resistor combined with a high quality ceramic capacitor. See the  
converter data sheet for more details. Figure 51 shows the AD8270  
in differential configuration, driving the AD7688 ADC. The  
AD8270 divides down the 5 V reference voltage from the ADR435,  
so that the common-mode output voltage is 2.5 V, which is  
precisely where the AD7688 needs it.  
AD8270  
(DIFF OUT)  
DRIVING CABLING  
AD8270  
(SINGLE OUT)  
All cables have a certain capacitance per unit length, which varies  
widely with cable type. The capacitive load from the cable may  
cause peaking or instability in output response, especially when the  
AD8270 is operating in a gain of 0.5.  
Figure 50. Driving Cabling  
+12V –12V  
16  
13  
NOTE:  
10k  
10kΩ  
POWER SUPPLY DECOUPLING  
NOT SHOWN.  
1
10kΩ  
2
3
4
5
6
7
–IN  
+IN  
33Ω  
15  
3
4
+IN  
AD7688  
10kΩ  
2.7nF  
COG  
10kΩ  
20kΩ  
33Ω  
REF  
1
–IN  
2.7nF  
COG  
20kΩ  
20kΩ  
AD8270  
5V_REF  
0.1µF  
0.1µF  
+12V  
20kΩ  
10kΩ  
10kΩ  
10kΩ  
8
9
2
V
IN  
V
5
5V_REF  
OUT  
10  
11  
–IN  
+IN  
10µF  
ADR435  
14  
12  
GND  
4
10kΩ  
10kΩ  
Figure 51. Driving an ADC  
Rev. 0 | Page 18 of 20  
 
 
AD8270  
OUTLINE DIMENSIONS  
4.00  
BSC SQ  
0.60 MAX  
0.60 MAX  
0.65 BSC  
PIN 1  
INDICATOR  
13  
16  
1
12  
9
PIN 1  
INDICATOR  
2.50  
2.35 SQ  
2.20  
TOP  
VIEW  
EXPOSED  
3.75  
BSC SQ  
PAD  
(BOTTOM VIEW)  
0.50  
0.40  
0.30  
4
8
5
0.25 MIN  
1.95 BSC  
0.80 MAX  
0.65 TYP  
12° MAX  
0.05 MAX  
0.02 NOM  
1.00  
0.85  
0.80  
0.35  
0.30  
0.25  
0.20 REF  
COPLANARITY  
0.08  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC  
Figure 52. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]  
4 mm × 4 mm Body, Very Thin Quad  
(CP-16-10)  
Dimensions are shown in millimeters  
ORDERING GUIDE  
Model  
AD8270ACPZ-R71  
AD8270ACPZ-RL1  
AD8270ACPZ-WP1  
Temperature Range  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
Package Description  
16-Lead LFCSP_VQ  
16-Lead LFCSP_VQ  
16-Lead LFCSP_VQ  
Package Option  
CP-16-10  
CP-16-10  
CP-16-10  
1 Z = RoHS Compliant Part.  
Rev. 0 | Page 19 of 20  
 
 
 
 
AD8270  
NOTES  
©2008 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D06979-0-1/08(0)  
Rev. 0 | Page 20 of 20  
 
 
 
 
 
 
 
 
 

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