AD8271BRMZ [ADI]

Programmable Gain Precision Difference Amplifier;
AD8271BRMZ
型号: AD8271BRMZ
厂家: ADI    ADI
描述:

Programmable Gain Precision Difference Amplifier

放大器 光电二极管
文件: 总21页 (文件大小:403K)
中文:  中文翻译
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Programmable Gain  
Precision Difference Amplifier  
AD8271  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
With no external resistors  
10k  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
20kΩ  
Difference amplifier, gains of ½, 1, or 2  
Single-ended amplifier: over 40 different gains  
Set reference voltage at midsupply  
Excellent ac specifications  
15 MHz bandwidth  
30 V/μs slew rate  
High accuracy dc performance  
0.08% maximum gain error  
10 ppm/°C maximum gain drift  
80 dB minimum CMRR (gain of 2)  
10-lead MSOP package  
1
2
3
4
5
10  
P1  
N3  
9
P2  
P3  
N2  
N1  
8
OUT  
20kΩ  
7
P4  
6
–V  
+V  
S
S
AD8271  
Figure 1.  
Supply current: 2.6 mA  
Supply range: 2.5 V to 18 V  
APPLICATIONS  
ADC driver  
Instrumentation amplifier building blocks  
Level translators  
Automatic test equipment  
High performance audio  
Sine/cosine encoders  
GENERAL DESCRIPTION  
Table 1. Difference Amplifiers by Category  
The AD8271 is a low distortion, precision difference amplifier  
with internal gain setting resistors. With no external components,  
it can be configured as a high performance difference amplifier  
with gains of ½, 1, or 2. It can also be configured in over 40 single-  
ended configurations, with gains ranging from −2 to +3.  
High  
Speed  
High  
Voltage  
Single-Supply  
Unidirectional  
Single-Supply  
Bidirectional  
AD8270  
AD8273  
AD8274  
AMP03  
AD628  
AD629  
AD8202  
AD8203  
AD8205  
AD8206  
AD8216  
The AD8271 comes in a 10-lead MSOP package. The AD8271  
operates on both single and dual supplies and requires only a  
2.6 mA maximum supply current. It is specified over the industrial  
temperature range of −40°C to +85°C and is fully RoHS compliant.  
For a dual channel version of the AD8271, see the AD8270  
data sheet.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2009 Analog Devices, Inc. All rights reserved.  
 
AD8271* PRODUCT PAGE QUICK LINKS  
Last Content Update: 02/23/2017  
COMPARABLE PARTS  
View a parametric search of comparable parts.  
DESIGN RESOURCES  
AD8271 Material Declaration  
PCN-PDN Information  
Quality And Reliability  
Symbols and Footprints  
DOCUMENTATION  
Data Sheet  
AD8271: Programmable Gain Precision Difference  
Amplifier Preliminary Data Sheet  
DISCUSSIONS  
View all AD8271 EngineerZone Discussions.  
REFERENCE DESIGNS  
CN0122  
SAMPLE AND BUY  
Visit the product page to see pricing options.  
CN0312  
REFERENCE MATERIALS  
Technical Articles  
TECHNICAL SUPPORT  
Submit a technical question or find your regional support  
number.  
MS-2178: Discussion Between CareFusion and Analog  
Devices: Optimizing Performance and Lowering Power in  
an EEG Amplifer  
DOCUMENT FEEDBACK  
Submit feedback for this data sheet.  
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AD8271  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Circuit Information.................................................................... 15  
Driving the AD8271................................................................... 15  
Power Supplies............................................................................ 15  
Input Voltage Range................................................................... 15  
Applications Information.............................................................. 16  
Difference Amplifier Configurations ...................................... 16  
Single-Ended Configurations ................................................... 17  
Kelvin Measurement.................................................................. 18  
Instrumentation Amplifier........................................................ 18  
Driving Cabling.......................................................................... 19  
Driving an ADC ......................................................................... 19  
Outline Dimensions....................................................................... 20  
Ordering Guide .......................................................................... 20  
Applications....................................................................................... 1  
Functional Block Diagram .............................................................. 1  
General Description......................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Difference Amplifier Configurations ........................................ 3  
Absolute Maximum Ratings............................................................ 6  
Thermal Resistance ...................................................................... 6  
Maximum Power Dissipation ..................................................... 6  
ESD Caution.................................................................................. 6  
Pin Configuration and Function Description .............................. 7  
Typical Performance Characteristics ............................................. 8  
Operational Amplifier Plots...................................................... 14  
Theory of Operation ...................................................................... 15  
REVISION HISTORY  
1/09—Revision 0: Initial Version  
Rev. 0 | Page 2 of 20  
 
AD8271  
SPECIFICATIONS  
DIFFERENCE AMPLIFIER CONFIGURATIONS  
VS = 5 to 15 V, VREF = 0 V, G = 1, RLOAD = 2 kΩ, TA = 25°C, specifications referred to input (RTI), unless otherwise noted.  
Table 2.  
B Grade  
A Grade  
Parameter  
Conditions  
Min  
Typ Max  
Min  
Typ Max  
Unit  
DYNAMIC PERFORMANCE  
Bandwidth  
Slew Rate  
15  
30  
15  
30  
MHz  
V/μs  
ns  
ns  
ns  
Settling Time to 0.01%  
VS = 15ꢀ 10 V step on output  
VS = 5ꢀ 5 V step on output  
VS = 15ꢀ 10 V step on output  
VS = 5ꢀ 5 V step on output  
700 800  
550 650  
750 900  
600 750  
700 800  
550 650  
750 900  
600 750  
Settling Time to 0.001%  
ns  
NOISE/DISTORTION  
Harmonic Distortion + Noise  
VS = 15ꢀ f = 1 kHzꢀ  
VOUT = 10 V p-pꢀ RLOAD = 600 Ω  
VS = 5ꢀ f = 1 kHzꢀ  
110  
141  
110  
141  
dB  
dB  
VOUT = 10 V p-pꢀ RLOAD = 600 Ω  
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
Voltage Noise1  
1.5  
38  
1.5  
38  
μV p-p  
nV/√Hz  
GAIN  
Gain Error  
Gain Drift  
Gain Nonlinearity  
VOUT = 10 V p-p  
TA = −40°C to +85°C  
VOUT = 10 V p-pꢀ  
0.02  
2
0.05  
10  
%
ppm/°C  
ppm  
1
1
1
1
RLOAD = 10 kΩꢀ 2 kΩꢀ 600 Ω  
INPUT CHARACTERISTICS  
Offset2  
300 600  
300 1000  
μV  
Average Temperature Drift  
TA = −40°C to +85°C  
2
92  
2
2
92  
2
μV/°C  
dB  
μV/V  
V
kΩ  
nA  
Common-Mode Rejection Ratio DC to 1 kHz  
Power Supply Rejection Ratio  
Input Voltage Range3  
Common-Mode Resistance4  
Bias Current  
80  
74  
10  
+VS + 0.4  
10  
+VS + 0.4  
−VS − 0.4  
−VS − 0.4  
10  
10  
Inputs grounded  
500  
500  
OUTPUT CHARACTERISTICS  
Output Swing  
VS = 15  
VS = 15ꢀ TA = −40°C to +85°C  
−13.8  
−13.7  
−4  
+13.8  
+13.7  
+4  
−13.8  
−13.7  
−4  
+13.8  
+13.7  
+4  
V
V
V
VS =  
5
VS = 5ꢀ TA = −40°C to +85°C  
Sourcing  
Sinking  
−3.9  
+3.9  
−3.9  
+3.9  
V
mA  
mA  
Short-Circuit Current Limit  
100  
60  
100  
60  
POWER SUPPLY  
Supply Current  
2.3  
2.6  
3.2  
2.3  
2.6  
3.2  
mA  
mA  
TA = −40°C to +85°C  
1 Includes amplifier voltage and current noiseꢀ as well as noise of internal resistors.  
2 Includes input bias and offset errors.  
3 At voltages beyond the railsꢀ internal ESD diodes begin to turn on. In some configurationsꢀ the input voltage range may be limited by the internal op amp (see the  
Input Voltage Range section for details).  
4 Internal resistorsꢀ trimmed to be ratio matchedꢀ have 20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. The common-  
mode impedance at only one input is 2× the resistance listed.  
Rev. 0 | Page 3 of 20  
 
 
AD8271  
VS = 5 to 15 V, VREF = 0 V, G = ½, RLOAD = 2 kΩ, TA = 25°C, specifications referred to input (RTI), unless otherwise noted.  
Table 3.  
B Grade  
A Grade  
Parameter  
Conditions  
Min  
Typ Max  
Min  
Typ Max  
Unit  
DYNAMIC PERFORMANCE  
Bandwidth  
Slew Rate  
20  
30  
20  
30  
MHz  
V/μs  
ns  
ns  
ns  
Settling Time to 0.01%  
VS = 15ꢀ 10 V step on output  
VS = 5ꢀ 5 V step on output  
VS = 15ꢀ 10 V step on output  
VS = 5ꢀ 5 V step on output  
700 800  
550 650  
750 900  
600 750  
700 800  
550 650  
750 900  
600 750  
Settling Time to 0.001%  
ns  
NOISE/DISTORTION  
Harmonic Distortion + Noise  
VS = 15ꢀ f = 1 kHzꢀ  
VOUT = 10 V p-pꢀ RLOAD = 600 Ω  
VS = 5ꢀ f = 1 kHzꢀ  
74  
74  
dB  
dB  
101  
101  
VOUT = 10 V p-pꢀ RLOAD = 600 Ω  
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
Voltage Noise1  
2
2
μV p-p  
52  
52  
nV/√Hz  
GAIN  
Gain Error  
Gain Drift  
Gain Nonlinearity  
VOUT = 10 V p-p  
TA = −40°C to +85°C  
VOUT = 10 V p-pꢀ  
0.04  
2
0.08  
10  
%
ppm/°C  
ppm  
0.5  
200  
1
200  
RLOAD = 10 kΩꢀ 2 kΩꢀ 600 Ω  
INPUT CHARACTERISTICS  
Offset2  
450 1000  
450 1500  
μV  
Average Temperature Drift  
Common-Mode Rejection Ratio  
Power Supply Rejection Ratio  
Input Voltage Range3  
Common-Mode Resistance4  
Bias Current  
TA = −40°C to +85°C  
DC to 1 kHz  
3
86  
2
3
86  
2
μV/°C  
dB  
μV/V  
V
kΩ  
nA  
74  
70  
10  
10  
+VS + 0.4  
−VS − 0.4  
+VS + 0.4 −VS − 0.4  
500  
7.5  
7.5  
Inputs grounded  
500  
OUTPUT CHARACTERISTICS  
Output Swing  
VS = 15  
VS = 15ꢀ TA = −40°C to +85°C  
−13.8  
−13.7  
−4  
+13.8  
+13.7  
+4  
−13.8  
−13.7  
−4  
+13.8  
+13.7  
+4  
V
V
V
VS =  
5
VS = 5ꢀ TA = −40°C to +85°C  
Sourcing  
Sinking  
−3.9  
+3.9  
−3.9  
+3.9  
V
mA  
mA  
Short-Circuit Current Limit  
100  
60  
100  
60  
POWER SUPPLY  
Supply Current  
2.3  
2.6  
3.2  
2.3  
2.6  
3.2  
mA  
mA  
TA = −40°C to +85°C  
1 Includes amplifier voltage and current noiseꢀ as well as noise of internal resistors.  
2 Includes input bias and offset errors.  
3 At voltages beyond the railsꢀ internal ESD diodes begin to turn on. In some configurationsꢀ the input voltage range may be limited by the internal op amp (see the  
Input Voltage Range section for details).  
4 Internal resistorsꢀ trimmed to be ratio matchedꢀ have 20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. The common-  
mode impedance at only one input is 2× the resistance listed.  
Rev. 0 | Page 4 of 20  
AD8271  
VS = 5 to 15 V, VREF = 0 V, G = 2, RLOAD = 2 kΩ, TA = 25°C, specifications referred to input (RTI), unless otherwise noted.  
Table 4.  
B Grade  
A Grade  
Parameter  
Conditions  
Min  
Typ Max  
Min  
Typ Max  
Unit  
DYNAMIC PERFORMANCE  
Bandwidth  
Slew Rate  
10  
30  
10  
30  
MHz  
V/μs  
ns  
ns  
ns  
Settling Time to 0.01%  
VS = 15ꢀ 10 V step on output  
VS = 5ꢀ 5 V step on output  
VS = 15ꢀ 10 V step on output  
VS = 5ꢀ 5 V step on output  
700 800  
550 650  
750 900  
600 750  
700 800  
550 650  
750 900  
600 750  
Settling Time to 0.001%  
ns  
NOISE/DISTORTION  
Harmonic Distortion + Noise  
VS = 15ꢀ f = 1 kHzꢀ  
VOUT = 10 V p-pꢀ RLOAD = 600 Ω  
VS = 5ꢀ f = 1 kHzꢀ  
86  
86  
dB  
dB  
112  
112  
VOUT = 10 V p-pꢀ RLOAD = 600 Ω  
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
Voltage Noise1  
1
1
μV p-p  
26  
26  
nV/√Hz  
GAIN  
Gain Error  
Gain Drift  
Gain Nonlinearity  
VOUT = 10 V p-p  
TA = −40°C to +85°C  
VOUT = 10 V p-pꢀ  
0.04  
2
0.08  
10  
%
ppm/°C  
ppm  
0.5  
50  
1
50  
RLOAD = 10 kΩꢀ 2 kΩꢀ 600 Ω  
INPUT CHARACTERISTICS  
Offset2  
225 500  
225 750  
μV  
Average Temperature Drift  
Common-Mode Rejection Ratio  
Power Supply Rejection Ratio  
Input Voltage Range3  
Common-Mode Resistance4  
Bias Current  
TA = −40°C to +85°C  
DC to 1 kHz  
1.5  
98  
2
1.5  
98  
2
μV/°C  
dB  
μV/V  
V
kΩ  
nA  
84  
78  
10  
10  
+VS + 0.4  
−VS − 0.4  
+VS + 0.4 −VS − 0.4  
500  
7.5  
7.5  
Inputs grounded  
500  
OUTPUT CHARACTERISTICS  
Output Swing  
VS = 15  
VS = 15ꢀ TA = −40°C to +85°C  
−13.8  
−13.7  
−4  
+13.8  
+13.7  
+4  
−13.8  
−13.7  
−4  
+13.8  
+13.7  
+4  
V
V
V
VS =  
5
VS = 5ꢀ TA = −40°C to +85°C  
Sourcing  
Sinking  
−3.9  
+3.9  
−3.9  
+3.9  
V
mA  
mA  
Short-Circuit Current Limit  
100  
60  
100  
60  
POWER SUPPLY  
Supply Current  
2.3  
2.6  
3.2  
2.3  
2.6  
3.2  
mA  
mA  
TA = −40°C to +85°C  
1 Includes amplifier voltage and current noiseꢀ as well as noise of internal resistors.  
2 Includes input bias and offset errors.  
3 At voltages beyond the railsꢀ internal ESD diodes begin to turn on. In some configurationsꢀ the input voltage range may be limited by the internal op amp (see the  
Input Voltage Range section for details).  
4 Internal resistorsꢀ trimmed to be ratio matchedꢀ have 20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. The common-  
mode impedance at only one input is 2× the resistance listed.  
Rev. 0 | Page 5 of 20  
AD8271  
ABSOLUTE MAXIMUM RATINGS  
MAXIMUM POWER DISSIPATION  
Table 5.  
The maximum safe power dissipation for the AD8271 is limited  
by the associated rise in junction temperature (TJ) on the die. At  
approximately 150°C, which is the glass transition temperature,  
the properties of the plastic change. Even temporarily exceeding  
this temperature limit may change the stresses that the package  
exerts on the die, permanently shifting the parametric perfor-  
mance of the amplifiers. Exceeding a temperature of 150°C for  
an extended period of time can cause changes in silicon devices,  
potentially resulting in a loss of functionality.  
Parameter  
Rating  
Supply Voltage  
Output Short-Circuit Current  
18 V  
See derating curve in  
Figure 2  
+VS + 0.4 V to  
−VS − 0.4 V  
−65°C to +130°C  
−40°C to +85°C  
Input Voltage Range  
Storage Temperature Range  
Specified Temperature Range  
Package Glass Transition Temperature (TG) 150°C  
ESD  
The AD8271 has built-in short-circuit protection that limits  
the output current to approximately 100 mA (see Figure 22 for  
more information). Although the short-circuit condition itself  
does not damage the part, the heat generated by the condition  
can cause the part to exceed its maximum junction temperature,  
with corresponding negative effects on reliability.  
1.6  
Human Body Model  
Charge Device Model  
Machine Model  
1 kV  
1 kV  
0.1 kV  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
T
MAX = 150°C  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
J
THERMAL RESISTANCE  
Table 6. Thermal Resistance  
Package Type  
θJA  
θJC  
Unit  
10-Lead MSOP  
141.9  
43.7  
°C/W  
The θJA values in Table 6 assume a 4-layer JEDEC standard  
board with zero airflow.  
–50  
–25  
0
25  
50  
75  
100  
125  
AMBIENT TEMPERATURE (C)  
Figure 2. Maximum Power Dissipation vs. Ambient Temperature  
ESD CAUTION  
Rev. 0 | Page 6 of 20  
 
 
 
AD8271  
PIN CONFIGURATION AND FUNCTION DESCRIPTION  
P1  
P2  
P3  
P4  
1
2
3
4
5
10 N3  
9
8
7
6
N2  
AD8271  
TOP VIEW  
(Not to Scale)  
N1  
OUT  
–V  
+V  
S
S
Figure 3.  
Table 7. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
3
P1  
P2  
P3  
Noninverting Input. A 10 kΩ resistor is connected to the noninverting (+) terminal of the op amp.  
Noninverting Input. A 10 kΩ resistor is connected to the noninverting (+) terminal of the op amp.  
Noninverting Input. A 20 kΩ resistor is connected to the noninverting (+) terminal of the op amp. This pin  
is used as a reference voltage input in many configurations.  
4
P4  
Noninverting Input. A 20 kΩ resistor is connected to the noninverting (+) terminal of the op amp. This pin  
is used as a reference voltage input in many configurations.  
5
6
7
8
9
10  
−VS  
+VS  
OUT  
N1  
N2  
N3  
Negative Supply.  
Positive Supply.  
Output.  
Inverting Input. A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp.  
Inverting Input. A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp.  
Inverting Input. A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp.  
Rev. 0 | Page 7 of 20  
 
AD8271  
TYPICAL PERFORMANCE CHARACTERISTICS  
VS = 15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.  
70  
180  
150  
120  
90  
GAIN = 1  
N = 989  
MEAN = –29  
SD = 43  
60  
50  
40  
30  
+0.6µV/V/°C  
20  
10  
0
60  
–0.1µV/V/°C  
–10  
–20  
–30  
–40  
30  
REPRESENTATIVE SAMPLES  
0
–200  
–100  
0
100  
200  
–50  
–30  
–10  
10  
30  
50  
70  
90  
110  
130  
CMMR (µV/V)  
TEMPERATURE (°C)  
Figure 4. Typical Distribution of CMRR, Gain = 1  
Figure 7. CMRR vs. Temperature, Normalized at 25°C, Gain = 1  
300  
GAIN = 1  
180  
150  
120  
90  
N = 989  
MEAN = –306  
SD = 229  
200  
2.2µV/°C  
100  
0
–100  
60  
2.8µV/°C  
30  
–200  
REPRESENTATIVE SAMPLES  
0
–300  
–1000  
–500  
0
500  
1000  
–50  
–30  
–10  
10  
30  
50  
70  
90  
110  
130  
SYSTEM OFFSET VOLTAGE (µV)  
TEMPERATURE (°C)  
Figure 8. System Offset vs. Temperature, Normalized at 25°C,  
Referred to Output, Gain = 1  
Figure 5. Typical Distribution of System Offset, Gain = 1  
200  
240  
GAIN = 1  
N = 1006  
MEAN = 0.003  
SD = 0.005  
150  
100  
50  
1.7ppm/°C  
210  
180  
150  
120  
90  
0
–50  
–100  
–150  
0.5ppm/°C  
60  
30  
REPRESENTATIVE SAMPLES  
0
–0.04  
–0.02  
0
0.02  
0.04  
–50  
–30  
–10  
10  
30  
50  
70  
90  
110  
130  
GAIN ERROR (%)  
TEMPERATURE (°C)  
Figure 6. Typical Distribution of Gain Error, Gain = 1  
Figure 9. Gain Error vs. Temperature, Normalized at 25°C, Gain = 1  
Rev. 0 | Page 8 of 20  
 
 
AD8271  
VS = 15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.  
6
20  
(0, +5)  
(0, +15)  
15  
10  
5
4
2
0
(–4.3, +2.85)  
(+4.3, +2.85)  
(–7.5, +7.5)  
(+7.5, +7.5)  
(0, +2.5)  
(–1.6, +1.7)  
(+1.6, +1.7)  
= ±5  
V
= ±2.5  
V
S
S
0
–5  
–10  
–15  
–20  
(–1.6, –1.7)  
(+1.6, –1.7)  
–2  
–4  
–6  
(0, –2.5)  
(–7.5, –7.5)  
(+7.5, –7.5)  
(–4.3, –2.85)  
(+4.3, –2.85)  
(0, –15)  
(0, –5)  
0
–5  
–4  
–3  
–2  
–1  
1
2
3
4
5
–10  
–5  
0
5
10  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
Figure 10. Common-Mode Input Voltage vs. Output Voltage,  
Gain = ½, 15 V Supplies  
Figure 13. Common-Mode Input Voltage vs. Output Voltage,  
Gain = 1, 5 V and 2.5 V Supplies  
6
20  
(0, +5)  
(0, +15)  
15  
4
(–14.3, +11.4)  
(+14.3, +11.4)  
(–2.5, +2.5)  
(+2.5, +2.5)  
(0, +2.5)  
10  
5
2
0
(–1.25, –1.25)  
(+1.25, +1.25)  
= ±5  
V
= ±2.5  
V
S
S
0
–5  
–10  
–15  
–20  
(–1.25, –1.25)  
(+1.25, –1.25)  
–2  
–4  
–6  
(0, –2.5)  
(–2.5, –2.5)  
(+2.5, –2.5)  
(–14.3, –11.4)  
(+14.3, –11.4)  
(0, –15)  
0
(0, –5)  
0
–3  
–2  
–1  
1
2
3
–20  
–15  
–10  
–5  
5
10  
15  
20  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
Figure 11. Common-Mode Input Voltage vs. Output Voltage,  
Gain = ½, 5 V and 2.5 V Supplies  
Figure 14. Common-Mode Input Voltage vs. Output Voltage,  
Gain = 2, 15 V Supplies  
20  
6
(0, +5)  
(0, +15)  
(–4, +4)  
(+4, +4)  
15  
4
2
0
(–14.3, +7.85)  
(+14.3, +7.85)  
(0, +2.5)  
10  
5
(–1.6, +2.1)  
(+1.6, +2.1)  
V
= ±2.5  
V = ±5  
S
S
0
–5  
–10  
–15  
–20  
–2  
–4  
–6  
(–1.6, –2.1)  
(+1.6, –2.1)  
(0, –2.5)  
(–14.3, –7.85)  
(+14.3, –7.85)  
(–4, –4)  
–4  
(+4, –4)  
(0, –15)  
0
(0, –5)  
0
–20  
–15  
–10  
–5  
5
10  
15  
20  
–5  
–3  
–2  
–1  
1
2
3
4
5
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
Figure 12. Common-Mode Input Voltage vs. Output Voltage,  
Gain =1, 15 V Supplies  
Figure 15. Common-Mode Input Voltage vs. Output Voltage,  
Gain = 2, 5 V and 2.5 V Supplies  
Rev. 0 | Page 9 of 20  
AD8271  
VS = 15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.  
10  
140  
120  
100  
80  
GAIN = 2, ½  
GAIN = 1  
GAIN = 2  
5
GAIN = 1  
GAIN = ½  
0
–5  
60  
40  
20  
–10  
–15  
–20  
0
10  
100  
1k  
10k  
100k  
1M  
10M  
100M  
100  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 19. Positive PSRR vs. Frequency  
Figure 16. Gain vs. Frequency  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
140  
120  
100  
80  
GAIN = 2, ½  
GAIN = 2, ½  
GAIN = 1  
GAIN = 1  
60  
40  
20  
0
10  
100  
1k  
10k  
100k  
1M  
10  
100  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 17. CMRR vs. Frequency  
Figure 20. Negative PSRR vs. Frequency  
32  
4
3
10V p-p INPUT  
GAIN = 1  
= 10k, 2k, 600Ω  
V
= ±15V  
S
28  
24  
20  
16  
R
LOAD  
2
1
0
–1  
–2  
–3  
–4  
12  
8
V
= ±5V  
S
4
0
100  
1k  
10k  
100k  
1M  
10M  
–10  
–8  
–6  
–4  
–2  
0
2
4
6
8
10  
FREQUENCY (Hz)  
TEMPERATURE (°C)  
Figure 21. Gain Nonlinearity, Gain = 1  
Figure 18. Output Voltage Swing vs. Large-Signal Frequency Response  
Rev. 0 | Page 10 of 20  
AD8271  
VS = 15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.  
120  
V
= ±15V  
0pF  
S
100  
I
SHORT+  
80  
60  
100pF  
18pF  
40  
20  
0
–20  
–40  
–60  
–80  
–100  
I
SHORT–  
1µs/DIV  
–50  
–30  
–10  
10  
30  
50  
70  
90  
110  
130  
TEMPERATURE (°C)  
Figure 22. Short-Circuit Current vs. Temperature  
Figure 25. Small-Signal Step Response, Gain = ½  
+V  
S
+125°C  
V
S
= ±15V  
0pF  
+V – 2  
220pF  
S
+85°C  
33pF  
–40°C  
+25°C  
+V – 4  
S
0
+125°C  
+85°C  
+25°C  
–V + 4  
S
–V + 2  
S
–40°C  
–V  
S
200  
1µs/DIV  
1k  
10k  
R
()  
LOAD  
Figure 23. Output Voltage Swing vs. RLOAD  
Figure 26. Small-Signal Step Response, Gain = 1  
+V  
S
–40°C  
+25°C  
V
= ±15V  
S
+V – 3  
S
470pF  
100pF  
0pF  
+V – 6  
S
+125°C  
+85°C  
0
+125°C  
+85°C  
+25°C  
–V + 6  
S
–V + 3  
S
–40°C  
–V  
S
1µs/DIV  
0
20  
40  
60  
80  
100  
CURRENT (mA)  
Figure 27. Small-Signal Step Response, Gain = 2  
Figure 24. Output Voltage Swing vs. Current (IOUT  
)
Rev. 0 | Page 11 of 20  
 
AD8271  
VS = 15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.  
160  
GAIN = ½  
140  
V
= ±10V  
S
V
= ±5V  
S
120  
100  
80  
V
= ±2.5V  
S
60  
40  
20  
0
V
= ±18V  
S
V
= ±15V  
50  
S
1µs/DIV  
0
10  
20  
30  
40  
60  
70  
80  
90  
100  
CAPACITIVE LOAD (pF)  
Figure 28. Small-Signal Overshoot vs. Capacitive Load, Gain = ½  
Figure 31. Large-Signal Pulse Response, Gain = ½  
80  
70  
GAIN = 1  
60  
50  
40  
V
= ±10V  
S
V
= ±5V  
S
V
= ±2.5V  
S
30  
20  
10  
0
V
= ±18V  
S
V
= ±15V  
S
1µs/DIV  
0
50  
100  
150  
200  
CAPACITIVE LOAD (pF)  
Figure 29. Small-Signal Overshoot vs. Capacitive Load, Gain = 1  
Figure 32. Large-Signal Pulse Response, Gain = 1  
80  
GAIN = 2  
70  
60  
50  
V
= ±10V  
S
40  
30  
20  
10  
0
V
= ±5V  
S
V
= ±2.5V  
S
V
= ±18V  
350  
S
V
= ±15V  
S
1µs/DIV  
0
50  
100  
150  
200  
250 300  
400  
450  
CAPACITIVE LOAD (pF)  
Figure 30. Small-Signal Overshoot vs. Capacitive Load, Gain = 2  
Figure 33. Large-Signal Pulse Response, Gain = 2  
Rev. 0 | Page 12 of 20  
AD8271  
VS = 15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.  
0.1  
45  
R
R
R
= 100k  
= 2kΩ  
= 600Ω  
LOAD  
LOAD  
LOAD  
40  
GAIN = ½  
GAIN = 2  
35  
+SR  
30  
25  
20  
15  
10  
5
0.01  
0.001  
–SR  
GAIN = 1  
0
0.0001  
10  
100  
1k  
FREQUENCY (Hz)  
10k  
100k  
TEMPERATURE (°C)  
Figure 34. Output Slew Rate vs. Temperature  
Figure 37. THD + N vs. Frequency  
1
0.1  
1k  
GAIN = 1  
f = 1kHz  
R
R
R
= 600Ω  
= 2kΩ  
= 100kΩ  
LOAD  
LOAD  
LOAD  
GAIN = 2  
0.01  
100  
GAIN = 1  
0.001  
0.0001  
GAIN = ½  
10  
0
5
10  
15  
20  
25  
1
10  
100  
1k  
10k  
100k  
OUTPUT AMPLITUDE (dBu)  
FREQUENCY (Hz)  
Figure 35. Voltage Noise Spectral Density vs. Frequency, Referred to Output  
Figure 38. THD + N vs. Output Amplitude, Gain = 1  
0.1  
HD2, R  
HD2, R  
HD2, R  
HD3, R  
HD3, R  
HD3, R  
= 100kΩ  
= 2kΩ  
= 600Ω  
= 100kΩ  
= 2kΩ  
LOAD  
LOAD  
LOAD  
LOAD  
LOAD  
LOAD  
GAIN = 2  
GAIN = 1  
GAIN = 1  
= 10V p-p  
V
OUT  
0.01  
0.001  
= 600Ω  
GAIN = ½  
0.0001  
1µV/DIV  
1s/DIV  
0.00001  
10  
100  
1k  
FREQUENCY (Hz)  
10k  
100k  
Figure 39. Harmonic Distortion Products vs. Frequency, Gain = 1  
Figure 36. 0.1 Hz to 10 Hz Voltage Noise, Referred to Output  
Rev. 0 | Page 13 of 20  
AD8271  
OPERATIONAL AMPLIFIER PLOTS  
VS = 15 V, TA = 25°C, unless otherwise noted.  
10  
1
0.1  
0
1
2
3
4
5
6
7
8
9
10  
1
10  
100  
1k  
10k  
100k  
TIME (sec)  
FREQUENCY (Hz)  
Figure 40. Change in Op Amp Offset Voltage vs. Warm-Up Time  
Figure 42. Current Noise Spectral Density vs. Frequency  
50pA/DIV  
1s/DIV  
Figure 41. 0.1 Hz to 10 Hz Current Noise  
Rev. 0 | Page 14 of 20  
 
AD8271  
THEORY OF OPERATION  
10k  
10kΩ  
10kΩ  
20kΩ  
20kΩ  
of the AD8271 depend on the matching of its resistors. Even  
source resistance of a few ohms can have a substantial effect on  
these specifications.  
1
2
3
4
5
10  
9
P1  
P2  
P3  
P4  
N3  
10kΩ  
10kΩ  
N2  
POWER SUPPLIES  
8
N1  
A stable dc voltage should be used to power the AD8271. Noise  
on the supply pins can adversely affect performance. A bypass  
capacitor of 0.1 μF should be placed between each supply pin  
and ground, as close as possible to each supply pin. A tantalum  
capacitor of 10 μF should also be used between each supply and  
ground. It can be farther away from the supply pins and, typically,  
it can be shared by other precision integrated circuits.  
7
OUT  
6
–V  
+V  
S
S
AD8271  
Figure 43. Functional Block Diagram  
CIRCUIT INFORMATION  
The AD8271 consists of a high precision, low distortion op amp  
and seven trimmed resistors. These resistors can be connected  
to create a wide variety of amplifier configurations, including  
difference, noninverting, and inverting configurations. The  
resistors on the chip can be connected in parallel for a wider range  
of options. Using the on-chip resistors of the AD8271 provides  
the designer with several advantages over a discrete design.  
The AD8271 is specified at 15 V and 5 V, but it can be used with  
unbalanced supplies, as well. For example, −VS = 0 V, +VS = 20 V.  
The difference between the two supplies must be kept below 36 V.  
INPUT VOLTAGE RANGE  
The AD8271 has a true rail-to-rail input range for the majority  
of applications. Because most AD8271 configurations divide down  
the voltage before they reach the internal op amp, the op amp sees  
only a fraction of the input voltage. Figure 44 shows an example  
of how the voltage division works in the difference amplifier  
configuration.  
DC Performance  
Much of the dc performance of op amp circuits depends on the  
accuracy of the surrounding resistors. The resistors on the AD8271  
are laid out to be tightly matched. The resistors of each part are  
laser trimmed and tested for their matching accuracy. Because  
of this trimming and testing, the AD8271 can guarantee high  
accuracy for specifications, such as gain drift, common-mode  
rejection, and gain error.  
R2  
R1 + R2  
(V  
)
+IN  
R4  
R3  
R1  
AC Performance  
R2  
Because feature size is much smaller in an integrated circuit than  
on a printed circuit board (PCB), the corresponding parasitics are  
also smaller. The smaller feature size helps the ac performance of  
the AD8271. For example, the positive and negative input terminals  
of the AD8271 op amp are not pinned out intentionally. By not  
connecting these nodes to the traces on the PCB, the capacitance  
remains low, resulting in both improved loop stability and  
common-mode rejection over frequency.  
R2  
R1 + R2  
(V  
)
+IN  
Figure 44. Voltage Division in the Difference Amplifier Configuration  
The internal op amp voltage range may be relevant in the  
following applications, and calculating the voltage at the  
internal op amp is advised.  
Difference amplifier configurations using supply voltages  
of less than 4.5 V  
Difference amplifier configurations with a reference  
voltage near the rail  
Production Costs  
Because one part, rather than several discrete components, is  
placed on the PCB, the board can be built more quickly and  
efficiently.  
Single-ended amplifier configurations  
Size  
For correct operation, the input voltages at the internal op amp  
must stay within 1.5 V of either supply rail.  
The AD8271 fits an op amp and seven resistors in one MSOP  
package.  
Voltages beyond the supply rails should not be applied to the  
part. The part contains ESD diodes at the input pins, which  
conduct if voltages beyond the rails are applied. Currents greater  
than 5 mA may damage these diodes and the part. For a similar  
part that can operate with voltages beyond the rails, see the  
AD8274 data sheet.  
DRIVING THE AD8271  
The AD8271 is easy to drive, with all configurations presenting  
at least several kilohms (kΩ) of input resistance. The AD8271  
should be driven with a low impedance source: for example,  
another amplifier. The gain accuracy and common-mode rejection  
Rev. 0 | Page 15 of 20  
 
 
AD8271  
APPLICATIONS INFORMATION  
The resistors and connections provided on the AD8271 offer  
abundant versatility through the variety of configurations that  
are possible.  
The AD8271 can also be referred to a combination of reference  
voltages. For example, the reference can be set at 2.5 V, using  
just 5 V and GND. Some of the possible configurations are  
shown in Figure 48 through Figure 50. Note that the output  
is not internally tied to a feedback path, so any of the 10 kꢀ  
resistors on the inverting input can be used in the feedback  
network. This flexibility allows for more efficient board lay-  
out options.  
DIFFERENCE AMPLIFIER CONFIGURATIONS  
The AD8271 can be placed in difference amplifier configurations  
with gains of ½, 1, and 2. Figure 45 through Figure 47 show  
sample difference amplifier configurations referenced to ground.  
P1  
P2  
P3  
P4  
N3  
10k  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
20kΩ  
20kΩ  
P1  
P2  
P3  
P4  
N3  
10k  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
20kΩ  
20kΩ  
1
2
3
4
10  
+IN  
–IN  
1
2
3
4
10  
+IN  
–IN  
5kΩ  
5kΩ  
N2  
N2  
9
10kΩ  
10kΩ  
10kΩ  
10kΩ  
9
–V  
S
–IN  
+IN  
–IN  
+IN  
N1  
=
=
N1  
8
8
OUT  
OUT  
5kΩ  
+V + –V  
+V  
S
5kΩ  
GND  
OUT  
7
7
S
S
GND  
OUT  
2
AD8271  
AD8271  
Figure 48. Gain = ½ Difference Amplifier, Referenced to Midsupply  
Figure 45. Gain = ½ Difference Amplifier, Referenced to Ground  
P1  
P2  
P3  
P4  
N3  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
20kΩ  
20kΩ  
P1  
P2  
P3  
P4  
N3  
10k  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
20kΩ  
20kΩ  
1
2
3
4
10  
9
+IN  
–IN  
NC  
1
2
3
4
10  
9
+IN  
NC  
–IN  
NC  
10kΩ  
10kΩ  
N2  
N2  
10kΩ  
10kΩ  
NC  
10kΩ  
10kΩ  
–IN  
+IN  
–IN  
+IN  
=
N1  
N1  
=
8
–V  
S
8
GND  
OUT  
10kΩ  
GND  
OUT  
OUT  
10kΩ  
+V + –V  
OUT  
7
+V  
S
7
S
S
AD8271  
Figure 46. Gain = 1 Difference Amplifier, Referenced to Ground  
2
AD8271  
Figure 49. Gain = 1 Difference Amplifier, Referenced to Midsupply  
P1  
P2  
P3  
P4  
N3  
10k  
10kΩ  
10kΩ  
10kΩ  
10kΩ  
20kΩ  
20kΩ  
P1  
P2  
P3  
P4  
N3  
10k  
10kΩ  
10kΩ  
1
2
3
4
10  
9
10kΩ  
10kΩ  
20kΩ  
20kΩ  
1
2
3
4
10  
9
10kΩ  
+IN  
–IN  
10kΩ  
N2  
+IN  
+IN  
N2  
5kΩ  
5kΩ  
5kΩ  
5kΩ  
–IN  
+IN  
–IN  
+IN  
N1  
=
N1  
8
=
8
–V  
+V  
S
GND  
OUT  
OUT  
OUT  
10kΩ  
GND  
OUT  
7
10kΩ  
+V + –V  
7
S
OUT  
S
S
AD8271  
2
AD8271  
Figure 47. Gain = 2 Difference Amplifier, Referenced to Ground  
Figure 50. Gain = 2 Difference Amplifier, Referenced to Midsupply  
Table 8. Pin Connections for Difference Amplifier Configurations  
Configuration  
Pin 1  
(P1)  
Pin 2  
(P2)  
Pin 3  
(P3)  
Pin 4  
(P4)  
Pin 8  
(N1)  
Pin 9  
(N2)  
Pin 10  
(N3)  
Gain and Reference  
OUT  
OUT  
NC  
Gain of ½ꢀ Referenced to Ground  
Gain of ½ꢀ Referenced to Midsupply  
Gain of 1ꢀ Referenced to Ground  
Gain of 1ꢀ Referenced to Midsupply  
Gain of 2ꢀ Referenced to Ground  
Gain of 2ꢀ Referenced to Midsupply  
+IN  
+IN  
+IN  
+IN  
+IN  
+IN  
GND  
−VS  
NC  
GND  
+VS  
GND  
+VS  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
−IN  
−IN  
−IN  
−IN  
−IN  
−IN  
GND  
−VS  
GND  
+VS  
NC  
NC  
−IN  
−IN  
+IN  
+IN  
GND  
−VS  
GND  
+VS  
Rev. 0 | Page 16 of 20  
 
 
 
 
 
AD8271  
SINGLE-ENDED CONFIGURATIONS  
The AD8271 can be configured for a wide variety of single-ended configurations with gains ranging from −2 to +3 (see Table 9).  
Table 9. Selected Single-Ended Configurations  
Electrical Performance  
Configuration  
Signal Gain  
−2  
Op Amp Closed-Loop Gain  
Input Resistance  
5 kΩ  
Pin 101  
IN  
Pin 91  
IN  
Pin 81  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
Pin 12  
GND  
GND  
GND  
GND  
GND  
IN  
Pin 22  
GND  
GND  
GND  
NC  
Pin 33  
GND  
GND  
NC  
Pin 43  
GND  
IN  
3
−1.5  
3
4.8 kΩ  
IN  
IN  
−1.4  
3
5 kΩ  
IN  
IN  
IN  
−1.25  
−1  
3
5.333 kΩ  
5 kΩ  
IN  
IN  
GND  
IN  
IN  
3
IN  
IN  
GND  
GND  
GND  
GND  
NC  
IN  
−0.8  
3
5.556 kΩ  
8 kΩ  
IN  
IN  
NC  
GND  
IN  
−0.667  
−0.6  
2
IN  
NC  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
IN  
GND  
NC  
2
8.333 kΩ  
8.889 kΩ  
7.5 kΩ  
IN  
NC  
IN  
−0.5  
2
IN  
NC  
GND  
IN  
IN  
−0.333  
−0.25  
−0.2  
2
IN  
NC  
GND  
GND  
GND  
NC  
IN  
1.5  
1.5  
1.5  
1.5  
2
8 kΩ  
OUT  
OUT  
OUT  
OUT  
IN  
IN  
GND  
NC  
IN  
8.333 kΩ  
8.889 kΩ  
8.333 kΩ  
10 kΩ  
IN  
IN  
−0.125  
+0.1  
IN  
GND  
NC  
IN  
IN  
GND  
IN  
GND  
IN  
+0.2  
NC  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
IN  
NC  
+0.25  
+0.3  
1.5  
1.5  
2
24 kΩ  
OUT  
OUT  
GND  
OUT  
GND  
GND  
OUT  
GND  
OUT  
OUT  
GND  
OUT  
GND  
OUT  
GND  
OUT  
OUT  
OUT  
IN  
GND  
GND  
NC  
GND  
GND  
GND  
NC  
GND  
NC  
IN  
25 kΩ  
IN  
+0.333  
+0.375  
+0.4  
24 kΩ  
GND  
GND  
NC  
IN  
1.5  
2
26.67 kΩ  
25 kΩ  
GND  
NC  
IN  
GND  
GND  
GND  
GND  
GND  
IN  
IN  
+0.5  
3
24 kΩ  
GND  
GND  
GND  
GND  
IN  
GND  
IN  
IN  
+0.5  
1.5  
3
15 kΩ  
IN  
+0.6  
25 kΩ  
NC  
IN  
+0.6  
1.5  
1.5  
2
16.67 kΩ  
16 kΩ  
NC  
GND  
GND  
IN  
+0.625  
+0.667  
+0.7  
NC  
IN  
15 kΩ  
NC  
GND  
IN  
GND  
IN  
IN  
1.5  
3
16.67 kΩ  
26.67 kΩ  
13.33 kΩ  
16.67 kΩ  
16.67 kΩ  
15 kΩ  
IN  
NC  
GND  
IN  
+0.75  
+0.75  
+0.8  
GND  
GND  
NC  
GND  
GND  
IN  
NC  
GND  
GND  
NC  
1.5  
2
IN  
IN  
GND  
IN  
GND  
IN  
+0.9  
1.5  
1.5  
1.5  
3
GND  
GND  
IN  
GND  
IN  
NC  
+1  
IN  
GND  
IN  
GND  
IN  
+1  
>1 GΩ  
IN  
IN  
+1  
>1 GΩ  
IN  
IN  
IN  
IN  
IN  
+1.125  
+1.2  
1.5  
3
26.67 kΩ  
16.67 kΩ  
25 kΩ  
OUT  
GND  
OUT  
OUT  
GND  
GND  
OUT  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
NC  
NC  
IN  
IN  
GND  
GND  
GND  
GND  
GND  
IN  
IN  
GND  
IN  
NC  
+1.2  
1.5  
1.5  
2
IN  
NC  
+1.25  
+1.333  
+1.5  
24 kΩ  
IN  
IN  
IN  
15 kΩ  
IN  
IN  
GND  
GND  
IN  
3
13.33 kΩ  
>1 GΩ  
GND  
GND  
NC  
GND  
IN  
IN  
+1.5  
1.5  
2
IN  
IN  
+1.6  
25 kΩ  
IN  
IN  
NC  
GND  
GND  
IN  
+1.667  
+1.8  
2
24 kΩ  
NC  
IN  
IN  
IN  
3
16.67 kΩ  
>1 GΩ  
GND  
NC  
GND  
IN  
IN  
NC  
+2  
2
IN  
IN  
IN  
+2.25  
+2.4  
3
26.67 kΩ  
25 kΩ  
GND  
GND  
GND  
GND  
NC  
IN  
IN  
GND  
GND  
GND  
IN  
3
IN  
IN  
NC  
+2.5  
3
24 kΩ  
IN  
IN  
IN  
+3  
3
>1 GΩ  
IN  
IN  
IN  
1 A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp.  
2 A 10 kΩ resistor is connected to the noninverting (+) terminal of the op amp.  
3 A 20 kΩ resistor is connected to the noninverting (+) terminal of the op amp.  
Rev. 0 | Page 17 of 20  
 
 
AD8271  
SENSE  
FORCE  
10kΩ  
R
R
w
Many signal gains have more than one configuration choice, which  
allows freedom in choosing the op amp closed-loop gain. In  
general, for designs that need to be stable with a large capacitive  
load on the output, choose a configuration with high loop gain.  
Otherwise, choose a configuration with low loop gain, because  
these configurations typically have lower noise, lower offset,  
and higher bandwidth.  
10kΩ  
10kΩ  
–IN  
+IN  
w
R
1kΩ  
L
10kΩ  
Figure 52. Connecting Both the Output and Feedback at the Load Minimizes  
Error Due to Wire Resistance  
The AD8271 Specifications section and Typical Performance  
Characteristics section show the performance of the part primarily  
when it is in the difference amplifier configuration. To estimate  
the performance of the part in a single-ended configuration, refer  
to the difference amplifier configuration with the corresponding  
closed-loop gain (see Table 10).  
INSTRUMENTATION AMPLIFIER  
The AD8271 can be used as a building block for high performance  
instrumentation amplifiers. For example, Figure 53 shows how  
to build an ultralow noise instrumentation amplifier using the  
AD8599 dual op amp. External resistors RG and RFx provide gain;  
therefore, the output is  
Table 10. Closed-Loop Gain of the Difference Amplifiers  
Difference Amplifier Gain  
Closed-Loop Gain  
2RFx  
RG  
VOUT  
=
(
V+IN VIN  
)
1+  
(
GAD8271  
)
0.5  
1
1.5  
2
AD8599  
A2  
2
3
–IN  
10kΩ  
Gain of 1 Configuration  
R
F1  
10kΩ  
10kΩ  
2kΩ  
The AD8271 is designed to be stable for loop gains of 1.5 and  
greater. Because a typical voltage follower configuration has  
a loop gain of 1, it may be unstable. Several stable configurations  
for gain of 1 are listed in Table 9.  
R
20Ω  
G
OUT  
R
AD8271  
F2  
10kΩ  
REF  
2kΩ  
KELVIN MEASUREMENT  
+IN  
AD8599  
A2  
V
= ±15V  
S
In the case where the output load is located remotely or at  
a distance from the AD8271, as shown in Figure 51, wire  
resistance can actually cause significant errors at the load.  
10kΩ  
Figure 53.Ultralow Noise Instrumentation Amplifier Using AD8599  
Configured for Gain = 201  
For optimal noise performance, it is desirable to have a high  
gain at the input stage using low value gain-setting resistors, as  
shown in this particular example. With less than 2 nV/√Hz  
input-referred noise (see Figure 54) at ~10 mA supply current,  
the AD8271 and AD8599 combination offers an in-amp with a  
fine balance of critical specifications: a gain bandwidth product  
of 10 MHz, low bias current, low offset drift, high CMRR, and  
high slew rate.  
R
W
10kΩ  
10kΩ  
(WIRE RESISTANCE)  
–IN  
+IN  
R
1kΩ  
L
10kΩ  
Figure 51. Wire Resistance Causes Errors at Load Voltage  
10.0  
Since the output of the AD8271 is not internally tied to any of  
the feedback resistors, Kelvin type measurements are possible  
because the op amp output and feedback can both be connected  
closer to the load (Figure 52). The Kelvin sensing on the feedback  
minimizes error at the load caused by voltage drops across the  
wire resistance. This technique is most effective in reducing errors  
for loads less than 10 kꢀ. As the load resistance increases, the  
error due to the wire resistance becomes less significant.  
9.0  
8.0  
7.0  
6.0  
5.0  
4.0  
G = 201  
BANDWIDTH  
LIMIT  
3.0  
2.0  
1.0  
0
Because it adds the sense wire resistance to the feedback resistor, a  
trade-off of the Kelvin connection is that it can degrade common-  
mode rejection, especially over temperature. For sense wire  
resistance less than 1 ꢀ, it is typically not an issue. If common-  
mode performance is critical, two amplifier stages can be used:  
the first stage removes common-mode interference, and the  
second stage performs the Kelvin drive.  
1
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
Figure 54. Ultralow Noise In-Amp Voltage Noise Spectral Density vs.  
Frequency, Referred to Input  
Rev. 0 | Page 18 of 20  
 
 
 
 
 
 
AD8271  
DRIVING CABLING  
DRIVING AN ADC  
Because the AD8271 can drive large voltages at high output  
currents and slew rates, it makes an excellent cable driver. It is  
good practice to put a small value resistor between the AD8271  
output and cable, since capacitance in the cable can cause peaking  
or instability in the output response. A resistance of 20 ꢀ or higher  
is recommended.  
The AD271 high slew rate and drive capability, combined with  
its dc accuracy, make it a good ADC driver. The AD8271 can  
drive single-ended input ADCs. Many converters require the  
output to be buffered with a small value resistor combined with  
a high quality ceramic capacitor. See the relevant converter data  
sheet for more details.  
AD8271  
(SINGLE OUT)  
Figure 55. Driving Cabling  
Rev. 0 | Page 19 of 20  
 
AD8271  
OUTLINE DIMENSIONS  
3.10  
3.00  
2.90  
6
10  
5.15  
4.90  
4.65  
3.10  
3.00  
2.90  
1
5
PIN 1  
0.50 BSC  
0.95  
0.85  
0.75  
1.10 MAX  
0.80  
0.60  
0.40  
8°  
0°  
0.15  
0.05  
0.33  
0.17  
SEATING  
PLANE  
0.23  
0.08  
COPLANARITY  
0.10  
COMPLIANT TO JEDEC STANDARDS MO-187-BA  
Figure 56. 10-Lead Mini Small Outline Package [MSOP]  
(RM-10)  
Dimensions are shown in millimeters  
ORDERING GUIDE  
Model  
Temperature Range  
Package Description  
Package Option  
RM-10  
RM-10  
RM-10  
RM-10  
Branding  
Y1E  
Y1E  
Y1E  
Y1G  
AD8271ARMZ1  
AD8271ARMZ-R71  
AD8271ARMZ-RL1  
AD8271BRMZ1  
AD8271BRMZ-R71  
AD8271BRMZ-RL1  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
10-Lead MSOP  
10-Lead MSO ꢀ 7”Tape and Reel  
10-Lead MSO ꢀ 13”Tape and Reel  
10-Lead MSOP  
10-Lead MSO ꢀ 7”Tape and Reel  
10-Lead MSO ꢀ 13”Tape and Reel  
RM-10  
RM-10  
Y1G  
Y1G  
1 Z = RoHS Compliant Part.  
©2009 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D07363-0-1/09(0)  
Rev. 0 | Page 20 of 20  
 

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