AD8331TRQZ-EP-R7 [ADI]
Single VGA with Ultralow Noise Preamplifier and Programmable RIN;
| 型号： | AD8331TRQZ-EP-R7 |
| 厂家： | 
ADI |
| 描述： | Single VGA with Ultralow Noise Preamplifier and Programmable RIN 光电二极管 商用集成电路 |
| 文件： | 总9页 (文件大小：209K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ultralow Noise VGA with
Preamplifier and Programmable RIN
Enhanced Product
AD8331-EP
FEATURES
FUNCTIONAL BLOCK DIAGRAM
LON LOP VIP VIN
VCM
HILO
Ultralow noise preamplifier (preamp)
Input voltage noise: 0.74 nV/√Hz typical
Input current noise: 2.5 pA/√Hz typical
−3 dB small signal bandwidth: 120 MHz typical
Low power dissipation: 125 mW typical
Wide gain range with programmable postamp
−4.5 dB to +43.5 dB in low gain mode
7.5 dB to 55.5 dB in high gain mode
Low output-referred noise: 48 nV/√Hz typical
Active input impedance matching
3.5dB OR 15.5dB
V
MID
LNA
19dB
–
ATTENUATOR
VOH
VOL
48dB
21dB
PA
INH
+
CLAMP
LMD
GAIN
VCM
BIAS
VGA BIAS AND
INTERPOLATOR
RCLMP
CONTROL
INTERFACE
AD8331-EP
ENBx GAIN
Optimized for 10-bit/12-bit ADCs
Figure 1.
Selectable output clamping level
Single 5 V supply operation
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications
(AQEC standard)
Extended industrial temperature range: −55°C to +105°C
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Product change notification
Qualification data available on request
The 48 dB gain range of the VGA makes this device suitable for
a variety of applications. Excellent bandwidth uniformity is
maintained across the entire range. The gain control interface
provides precise linear in dB scaling of 50 dB/V for control
voltages between 100 mV and 0.95 V. Factory trim ensures
excellent part to part gain matching.
APPLICATIONS
Radars
Ultrasound and sonar time-gain controls
High performance automatic gain control (AGC) systems
In-phase quadrature (I/Q) signal processing
High speed ADC drivers
Differential signal paths result in superb second- and third-
order distortion performance and low crosstalk.
The low output referred noise of the VGA is advantageous in
driving high speed differential analog-to-digital converters
(ADCs). The gain of the post amplifier (PA) can be pin selected
to 3.5 dB or 15.5 dB to optimize gain range and output noise for
12-bit or 10-bit converter applications. The output can be limited to
a user selected clamping level, preventing input overload to a
subsequent ADC. An external resistor adjusts the clamping level.
GENERAL DESCRIPTION
The AD8331-EP is a single-channel, ultralow noise, linear in dB,
variable gain amplifier (VGA). Optimized for ultrasound
systems, the device is usable as a low noise variable gain element
at frequencies up to 120 MHz.
Included in the channel are an ultralow noise preamp (LNA), an
X-AMP® VGA with 48 dB of gain range, and a selectable gain
postamp with adjustable output limiting. The LNA gain is 19 dB
with a single-ended input and differential outputs. Using a single
resistor, the LNA input impedance can be adjusted to match a
signal source without compromising noise performance.
The operating temperature is specified across the −55°C to
+105°C extended industrial range.
Additional application and technical information can be found
in the AD8331 data sheet.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2019 Analog Devices, Inc. All rights reserved.
www.analog.com
AD8331-EP
Enhanced Product
TABLE OF CONTENTS
Features .............................................................................................. 1
Power Derating Curves.................................................................6
Thermal Resistance.......................................................................6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions..............................7
Typical Performance Characteristics ..............................................8
Outline Dimensions..........................................................................9
Ordering Guide .............................................................................9
Enhanced Product Features ............................................................ 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
REVISION HISTORY
5/2019—Revision 0: Initial Version
Rev. 0 | Page 2 of 9
Enhanced Product
SPECIFICATIONS
AD8331-EP
TA = 25°C, supply voltage (VS) = 5 V, load resistance (RL) = 500 Ω, source resistance (RS) = input resistance (RIN) = 50 Ω, shunt feedback
resistance (RIZ) = 280 Ω, input shunt capacitance (CSH) = 22 pF, frequency (f) = 10 MHz, RCLMP = ∞, load capacitance (CL) = 1 pF, VCM
pin floating, −4.5 dB to +43.5 dB gain (HILO = low), and differential output voltage, unless otherwise noted.
Table 1.
Parameter
Test Conditions/Comments
Min
Typ
Max Unit1
LNA CHARACTERISTICS
Gain
Single-ended input to differential output
Input to output (single-ended)
AC-coupled
19
13
275
dB
dB
mV
Ω
Input Voltage Range
Input Resistance
RIZ = 280 Ω
50
RIZ = 412 Ω
75
Ω
RIZ = 562 Ω
RIZ = 1.13 kΩ
RIZ = ∞
100
200
6
13
5
Ω
Ω
kΩ
pF
Ω
Input Capacitance
Output Impedance
−3 dB Small Signal Bandwidth
Slew Rate
Single-ended, either output
Output voltage (VOUT) = 0.2 V p-p
130
650
0.74
MHz
V/µs
nV/√Hz
Input Voltage Noise
RS = 0 Ω, high or low gain mode, RIZ = ∞,
f = 5 MHz
Input Current Noise
Noise Figure
RIZ = ∞, high or low gain mode, f = 5 MHz
f = 10 MHz, LOP output
2.5
pA/√Hz
Active Termination Match
Unterminated
RS = RIN = 50 Ω
RS = 50 Ω, RIZ = ∞
3.7
2.5
dB
dB
Harmonic Distortion at LOP
Second Harmonic Distortion (HD2)
Third Harmonic Distortion (HD3)
Output Short-Circuit Current
LNA AND VGA CHARACTERISTICS
−3 dB Signal Bandwidth
Small
VOUT = 0.5 V p-p, single-ended, f = 10 MHz
−56
−70
165
dBc
dBc
mA
Pin LON, Pin LOP
VOUT = 0.2 V p-p
VOUT = 2 V p-p
120
110
MHz
MHz
Large
Slew Rate
Low gain mode
High gain mode
RS = 0 Ω, high or low gain mode, RIZ = ∞,
f = 5 MHz
300
1200
0.82
V/µs
V/µs
nV/√Hz
Input Voltage Noise
Noise Figure
Gain voltage (VGAIN) = 1.0 V
Active Termination Match
RS = RIN = 50 Ω, f = 10 MHz, measured
RS = RIN = 200 Ω, f = 5 MHz, simulated
RS = 50 Ω, RIZ = ∞, f = 10 MHz, measured
RS = 200 Ω, RIZ = ∞, f = 5 MHz, simulated
4.15
2.0
2.5
dB
dB
dB
dB
Unterminated
1.0
Output Referred Noise
VGAIN = 0.5 V, low gain mode
VGAIN = 0.5 V, high gain mode
DC to 1 MHz
48
178
1
nV/√Hz
nV/√Hz
Ω
Output Impedance, Postamplifier
Rev. 0 | Page 3 of 9
AD8331-EP
Enhanced Product
Parameter
Test Conditions/Comments
Min
Typ
Max Unit1
Output Signal Range, Postamplifier
Differential
RL ≥ 500 Ω, unclamped, either pin
VCM 1.125
4.5
V
V p-p
Output Offset Voltage
Differential, VGAIN = 0.5 V
Common mode
−50
−125 −25
45
5
+50
+100 mV
mA
mV
Output Short-Circuit Current
Harmonic Distortion
HD2
VGAIN = 0.5 V, VOUT = 1 V p-p, high gain mode
f = 1 MHz
−88
−85
−68
−65
1
dBc
dBc
dBc
dBc
dBm
HD3
HD2
HD3
f = 10 MHz
Input 1 dB Compression Point
VGAIN = 0.25 V, VOUT = 1 V p-p, f = 1 MHz to
10 MHz
Two-Tone Intermodulation Distortion (IMD3)
Output Third-Order Intercept
Overload Recovery
VOUT = 1 V p-p
VGAIN = 0.72 V, f = 1 MHz
VGAIN = 0.5 V, f = 10 MHz
VGAIN = 0.5 V, VOUT = 1 V p-p
f = 1 MHz
f = 10 MHz
VGAIN = 1.0 V, input voltage (VIN) = 50 mV p-p/
1V p-p, f = 10 MHz
−80
−72
dBc
dBc
38
33
5
dBm
dBm
ns
Group Delay Variation
ACCURACY
5 MHz < f < 50 MHz, full gain range
2
ns
Absolute Gain Error2
0.05 V < VGAIN < 0.10 V
0.10 V < VGAIN < 0.95 V
0.95 V < VGAIN < 1.0 V
0.1 V < VGAIN < 0.95 V
GAIN pin
0.10 V < VGAIN < 0.95 V
Low gain mode (HILO = low)
High gain mode (HILO = high)
Low gain mode
−1
−1
−2
+0.5
0.3
−1
+2
+1
+1
dB
dB
dB
dB
Gain Law Conformance3
GAIN CONTROL INTERFACE
Gain Scaling Factor
0.2
48.5
50
3.5
15.5
−4.5 to +43.5
7.5 to 55.5
0 to 1.0
10
51.5
dB/V
dB
dB
dB
dB
V
Post Amplifier Gain
Gain Range
High gain mode
Input Voltage (VGAIN) Range
Input Impedance
Response Time
MΩ
ns
48 dB gain change to 90% full scale
VCM pin
Current limited to 1 mA
Common-mode voltage (VCM) = 2.5 V
VOUT = 2.0 V p-p
500
COMMON-MODE INTERFACE
Input Resistance4
Output Common-Mode Offset Voltage
Voltage Range
30
Ω
−125 −25
1.5 to 3.5
+100 mV
V
ENABLE INTERFACE
ENBL AND ENBV pins
Logic Level to Enable Power
Logic Level to Disable Power
Input Resistance
2.25
0
5
1.0
V
V
ENB pin
ENBL pin
ENBV pin
VINH = 30 mV p-p
VINH = 150 mV p-p
25
40
70
300
4
kΩ
kΩ
kΩ
µs
ms
Power-Up Response Time
Rev. 0 | Page 4 of 9
Enhanced Product
AD8331-EP
Parameter
Test Conditions/Comments
Min
Typ
Max Unit1
HILO GAIN RANGE INTERFACE
Logic Level to Select Gain Range
High
HILO pin
2.25
0
5
1.0
V
V
Low
Input Resistance
OUTPUT CLAMP INTERFACE
Accuracy
50
kΩ
RCLMP pin, high or low gain
VOUT = 1 V p-p (clamped)
RCLMP = 2.74 kΩ
HILO = Low
HILO = High
50
75
mV
mV
RCLMP = 2.21 kΩ
MODE INTERFACE
Logic Level for Gain Slope
Positive
MODE pin
0
2.25
1.0
5
V
V
Negative
Input Resistance
POWER SUPPLY
Supply Voltage
Quiescent Current
Power Dissipation
Power-Down Current
LNA Current (ENBL)
VGA Current (ENBV)
Power Supply Rejection Ratio
200
kΩ
VPSL and VPOS pins
4.5
20
5.0
25
125
240
11
5.5
V
mA
mW
µA
mA
mA
dB
No signal
VGA and LNA disabled
50
7.5
7.5
400
15
20
14
−68
VGAIN = 0 V, f = 100 kHz
1 All dBm values are referred to 50 Ω.
2 The absolute gain refers to the theoretical gain expression in Equation 1 of the AD8331 data sheet.
3 Best fit to linear in dB curve.
4 The current is limited to 1 mA typical.
Rev. 0 | Page 5 of 9
AD8331-EP
Enhanced Product
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 2.
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Parameter
Rating
Voltage
Supply Voltage (VPSL, VPOS)
Input Voltage (INH)
ENBL, ENBV, HILO Voltage
GAIN Voltage
Power Dissipation
5.5 V
VS + 200 mV
VS + 200 mV
2.5 V
θ
JA is the natural convection junction to ambient thermal
resistance measured in a one cubic foot sealed enclosure, and
JC is the junction to case thermal resistance measured at
θ
See Figure 2
package top.
Temperature
Table 3. Thermal Resistance
Extended Industrial Range
Junction Temperature (TJ)
Storage Temperature Range
Lead Temperature (Soldering, 60 sec)
−55°C to +105°C
125°C
−65°C to +150°C
300°C
1
2
Package Type
θJA
θJC
Unit
RQ-20
86
34
°C/W
1 Thermal impedance simulated values are based on a JEDEC 2S2P thermal
test board. See JEDEC JESD-51.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
2 Thermal impedance simulated values are based on a JEDEC 1S0P thermal
test board. See JEDEC JESD-51.
ESD CAUTION
POWER DERATING CURVES
Figure 2 shows the maximum power dissipation vs. ambient
temperature.
1.2
1.0
0.8
0.6
0.4
0.2
0
–55
–35
–15
5
25
45
65
85
105
AMBIENT TEMPERATURE (°C)
Figure 2. Maximum Power Dissipation vs. Ambient Temperature
Rev. 0 | Page 6 of 9
Enhanced Product
AD8331-EP
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
20 COMM
LMD
INH
PIN 1
INDICATOR
19
18
ENBL
ENBV
3
VPSL
LON
LOP
4
17 COMM
AD8331-EP
TOP VIEW
(Not to Scale)
5
16
15
14
VOL
6
VOH
VPOS
COML
VIP
7
8
13 HILO
VIN
9
12
11
RCLMP
VCM
MODE
GAIN
10
Figure 3. Pin Configuration
Table 4. Pin Function Description
Pin No.
Mnemonic
Description
1
LMD
LNA Midsupply Bypass Pin. Connect a capacitor to LMD to achieve a midsupply high frequency bypass.
2
INH
LNA Input.
3
4
5
6
7
8
9
VPSL
LON
LOP
COML
VIP
VIN
MODE
GAIN
VCM
RCLMP
HILO
VPOS
VOH
LNA 5 V Supply.
LNA Inverting Output.
LNA Noninverting Output.
LNA Ground.
VGA Noninverting Input.
VGA Inverting Input.
Gain Slope Logic Input.
Gain Control Voltage.
Common-Mode Voltage.
Output Clamping Level.
Gain Range Select (High or Low).
VGA 5 V Supply.
Noninverting VGA Output.
Inverting VGA Output.
VGA Grounds.
VGA Enable.
LNA Enable.
10
11
12
13
14
15
16
17, 20
18
19
VOL
COMM
ENBV
ENBL
Rev. 0 | Page 7 of 9
AD8331-EP
Enhanced Product
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = 5 V, RL = 500 Ω, RS = RIN = 50 Ω, RIZ = 280 Ω, CSH = 22 pF, f = 10 MHz, RCLMP = ∞, CL = 1 pF, VCM pin floating,
−4.5 dB to +43.5 dB gain (HILO = low), and differential output voltage, unless otherwise noted.
2.0
40
35
30
25
20
15
10
5
+105°C
+25°C
–55°C
V
= 0.5V
GAIN
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
–55
–35
–15
5
25
45
65
85
105
V
(V)
TEMPERATURE (°C)
GAIN
Figure 6. Quiescent Supply Current vs. Temperature
Figure 4. Absolute Gain Error vs. VGAIN at Three Temperatures
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
R
= 0Ω, R = ∞,
IZ
= 1V, f = 10MHz
S
V
GAIN
–55
–35
–15
5
25
45
65
85
105
TEMPERATURE (°C)
Figure 5. Input-Referred Noise vs. Temperature
Rev. 0 | Page 8 of 9
Enhanced Product
AD8331-EP
OUTLINE DIMENSIONS
0.345 (8.76)
0.341 (8.66)
0.337 (8.55)
20
1
11
10
0.158 (4.01)
0.154 (3.91)
0.150 (3.81)
0.244 (6.20)
0.236 (5.99)
0.228 (5.79)
0.010 (0.25)
0.006 (0.15)
0.020 (0.51)
0.010 (0.25)
0.069 (1.75)
0.053 (1.35)
0.065 (1.65)
0.049 (1.25)
0.010 (0.25)
0.004 (0.10)
0.041 (1.04)
REF
SEATING
PLANE
8°
0°
0.025 (0.64)
BSC
0.050 (1.27)
0.016 (0.41)
COPLANARITY
0.004 (0.10)
0.012 (0.30)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-137-AD
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 7. 20-Lead Shrink Small Outline Package [QSOP]
(RQ-20)
Dimensions shown in Inches and (millimeters)
ORDERING GUIDE
Model1
Temperature Range
−55°C to +105°C
−55°C to +105°C
Package Description
Package Option
RQ-20
RQ-20
AD8331TRQZ-EP
AD8331TRQZ-EP-R7
20-Lead Shrink Small Outline Package [QSOP]
20-Lead Shrink Small Outline Package [QSOP]
1 Z = RoHS Compliant Part.
©2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D20775-0-5/19(0)
Rev. 0 | Page 9 of 9
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