AD8421-KGD-WP [ADI]
3 nV /√Hz, Low Power Instrumentation Amplifier;
| 型号： | AD8421-KGD-WP |
| 厂家： | 
ADI |
| 描述： | 3 nV /√Hz, Low Power Instrumentation Amplifier 放大器 |
| 文件： | 总8页 (文件大小：242K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
3 nV/√Hz, Low Power
Instrumentation Amplifier
AD8421-KGD
Known Good Die
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Low power: 2.3 mA maximum quiescent current
Low noise
3.2 nV/√Hz maximum input voltage noise at 1 kHz
200 fA/√Hz typical current noise spectral density at 1 kHz
Excellent ac specifications
–IN
+V
V
S
R
G
OUT
R
REF
G
+IN
–V
S
10 MHz typical small signal bandwidth (gain = 1 and gain = 10)
2 MHz typical small signal bandwidth (gain = 100)
0.6 µs typical settling time to 0.001% (gain = 10)
80 dB minimum CMRR at 20 kHz (gain = 1)
35 V/µs typical slew rate
AD8421-KGD
Figure 1.
High precision dc performance
84 dB minimum CMRR DC to 60 Hz with 1 kΩ source
imbalance (gain = 1)
0.9 µV/°C maximum input offset voltage, average
temperature coefficient
5 ppm/°C maximum gain vs. temperature (gain = 1)
2 nA maximum input bias current
Inputs protected to 40 V from opposite supply
2.5 V to 18 V dual supply (+5 V to +36 V single supply)
Gain set with a single resistor (gain = 1 to 10,000)
Known Good Die (KGD): these die are fully guaranteed to
data sheet specification.
The 10 MHz small signal bandwidth, 35 V/µs slew rate, and
0.6 µs settling time to 0.001% (gain = 10) allow the AD8421-KGD
to amplify high speed signals and excel in applications that require
high channel count, multiplexed systems. Even at higher gains,
the current feedback architecture maintains high performance.
For example, at gain = 100, the bandwidth is 2 MHz and the
settling time is 0.8 µs.
The AD8421-KGD has excellent distortion performance, making
this device suitable for use in demanding applications such as
vibration analysis.
APPLICATIONS
Medical instrumentation
Precision data acquisition
Microphone preamplification
Vibration analysis
Multiplexed input applications
ADC driver
The AD8421-KGD delivers 3 nV/√Hz input voltage noise and
200 fA/√Hz current noise spectral density with only 2 mA
quiescent current, making the device an ideal choice for
measuring low level signals. For applications with high source
impedance, the AD8421-KGD employs innovative process
technology and design techniques to provide noise performance
that is limited only by the sensor.
GENERAL DESCRIPTION
The AD8421-KGD is a low cost, low power, low noise, ultralow
bias current, high speed instrumentation amplifier that is ideally
suited for a broad spectrum of signal conditioning and data
acquisition applications. This device features high CMRR,
allowing the device to extract low level signals in the presence of
high frequency common-mode noise over a wide temperature
range.
The AD8421-KGD uses unique protection methods to ensure
robust inputs while still maintaining low noise. This protection
allows input voltages up to 40 V from the opposite supply rail
without damage to the device.
A single resistor sets the gain from 1 to 10,000. The reference
pin can be used to apply a precise offset to the output voltage.
The AD8421-KGD is specified from −40°C to +85°C and
operational to 125°C.
Additional application and technical information can be found
in the AD8421 data sheet.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksare the property oftheir respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2019 Analog Devices, Inc. All rights reserved.
www.analog.com
AD8421-KGD
Known Good Die
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions..............................7
Outline Dimensions..........................................................................8
Die Specifications and Assembly Recommendations...............8
Ordering Guide .............................................................................8
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
REVISION HISTORY
9/2019—Revision 0: Initial Version
Rev. 0 | Page 2 of 8
Known Good Die
SPECIFICATIONS
AD8421-KGD
Supply voltage (VS) = 15 V, REF voltage (VREF) = 0 V, T A = 25°C, gain = 1, and load resistance (RL) = 2 kΩ, unless otherwise noted.
Table 1.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
COMMON-MODE REJECTION RATIO (CMRR)
CMRR DC to 60 Hz with 1 kΩ Source
Imbalance
Common-mode voltage (VCM) =
−10 V to +10 V
Gain = 1
Gain = 10
Gain = 100
Gain = 1000
Over Temperature, Gain = 1
CMRR at 20 kHz
84
dB
dB
dB
dB
dB
104
124
134
80
TA = −40°C to +85°C
VCM = −10 V to +10 V
Gain = 1
Gain = 10
Gain = 100
Gain = 1000
80
90
100
100
dB
dB
dB
dB
NOISE
Voltage Noise, 1 kHz1
Input Voltage Noise, eni
Output Voltage Noise, eno
Peak to Peak, Referred to Input (RTI)
Gain = 1
Gain = 10
Gain = 100 to 1000
Current Noise
+IN voltage (V+IN), −IN voltage (V−IN) = 0 V
Frequency = 0.1 Hz to 10 Hz
3
3.2
60
nV/√Hz
nV/√Hz
2
0.5
0.07
µV p-p
µV p-p
µV p-p
Spectral Density
Frequency = 1 kHz
Frequency = 0.1 Hz to 10 Hz
200
18
fA/√Hz
pA p-p
Peak to Peak, RTI
VOLTAGE OFFSET2
Input Offset Voltage, VOSI
Over Temperature
Average Temperature Coefficient
Output Offset Voltage, VOSO
Over Temperature
Average Temperature Coefficient
Offset RTI vs. Supply (Power Supply Ratio)
Gain = 1
VS = 5 V to 15 V
TA = −40°C to +85°C
70
135
0.9
600
1
µV
µV
µV/°C
µV
mV
TA = −40°C to +85°C
VS = 2.5 V to 18 V
9
µV/°C
90
120
120
130
140
dB
dB
dB
dB
Gain = 10
Gain = 100
Gain = 1000
110
124
130
INPUT CURRENT
Input Bias Current
Over Temperature
Average Temperature Coefficient
Input Offset Current
Over Temperature
Average Temperature Coefficient
1
2
8
nA
nA
pA/°C
nA
nA
TA = −40°C to +85°C
TA = −40°C to +85°C
50
0.5
2
3
1
pA/°C
Rev. 0 | Page 3 of 8
AD8421-KGD
Known Good Die
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
DYNAMIC RESPONSE
Small Signal Bandwidth
Gain = 1
Gain = 10
Gain = 100
Gain = 1000
Settling Time to 0.01%
Gain = 1
Gain = 10
Gain = 100
Gain = 1000
Settling Time to 0.001%
Gain = 1
Gain = 10
Gain = 100
Gain = 1000
Slew Rate
−3 dB
10
10
2
MHz
MHz
MHz
MHz
0.2
10 V step
10 V step
0.7
0.4
0.6
5
µs
µs
µs
µs
1
µs
µs
µs
µs
0.6
0.8
6
Gain = 1 to 100
GAIN3
Gain Range
Gain Error
35
V/µs
V/V
Gain = 1 + (9.9 kΩ/RG)
1
10,000
Output voltage (VOUT) = 10 V
Gain = 1
0.05
0.3
%
%
Gain = 10 to 1000
Gain Nonlinearity
Gain = 1
VOUT = −10 V to +10 V
RL ≥ 2 kΩ
RL = 600 Ω
RL ≥ 600 Ω
VOUT = −5 V to +5 V
1
3
50
10
ppm
ppm
ppm
ppm
1
30
5
Gain = 10 to 1000
Gain vs. Temperature3
Gain = 1
Gain > 1
5
−50
ppm/°C
ppm/°C
INPUT
Input Impedance
Differential
Common Mode
Input Operating Voltage Range4
Over Temperature
30||3
30||3
GΩ||pF
GΩ||pF
V
V
V
VS = 2.5 V to 18 V
TA = −40°C
TA = 85°C
−VS + 2.3
−VS + 2.5
−VS + 2.1
+VS − 1.8
+VS − 2.0
+VS − 1.8
OUTPUT
RL = 2 kΩ
Output Swing
VS = 2.5 V to 18 V
TA = −40°C to +85°C
−VS + 1.2
−VS + 1.2
+VS − 1.6
+VS − 1.6
V
V
mA
Over Temperature
Short-Circuit Current
REFERENCE INPUT
Input Reference, RIN
Input Current, IIN
Voltage Range
65
20
20
kΩ
µA
V
V+IN, V−IN = 0 V
24
+VS
−VS
Reference Gain to Output
1
V/V
0.0001
Rev. 0 | Page 4 of 8
Known Good Die
AD8421-KGD
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
POWER SUPPLY
Operating Range
Dual supply
Single supply
2.5
5
18
36
V
V
Quiescent Current
Over Temperature
2
2.3
2.6
mA
mA
TA = −40°C to +85°C
TEMPERATURE RANGE
For Specified Performance
Operational5
−40
−40
+85
+125
°C
°C
1 Total voltage noise = √(eni2 + (eno/Gain)2 + eRG2), where eRG is the external gain resistor noise. See the AD8421 data sheet for more information.
2 Total RTI VOS = (VOSI) + (VOSO/Gain).
3 These specifications do not include the tolerance of the external gain setting resistor, RG. For Gain > 1, add RG errors to the specifications given in this table.
4 Input operating voltage range of the AD8421-KGD input stage only. The input range can depend on the common-mode voltage, differential voltage, gain, and
reference voltage. See the AD8421 data sheet for more details.
5 See the AD8421 data sheet for expected operation between 85°C and 125°C.
Rev. 0 | Page 5 of 8
AD8421-KGD
Known Good Die
ABSOLUTE MAXIMUM RATINGS
Table 2.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Parameter
Rating
Supply Voltage
18 V
Output Short-Circuit Current Duration
Maximum Voltage at −IN or +IN1
Minimum Voltage at −IN or +IN
Maximum Voltage at REF2
Minimum Voltage at REF
Storage Temperature Range
Operating Temperature Range
Maximum Junction Temperature
Electrostatic Discharge (ESD)
Human Body Model
Indefinite
−VS + 40 V
+VS − 40 V
+VS + 0.3 V
−VS − 0.3 V
−65°C to +150°C
−40°C to +125°C
150°C
ESD CAUTION
2 kV
Charged Device Model
Machine Model
1.25 kV
0.2 kV
1 For voltages beyond these limits, use input protection resistors. See the
AD8421 data sheet for more information.
2 There are ESD protection diodes from the reference input to each supply.
Therefore, REF cannot be driven beyond the supplies in the same way that
+IN and −IN can. See the AD8421 data sheet for more information.
Rev. 0 | Page 6 of 8
Known Good Die
AD8421-KGD
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
8
AD8421-KGD
1
2A
2B
3A
7B
7A
3B
4
6
5
TOP VIEW
(Not to Scale)
Figure 2. Pad Configuration
Table 3. Pad Function Descriptions1
Pad No.
1
Mnemonic
−IN
RG
RG
RG
Pad Type
Single
X-Axis (µm)
−548.2
−548.2
−548.2
−548.2
−548.2
−548.2
+566.4
+502
Y-Axis (µm)
+376
+241
+66
−112
−287
−422
−841
−565.8
−359.5
−191.6
+929
Description
Negative Input Pad.
Gain Setting Pad.
Gain Setting Pad.
Gain Setting Pad.
Gain Setting Pad.
Positive Input Pad.
Negative Power Supply Pad.
Reference Voltage Pad.
Output Pad.
2A
2B
3A
3B
4
5
6
7A
7B
8
Double
Double
Double
Double
Single
Single
Double
Single
RG
+IN
−VS
REF
VOUT
VOUT
+VS
+512
+512
+635.8
Double
Single
Output Pad.
Positive Power Supply Pad.
1 To minimize gain errors introduced by the bond wires, use Kelvin connections between the chip and the gain resistor, RG, by connecting Pad 2A and Pad 2B in parallel
to one end of RG and by connecting Pad 3A and Pad 3B in parallel to the other end of RG. For unity-gain applications where RG is not required, Pad 2A and Pad 2B must
be bonded together as well as Pad 3A and Pad 3B.
Rev. 0 | Page 7 of 8
AD8421-KGD
Known Good Die
OUTLINE DIMENSIONS
1.555
0.5482
0.6358
0.512
0.3048
8
0.929
1
2A
2.125
0.376
0.066
0.241
2B
3A
0.1916
0.3595
0.287
7B
7A
0.112
0.422
3B
4
0.5658
0.070 × 0.150
(Pads 2A-3B, Pad 6
and 7B)
6
0.841
5
TOP VIEW
SIDE VIEW
0.070 × 0.070
(Pad 1, 4-5, Pad 7A
and Pad 8)
(CIRCUIT SIDE)
0.502
0.5664
Figure 3. 8-Pad Bare Die [CHIP]
(C-8-15)
Dimensions shown in millimeters
DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS
Table 4. Die Specifications
Parameter
Value
Unit
Scribe Line Width
Die Size
Thickness
90 × 90
1555 × 2125
304.8
μm
μm
μm
Backside
None1
Not applicable
Passivation
Bond Pads (Minimum)
Bond Pad Composition
Doped oxide/silicon (Si)/Nitrogen (N)
70 × 70
1.0 Aluminum (Al)/Si, 0.5 Copper (Cu)
Not applicable
μm
%
1 If connecting the backside to a voltage potential, tie the backside to −VS. Otherwise, leave the backside floating.
Table 5. Assembly Recommendations
Assembly Component
Die Attach
Recommendation
No special requirements
Bonding Method
Bonding Sequence
Gold ball or aluminum wedge
Any
ORDERING GUIDE
Model1
AD8421-KGD-WP
Temperature Range
−40°C to +85°C
Package Description
8-Pad Bare Die [CHIP], Waffle Pack
Package Option
C-8-15
1 The AD8421-KGD-WP is a RoHS compliant part.
©2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D20316-0-9/19(0)
Rev. 0 | Page 8 of 8
相关型号：
©2020 ICPDF网 联系我们和版权申明