AD8542ARMZ-R2 [ADI]
General-Purpose CMOS Rail-to-Rail Amplifiers; 通用CMOS轨到轨放大器型号: | AD8542ARMZ-R2 |
厂家: | ADI |
描述: | General-Purpose CMOS Rail-to-Rail Amplifiers |
文件: | 总20页 (文件大小:453K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
General-Purpose CMOS
Rail-to-Rail Amplifiers
AD8541/AD8542/AD8544
FEATURES
PIN CONFIGURATIONS
Single-supply operation: 2.7 V to 5.5 V
Low supply current: 45 μA/amplifier
Wide bandwidth: 1 MHz
AD8541
V+
OUT A
V–
1
2
5
No phase reversal
Low input currents: 4 pA
Unity gain stable
+IN A
3
–IN A
4
Rail-to-rail input and output
Figure 1. 5-Lead SC70 and 5-Lead SOT-23
(KS and RJ Suffixes)
APPLICATIONS
NC
1
2
8
7
NC
V+
ASIC input or output amplifiers
Sensor interfaces
AD8541
–IN A
Piezoelectric transducer amplifiers
Medical instrumentation
Mobile communications
Audio outputs
OUT A
NC
+IN A
V–
3
4
6
5
NC = NO CONNECT
Figure 2. 8-Lead SOIC
(R Suffix)
Portable systems
GENERAL DESCRIPTION
AD8542
OUT A
8
The AD8541/AD8542/AD8544 are single, dual, and quad rail-
to-rail input and output, single-supply amplifiers featuring very
low supply current and 1 MHz bandwidth. All are guaranteed to
operate from a 2.7 V single supply as well as a 5 V supply. These
parts provide 1 MHz bandwidth at a low current consumption
of 45 μA per amplifier.
1
V+
–IN A
+IN A
V–
2
3
4
7
6
5
OUT B
–IN B
+IN B
Figure 3. 8-Lead SOIC, 8-Lead MSOP, and 8-Lead TSSOP
(R, RM, and RU Suffixes)
Very low input bias currents enable the AD8541/AD8542/AD8544
to be used for integrators, photodiode amplifiers, piezoelectric
sensors, and other applications with high source impedance.
The supply current is only 45 ꢀA per amplifier, ideal for battery
operation.
14
13
12
11
10
9
OUT D
–IN D
OUT A
–IN A
1
2
Rail-to-rail inputs and outputs are useful to designers buffering
ASICs in single-supply systems. The AD8541/AD8542/AD8544
are optimized to maintain high gains at lower supply voltages,
making them useful for active filters and gain stages.
3
4
5
6
7
+IN D
V–
+IN A
V+
AD8544
+IN C
+IN B
–IN B
The AD8541/AD8542/AD8544 are specified over the extended
industrial temperature range (–40°C to +125°C). The AD8541
is available in 5-lead SOT-23, 5-lead SC70, and 8-lead SOIC
packages. The AD8542 is available in 8-lead SOIC, 8-lead MSOP,
and 8-lead TSSOP surface-mount packages. The AD8544 is
available in 14-lead narrow SOIC and 14-lead TSSOP surface-
mount packages. All MSOP, SC70, and SOT versions are available
in tape and reel only.
–IN C
8
OUT C
OUT B
Figure 4. 14-Lead SOIC and 14-Lead TSSOP
(R and RU Suffixes)
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
AD8541/AD8542/AD8544
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Theory of Operation ...................................................................... 13
Notes on the AD854x Amplifiers............................................. 13
Applications..................................................................................... 14
Notch Filter ................................................................................. 14
Comparator Function................................................................ 14
Photodiode Application ............................................................ 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 18
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution.................................................................................. 6
REVISION HISTORY
1/08—Rev. E to Rev. F
8/04—Rev. C to Rev. D
Inserted Figure 21; Renumbered Sequentially.............................. 9
Changes to Figure 22 Caption......................................................... 9
Changes to Notch Filter Section, Figure 35, Figure 36, and
Figure 37 .......................................................................................... 13
Updated Outline Dimensions....................................................... 16
Changes to Ordering Guide.............................................................5
Changes to Figure 3........................................................................ 10
Updated Outline Dimensions....................................................... 12
1/03—Rev. B to Rev. C
Updated Format..................................................................Universal
Changes to General Description .....................................................1
Changes to Ordering Guide.............................................................5
Changes to Outline Dimensions .................................................. 12
1/07—Rev. D to Rev. E
Updated Format..................................................................Universal
Changes to Photodiode Application Section .............................. 14
Changes to Ordering Guide .......................................................... 17
Rev. F | Page 2 of 20
AD8541/AD8542/AD8544
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = 2.7 V, VCM = 1.35 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
1
4
6
7
60
mV
mV
pA
−40°C ≤ TA ≤ +125°C
Input Bias Current
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
100
1000
30
pA
pA
pA
Input Offset Current
IOS
0.1
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
50
500
2.7
pA
pA
V
Input Voltage Range
0
Common-Mode Rejection Ratio
CMRR
AVO
VCM = 0 V to 2.7 V
40
38
100
50
2
45
dB
dB
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ, VO = 0.5 V to 2.2 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Large Signal Voltage Gain
500
V/mV
V/mV
V/mV
μV/°C
fA/°C
fA/°C
fA/°C
Offset Voltage Drift
Bias Current Drift
ΔVOS/ΔT
ΔIB/ΔT
4
100
2000
25
Offset Current Drift
OUTPUT CHARACTERISTICS
Output Voltage High
ΔIOS/ΔT
VOH
VOL
IL = 1 mA
−40°C ≤ TA ≤ +125°C
IL = 1 mA
−40°C ≤ TA ≤ +125°C
VOUT = VS − 1 V
2.575
2.550
2.65
35
V
V
Output Voltage Low
Output Current
100
125
mV
mV
mA
mA
Ω
IOUT
ISC
ZOUT
15
20
50
Closed-Loop Output Impedance
POWER SUPPLY
f = 200 kHz, AV = 1
Power Supply Rejection Ratio
PSRR
ISY
VS = 2.5 V to 6 V
−40°C ≤ TA ≤ +125°C
VO = 0 V
65
60
76
38
dB
dB
μA
μA
Supply Current/Amplifier
55
75
−40°C ≤ TA ≤ +125°C
DYNAMIC PERFORMANCE
Slew Rate
SR
tS
RL = 100 kΩ
0.4
0.75
5
V/μs
μs
Settling Time
To 0.1% (1 V step)
Gain Bandwidth Product
Phase Margin
GBP
980
63
kHz
Degrees
ΦM
NOISE PERFORMANCE
Voltage Noise Density
en
en
in
f = 1 kHz
f = 10 kHz
40
38
<0.1
nV/√Hz
nV/√Hz
pA/√Hz
Current Noise Density
Rev. F | Page 3 of 20
AD8541/AD8542/AD8544
VS = 3.0 V, VCM = 1.5 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ
1
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
6
7
mV
mV
pA
pA
pA
pA
pA
pA
−40°C ≤ TA ≤ +125°C
Input Bias Current
4
60
100
1000
30
50
500
3
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
0.1
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Voltage Range
0
V
Common-Mode Rejection Ratio
CMRR
AVO
VCM = 0 V to 3 V
40
38
100
50
2
45
dB
dB
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ, VO = 0.5 V to 2.2 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Large Signal Voltage Gain
500
V/mV
V/mV
V/mV
ꢀV/°C
fA/°C
fA/°C
fA/°C
Offset Voltage Drift
Bias Current Drift
ΔVOS/ΔT
ΔIB/ΔT
4
100
2000
25
Offset Current Drift
OUTPUT CHARACTERISTICS
Output Voltage High
ΔIOS/ΔT
VOH
IL = 1 mA
−40°C ≤ TA ≤ +125°C
IL = 1 mA
−40°C ≤ TA ≤ +125°C
VOUT = VS − 1 V
2.875
2.850
2.955
32
V
V
Output Voltage Low
Output Current
VOL
100
125
mV
mV
mA
mA
Ω
IOUT
ISC
ZOUT
18
25
50
Closed-Loop Output Impedance
POWER SUPPLY
f = 200 kHz, AV = 1
Power Supply Rejection Ratio
PSRR
ISY
VS = 2.5 V to 6 V
−40°C ≤ TA ≤ +125°C
VO = 0 V
65
60
76
40
dB
dB
μA
μA
Supply Current/Amplifier
60
75
−40°C ≤ TA ≤ +125°C
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
SR
tS
RL = 100 kΩ
To 0.01% (1 V step)
0.4
0.8
5
V/μs
μs
Gain Bandwidth Product
Phase Margin
GBP
ΦM
980
64
kHz
Degrees
NOISE PERFORMANCE
Voltage Noise Density
en
en
in
f = 1 kHz
f = 10 kHz
42
38
<0.1
nV/√Hz
nV/√Hz
pA/√Hz
Current Noise Density
Rev. F | Page 4 of 20
AD8541/AD8542/AD8544
VS = 5.0 V, VCM = 2.5 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
1
4
6
7
mV
mV
pA
pA
pA
pA
pA
pA
−40°C ≤ TA ≤ +125°C
Input Bias Current
60
100
1000
30
50
500
5
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
0.1
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Voltage Range
0
V
Common-Mode Rejection Ratio
CMRR
AVO
VCM = 0 V to 5 V
40
38
20
10
2
48
40
dB
dB
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ, VO = 0.5 V to 2.2 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Large Signal Voltage Gain
V/mV
V/mV
V/mV
ꢀV/°C
fA/°C
fA/°C
fA/°C
Offset Voltage Drift
Bias Current Drift
ΔVOS/ΔT
ΔIB/ΔT
4
100
2000
25
Offset Current Drift
OUTPUT CHARACTERISTICS
Output Voltage High
ΔIOS/ΔT
VOH
VOL
IL = 1 mA
−40°C ≤ TA ≤ +125°C
IL = 1 mA
−40°C ≤ TA ≤ +125°C
VOUT = VS − 1 V
4.9
4.875
4.965
25
V
V
Output Voltage Low
Output Current
100
125
mV
mV
mA
mA
Ω
IOUT
ISC
ZOUT
30
60
45
Closed-Loop Output Impedance
POWER SUPPLY
f = 200 kHz, AV = 1
Power Supply Rejection Ratio
PSRR
ISY
VS = 2.5 V to 6 V
−40°C ≤ TA ≤ +125°C
VO = 0 V
65
60
76
45
dB
dB
μA
μA
Supply Current/Amplifier
65
85
−40°C ≤ TA ≤ +125°C
DYNAMIC PERFORMANCE
Slew Rate
SR
RL = 100 kΩ, CL = 200 pF
1% distortion
To 0.1% (1 V step)
0.45
0.92
70
6
V/μs
kHz
μs
Full Power Bandwidth
Settling Time
BWP
tS
Gain Bandwidth Product
Phase Margin
GBP
ΦM
1000
67
kHz
Degrees
NOISE PERFORMANCE
Voltage Noise Density
en
en
in
f = 1 kHz
f = 10 kHz
42
38
<0.1
nV/√Hz
nV/√Hz
pA/√Hz
Current Noise Density
Rev. F | Page 5 of 20
AD8541/AD8542/AD8544
ABSOLUTE MAXIMUM RATINGS
Table 4.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Parameter
Rating
Supply Voltage (VS)
6 V
Input Voltage
GND to VS
6 V
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
Table 5.
Package Type
Differential Input Voltage1
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
θJA
θJC
126
146
43
45
43
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
5-Lead SC70 (KS)
5-Lead SOT-23 (RJ)
8-Lead SOIC (R)
8-Lead MSOP (RM)
8-Lead TSSOP (RU)
14-Lead SOIC (R)
14-Lead TSSOP (RU)
376
230
158
210
240
120
240
1 For supplies less than 6 V, the differential input voltage is equal to VS.
36
43
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. F | Page 6 of 20
AD8541/AD8542/AD8544
TYPICAL PERFORMANCE CHARACTERISTICS
180
400
V
V
= 5V
S
V
V
= 2.7V AND 5V
S
= 2.5V
160
140
120
100
80
CM
= 25°C
= V /2
S
CM
350
300
250
T
A
200
150
100
60
40
50
0
20
0
–4.5 –3.5 –2.5 –1.5
–0.5
0.5
1.5
2.5
3.5
4.5
–40
–20
0
20
40
60
80
100
120
140
INPUT OFFSET VOLTAGE (mV)
TEMPERATURE (°C)
Figure 5. Input Offset Voltage Distribution
Figure 8. Input Bias Current vs. Temperature
7
6
5
4
3
2
1.0
0.5
V
= 2.7V AND 5V
= V /2
V
V
= 2.7V AND 5V
= V /2
S
S
V
CM
S
CM
S
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
1
0
–3.5
–4.0
–1
–55 –35 –15
5
25
45
65
85
105 125 145
–55 –35 –15
5
25
45
65
85
105 125 145
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 6. Input Offset Voltage vs. Temperature
Figure 9. Input Offset Current vs. Temperature
9
8
7
160
140
120
100
V
V
= 2.7V AND 5V
S
V
T
= 2.7V
= 25°C
S
A
= V /2
S
CM
6
5
80
60
40
20
0
–PSRR
4
3
+PSRR
2
1
0
–20
–40
100
–0.5
0.5
1.5
2.5
3.5
4.5
5.5
1k
10k
100k
1M
10M
COMMON-MODE VOLTAGE (V)
FREQUENCY (Hz)
Figure 7. Input Bias Current vs. Common-Mode Voltage
Figure 10. Power Supply Rejection vs. Frequency
Rev. F | Page 7 of 20
AD8541/AD8542/AD8544
10k
60
50
V
= 2.7V
= 10kΩ
= 25°C
V
T
= 2.7V
= 25°C
S
S
R
T
L
A
1k
100
10
A
+OS
40
30
20
10
0
SOURCE
–OS
SINK
1
0.1
0.01
10
100
1k
10k
0.001
0.01
0.1
1
10
100
CAPACITANCE (pF)
LOAD CURRENT (mA)
Figure 11. Output Voltage to Supply Rail vs. Load Current
Figure 14. Small Signal Overshoot vs. Load Capacitance
3.0
2.5
60
50
40
30
20
V
V
R
= 2.7V
S
V
R
= 2.7V
= 2kΩ
= 25°C
S
= 2.5V p-p
= 2kΩ
IN
L
L
T
A
T
= 25°C
A
2.0
1.5
1.0
0.5
0
+OS
–OS
10
0
1k
10k
100k
1M
10M
10
100
1k
10k
FREQUENCY (Hz)
CAPACITANCE (pF)
Figure 15. Small Signal Overshoot vs. Load Capacitance
Figure 12. Closed-Loop Output Voltage Swing vs. Frequency
60
50
40
30
20
V
= 2.7V
S
R
T
=
L
∞
= 25°C
V
= 2.7V
= 100kΩ
= 300pF
= 1
A
S
R
C
A
L
L
+OS
–OS
V
A
T
= 25°C
1.35V
10
0
10
100
1k
10k
50mV
10µs
CAPACITANCE (pF)
Figure 16. Small Signal Transient Response
Figure 13. Small Signal Overshoot vs. Load Capacitance
Rev. F | Page 8 of 20
AD8541/AD8542/AD8544
90
80
70
60
50
40
V
= 2.7V
= 2kΩ
= 1
S
V
T
= 5V
= 25°C
S
A
R
A
L
V
A
T
= 25°C
1.35V
30
20
10
0
500mV
10µs
–10
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 17. Large Signal Transient Response
Figure 20. Common-Mode Rejection vs. Frequency
5
4
3
2
1
0
V
= 2.7V
= NO LOAD
= 25°C
S
V
= 5V
= NO LOAD
= 25°C
S
R
T
L
R
T
L
A
A
80
45
60
40
20
0
90
135
180
–1
–2
–3
–4
–5
1k
10k
100k
1M
10M
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
FREQUENCY (Hz)
COMMON-MODE VOLTAGE (V)
Figure 18. Open-Loop Gain and Phase vs. Frequency
Figure 21. Input Offset Voltage vs. Common-Mode Voltage
10k
1k
160
140
V
T
= 5V
= 25°C
V
T
= 5V
= 25°C
S
S
A
A
120
100
80
100
10
–PSRR
+PSRR
SOURCE
60
40
SINK
1
20
0
0.1
0.01
–20
–40
100
1k
10k
100k
1M
10M
0.001
0.01
0.1
1
10
100
FREQUENCY (Hz)
LOAD CURRENT (mA)
Figure 19. Power Supply Rejection Ratio vs. Frequency
Figure 22. Output Voltage to Supply Rail vs. Load Current
Rev. F | Page 9 of 20
AD8541/AD8542/AD8544
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
60
50
40
30
20
10
0
V
V
R
= 5V
V
= 5V
= 2kΩ
= 25°C
S
S
= 4.9V p-p
= NO LOAD
= 25°C
R
T
IN
L
L
A
T
A
+OS
–OS
10
100
1k
10k
1k
10k
100k
1M
10M
CAPACITANCE (pF)
FREQUENCY (Hz)
Figure 23. Closed-Loop Output Voltage Swing vs. Frequency,
Figure 26. Small Signal Overshoot vs. Load Capacitance
5.0
4.5
4.0
3.5
3.0
2.5
2.0
60
50
V
V
R
= 5V
S
V
R
= 5V
S
= 4.9V p-p
= 2kΩ
IN
=
L
∞
L
T
= 25°C
A
T
= 25°C
A
40
30
20
10
0
+OS
–OS
1.5
1.0
0.5
0
1k
10k
100k
1M
10M
10
100
1k
10k
FREQUENCY (Hz)
CAPACITANCE (pF)
Figure 24. Closed-Loop Output Voltage Swing vs. Frequency
Figure 27. Small Signal Overshoot vs. Load Capacitance
60
50
40
30
20
10
0
V
= 5V
V
= 5V
= 10kΩ
= 25°C
S
S
R
C
A
= 100kΩ
= 300pF
= 1
R
T
L
L
L
A
V
A
T
= 25°C
+OS
2.5V
–OS
50mV
10µs
10
100
1k
10k
CAPACITANCE (pF)
Figure 25. Small Signal Overshoot vs. Load Capacitance
Figure 28. Small Signal Transient Response
Rev. F | Page 10 of 20
AD8541/AD8542/AD8544
V
= 5V
V
= 5V
S
S
R
A
T
= 10kΩ
= 1
= 25°C
R
A
T
= 2kΩ
= 1
= 25°C
L
V
L
V
V
IN
A
A
V
OUT
2.5V
2.5V
1V
10µs
1V
20µs
Figure 29. Large Signal Transient Response
Figure 31. No Phase Reversal
60
50
40
30
20
10
0
V
R
= 5V
= NO LOAD
= 25°C
S
T
= 25°C
A
L
T
A
80
60
45
40
20
0
90
135
180
1k
10k
100k
1M
10M
0
1
2
3
4
5
6
FREQUENCY (Hz)
SUPPLY VOLTAGE (V)
Figure 30. Open-Loop Gain and Phase vs. Frequency
Figure 32. Supply Current per Amplifier vs. Supply Voltage
Rev. F | Page 11 of 20
AD8541/AD8542/AD8544
55
V
= 5V
S
MARKER SET @ 10kHz
MARKER READING: 37.6nV/ Hz
50
T
= 25°C
V
= 5V
A
S
45
40
35
30
25
20
V
= 2.7V
S
0
5
10
15
20
25
–55 –35 –15
5
25
45
65
85
105 125 145
FREQUENCY (kHz)
TEMPERATURE (°C)
Figure 35. Voltage Noise
Figure 33. Supply Current per Amplifier vs. Temperature
1000
900
V
= 2.7V AND 5V
= 1
= 25°C
S
A
V
A
T
800
700
600
500
400
300
200
100
0
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 34. Closed-Loop Output Impedance vs. Frequency
Rev. F | Page 12 of 20
AD8541/AD8542/AD8544
THEORY OF OPERATION
Higher Output Current
NOTES ON THE AD854X AMPLIFIERS
At 5 V single supply, the short-circuit current is typically 60 μA.
Even 1 V from the supply rail, the AD854x amplifiers can provide a
30 mA output current, sourcing, or sinking.
The AD8541/AD8542/AD8544 amplifiers are improved
performance, general-purpose operational amplifiers.
Performance has been improved over previous amplifiers in
several ways, including lower supply current for 1 MHz gain
bandwidth, higher output current, and better performance at
lower voltages.
Sourcing and sinking are strong at lower voltages, with 15 mA
available at 2.7 V and 18 mA at 3.0 V. For even higher output
currents, see the AD8531/AD8532/AD8534 parts for output
currents to 250 mA. Information on these parts is available
from your Analog Devices, Inc. representative, and data sheets
are available at www.analog.com.
Lower Supply Current for 1 MHz Gain Bandwidth
The AD854x series typically uses 45 μA of current per amplifier,
which is much less than the 200 μA to 700 μA used in earlier
generation parts with similar performance. This makes the
AD854x series a good choice for upgrading portable designs
for longer battery life. Alternatively, additional functions and
performance can be added at the same current drain.
Better Performance at Lower Voltages
The AD854x family of parts was designed to provide better ac
performance at 3.0 V and 2.7 V than previously available parts.
Typical gain bandwidth product is close to 1 MHz at 2.7 V.
Voltage gain at 2.7 V and 3.0 V is typically 500,000. Phase
margin is typically over 60°C, making the part easy to use.
Rev. F | Page 13 of 20
AD8541/AD8542/AD8544
APPLICATIONS
Figure 38 is an example of the AD8544 in a notch filter circuit. The
frequency dependent negative resistance (FDNR) notch filter has
fewer critical matching requirements than the twin-T notch, where
as the Q of the FDNR is directly proportional to a single resistor R1.
Although matching component values is still important, it is also
much easier and/or less expensive to accomplish in the FDNR
circuit. For example, the twin-T notch uses three capacitors
with two unique values, whereas the FDNR circuit uses only
two capacitors, which may be of the same value. U3 is simply a
buffer that is added to lower the output impedance of the circuit.
NOTCH FILTER
The AD854x have very high open-loop gain (especially with a
supply voltage below 4 V), which makes it useful for active filters of
all types. For example, Figure 36 illustrates the AD8542 in the
classic twin-T notch filter design. The twin-T notch is desired
for simplicity, low output impedance, and minimal use of op
amps. In fact, this notch filter can be designed with only one op
amp if Q adjustment is not required. Simply remove U2 as
illustrated in Figure 37. However, a major drawback to this
circuit topology is ensuring that all the Rs and Cs closely match.
The components must closely match or notch frequency offset
and drift causes the circuit to no longer attenuate at the ideal
notch frequency. To achieve desired performance, 1% or better
component tolerances or special component screens are usually
required. One method to desensitize the circuit-to-component
mismatch is to increase R2 with respect to R1, which lowers Q.
A lower Q increases attenuation over a wider frequency range
but reduces attenuation at the peak notch frequency.
1/4 AD8544
R1
9
Q ADJUST
8
VOUT
U3
200Ω
10
C1
1µF
VIN
2.5V
REF
R
2.61kΩ
4
1/4 AD8544
3
2
C2
1µF
1
1/4 AD8544
U1
6
11
7
U2
R
5
2.61kΩ
5.0V
R
R
R
8
100kΩ
100kΩ
3
2
2.61kΩ
1/2 AD8542
1
f =
VOUT
U1
2π LC1
VIN
2.5V
2C
53.6µF
1
1/4 AD8544
R
13
4
2
L = R C2
2.61kΩ
14
U4
NC
12
REF
R/2
50kΩ
2.5V
REF
VIN
2.5V
R2
2.5kΩ
REF
C
C
1/2 AD8542
26.7nF
26.7nF
5
6
Figure 38. FDNR 60 Hz Notch Filter with Output Buffer
1
7
f0
f0
=
=
U2
2πRC
COMPARATOR FUNCTION
R1
97.5kΩ
1
R1
R1 + R2
A comparator function is a common application for a spare op
amp in a quad package. Figure 39 illustrates ¼ of the AD8544 as a
comparator in a standard overload detection application. Unlike
many op amps, the AD854x family can double as comparators
because this op amp family has a rail-to-rail differential input
range, rail-to-rail output, and a great speed vs. power ratio.
R2 is used to introduce hysteresis. The AD854x, when used as
comparators, have 5 μs propagation delay at 5 V and 5 μs
overload recovery time.
4
1 –
2.5V
REF
Figure 36. 60 Hz Twin-T Notch Filter, Q = 10
5.0V
7
R
R
3
2
AD8541
VOUT
U1
6
VIN
2.5V
4
2C
REF
R2
1MΩ
R1
1kΩ
R/2
VOUT
VIN
2.5V
C
C
1/4 AD8541
Figure 37. 60 Hz Twin-T Notch Filter, Q = ∞ (Ideal)
2.5V
DC
REF
Figure 39. AD854x Comparator Application—Overload Detector
Rev. F | Page 14 of 20
AD8541/AD8542/AD8544
C
100pF
PHOTODIODE APPLICATION
The AD854x family has very high impedance with an input bias
current typically around 4 pA. This characteristic allows the
AD854x op amps to be used in photodiode applications and
other applications that require high input impedance. Note that
the AD854x has significant voltage offset that can be removed
by capacitive coupling or software calibration.
R
10MΩ
V+
OR
7
2
6
VOUT
3
4 AD8541
D
Figure 40 illustrates a photodiode or current measurement
application. The feedback resistor is limited to 10 MΩ to avoid
excessive output offset. In addition, a resistor is not needed on
the noninverting input to cancel bias current offset because the
bias current-related output offset is not significant when compared
to the voltage offset contribution. For best performance, follow the
standard high impedance layout techniques, which include the
following:
2.5V
2.5V
REF
REF
Figure 40. High Input Impedance Application—Photodiode Amplifier
•
•
•
Shielding the circuit.
Cleaning the circuit board.
Putting a trace connected to the noninverting input around
the inverting input.
•
Using separate analog and digital power supplies.
Rev. F | Page 15 of 20
AD8541/AD8542/AD8544
OUTLINE DIMENSIONS
5.10
5.00
4.90
2.90 BSC
5
4
2.80 BSC
14
8
7
1.60 BSC
4.50
4.40
4.30
1
2
3
6.40
BSC
PIN 1
0.95 BSC
1
1.90
BSC
1.30
1.15
0.90
PIN 1
0.65
BSC
1.05
1.00
0.80
0.20
0.09
1.45 MAX
0.22
0.08
1.20
MAX
0.75
0.60
0.45
8°
0°
0.15
0.05
10°
5°
0°
0.30
0.19
0.15 MAX
SEATING
PLANE
0.50
0.30
0.60
0.45
0.30
COPLANARITY
0.10
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 41. 5-Lead Small Outline Transistor Package [SOT-23]
Figure 42. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
(RJ-5)
Dimensions shown in millimeters
Dimensions shown in millimeters
8.75 (0.3445)
8.55 (0.3366)
2.20
2.00
1.80
8
7
14
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.35
1.25
1.15
2.40
2.10
1.80
5
1
4
3
2
PIN 1
1.00
0.90
0.70
1.27 (0.0500)
0.50 (0.0197)
0.25 (0.0098)
0.65 BSC
45°
BSC
0.40
0.10
1.75 (0.0689)
1.35 (0.0531)
1.10
0.80
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
0.46
0.36
0.26
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.30
0.15
0.22
0.08
0.10 M
AX
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MS-012-AB
COMPLIANT TO JEDEC STANDARDS MO-203-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 43. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
Figure 44. 14-Lead Standard Small Outline Package [SOIC_N]
(KS-5)
Narrow Body
(R-14)
Dimensions shown in millimeters
Dimensions shown in millimeters and (inches)
Rev. F | Page 16 of 20
AD8541/AD8542/AD8544
3.20
3.00
2.80
3.10
3.00
2.90
8
5
4
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
4.50
4.40
4.30
6.40 BSC
1
PIN 1
0.65 BSC
PIN 1
0.95
0.85
0.75
0.65 BSC
1.10 MAX
0.15
0.05
1.20
0.80
0.60
0.40
MAX
8°
0°
0.15
0.00
8°
0°
0.38
0.22
0.23
0.08
0.75
0.60
0.45
0.30
SEATING
PLANE
COPLANARITY
0.10
0.20
0.09
0.19
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AA
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 45. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Figure 46. 8-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-8)
Dimensions shown in millimeters
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
45°
1.27 (0.0500)
BSC
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0099)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
1.27 (0.0500)
0.10
0.25 (0.0098)
0.40 (0.0157)
SEATING
0.17 (0.0067)
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 47. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Rev. F | Page 17 of 20
AD8541/AD8542/AD8544
ORDERING GUIDE
Model
Temperature Range
Package Description
5-Lead SC70
5-Lead SC70
5-Lead SC70
5-Lead SC70
Package Option
KS-5
KS-5
KS-5
KS-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
R-8
R-8
R-8
R-8
R-8
R-8
Branding
A4B
A4B
A12
A12
A4A
A4A
A4A
AD8541AKS-R2
AD8541AKS-REEL7
AD8541AKSZ-R21
AD8541AKSZ-REEL71
AD8541ART-R2
AD8541ART-REEL
AD8541ART-REEL7
AD8541ARTZ-R21
AD8541ARTZ-REEL1
AD8541ARTZ-REEL71
AD8541AR
AD8541AR-REEL
AD8541AR-REEL7
AD8541ARZ1
AD8541ARZ-REEL1
AD8541ARZ-REEL71
AD8542AR
AD8542AR-REEL
AD8542AR-REEL7
AD8542ARZ1
AD8542ARZ-REEL1
AD8542ARZ-REEL71
AD8542ARM-R2
AD8542ARM-REEL
AD8542ARMZ-R21
AD8542ARMZ-REEL1
AD8542ARU
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead TSSOP
8-Lead TSSOP
8-Lead TSSOP
8-Lead TSSOP
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead TSSOP
14-Lead TSSOP
14-Lead TSSOP
14-Lead TSSOP
A4A#
A4A#
A4A#
R-8
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
RU-8
RU-8
RU-8
RU-8
R-14
R-14
R-14
R-14
R-14
R-14
RU-14
RU-14
RU-14
RU-14
AVA
AVA
AVA#
AVA#
AD8542ARU-REEL
AD8542ARUZ1
AD8542ARUZ-REEL1
AD8544AR
AD8544AR-REEL
AD8544AR-REEL7
AD8544ARZ1
AD8544ARZ-REEL1
AD8544ARZ-REEL71
AD8544ARU
AD8544ARU-REEL
AD8544ARUZ1
AD8544ARUZ-REEL1
1 Z = RoHS Compliant Part; # denotes RoHS compliant product may be top or bottom marked.
Rev. F | Page 18 of 20
AD8541/AD8542/AD8544
NOTES
Rev. F | Page 19 of 20
AD8541/AD8542/AD8544
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00935-0-1/08(F)
Rev. F | Page 20 of 20
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