AD8639ARMZ-R7_技术文档

16 V Auto-Zero, Rail-to-Rail Output

Operational Amplifiers

AD8638/AD8639

PIN CONFIGURATIONS

FEATURES

Low offset voltage: 9 μV maximum

Offset drift: 0.04 μV/°C maximum

Rail-to-rail output swing

5 V to 16 V single-supply or 2.5 V to 8 V dual-supply

operation

OUT

V–

1

2

3

5

V+

AD8638

TOP VIEW

(Not to Scale)

+IN

4

–IN

Figure 1. 5-Lead SOT-23 (RJ-5)

High gain: 136 dB typical

High CMRR: 133 dB typical

High PSRR: 143 dB typical

Very low input bias current: 40 pA maximum

Low supply current: 1.3 mA maximum

AD8639: qualified for automotive applications

NC

–IN

+IN

V–

1

2

3

4

8

7

6

5

NC

V+

AD8638

OUT

NC

TOP VIEW

(Not to Scale)

NC = NO CONNECT

APPLICATIONS

Figure 2. 8-Lead SOIC_N (R-8)

Pressure and position sensors

Strain gage amplifiers

Medical instrumentation

Thermocouple amplifiers

Automotive sensors

OUT A

–IN A

+IN A

V–

1

2

3

4

8

7

6

5

V+

AD8639

OUT B

–IN B

+IN B

TOP VIEW

(Not to Scale)

Figure 3. 8-Lead MSOP (RM-8)

8-Lead SOIC_N (R-8)

Precision references

Precision current sensing

PIN 1

INDICATOR

OUT A

–IN A

+IN A

v–

1

2

3

4

8

7

6

5

V+

GENERAL DESCRIPTION

OUT B

–IN B

+IN B

AD8639

TOP VIEW

(Not to Scale)

The AD8638/AD8639 are single and dual wide bandwidth,

auto-zero amplifiers featuring rail-to-rail output swing and low

noise. These amplifiers have very low offset, drift, and bias

current. Operation is fully specified from 5 V to 16 V single

supply ( 2.5 V to 8 V dual supply).

NOTES

1. PIN 4 AND THE EXPOSED PAD

MUST BE CONNECTED TO V–.

Figure 4. 8-Lead LFCSP_WD (CP-8-5)

The AD8638/AD8639 provide benefits previously found only

in expensive zero-drift or chopper-stabilized amplifiers. Using

the Analog Devices, Inc., topology, these auto-zero amplifiers

combine low cost with high accuracy and low noise. No exter-

nal capacitors are required. In addition, the AD8638/AD8639

greatly reduce the digital switching noise found in most chopper-

stabilized amplifiers.

The AD8638/AD8639 are specified for the extended industrial

temperature range (−40°C to +125°C). The single AD8638 is

available in tiny 5-lead SOT-23 and 8-lead SOIC packages.

The dual AD8639 is available in 8-lead MSOP, 8-lead SOIC, and

8-lead LFCSP packages. See the Ordering Guide for automotive

grades.

With a typical offset voltage of only 3 μV, drift of 0.01 μV/°C,

and noise of 1.2 μV p-p (0.1 Hz to 10 Hz), the AD8638/AD8639

are suited for applications in which error sources cannot be

tolerated. Position and pressure sensors, medical equipment,

and strain gage amplifiers benefit greatly from nearly zero drift

over their operating temperature ranges. Many systems can take

advantage of the rail-to-rail output swing provided by the

AD8638/AD8639 to maximize signal-to-noise ratio (SNR).

The AD8638/AD8639 are members of a growing series of auto-

zero op amps offered by Analog Devices (see Table 1).

Table 1. Auto-Zero Op Amps

Supply 2.7 V to 5 V 2.7 V to 5 V Low Power

5 V to 16 V

AD8638

AD8639

Single

Dual

AD8628

AD8629

AD8630

AD8538

AD8539

Quad

Rev. F

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

AD8638/AD8639

TABLE OF CONTENTS

Features .............................................................................................. 1

Theory of Operation ...................................................................... 14

1/f Noise....................................................................................... 14

Input Voltage Range................................................................... 14

Output Phase Reversal............................................................... 14

Overload Recovery Time .......................................................... 14

Infrared Sensors.......................................................................... 15

Precision Current Shunt Sensor ............................................... 15

Output Amplifier for High Precision DACs........................... 15

Outline Dimensions....................................................................... 16

Ordering Guide .......................................................................... 18

Automotive Products................................................................. 18

Applications....................................................................................... 1

General Description......................................................................... 1

Pin Configurations ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics—5 V Operation................................ 3

Electrical Characteristics—16 V Operation ............................. 4

Absolute Maximum Ratings............................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution.................................................................................. 5

Typical Performance Characteristics ............................................. 6

REVISION HISTORY

6/10—Rev. E to Rev. F

4/08—Rev. A to Rev. B

Added AD8639 ...................................................................Universal

Added 8-lead MSOP Package ...........................................Universal

Changes to Features ..........................................................................1

Changes to General Description .....................................................1

Changes Table 2 .................................................................................3

Changes to Table 3.............................................................................4

Changes to Table 4, Added Endnote 1 and Endnote 2.................5

Changes to Figure 4 through Figure 9............................................6

Changes to Figure 11, Figure 12, Figure 14, and Figure 15..........7

Changes to Figure 16 through Figure 27........................................8

Changes to Figure 28 through Figure 33..................................... 10

Changes to Figure 34 through Figure 39..................................... 11

Changes to Figure 41 and Figure 44............................................. 12

Inserted Figure 46, Figure 47, Figure 49, and Figure 50;

Changes to Features Section and General Description Section. 1

Updated Outline Dimensions....................................................... 16

Changes to Ordering Guide .......................................................... 18

Added Automotive Products Section .......................................... 18

6/09—Rev. D to Rev. E

Changes to Figure 4.......................................................................... 1

Changes to Endnote 1 and Endnote 2, Table 4............................. 5

Changes to Input Voltage Range Section .................................... 14

Updated Outline Dimensions....................................................... 16

Changes to Ordering Guide .......................................................... 18

12/08—Rev. C to Rev. D

Changes to Endnote 1, Table 4........................................................ 5

Changes to Ordering Guide .......................................................... 28

Renumbered Sequentially ............................................................. 13

Changes to Figure 51, Figure 52, and Figure 53......................... 15

Updated Outline Dimensions....................................................... 16

Changes to Ordering Guide.......................................................... 17

5/08—Rev. B to Rev. C

Added LFCSP_WD Package .............................................Universal

Inserted Figure 4; Renumbered Sequentially................................ 1

Changes to Layout ............................................................................ 1

Changes to General Description .................................................... 1

Changes to Offset Voltage Drift for All Packages Except SOT-23

Parameter in Table 2......................................................................... 3

Changes to Table 5............................................................................ 5

Updated Outline Dimensions....................................................... 16

Changes to Ordering Guide .......................................................... 17

11/07—Rev. 0 to Rev. A

Change to Large Signal Voltage Gain Specification......................4

11/07—Revision 0: Initial Version

Rev. F | Page 2 of 20

AD8638/AD8639

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V OPERATION

V_SY= 5 V, V_CM= V_SY/2, T_A= 25°C, unless otherwise noted.

Table 2.

Parameter

Symbol Conditions

Min

Typ

3

Max

Unit

INPUT CHARACTERISTICS

Offset Voltage

V_OS

9

23

9

μV

pA

V

dB

μV/°C

−40°C ≤ T_A≤ +125°C

−0.1 V ≤ V_CM≤ +3.0 V

−40°C ≤ T_A≤ +125°C

3

23

40

105

40

60

+3

Input Bias Current

I_B

1.5

7

45

7

16.5

−40°C ≤ T_A≤ +85°C

−40°C ≤ T_A≤ +125°C

Input Offset Current

I_OS

−40°C ≤ T_A≤ +85°C

−40°C ≤ T_A≤ +125°C

V_CM= 0 V to 3 V

−40°C ≤ T_A≤ +125°C

R_L= 10 kΩ, V_O= 0.5 V to 4.5 V

−40°C ≤ T_A≤ +125°C

Input Voltage Range

Common-Mode Rejection Ratio

−0.1

118

120

119

CMRR

A_VO

133

136

0.01

Large Signal Voltage Gain

Offset Voltage Drift for All Packages

Except SOT-23

Offset Voltage Drift for SOT-23

Input Resistance

Input Capacitance, Differential Mode

Input Capacitance, Common Mode

OUTPUT CHARACTERISTICS

Output Voltage High

∆V_OS/∆T −40°C ≤ T_A≤ +125°C

0.06

0.15

∆V_OS/∆T −40°C ≤ T_A≤ +125°C

R_IN

C_INDM

C_INCM

0.04

22.5

4

μV/°C

TΩ

pF

1.7

pF

V_OH

R_L= 10 kΩ to V_CM

−40°C ≤ T_A≤ +125°C

R_L= 2 kΩ to V_CM

4.97

4.90

4.86

4.985

4.93

7.5

V

mV

mA

Ω

−40°C ≤ T_A≤ +125°C

R_L= 10 kΩ to V_CM

−40°C ≤ T_A≤ +125°C

R_L= 2 kΩ to V_CM

Output Voltage Low

V_OL

10

15

40

55

32

−40°C ≤ T_A≤ +125°C

T_A= 25°C

Short-Circuit Current

Closed-Loop Output Impedance

POWER SUPPLY

I_SC

19

4.2

Z_OUT

f = 100 kHz, A_V= 1

Power Supply Rejection Ratio

PSRR

I_SY

V_SY= 4.5 V to 16 V

−40°C ≤ T_A≤ +125°C

I_O= 0 mA

127

125

143

1.0

dB

mA

Supply Current per Amplifier

1.3

1.5

−40°C ≤ T_A≤ +125°C

DYNAMIC PERFORMANCE

Slew Rate

Settling Time to 0.1%

Overload Recovery Time

Gain Bandwidth Product

Phase Margin

SR

t_S

R_L= 10 kΩ, C_L= 20 pF, A_V= 1

V_IN= 2 V step, C_L= 20 pF, R_L= 1 kΩ, A_V= 1

2.5

3

50

1.35

70

V/μs

μs

MHz

Degrees

GBP

Φ_M

R_L= 2 kΩ, C_L= 20 pF, A_V= 1

NOISE PERFORMANCE

Voltage Noise

Voltage Noise Density

e_np-p

e_n

0.1 Hz to 10 Hz

f = 1 kHz

1.2

60

μV p-p

nV/√Hz

Rev. F | Page 3 of 20

AD8638/AD8639

ELECTRICAL CHARACTERISTICS—16 V OPERATION

V_SY= 16 V, V_CM= V_SY/2, T_A= 25°C, unless otherwise noted.

Table 3.

Parameter

Symbol Conditions

Min

Typ

3

Max

Unit

INPUT CHARACTERISTICS

Offset Voltage

V_OS

9

23

9

μV

pA

V

dB

μV/°C

−40°C ≤ T_A≤ +125°C

−0.1 V ≤ V_CM≤ +14 V

−40°C ≤ T_A≤ +125°C

3

23

75

250

70

75

150

+14

Input Bias Current

I_B

1

4

85

20

50

−40°C ≤ T_A≤ +85°C

−40°C ≤ T_A≤ +125°C

Input Offset Current

I_OS

−40°C ≤ T_A≤ +85°C

−40°C ≤ T_A≤ +125°C

V_CM= 0 V to 14 V

−40°C ≤ T_A≤ +125°C

R_L= 10 kΩ, V_O= 0.5 V to 15.5 V

−40°C ≤ T_A≤ +125°C

Input Voltage Range

Common-Mode Rejection Ratio

−0.1

127

130

CMRR

A_VO

142

147

0.03

Large Signal Voltage Gain

Offset Voltage Drift for All Packages

Except SOT-23

Offset Voltage Drift for SOT-23

Input Resistance

∆V_OS/∆T −40°C ≤ T_A≤ +125°C

0.06

0.15

∆V_OS/∆T −40°C ≤ T_A≤ +125°C

R_IN

0.04

22.5

4

μV/°C

TΩ

pF

Input Capacitance, Differential Mode C_INDM

Input Capacitance, Common Mode

OUTPUT CHARACTERISTICS

Output Voltage High

C_INCM

V_OH

1.7

pF

R_L= 10 kΩ to V_CM

−40°C ≤ T_A≤ +125°C

R_L= 2 kΩ to V_CM

−40°C ≤ T_A≤ +125°C

R_L= 10 kΩ to V_CM

−40°C ≤ T_A≤ +125°C

R_L= 2 kΩ to V_CM

−40°C ≤ T_A≤ +125°C

T_A= 25°C

f = 100 kHz, A_V= 1

15.94

15.93

15.77

15.70

15.96

15.82

30

V

mV

mA

Ω

Output Voltage Low

V_OL

40

60

140

200

120

Short-Circuit Current

Closed-Loop Output Impedance

POWER SUPPLY

I_SC

Z_OUT

37

3.0

Power Supply Rejection Ratio

PSRR

I_SY

V_SY= 4.5 V to 16 V

−40°C ≤ T_A≤ +125°C

I_O= 0 mA

127

125

143

dB

mA

Supply Current per Amplifier

1.25

1.5

1.7

−40°C ≤ T_A≤ +125°C

DYNAMIC PERFORMANCE

Slew Rate

Settling Time to 0.1%

Overload Recovery Time

Gain Bandwidth Product

Phase Margin

SR

t_S

R_L= 10 kΩ, C_L= 20 pF, A_V= 1

V_IN= 4 V step, C_L= 20 pF, R_L= 1 kΩ, A_V= 1

2

4

50

1.5

74

V/μs

μs

MHz

Degrees

GBP

Φ_M

R_L= 2 kΩ, C_L= 20 pF, A_V= 1

NOISE PERFORMANCE

Voltage Noise

Voltage Noise Density

e_np-p

e_n

0.1 Hz to 10 Hz

f = 1 kHz

1.2

60

μV p-p

nV/√Hz

Rev. F | Page 4 of 20

AD8638/AD8639

ABSOLUTE MAXIMUM RATINGS

Table 4.

THERMAL RESISTANCE

Table 5. Thermal Resistance

Package Type

Parameter

Rating

1

Supply Voltage

Input Voltage

Input Current¹

Differential Input Voltage²

Output Short-Circuit Duration to GND Indefinite

16 V

θ_JA

θ_JC

146

43

44

18

Unit

°C/W

GND − 0.3 V to V_SY++ 0.3 V

10 mA

V_SY

5-Lead SOT-23 (RJ-5)

8-Lead SOIC_N (R-8)

8-Lead MSOP (RM-8)

8-Lead LFCSP_WD (CP-8-5)²

230

158

206

75

Storage Temperature Range

Operating Temperature Range

Junction Temperature Range

−65°C to +150°C

−40°C to +125°C

−65°C to +150°C

¹θ_JAis specified for the worst-case conditions, that is, a device soldered in a

circuit board for surface-mount packages. This was measured using a

standard two-layer board.

²Exposed pad is soldered to the application board.

Lead Temperature (Soldering, 60 sec) 300°C

¹Input pins have clamp diodes to the supply pins. Input current should be

limited to 10 mA or less whenever input signals exceed either power supply

rail by 0.3 V.

ESD CAUTION

²Inputs are protected against high differential voltages by internal 1 kΩ series

resistors and back-to-back diode-connected N-MOSFETs (with a typical V_Tof

1.25 V for V_CMof 0 V).

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

Rev. F | Page 5 of 20

AD8638/AD8639

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C, unless otherwise noted.

1400

6000

5000

4000

3000

2000

1000

0

V

= 5V

SY

0V ≤ V

V

= 16V

SY

0V ≤ V

≤ +3V

CM

≤ +14V

CM

1200

1000

800

600

400

200

0

–10

–5

0

5

10

–10

–5

0

5

10

V

(µV)

V

(µV)

OS

Figure 5. Input Offset Voltage Distribution

Figure 8. Input Offset Voltage Distribution

25

20

15

10

12

10

8

V

= ±2.5V

SY

V

= ±8V

SY

–40°C ≤ T ≤ +125°C

SOIC PACKAGE

A

–40°C ≤ T ≤ +125°C

SOIC PACKAGE

A

6

4

5

0

2

0

4

8

12

16

20

24

28

32

36

40

0

4

8

12

16

TCV

20

24

28

32

36

40

TCV (nV/°C)

(nV/°C)

OS

Figure 6. Input Offset Voltage Drift Distribution

Figure 9. Input Offset Voltage Drift Distribution

10.0

7.5

5.0

2.5

0

10.0

7.5

5.0

2.5

0

V

= 5V

SY

–0.5V ≤ V

≤ +3.9V

CM

–2.5

–5.0

–2.5

–5.0

V

= 16V

SY

–0.5V ≤ V

–7.5

≤ +14.5V

CM

–10.0

–0.5

0

0.5

1

1.5

2.0

(V)

2.5

3.0

3.5

4

1.0

2.5

4.0

5.5

7.0

(V)

8.5 10.0 11.5 13.0 14.5

–0.5

V

CM

V

CM

Figure 7. Input Offset Voltage vs. Common-Mode Voltage

Figure 10. Input Offset Voltage vs. Common-Mode Voltage

Rev. F | Page 6 of 20

AD8638/AD8639

T_A= 25°C, unless otherwise noted.

100

10

V

= ±2.5V

V

= ±8V

SY

10

1

0.1

0.01

0.1

25

50

75

100

125

25

50

75

100

125

100

125

TEMPERATURE (°C)

Figure 11. Input Bias Current vs. Temperature

Figure 14. Input Bias Current vs. Temperature

10k

1k

100

10

1

V

= ±8V

SY

V

= ±2.5V

SY

1k

V

– V

OH

100

DD

V

– V

OH

DD

V

– V

SS

10

1

OL

V

– V

SS

OL

0.1

0.001

0.01

0.1

1

10

100

0.001

0.01

0.1

1

10

LOAD CURRENT (mA)

Figure 12. Output Voltage to Supply Rail vs. Load Current

Figure 15. Output Voltage to Supply Rail vs. Load Current

120

100

80

60

40

20

0

250

200

150

100

50

V

R

= 5V

V

R

= 16V

SY

= 2kΩ

SY

= 2kΩ

L

V

– V

OH

DD

V

– V

OH

DD

V

OL

V

OL

0

–40

–25

0

25

50

75

100

125

–25

0

25

50

75

100

TEMPERATURE (°C)

Figure 13. Output Voltage to Supply Rail vs. Temperature

Figure 16. Output Voltage to Supply Rail vs. Temperature

Rev. F | Page 7 of 20

AD8638/AD8639

T_A= 25°C, unless otherwise noted.

120

100

80

120

100

80

120

100

80

100

80

PHASE

60

40

GAIN

C

= 20pF

C = 20pF

L

20

L

0

–20

–40

–60

–80

–100

–120

–20

–40

–60

–80

–100

–120

–20

–40

–60

–80

–100

–120

–20

–40

–60

–80

–100

–120

C

= 200pF

C = 200pF

L

V

R

= ±8V

= 2kꢀ

V

R

= ±2.5V

= 2kΩ

SY

L

1k

10k

100k

1M

10M

1k

10k

100k

1M

10M

FREQUENCY (Hz)

Figure 17. Open-Loop Gain and Phase vs. Frequency

Figure 20. Open-Loop Gain and Phase vs. Frequency

60

40

20

0

V

R

C

= ±2.5V

= 2kΩ

= 20pF

V

= ±8V

SY

R

C

= 2kꢀ

= 20pF

L

A

= +100

= +10

= +1

A

= +100

= +10

= +1

V

40

20

0

–20

–40

–20

–40

10k

100k

1M

1k

10M

1k

10k

100k

1M

10M

FREQUENCY (Hz)

Figure 18. Closed-Loop Gain vs. Frequency

Figure 21. Closed-Loop Gain vs. Frequency

1k

100

10

1k

100

10

V

= ±8V

SY

V

= ±2.5V

SY

A

= –10

V

A = –10

V

A

= +1

A

= –100

V

A

= –100

V

A

= +1

V

1

0.1

100

1k

10k

100k

1M

10M

1k

10k

100k

1M

10M

FREQUENCY (Hz)

Figure 19. Output Impedance vs. Frequency

Figure 22. Output Impedance vs. Frequency

Rev. F | Page 8 of 20

AD8638/AD8639

T_A= 25°C, unless otherwise noted.

140

120

100

80

V

= ±2.5V

V

= ±8V

SY

120

100

80

60

40

20

0

60

40

20

0

100

1k

10k

100k

1M

10M

100

1k

10k

100k

1M

10M

FREQUENCY (Hz)

Figure 23. CMRR vs. Frequency

Figure 26. CMRR vs. Frequency

120

100

80

V

= ±8V

SY

V

= ±2.5V

SY

100

80

60

40

20

0

PSRR+

60

PSRR–

40

20

0

–20

10

100

1k

10k

100k

1M

10M

10

100

1k

10k

100k

1M

10M

FREQUENCY (Hz)

Figure 24. PSRR vs. Frequency

Figure 27. PSRR vs. Frequency

80

70

60

50

40

30

20

10

0

80

70

60

50

40

30

20

10

0

V

R

= ±2.5V

= 10kꢀ

V

R

= ±8V

= 10kꢀ

SY

L

OS+

OS–

OS+

OS–

10

100

1k

10

100

1k

LOAD CAPACITANCE (pF)

Figure 25. Small Signal Overshoot vs. Load Capacitance

Figure 28. Small Signal Overshoot vs. Load Capacitance

Rev. F | Page 9 of 20

AD8638/AD8639

T_A= 25°C, unless otherwise noted.

V

= ±2.5V

= +1

= 200pF

= 10kꢀ

V

= ±8V

= +1

= 200pF

= 10kꢀ

SY

A

C

R

A

C

R

V

L

V

L

TIME (2µs/DIV)

Figure 29. Large Signal Transient Response

Figure 32. Large Signal Transient Response

V

= ±2.5V

V

= ±8V

SY

A

C

R

= +1

= 200pF

= 10kꢀ

A

C

R

= +1

= 200pF

= 10kꢀ

V

L

V

L

TIME (2µs/DIV)

Figure 30. Small Signal Transient Response

Figure 33. Small Signal Transient Response

0.05

0

0.05

0

INPUT VOLTAGE

–0.05

–0.10

–0.05

–0.10

V

A

= ±8V

= –100

SY

V

A

= ±2.5V

= –100

SY

V

–0.15

3

2

10

5

1

OUTPUT VOLTAGE

0

–1

–5

TIME (10µs/DIV)

Figure 31. Negative Overload Recovery

Figure 34. Negative Overload Recovery

Rev. F | Page 10 of 20

AD8638/AD8639

T_A= 25°C, unless otherwise noted.

0.15

0.10

0.05

0

V

A

= ±2.5V

= –100

SY

V

= ±8V

SY

0.10

0.05

0

V

A

= –100

V

INPUT VOLTAGE

–0.05

1

5

OUTPUT VOLTAGE

0

OUTPUT VOLTAGE

–1

–2

–3

–5

–10

–15

TIME (10µs/DIV)

Figure 35. Positive Overload Recovery

Figure 38. Positive Overload Recovery

INPUT

+2mV

0

+2mV

0

ERROR BAND

OUTPUT

ERROR BAND

OUTPUT

–2mV

V

= ±2.5V

V

= ±8V

SY

TIME (4µs/DIV)

Figure 36. Positive Settling Time to 0.1%

Figure 39. Positive Settling Time to 0.1%

INPUT

+2mV

0

+2mV

0

OUTPUT

ERROR BAND

–2mV

V

= ±2.5V

V

= ±8V

SY

TIME (4µs/DIV)

Figure 37. Negative Settling Time to 0.1%

Figure 40. Negative Settling Time to 0.1%

Rev. F | Page 11 of 20

AD8638/AD8639

T_A= 25°C, unless otherwise noted.

1k

100

10

1k

V

= ±8V

SY

V

= ±2.5V

SY

100

10

1

10

100

1k

10k 25k

1

10

100

1k

10k 25k

FREQUENCY (Hz)

Figure 44. Voltage Noise Density vs. Frequency

Figure 41. Voltage Noise Density vs. Frequency

1.5

V

= ±2.5V

V

= ±8V

SY

1.0

0.5

1.0

0.5

0

–0.5

–1.0

–1.5

–0.5

–1.0

–1.5

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

TIME (Seconds)

Figure 45. 0.1 Hz to 10 Hz Noise

Figure 42. 0.1 Hz to 10 Hz Noise

1400

1250

1000

750

500

250

0

+125°C

1200

1000

800

600

400

200

0

V

= ±8V

SY

+85°C

+25°C

V

= ±2.5V

SY

–40°C

0

1

2

3

4

5

6

7

V

8

9

10 11 12 13 14 15 16

–40 –25 –10

5

20

35

50

65

80

95 110 125

(V)

SY

TEMPERATURE (°C)

Figure 43. Supply Current vs. Supply Voltage

Figure 46. Supply Current vs. Temperature

Rev. F | Page 12 of 20

AD8638/AD8639

T_A= 25°C, unless otherwise noted.

0

–20

V

A

= ±8V

= –10

V

= ±8V

SY

A

= –100

V

–20

–40

–60

R

= 2kꢀ

L

–80

R

= 2kꢀ

L

–100

–120

–140

–100

–120

–140

R

= 10kꢀ

L

R

= 10kꢀ

L

100

1k

FREQUENCY (Hz)

10k

100k

100

1k

FREQUENCY (Hz)

10k

100k

Figure 47. Channel Separation vs. Frequency

Figure 50. Channel Separation vs. Frequency

0.1

0.01

0.1

0.01

V

A

R

= ±8V

= +1

= 2kꢀ

V

A

R

= ±8V

= +1

= 10kꢀ

SY

S

V

L

V

L

V

= 1V rms

V

= 1V rms

IN

V

= 3V rms

IN

0.001

0.0001

0.001

0.0001

V

= 3V rms

IN

10

100

1k

10k

100k

10

100

1k

FREQUENCY (Hz)

10k

100k

FREQUENCY (Hz)

Figure 48. THD + Noise vs. Frequency

Figure 51. THD + Noise vs. Frequency

300

250

200

150

100

50

V

= 16V

SY

= 125°C

T

A

0

–50

0

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16

V

(V)

CM

Figure 49. Input Bias Current vs. Input Common-Mode Voltage

Rev. F | Page 13 of 20

AD8638/AD8639

THEORY OF OPERATION

The AD8638/AD8639 are single-supply and dual-supply, ultrahigh

precision, rail-to-rail output operational amplifiers. The typical

offset voltage of 3 μV allows the amplifiers to be easily configured

for high gains without risk of excessive output voltage errors. The

extremely small temperature drift of 30 nV/°C ensures a minimum

offset voltage error over the entire temperature range of −40°C

to +125°C, making the amplifiers ideal for a variety of sensitive

measurement applications in harsh operating environments.

The internal elimination of 1/f noise is accomplished as follows:

1/f noise appears as a slowly varying offset to AD8638/AD8639

inputs. Auto-zeroing corrects any dc or low frequency offset.

Therefore, the 1/f noise component is essentially removed,

leaving the AD8638/AD8639 free of 1/f noise.

INPUT VOLTAGE RANGE

The AD8638/AD8639 are not rail-to-rail input amplifiers;

therefore, care is required to ensure that both inputs do not

exceed the input voltage range. Under normal negative feedback

operating conditions, the amplifier corrects its output to ensure

that the two inputs are at the same voltage. However, if either

input exceeds the input voltage range, the loop opens and large

currents begin to flow through the ESD protection diodes in the

amplifier.

The AD8638/AD8639 achieve a high degree of precision

through a patented auto-zeroing topology. This unique

topology allows the AD8638/AD8639 to maintain low offset

voltage over a wide temperature range and over the operating

lifetime. The AD8638/AD8639 also optimize the noise and

bandwidth over previous generations of auto-zero amplifiers,

offering the lowest voltage noise of any auto-zero amplifier by

more than 50%.

These diodes are connected between the inputs and each supply

rail to protect the input transistors against an electrostatic discharge

event, and they are normally reverse-biased. However, if the

input voltage exceeds the supply voltage, these ESD diodes can

become forward-biased. Without current limiting, excessive

amounts of current may flow through these diodes, causing

permanent damage to the device. If inputs are subject to over-

voltage, insert appropriate series resistors to limit the diode

current to less than 10 mA maximum.

Previous designs used either auto-zeroing or chopping to add

precision to the specifications of an amplifier. Auto-zeroing

results in low noise energy at the auto-zeroing frequency, at the

expense of higher low frequency noise due to aliasing of wide-

band noise into the auto-zeroed frequency band. Chopping

results in lower low frequency noise at the expense of larger

noise energy at the chopping frequency. The AD8638/AD8639

use both auto-zeroing and chopping in a patented ping-pong

arrangement to obtain lower low frequency noise together with

lower energy at the chopping and auto-zeroing frequencies,

maximizing the SNR for the majority of applications without

the need for additional filtering. The relatively high clock

frequency of 15 kHz simplifies filter requirements for a wide,

useful, noise-free bandwidth.

OUTPUT PHASE REVERSAL

Output phase reversal occurs in some amplifiers when the input

common-mode voltage range is exceeded. As common-mode

voltage is moved outside the common-mode range, the outputs

of these amplifiers can suddenly jump in the opposite direction

to the supply rail. This is the result of the differential input pair

shutting down, causing a radical shifting of internal voltages

that results in the erratic output behavior.

The AD8638 is among the few auto-zero amplifiers offered in

the 5-lead SOT-23 package. This provides significant improve-

ment over the ac parameters of previous auto-zero amplifiers. The

AD8638/AD8639 have low noise over a relatively wide bandwidth

(0 Hz to 10 kHz) and can be used where the highest dc precision is

required. In systems with signal bandwidths ranging from 5 kHz

to 10 kHz, the AD8638/AD8639 provide true 16-bit accuracy,

making this device the best choice for very high resolution

systems.

The AD8638/AD8639 amplifiers have been carefully designed

to prevent any output phase reversal if both inputs are main-

tained within the specified input voltage range. If one or both

inputs exceed the input voltage range but remain within the

supply rails, an internal loop opens and the output varies.

Therefore, the inputs should always be less than at least 2 V

below the positive supply.

1/f NOISE

OVERLOAD RECOVERY TIME

1/f noise, also known as pink noise, is a major contributor to

errors in dc-coupled measurements. This 1/f noise error term

can be in the range of several microvolts or more and, when

amplified by the closed-loop gain of the circuit, can show up

as a large output signal. For example, when an amplifier with

5 μV p-p 1/f noise is configured for a gain of 1000, its output has

5 mV of error due to the 1/f noise. However, the AD8638/AD8639

eliminate 1/f noise internally and thus significantly reduce

output errors.

Many auto-zero amplifiers are plagued by a long overload recovery

time, often in milliseconds, due to the complicated settling

behavior of the internal nulling loops after saturation of the

outputs. The AD8638/AD8639 are designed so that internal

settling occurs within two clock cycles after output saturation

happens. This results in a much shorter recovery time, less than

50 μs, when compared to other auto-zero amplifiers. The wide

bandwidth of the AD8638/AD8639 enhances performance when

the parts are used to drive loads that inject transients into the

outputs. This is a common situation when an amplifier is used

to drive the input of switched capacitor ADCs.

Rev. F | Page 14 of 20

AD8638/AD8639

In such applications, it is desirable to use a shunt with very low

resistance to minimize the series voltage drop; this minimizes

wasted power and allows the measurement of high currents

while saving power. A typical shunt may be 0.1 Ω. At measured

current values of 1 A, the output signal of the shunt is hundreds

of millivolts, or even volts, and amplifier error sources are not

critical. However, at low measured current values in the 1 mA

range, the 100 μV output voltage of the shunt demands a very low

offset voltage and drift to maintain absolute accuracy. Low input

bias currents are also needed to prevent injected bias current

from becoming a significant percentage of the measured current.

High open-loop gain, CMRR, and PSRR help to maintain the

overall circuit accuracy. With the extremely high CMRR of the

AD8638/AD8639, the CMRR is limited by the resistor ratio

matching. As long as the rate of change of the current is not too

fast, an auto-zero amplifier can be used with excellent results.

INFRARED SENSORS

Infrared (IR) sensors, particularly thermopiles, are increasingly

used in temperature measurement for applications as wide

ranging as automotive climate control, human ear thermometers,

home insulation analysis, and automotive repair diagnostics.

The relatively small output signal of the sensor demands high

gain with very low offset voltage and drift to avoid dc errors.

If interstage ac coupling is used, as shown in Figure 52, low

offset and drift prevent the output of the input amplifier from

drifting close to saturation. The low input bias currents generate

minimal errors from the output impedance of the sensor.

Similar to pressure sensors, the very low amplifier drift with

time and temperature eliminates additional errors once the

system is calibrated at room temperature. The low 1/f noise

improves SNR for dc measurements taken over periods often

exceeding one-fifth of a second.

OUTPUT AMPLIFIER FOR HIGH PRECISION DACS

Figure 52 shows a circuit that can amplify ac signals from

100 μV to 300 μV up to the 1 V to 3 V levels, with a gain of

10,000 for accurate analog-to-digital conversions.

The AD8638/AD8639 can be used as output amplifiers for a

16-bit high precision DAC in a unipolar configuration. In this

case, the selected op amp needs to have very low offset voltage

(the DAC LSB is 38 μV when operating with a 2.5 V reference)

to eliminate the need for output offset trims. Input bias current

(typically a few tens of picoamperes) must also be very low

because it generates an additional offset error when multiplied

by the DAC output impedance (approximately 6 kΩ).

10kꢀ

100kꢀ

100ꢀ

100kꢀ

5V TO 16V

100µV TO 300µV

10µF

1/2 AD8639

IR

1/2 AD8639

DETECTOR

10kꢀ

f_C≈ 1.6Hz

Rail-to-rail output provides full-scale output with very little

error. Output impedance of the DAC is constant and code-

independent, but the high input impedance of the AD8638/

AD8639 minimizes gain errors. The wide bandwidth of the

amplifier also serves well in this case. The amplifier, with a

settling time of 4 μs, adds another time constant to the system,

increasing the settling time of the output. For example, see

Figure 54. The settling time of the AD5541 is 1 μs. The

combined settling time is approximately 4.1 μs, as can be

derived from the following equation:

TO BIAS

VOLTAGE

Figure 52. AD8639 Used as a Preamplifier for Thermopile

PRECISION CURRENT SHUNT SENSOR

A precision current shunt sensor benefits from the unique

attributes of auto-zero amplifiers when used in a differencing

configuration, as shown in Figure 53. Current shunt sensors are

used in precision current sources for feedback control systems.

They are also used in a variety of other applications, including

battery fuel gauging, laser diode power measurement and

control, torque feedback controls in electric power steering, and

precision power metering.

2

t_S

(

TOTAL

)

=

(

t_SDAC

)

+

(

t_SAD8638

)

2.5V

6

2

5V

ADR421

4

5V TO 16V

0.1µF

R

0.1ꢀ

S

R

SUPPLY

L

0.1µF

I

5V TO 16V

100kꢀ

100ꢀ

SERIAL

INTERFACE

e = 1000 R I =

S

100mV/mA

V

REF(REFF*) REFS*

AD5541/AD5542

DD

C

CS

5V TO 16V

AD8638

DIN

UNIPOLAR

OUTPUT

V

OUT

SCLK

LDAC*

AD8638

DGND

AGND

100kꢀ

100ꢀ

*AD5542 ONLY

Figure 54. AD8638 Used as an Output Amplifier

C

Figure 53. Low-Side Current Sensing

Rev. F | Page 15 of 20

AD8638/AD8639

OUTLINE DIMENSIONS

3.00

2.90

2.80

5

1

4

3

3.00

2.80

2.60

1.70

1.60

1.50

2

0.95 BSC

1.90

BSC

1.30

1.15

0.90

0.20 MAX

0.08 MIN

1.45 MAX

0.95 MIN

0.55

0.45

0.35

0.15 MAX

0.05 MIN

10°

5°

0°

SEATING

PLANE

0.20

BSC

0.50 MAX

0.35 MIN

COMPLIANT TO JEDEC STANDARDS MO-178-AA

Figure 55. 5-Lead Small Outline Transistor Package [SOT-23]

(RJ-5)

Dimensions shown in millimeters

5.00 (0.1968)

4.80 (0.1890)

8

1

5

4

6.20 (0.2441)

5.80 (0.2284)

4.00 (0.1574)

3.80 (0.1497)

0.50 (0.0196)

0.25 (0.0099)

1.27 (0.0500)

BSC

45°

1.75 (0.0688)

1.35 (0.0532)

0.25 (0.0098)

0.10 (0.0040)

8°

0°

0.51 (0.0201)

0.31 (0.0122)

COPLANARITY

0.10

1.27 (0.0500)

0.40 (0.0157)

0.25 (0.0098)

0.17 (0.0067)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 56. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-8)

Dimensions shown in millimeters and (inches)

Rev. F | Page 16 of 20

AD8638/AD8639

3.20

3.00

2.80

8

1

5

4

5.15

4.90

4.65

3.20

3.00

2.80

PIN 1

IDENTIFIER

0.65 BSC

0.95

0.85

0.75

15° MAX

1.10 MAX

0.80

0.55

0.40

0.15

0.05

0.23

0.09

6°

0°

0.40

0.25

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 57. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

2.48

3.00

BSC SQ

2.38

2.23

5

8

EXPOSED

PAD

1.74

1.64

1.49

0.50

0.40

0.30

4

1

INDEX

AREA

PIN 1

INDICATOR

(R 0.2)

TOP VIEW

BOTTOM VIEW

0.80 MAX

0.55 NOM

0.80

0.75

0.70

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION

0.05 MAX

0.02 NOM

COPLANARITY

0.08

SECTION OF THIS DATA SHEET.

SEATING

PLANE

0.30

0.25

0.18

0.20 REF

0.50 BSC

COMPLIANT TO JEDEC STANDARDS MO-229-WEED-4

Figure 58. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]

3 mm × 3 mm Body, Very Very Thin, Dual Lead

(CP-8-5)

Dimensions shown in millimeters

Rev. F | Page 17 of 20

AD8638/AD8639

ORDERING GUIDE

Model^{1, 2}

AD8638ARJZ-R2

AD8638ARJZ-REEL

AD8638ARJZ-REEL7

AD8638ARZ

AD8638ARZ-REEL

AD8638ARZ-REEL7

AD8639ACPZ-R2

AD8639ACPZ-REEL

AD8639ACPZ-REEL7

AD8639ARZ

AD8639ARZ-REEL

AD8639ARZ-REEL7

AD8639ARMZ

Temperature Range

−40°C to +125°C

Package Description

5-Lead SOT-23

8-Lead SOIC_N

8-Lead LFCSP_WD

8-Lead SOIC_N

8-Lead MSOP

Package Option

RJ-5

R-8

Branding

A1T

R-8

CP-8-5

R-8

RM-8

R-8

A1Y

AD8639ARMZ-REEL

AD8639ARMZ-R7

AD8639WARZ

AD8639WARZ-RL

AD8639WARZ-R7

8-Lead MSOP

8-Lead SOIC_N

¹Z = RoHS Compliant Part.

2

W = Qualified for Automotive Applications.

AUTOMOTIVE PRODUCTS

The AD8639W models are available with controlled manufacturing to support the quality and reliability requirements of automotive

applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers

should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in

automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to

obtain the specific Automotive Reliability reports for these models.

Rev. F | Page 18 of 20

AD8638/AD8639

NOTES

Rev. F | Page 19 of 20

AD8638/AD8639

NOTES

registered trademarks are the property of their respective owners.

D06895-0-6/10(F)

Rev. F | Page 20 of 20


型号：	AD8639ARMZ-R7
厂家：	ADI
描述：	16V Auto-Zero, Rail-to-Rail Output tional Amplifiers 16V自动调零，轨到轨输出tional放大器放大器
文件：	总20页 (文件大小：629K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AD8639ARMZ-R7 [ADI]

相关型号：

AD8639ARMZ-REEL

AD8639ARMZ-REEL

AD8639ARZ

AD8639ARZ-REEL

AD8639ARZ-REEL7

AD8639WARZ

AD8639WARZ-R7

AD8639WARZ-RL

AD8641

AD8641AKSZ-R2

AD8641AKSZ-R2

AD8641AKSZ-REEL