AD8641 [ADI]
Low Power, Rail-to-Rail Output Precision JFET Amplifier; 低功耗，轨到轨输出精密JFET放大器
| 型号： | AD8641 |
| 厂家： | 
ADI |
| 描述： | Low Power, Rail-to-Rail Output Precision JFET Amplifier |
| 文件： | 总12页 (文件大小：434K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Power, Rail-to-Rail Output
Precision JFET Amplifier
AD8641
FEATURES
Low supply current: 250 µA max
Very low input bias current: 1 pA max
Low offset voltage: 750 µV max
Single-supply operation: 5 V to 26 V
Dual-supply operation: 2.5 V to 13 V
Rail-to-rail output
OUT
VEE
+IN
1
2
3
5
4
VCC
–IN
AD8641
TOP VIEW
(Not to Scale)
Figure 1. 5-Lead SC70 (KS-5)
Unity gain stable
No phase reversal
SC70 package
NC
–IN
1
2
3
4
8
7
6
5
NC
AD8641
VCC
OUT
NC
TOP VIEW
+IN
APPLICATIONS
Line-/battery-powered instruments
Photodiode amplifiers
Precision current sensing
Medical instrumentation
Industrial controls
Precision filters
(Not to Scale)
VEE
NC = NO CONNECT
Figure 2. 8-Lead SOIC (R-8)
Portable audio
ATE
GENERAL DESCRIPTION
The AD8641 is a low power, precision JFET input amplifier
featuring extremely low input bias current and rail-to-rail
output. The ability to swing nearly rail-to-rail at the input and
rail-to-rail at the output enables designers to buffer CMOS
DACs, ASICs, and other wide output swing devices in single-
supply systems. The outputs remain stable with capacitive loads
of more than 500 pF.
The AD8641 is suitable for applications utilizing multichannel
boards that require low power to manage heat. Other applica-
tions include photodiodes, ATE reference level drivers, battery
management, and industrial controls.
The AD8641 is fully specified over the extended industrial
temperature range of –40° to +125°C. The AD8641 is available
in 5-lead SC70 and 8-lead SOIC lead-free packages.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
AD8641
TABLE OF CONTENTS
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 5
Typical Performance Characteristics ............................................. 6
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
REVISION HISTORY
10/04—Initial Version: Revision 0
Rev. 0 | Page 2 of 12
AD8641
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ VS =5.0 V, VCM = 2.5 V, TA =25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
50
750
1.5
1.6
1
µV
–40°C < TA < +85°C
+85°C < TA < +125°C, VCM = 1.5 V
mV
mV
pA
Input Bias Current
IB
0.25
–40°C < TA < +125°C
–40°C < TA < +125°C
180
0.5
50
3
pA
pA
pA
V
dB
V/mV
µV/°C
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
0
74
80
CMRR
AVO
∆VOS/∆T
VCM = 0 V to 2.5 V
RL = 10 kΩ, VO = 0.5 to 4.5 V
–40°C < TA < +125°C
93
140
2.5
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
IOUT
4.94
4.93
V
V
V
V
IL = 2 mA, –40°C to +125°C
IL = 2 mA, –40°C to +125°C
Output Voltage Low
0.05
0.05
0.01
6
Output Current
mA
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 5 V to 26 V
90
107
195
dB
µA
µA
250
270
–40°C < TA < +125°C
DYNAMIC PERFORMANCE
Slew Rate
SR
2
V/µs
Gain Bandwidth Product
Phase Margin
GBP
ØO
3
50
MHz
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
eN p-p
eN
iN
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
4.0
28.5
0.5
µV p-p
nV/√Hz
fA/√Hz
Rev. 0 | Page 3 of 12
AD8641
@ VS= 13 V, VCM = 0 V, TA =25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ
70
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
750
1.5
1
260
0.5
35
µV
mV
pA
pA
pA
–40° < TA < +125°C
–40°C < TA < +125°C
–40°C < TA < +125°C
Input Bias Current
0.25
Input Offset Current
IOS
pA
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
–13
90
215
+10
V
dB
V/mV
µV/°C
CMRR
AVO
∆VOS/∆T
VCM = -13 V to +10 V
RL = 10 kΩ, VO = –11 V to +11 V
–40°C < TA < +125°C
107
290
2.5
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
IOUT
+12.94
+12.93
V
V
V
V
IL = 2 mA, –40°C to +125°C
IL = 2 mA, –40°C to +125°C
Output Voltage Low
+12.94
–12.93
Output Current
12
mA
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 2.5 V to 13 V
–40°C < TA < +125°C
90
107
200
dB
µA
µA
290
330
DYNAMIC PERFORMANCE
Slew Rate
SR
3
V/µs
Gain Bandwidth Product
Phase Margin
GBP
ØO
3.5
60
MHz
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
eN p-p
eN
iN
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
4.2
27.5
0.5
µV p-p
nV/√Hz
fA/√Hz
Rev. 0 | Page 4 of 12
AD8641
ABSOLUTE MAXIMUM RATINGS
Table 3. Absolute Maximum Ratings1
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
KS-5, R-8 Packages
Operating Temperature Range
Junction Temperature Range
KS-5, R-8 Packages
Table 4.
2
Rating
Package Type
5-Lead SC70 (KS-5)
8-Lead SOIC (R-8)
θJA
θJC
Units
°C/W
°C/W
27.3 V
331.4
157
223.9
56
VS– to VS+
Supply Voltage
Indefinite
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
–65°C to +150°C
–40°C to +125°C
–65°C to +150°C
300°C
Lead Temperature Range (Soldering, 60 Sec)
1 Absolute maximum ratings apply at 25°C, unless otherwise noted.
2 θJA is specified for the worst-case conditions, i.e., θJA is specified for devices
soldered on circuit boards for surface-mounted packages.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 12
AD8641
TYPICAL PERFORMANCE CHARACTERISTICS
20
18
16
14
12
10
8
80
V
= 5V
= 1.5V
V
= ±13V
SY
SY
V
CM
70
60
50
40
30
20
6
4
10
0
2
0
T
V
(µV/°C)
OS
V
(mV)
C
OS
Figure 3. Input Offset Voltage
Figure 6. Offset Voltage Drift
16
14
12
10
8
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= ±13V
SY
V
= ±13V
SY
= 25°C
T
A
6
4
2
0
–0.5
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11 13 15
OFFSET VOLTAGE (µV/°C)
V
(V)
CM
Figure 4. Offset Voltage Drift
Figure 7. Input Bias Current vs. VCM
70
60
50
40
30
20
10
0
0.5
0.4
V
= ±2.5V
SY
V
T
= ±13V
SY
= 25°C
A
0.3
0.2
0.1
0
–
0.1
0.2
–
–0.3
–0.4
–0.5
–15.0 –12.5 –10.0 –7.5 –5.0 –2.5
0
2.5
5.0
7.5 10.0 12.5 15.0
V
(V)
V
(mV)
CM
OS
Figure 8. Input Bias Current vs. VCM
Figure 5. Input Offset Voltage
Rev. 0 | Page 6 of 12
AD8641
1000
100
10
500
400
V
= 5V
V
= ±13V
SY
SY
300
200
100
0
–100
–200
–300
–400
–500
1
0.1
0
25
50
75
100
125
150
0
0.5
1.0
1.5
(V)
2.0
2.5
TEMPERATURE (°C)
V
CM
Figure 9. Input Bias Current vs. Temperature
Figure 12. Input Offset Voltage vs. VCM
10M
1M
1.0
0.8
V
= +5V OR ±5V
SY
0.6
0.4
0.2
V
=
±
13V
V
SY
0
–0.2
–0.4
–0.6
–0.8
–1.0
100k
10k
= ±2.5V
SY
0.1
1
10
100
–5
–4
–3
–2
–1
0
1
2
3
4
5
V
(V)
LOAD RESISTANCE (k
Ω
)
CM
Figure 13. Open-Loop Gain vs. Load Resistance
Figure 10. Input Bias Current vs. VCM
1000
900
800
700
600
500
400
300
200
100
0
1000
100
10
V
= ±13V
SY
A
B
C
D
E
A. V = ±13V, V = ±11V, R = 10kΩ
SY
O
L
B. V = ±13V, V = ±11V, R = 2kΩ
SY
O
L
C. V = +5V, V = +0.5V/+4.5V, R = 10kΩ
SY
O
L
D. V = +5V, V = +0.5V/+4.5V, R = 2kΩ
SY
O
L
E. V = +5V, V = +0.5V/+4.5V, R = 600Ω
SY
O
L
–100
1
0
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11 13 15
–50 –30 –10
10
30
50
70
90
110 130 150
V
(V)
TEMPERATURE (°C)
CM
Figure 11. Input Offset Voltage vs. VCM
Figure 14. Open-Loop Gain vs. Temperature
Rev. 0 | Page 7 of 12
AD8641
10000
1000
100
10
600
V
=
±
13V
V
= ±13V
SY
SY
500
400
V
– V
OH
SY
300
200
100
0
100kΩ
–
V
– V
SY OL
–100
–200
–300
–400
–500
–600
10kΩ 1kΩ
1
0.001
0.01
0.1
1
10
100
–15
–10
–5
0
5
10
15
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
Figure 18. Output Saturation Voltage vs. Load Current
Figure 15. Input Error Voltage vs. Output Voltage for Resistive Loads
10000
1000
100
10
250
V
SY
= 5V
V
=
±
5V
SY
200
150
POS RAIL
V
– V
OH
SY
R
R
= 1kΩ
= 2kΩ
100
L
50
L
V
OL
0
R = 10kΩ
L
R
= 100kΩ
L
–50
–100
–150
–200
–250
–300
–350
R = 1kΩ
L
R
= 100kΩ
L
R
= 10kΩ
L
NEG RAIL
R
= 2kΩ
L
1
0.001
0.01
0.1
1
10
100
0
50
100
150
200
250
300
350
LOAD CURRENT (mA)
OUTPUT VOLTAGE FROM SUPPLY RAIL (mV)
Figure 19. Output Saturation Voltage vs. Load Current
Figure 16. Input Error Voltage vs. Output Voltage
Within 300 mV of Supply Rails
70
60
800
700
600
500
400
300
200
100
0
315
V
R
C
=
= 2k
= 40pF
±
13V
Ω
SY
270
225
180
135
90
L
L
50
40
GAIN
30
20
PHASE
10
45
+25°C
+125°C
0
0
–10
–20
–30
–45
–90
–135
–55°C
10k
100k
1M
FREQUENCY (Hz)
10M
4
8
12
16
(V)
20
24
28
V
SY
Figure 20. Open-Loop Gain and Phase Margin vs. Frequency
Figure 17. Quiescent Current vs. Supply Voltage at Different Temperatures
Rev. 0 | Page 8 of 12
AD8641
70
60
140
120
100
80
315
270
225
180
135
90
V
SY
= ±13V
V
R
C
= 5V
SY
= 2kΩ
L
L
= 40pF
50
40
GAIN
30
60
20
40
PHASE
10
45
20
0
0
0
–10
–20
–30
–45
–90
–135
–20
–40
–60
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Open-Loop Gain and Phase Margin vs. Frequency
Figure 24. CMRR vs. Frequency
70
60
140
120
100
80
V
R
C
=
= 2k
±
13V
Ω
V
= 5V
SY
SY
L
L
= 40pF
G = +100
G = +10
G = +1
50
40
30
60
20
40
10
20
0
0
–10
–20
–30
–20
–40
–60
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 22. Closed-Loop Gain vs. Frequency
Figure 25. CMRR vs. Frequency
70
60
140
120
100
80
V
SY
= ±13V
V
R
C
= 5V
SY
= 2kΩ
L
L
= 40pF
50
+PSRR
40
G = +100
G = +10
G = +1
30
60
20
–PSRR
40
10
20
0
0
–10
–20
–30
–20
–40
–60
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. Closed-Loop Gain vs. Frequency
Figure 26. PSRR vs. Frequency
Rev. 0 | Page 9 of 12
AD8641
140
1.0
0.8
T
V
= ±13V
V
= 5V
SY
SY
120
100
80
0.6
1
+PSRR
V
IN
0.4
60
0.2
40
0
–PSRR
20
–0.2
–0.4
0
2
–20
–40
–0.6
V
OUT
–0.8
–1.0
–60
1k
10k
100k
FREQUENCY (Hz)
1M
10M
–CH1 –140.0V –3CH2–120.0V–1
0M400
T
µ
1s
2
A 3CH1 41.00V5
0.00000s
V
(V)
CM
Figure 30. No Phase Reversal
Figure 27. PSRR vs. Frequency
1000
15
10
5
V
= ±13V
SY
V
=
±
13V
S
GAIN = +5
G = +100
100
10
TS + (1%)
TS + (0.1%)
0
G = +10
1
–5
–10
–15
G = +1
TS – (0.1%)
0.1
0.01
TS – (1%)
1k
10k
100k
1M
10M
100M
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
FREQUENCY (Hz)
SETTLING TIME (
µ
s)
Figure 28. Output Impedance vs. Frequency
Figure 31. Output Swing and Error vs. Settling Time
70
60
50
40
30
20
10
0
1000
100
10
V
=
5V
SY
V
R
=
±
13V
Ω
S
= 10k
= 100mV p-p
= +1
L
G = +100
V
IN
A
V
G = +10
OS–
1
G = +1
OS+
0.1
0.01
1k
10k
100k
1M
10M
100M
1
10
100
1000
FREQUENCY (Hz)
CAPACITANCE (pF)
Figure 29. Output Impedance vs. Frequency
Figure 32. Small Signal Overshoot vs. Load Capacitance
Rev. 0 | Page 10 of 12
AD8641
70
60
50
40
30
20
10
0
1k
100
10
V
= ±13V
SY
V
R
=
±
2.5V
Ω
S
= 10k
= 100mV p-p
= +1
L
V
IN
A
V
OS–
OS+
1
1
10
100
1000
10
100
1k
10k
CAPACITANCE (pF)
FREQUENCY (Hz)
Figure 33. Small Signal Overshoot vs. Load Capacitance
Figure 36. Voltage Noise Density
1k
100
10
1.0
0.8
0.6
0.4
0.2
V
= 5V
V
=
±
13V
G = +1M
CH1 p-p = 4.26V
SY
S
1
–0.2
–0.4
–0.6
–0.8
–1.0
1
–CH1 –14.00V –3
–2
–1
0M1.00s1
(V)
2
A C3H1
4–20.0V5
10
100
1k
10k
V
FREQUENCY (Hz)
CM
Figure 37. Voltage Noise Density
Figure 34. 0.1 Hz to 10 Hz Noise
0.004
0.001
1.0
0.8
0.6
0.4
0.2
V
=
±
2.5V
G = +1M
CH1 p-p = 4.06V
V
= ±13V
SY
S
8V p-p INPUT
LOAD = 100kΩ
GAIN = +1
1V p-p INPUT
2V p-p INPUT
0.0001
1
4V p-p INPUT
–0.2
–0.4
–0.6
–0.8
–1.0
0.00001
0.000001
1
100
1k
FREQUENCY (Hz)
10k 20k
–CH1 –14.00V –3
–2
–1
0M1.00s1
(V)
2
A C3H1
4–20.0V5
V
CM
Figure 38. Total Harmonic Distortion + Noise vs. Frequency
Figure 35. 0.1 Hz to 10 Hz Noise
Rev. 0 | Page 11 of 12
AD8641
OUTLINE DIMENSIONS
2.00 BSC
5
1
4
3
1.25 BSC
PIN 1
2.10 BSC
2
0.65 BSC
1.10 MAX
1.00
0.90
0.70
0.22
0.08
0.46
0.36
0.26
0.30
0.15
0.10 M
AX
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203AA
Figure 39. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 40. 8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
Package Description
5-Lead SC70
5-Lead SC70
5-Lead SC70
8-lead SOIC
Package Option
Branding
A07
A07
AD8641AKSZ-R21
AD8641AKSZ-Reel71
AD8641AKSZ-Reel1
AD8641ARZ1
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
KS-5
KS-5
KS-5
R-8
R-8
R-8
A07
AD8641ARZ-Reel71
AD8641ARZ-Reel1
8-lead SOIC
8-lead SOIC
1 Z = Pb-free part.
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and
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D05072-0-10/04(0)
Rev. 0 | Page 12 of 12
相关型号：
AD8641AKSZ-R2
OP-AMP, 1500 uV OFFSET-MAX, 3.5 MHz BAND WIDTH, PDSO5, ROHS COMPLIANT, MO-203AA, SC-70, 5 PIN
ROCHESTER
AD8641AKSZ-REEL7
OP-AMP, 1500 uV OFFSET-MAX, 3.5 MHz BAND WIDTH, PDSO5, ROHS COMPLIANT, MO-203AA, SC-70, 5 PIN
ROCHESTER
AD8641ARZ
OP-AMP, 1500 uV OFFSET-MAX, 3.5 MHz BAND WIDTH, PDSO8, ROHS COMPLIANT, MS-012AA, SOIC-8
ROCHESTER
AD8641ARZ-REEL7
OP-AMP, 1500 uV OFFSET-MAX, 3.5 MHz BAND WIDTH, PDSO8, ROHS COMPLIANT, MS-012AA, SOIC-8
ROCHESTER
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