AD8668ARZ-REEL7 [ADI]
16 V, 4 MHz Rail-to-Rail Output Amplifiers; 16 V ， 4 MHz轨到轨输出放大器
| 型号： | AD8668ARZ-REEL7 |
| 厂家： | 
ADI |
| 描述： | 16 V, 4 MHz Rail-to-Rail Output Amplifiers |
| 文件： | 总16页 (文件大小：523K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
16 V, 4 MHz Rail-to-Rail
Output Amplifiers
AD8665/AD8666/AD8668
FEATURES
PIN CONFIGURATIONS
Offset voltage: 2.5 mV max
Low input bias current: 1 pA max
Single-supply operation: 5 V to 16 V
Dual-supply operation: 2.5 V to 8 V
Low noise: 8 nV/√Hz @ 10 kHz
Wide bandwidth: 4 MHz
1
2
5
OUT
V–
V+
AD8665
TOP VIEW
(Not to Scale)
3
4
–IN
+IN
Figure 1. AD8665, 5-Lead SOT-23 (RJ-5)
Rail-to-rail output
Unity-gain stable
Lead-free packaging
NC
–IN
1
2
3
4
8
7
6
5
NC
AD8665
VCC
OUT
NC
+IN
TOP VIEW
(Not to Scale)
VEE
APPLICATIONS
NC = NO CONNECT
Sensor amplification
Reference buffers
Figure 2. AD8665, 8-Lead SOIC_N (R-8)
Medical equipment
Physiological measurements
Signal filters and conditioning
Consumer audio
OUT A
–IN A
+IN A
V–
1
2
3
4
8
7
6
5
V+
AD8666
OUT B
–IN B
+IN B
TOP VIEW
(Not to Scale)
Photodiode amplification
ADC driver
Figure 3. AD8666, 8-Lead SOIC_N (R-8)
Level shifting circuits
1
2
3
4
8
7
6
5
OUT A
–IN A
+IN A
V–
V+
OUT B
–IN B
+IN B
AD8666
TOP VIEW
(Not to Scale)
GENERAL DESCRIPTION
The AD866x family are single supply, rail-to-rail output
amplifiers with low noise performance featuring an extended
operating range with supply voltages up to 16 V. They also
feature low input bias currents, wide signal bandwidth, and low
input voltage and current noise. For lower offset voltage, choose
the AD8661/AD8662/AD8664 family.
Figure 4. AD8666, 8-Lead MSOP (RM-8)
1
OUT A
IN A
14
13
12
11
10
9
OUT D
–IN D
+IN D
V–
2
3
4
5
6
7
+IN A
V+
AD8668
TOP VIEW
(Not to Scale)
The combination of low offsets, very low input bias currents,
and wide supply range make these amplifiers useful in a wide
variety of cost sensitive applications normally associated with
much higher priced JFET amplifiers. Systems using high
impedance sensors, such as photo diodes, benefit from the
combination of low input bias current, low noise, and low offset
and bandwidth. The wide operating voltage range matches high
performance ADCs and DACs. Audio applications and medical
monitoring equipment can take advantage of the high input
impedance, low voltage and current noise, wide bandwidth, and
the lack of popcorn noise found in many other low input bias
current amplifiers.
+IN B
–IN B
OUT B
+IN C
–IN C
OUT C
8
Figure 5. AD8668, 14-Lead TSSOP (RU-14)
1
2
3
4
5
14
13
12
11
10
9
OUT A
–IN A
+IN A
V+
OUT D
–IN D
+IN D
V–
AD8668
TOP VIEW
(Not to Scale)
+IN B
–IN B
OUT B
+IN C
–IN C
OUT C
6
7
8
Figure 6. AD8668, 14-Lead SOIC_N (R-14)
The AD866x family is specified over the extended industrial
temperature range (−40°C to +125°C).
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
AD8665/AD8666/AD8668
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Thermal Resistance.......................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 13
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
REVISION HISTORY
10/06—Rev. 0 to Rev. A
Added AD8665 ...................................................................Universal
Added New Figure 1 and Figure 2,
Renumbered Sequentially................................................................ 1
Changes to Table 4............................................................................ 5
Changes to Figure 8, Figure 9, and Figure 11 ............................... 6
Change to Figure 40 ....................................................................... 11
Updated Outline Dimensions....................................................... 12
Changes to Ordering Guide .......................................................... 13
4/06—Rev 0: Initial Version
Rev. A | Page 2 of 16
AD8665/AD8666/AD8668
SPECIFICATIONS
VDD = 5.0 V, VCM = VDD/2, TA = 25oC, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
VCM = 2.5 V
0.7
2.5
3.0
5.0
10
mV
mV
mV
μV/°C
pA
VCM = −0.1 V to +3.0 V
−40°C < TA < +125°C
−40°C < TA < +125°C
Offset Voltage Drift
Input Bias Current
ΔVOS/ΔT
IB
3.0
0.2
1
−40°C < TA < +125°C
−40°C < TA < +125°C
550
0.5
70
pA
pA
pA
Input Offset Current
IOS
0.1
Input Voltage Range
Common-Mode Rejection Ratio
VCM
CMRR
−0.1
84
79
+3.0
V
dB
dB
V/mV
VCM = −0.1 V to +3.0 V
−40°C < TA < +125°C
RL = 2 kΩ, VO = 0.5 V to 4.5 V
100
145
4.93
50
Large-Signal Voltage Gain
OUTPUT CHARACTERISTICS
Output Voltage High
AVO
VOH
VOL
68
IOUT = 1 mA
−40°C < TA < +125°C
IOUT = 1 mA
4.88
4.86
V
V
mV
mV
mA
Ω
Output Voltage Low
85
105
−40°C < TA < +125°C
Short-Circuit Output Current
Closed-Loop Output Impedance
POWER SUPPLY
ISC
ZOUT
19
50
At 1 MHz, AV = 1
Power Supply Rejection Ratio
PSRR
ISY
VDD = 5.0 V to 16 V
−40°C < TA < +125°C
98
94
115
1.1
dB
dB
mA
mA
Supply Current per Amplifier
1.4
2.0
−40°C < TA < +125°C
RL = 2 kΩ
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
SR
GBP
ΦM
3.5
4
70
V/μs
MHz
Degrees
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
en p-p
en
0.1 Hz to 10 Hz
f = 1 kHz
f = 10 kHz
f = 10 kHz
2.4
10
8
μV p-p
nV/√Hz
nV/√Hz
dB
Channel Separation
CS
−115
Rev. A | Page 3 of 16
AD8665/AD8666/AD8668
VDD = 16 V, VCM = VDD/2, TA = 25oC, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
VCM = 8 V
0.6
2.5
3.0
5.0
10
mV
mV
mV
μV/°C
pA
VCM = −0.1 V to +14.0 V
−40°C < TA < +125°C
−40°C < TA < +125°C
Offset Voltage Drift
Input Bias Current
ΔVOS/ΔT
IB
3.0
0.2
1
−40°C < TA < +125°C
−40°C < TA < +125°C
550
0.5
70
pA
pA
pA
Input Offset Current
IOS
0.1
Input Voltage Range
Common-Mode Rejection Ratio
VCM
CMRR
−0.1
90
80
+14.0
V
dB
dB
V/mV
VCM = −0.1 V to +14.0 V
−40°C < TA < +125°C
RL = 2 kΩ, VO = 0.5 V to 15.5 V
110
255
Large-Signal Voltage Gain
OUTPUT CHARACTERISTICS
Output Voltage High
AVO
VOH
VOL
130
IOUT = 1 mA
−40°C < TA < +125°C
IOUT = 1 mA
15.94 15.96
15.90
22
V
V
mV
mV
mA
Ω
Output Voltage Low
40
50
−40°C < TA < +125°C
Short-Circuit Output Current
Closed-Loop Output Impedance
POWER SUPPLY
ISC
ZOUT
140
50
At 1 MHz, AV = 1
Power Supply Rejection Ratio
PSRR
ISY
VDD = 5.0 V to 16 V
−40°C < TA < +125°C
98
94
115
dB
dB
mA
mA
Supply Current per Amplifier
1.15
1.55
2.0
−40°C < TA < +125°C
RL = 2 kΩ
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
SR
GBP
ΦM
3.5
4
73
V/μs
MHz
Degrees
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
en p-p
en
0.1 Hz to 10 Hz
f = 1 kHz
f = 10 kHz
f = 10 kHz
2.5
10
8
μV p-p
nV/√Hz
nV/√Hz
dB
Channel Separation
CS
−115
Rev. A | Page 4 of 16
AD8665/AD8666/AD8668
ABSOLUTE MAXIMUM RATINGS
Table 3.
THERMAL RESISTANCE
Parameter
Rating
Table 4. Thermal Resistance
Package Type
Supply Voltage
Input Voltage
18 V
GND to VDD
18 V
Indefinite
−65°C to +150°C
−40°C to +125°C
300°C
θJA
θJC
92
43
45
36
35
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
5-Lead SOT-23 (RJ-5)
8-Lead SOIC_N (R-8)
8-Lead MSOP (RM-8)
14-Lead SOIC (R-14)
14-Lead TSSOP (RU-14)
240
158
210
120
180
Differential Input Voltage
Output Short-Circuit to GND
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 60 sec)
Junction Temperature
150°C
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. A | Page 5 of 16
AD8665/AD8666/AD8668
TYPICAL PERFORMANCE CHARACTERISTICS
100
300
250
200
150
100
50
V
V
= 16V
= 8V
V = 5V AND 16V
S
DD
90
80
70
60
50
40
30
20
10
0
CM
T
= 25°C
A
600 AMPLIFIERS
0
–40
–3
–2
–1
0
1
2
3
–20
0
20
40
60
80
100
120
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (mV)
Figure 10. Input Bias Current vs. Temperature
Figure 7. Input Offset Voltage Distribution
20
18
16
14
12
10
8
10000
1000
100
10
V
T
= 16V
= 25°C
V
V
= 16V
= 8V
DD
DD
A
CM
–40°C < T < +125°C
A
300 AMPLIFIERS
V
TO V
OH
DD
SOURCING
V
OL
SINKING
6
4
1
2
0
0.1
0.001
0
1
2
3
4
5
6
7
8
9
10 11 12
0.01
0.1
1
10
100
TCV (µV/°C)
LOAD CURRENT (mA)
OS
Figure 11. Output Saturation Voltage vs. Load Current
Figure 8. VOS Drift (TCVOS) Distribution
100
80
60
40
20
0
5
4
V
= 16V
= 1mA
DD
V
= 16V
= 25°C
DD
I
OUT
T
A
3
2
1
V
TO V
OH
0
DD
SOURCING
–1
–2
–3
–4
–5
V
OL
SINKING
–40
–20
0
20
40
60
80
100
120
–1
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
TEMPERATURE (°C)
INPUT COMMON-MODE VOLTAGE (V)
Figure 12. Output Saturation Voltage vs. Temperature
Figure 9. Offset Voltage vs. Common-Mode Voltage
Rev. A | Page 6 of 16
AD8665/AD8666/AD8668
100
80
60
40
20
0
80
60
40
20
0
0
V
R
C
= 16V
= 2kΩ
= 10pF
V
T
= 16V
DD
DD
= 25°C
L
L
A
45
PHASE
GAIN
90
135
180
225
Ф
= 73°
M
PSRR–
PSRR+
1M
–20
1k
1k
10k
100k
4M
10k
100k
FREQUENCY (Hz)
1M
10M
FREQUENCY (Hz)
Figure 16. Power Supply Rejection Ratio vs. Frequency
Figure 13. Open-Loop Gain and Phase vs. Frequency
100
10
1
1000
100
10
V
= 16V
V
= 5V TO 16V
DD
DD
= 25°C
T
A
A
= +100
V
A
= +1
A
= +10
V
V
1
0.1
0.01
10
100
FREQUENCY (Hz)
1k
10k
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 17. Voltage Noise Density vs. Frequency
Figure 14. Closed-Loop Output Impedance vs. Frequency
120
100
80
60
40
20
0
V
= 5V TO 16V
= 25°C
DD
V
= 16V
= 25°C
DD
T
A
T
A
TIME (1s/DIV)
1k
10k
100k
1M
4M
FREQUENCY (Hz)
Figure 15. Common-Mode Rejection Ratio vs. Frequency
Figure 18. 0.1 Hz to 10 Hz Voltage Noise
Rev. A | Page 7 of 16
AD8665/AD8666/AD8668
V
= 16V
= 10kΩ
= 10pF
= +1
DD
R
C
A
0V
L
L
V
V
= ±8V
DD
A
= –100
V
V
V
IN
–100mV
8V
OUT
0V
TIME (0.5µs/DIV)
TIME (5µs/DIV)
Figure 19. Small-Signal Transient Response
Figure 22. Positive Overload Recovery Time
10
8
V
A
= ±8V
= –100
DD
V
= ±8V
= 10kΩ
= 10pF
= +1
DD
100mV
V
R
C
A
L
L
V
V
IN
6
4
0V
0V
2
0
–2
–4
–6
–8
–10
V
OUT
–8V
TIME (5µs/DIV)
TIME (2µs/DIV)
Figure 23. Negative Overload Recovery Time
Figure 20. Large-Signal Transient Response
80
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
V
= 5V
= 2.5V
= 25°C
DD
CM
V
V
= 16V
= 100mV p-p
DD
V
T
IN
A
550 AMPLIFIERS
+OS
–OS
–3
–2
–1
0
1
2
3
1
10
100
1000
INPUT OFFSET VOLTAGE (mV)
LOAD CAPACITANCE (pF)
Figure 24. Input Offset Voltage Distribution
Figure 21. Small-Signal Overshoot vs. Load Capacitance
Rev. A | Page 8 of 16
AD8665/AD8666/AD8668
30
25
20
15
10
5
120
100
80
60
40
20
0
V
V
= 5V
= 2.5V
V
I
= 5V
DD
CM
DD
= 1mA
LOAD
–40°C ≤ T ≤ +125°C
300 AMPLIFIERS
A
V
TO V
OH
DD
SOURCING
V
OL
SINKING
0
0
1
2
3
4
5
6
7
8
9
10
–40
–20
0
20
40
60
80
100
120
TCV
(µV/°C)
TEMPERATURE (°C)
OS
Figure 28. Output Saturation Voltage vs. Temperature
Figure 25. VOS Drift (TCVOS) Distribution
80
60
40
20
0
0
5
4
V
R
C
= 5V
= 2kΩ
= 10pF
DD
V
= 5V
= 25°C
DD
L
L
T
A
45
3
2
PHASE
GAIN
90
1
0
135
180
225
–1
–2
–3
–4
–5
Ф
= 70°
M
–20
1k
10k
100k
FREQUENCY (Hz)
1M
10M
–0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
INPUT COMMON-MODE VOLTAGE (V)
Figure 29. Open-Loop Gain and Phase vs. Frequency
Figure 26. Offset Voltage vs. Common-Mode Voltage
1000
100
10
3000
1000
V = 5V
DD
V
= 5V
DD
= 25°C
T
A
100
10
1
V
TO V
OH
DD
SOURCING
A
= +100
V
V
OL
SINKING
1
A
= +10
V
0.1
0.01
A
= +1
V
0.1
0.001
100
1k
10k
100k
1M
10M
0.01
0.1
LOAD CURRENT (mA)
1
10 20
FREQUENCY (Hz)
Figure 30. Closed-Loop Output Impedance vs. Frequency
Figure 27. Output Saturation Voltage vs. Load Current
Rev. A | Page 9 of 16
AD8665/AD8666/AD8668
120
1.5
1.0
V
= ±2.5V
= 10kΩ
= 10pF
= +1
V
T
= 5V
DD
DD
= 25°C
R
C
A
L
L
V
A
100
80
60
40
20
0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
1k
10k
100k
1M
4M
TIME (1µs/DIV)
FREQUENCY (Hz)
Figure 31. Common-Mode Rejection Ratio vs. Frequency
Figure 34. Large-Signal Transient Response
100
80
60
40
20
0
70
60
50
40
30
20
10
0
V
V
= 5V
= 100mV p-p
V
T
= 5V
= 25°C
DD
DD
IN
A
+OS
–OS
PSRR–
PSRR+
1k
10k
100k
1M
4M
1
10
100
1000
FREQUENCY (Hz)
LOAD CAPACITANCE (pF)
Figure 32. Power Supply Rejection Ratio vs. Frequency
Figure 35. Small-Signal Overshoot vs. Load Capacitance
V
A
= ±2.5V
= –100
V
= 5V
= 100kΩ
= 10pF
= +1
DD
DD
R
C
A
V
L
L
V
2.5V
V
OUT
0V
0V
V
IN
–100mV
TIME (0.4µs/DIV)
TIME (4µs/DIV)
Figure 36. Positive Overload Recovery Time
Figure 33. Small-Signal Transient Response
Rev. A | Page 10 of 16
AD8665/AD8666/AD8668
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
V
A
= ±2.5V
= –100
DD
V
100mV
V
IN
0V
0V
V
OUT
–2.5V
TIME (4µs/DIV)
0
2
4
6
8
10
12
14
16
SUPPLY VOLTAGE (V)
Figure 37. Negative Overload Recovery Time
Figure 39. Supply Current vs. Supply Voltage
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
10
8
V
= V /2
V
A
= ±8V
= +1
OUT
DD
DD
V
IN
V
V
OUT
6
4
V
= 16V
DD
2
V
= 5V
DD
0
–2
–4
–6
–8
–10
–40
–20
0
20
40
60
80
100
120
TIME (10µs/DIV)
TEMPERATURE (°C)
Figure 38. Supply Current vs. Temperature
Figure 40. No Output Phase Reversal
Rev. A | Page 11 of 16
AD8665/AD8666/AD8668
OUTLINE DIMENSIONS
5.10
5.00
4.90
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
14
8
7
4.50
4.40
4.30
6.40
BSC
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
×
45°
1.75 (0.0688)
1.35 (0.0532)
1
0.25 (0.0098)
0.10 (0.0040)
PIN 1
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.65
BSC
0.25 (0.0098)
0.17 (0.0067)
1.05
1.00
0.80
SEATING
PLANE
0.40 (0.0157)
0.20
0.09
1.20
MAX
0.75
0.60
0.45
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
8°
0°
0.15
0.05
0.30
0.19
SEATING
PLANE
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 41. 8-Lead Standard Small Outline Package [SOIC_N]
Figure 43. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Narrow Body
(R-8)
Dimensions shown in millimeters
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8.75 (0.3445)
8.55 (0.3366)
14
1
8
7
4.00 (0.1575)
3.80 (0.1496)
6.20 (0.2441)
5.80 (0.2283)
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
1.75 (0.0689)
1.35 (0.0531)
× 45°
0.25 (0.0098)
0.10 (0.0039)
PIN 1
0.65 BSC
8°
0°
0.51 (0.0201)
0.31 (0.0122)
0.95
0.85
0.75
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.00
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
0.38
0.22
0.23
0.08
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 42. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Figure 44. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters
Dimensions shown in millimeters and (inches)
Rev. A | Page 12 of 16
AD8665/AD8666/AD8668
2.90 BSC
5
1
4
3
2.80 BSC
1.60 BSC
2
PIN 1
0.95 BSC
1.90
BSC
1.30
1.15
0.90
1.45 MAX
0.22
0.08
10°
5°
0°
0.15 MAX
0.50
0.30
0.60
0.45
0.30
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 45. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
Package Description
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
Package Option
Branding
AD8665ARZ1
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
R-8
AD8665ARZ-REEL1
AD8665ARZ-REEL71
AD8665ARJZ-R21
AD8665ARJZ-REEL1
AD8665ARJZ-REEL71
AD8666ARZ1
AD8666ARZ-REEL1
AD8666ARZ-REEL71
AD8666ARMZ-R21
AD8666ARMZ-REEL1
AD8668ARZ1
R-8
R-8
RJ-5
RJ-5
RJ-5
R-8
A1B
A1B
A1B
R-8
R-8
RM-8
RM-8
R-14
R-14
R-14
RU-14
RU-14
A16
A16
8-Lead MSOP
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead TSSOP
14-Lead TSSOP
AD8668ARZ-REEL1
AD8668ARZ-REEL71
AD8668ARUZ1
AD8668ARUZ-REEL1
1 Z = Pb-free part.
Rev. A | Page 13 of 16
AD8665/AD8666/AD8668
NOTES
Rev. A | Page 14 of 16
AD8665/AD8666/AD8668
NOTES
Rev. A | Page 15 of 16
AD8665/AD8666/AD8668
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06195-0-10/06(A)
Rev. A | Page 16 of 16
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