AD8677AUJZ-REEL [ADI]

130 uV Maximum Offset Voltage Op Amp in TSOT; 130紫外最大失调电压运算放大器,采用TSOT
AD8677AUJZ-REEL
型号: AD8677AUJZ-REEL
厂家: ADI    ADI
描述:

130 uV Maximum Offset Voltage Op Amp in TSOT
130紫外最大失调电压运算放大器,采用TSOT

运算放大器 放大器电路 光电二极管
文件: 总16页 (文件大小:283K)
中文:  中文翻译
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130 μV Maximum Offset Voltage  
Op Amp in TSOT  
AD8677  
FEATURES  
PIN CONFIGURATIONS  
Low offset voltage: 130 μV max  
Input offset drift: 1.5 μV/°C max  
Low noise: 0.25 ꢀV p-p  
OUT  
V–  
1
2
3
5
V+  
AD8677  
TOP VIEW  
(Not to Scale)  
+IN  
4
–IN  
High gain, CMRR and PSRR: 115 dB min  
Low supply current: 1.1 mA  
Figure 1. 5-Lead TSOT (UJ-5)  
Wide supply voltage range: ±4 V to ±18 V operation  
NULL  
–IN  
1
2
3
4
8
7
6
5
NULL  
V+  
APPLICATIONS  
AD8677  
TOP VIEW  
Medical and industrial instrumentation  
Sensors and controls  
Thermocouple  
+IN  
V–  
OUT  
NC  
(Not to Scale)  
NC = NO CONNECT  
RTDs  
Strain bridges  
Figure 2. 8-Lead SOIC_N (R-8)  
Shunt current measurements  
Precision filters  
GENERAL DESCRIPTION  
The AD8677 is the next generation of precision, ultralow offset  
amplifiers. It builds on the high performance of the OP07 and  
integrates lower power (1.1 mA typical), lower input bias  
current (±1 nA maximum), and higher CMRR/PSRR (130 dB)  
in the small TSOT package. Operation is fully specified from ±±  
V to ±1± V supply.  
The AD8677 provides higher accuracy than industry-standard  
OP07-type amplifiers due to Analog Devices’ iPolar™ process,  
which supports enhanced performance in a smaller footprint.  
These performance enhancements include wider output swing,  
lower power, and higher CMRR (common-mode rejection  
ratio) and PSRR (power supply rejection ratio). The AD8677  
maintains stability of offsets and gain virtually regardless of  
variations in time or temperature. Excellent linearity and gain  
accuracy can be maintained at high closed-loop gains.  
The AD8677 is fully specified over the extended industrial tem-  
perature range of −40°C to +12±°C. The AD8677 amplifier is  
available in the tiny, ±-lead TSOT and the popular 8-lead,  
narrow SOIC lead-free packages.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
© 2005 Analog Devices, Inc. All rights reserved.  
AD8677  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Absolute Maximum Ratings ............................................................±  
Thermal Resistance.......................................................................±  
ESD Caution...................................................................................±  
Typical Performance Characteristics ..............................................6  
Outline Dimensions....................................................................... 13  
Ordering Guide .......................................................................... 13  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Pin Configurations ........................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
REVISION HISTORY  
11/05—Revision 0: Initial Version  
Rev. 0 | Page 2 of 16  
 
AD8677  
SPECIFICATIONS  
VS = ±±.0 V, TA = +2±°C, unless otherwise specified.  
Table 1.  
Parameter  
Symbol  
VOS  
IB  
Test Conditions/Comments  
Min  
Typ  
40  
Max  
Unit  
INPUT CHARACTERISTICS  
Offset Voltage  
130  
350  
1
μV  
μV  
nA  
−40°C TA +125°C  
Input Bias Current  
0.2  
1
nA  
nA  
nA  
V
−40°C TA +125°C  
−40°C TA +125°C  
VCM = 3 V  
Input Offset Current  
IOS  
0.1  
1
1
Input Voltage Range  
−3.5  
120  
+3.5  
Common-Mode Rejection Ratio  
CMRR  
AVO  
127  
10000  
0.5  
dB  
120  
dB  
−40°C TA +125°C  
RL = 2 kΩ to ground, VO = 3 V  
−40°C TA +125°C  
Open-Loop Gain  
1000  
1000  
V/mV  
V/mV  
μV/°C  
1.4  
ΔVOS/ΔT  
−40°C TA +125°C  
OUTPUT CHARACTERISTICS  
Output Voltage Swing  
VOUT  
V
RL = 10 kΩ to ground  
−40°C TA +125°C  
RL = 2 kΩ to ground  
−40°C TA +125°C  
±3.95  
±3.95  
±3.9  
±4.1  
±4  
V
V
V
±3.9  
Short-Circuit Limit  
Output Current  
ISC  
IO  
27  
15  
mA  
mA  
VO = 3.5 V  
POWER SUPPLY  
Power Supply Rejection Ratio  
PSRR  
ISY  
115  
110  
130  
1.1  
dB  
VS = ±4.0 V to ±18.0 V  
−40°C TA +125°C  
VO = 0 V  
dB  
Supply Current/Amplifier  
1.25  
1.7  
mA  
mA  
−40°C TA +125°C  
DYNAMIC PERFORMANCE  
Slew Rate  
SR  
0.2  
0.6  
80  
V/μs  
RL = 10 kΩ  
Gain Bandwidth Product  
Phase Margin  
GBP  
MHz  
Degrees  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
Current Noise Density  
en p-p  
en  
0.1 Hz to 10 Hz  
f = 1 kHz  
0.28  
10  
μV p-p  
nV/Hz  
pA/Hz  
in  
f = 1 kHz  
0.074  
Rev. 0 | Page 3 of 16  
AD8677  
VS = ±V, TA = +2±°C, unless otherwise specified.  
Table 2.  
Parameter  
Symbol  
VOS  
IB  
Test Conditions/Comments  
Min  
Typ  
45  
Max  
Unit  
INPUT CHARACTERISTICS  
Offset Voltage  
130  
350  
1
μV  
μV  
nA  
−40°C TA +125°C  
Input Bias Current  
0.2  
1
nA  
−40°C TA +125°C  
−40°C TA +125°C  
Input Offset Current  
IOS  
0.2  
1
1
nA  
nA  
Input Voltage Range  
Common-Mode Rejection Ratio  
−13.5  
120  
120  
+13.5  
V
dB  
dB  
CMRR  
AVO  
VCM = 13.0 V  
140  
10000  
0.5  
−40°C TA +125°C  
RL = 2 kΩ to ground, VO = 11 V  
−40°C TA +125°C  
−40°C TA +125°C  
Open Loop Gain  
1000  
1000  
V/mV  
V/mV  
μV/°C  
Offset Voltage Drift  
1.5  
ΔVOS/ΔT  
OUTPUT CHARACTERISTICS  
Output Voltage Swing  
VOUT  
14  
V
RL = 10 kΩ to ground  
−40°C TA +125°C  
RL = 2 kΩ to ground  
−40°C TA +125°C  
±13.95  
±13.9  
V
13.8  
V
±13.75  
±13.7  
V
Short Circuit Limit  
Output Current  
ISC  
IO  
30  
15  
mA  
mA  
VO = 13.5 V  
POWER SUPPLY  
Power Supply Rejection Ratio  
PSRR  
ISY  
115  
110  
130  
1.1  
dB  
VS = ±4.0 V to ±18.0 V  
−40°C TA +125°C  
VO = 0 V  
dB  
Supply Current/Amplifier  
1.3  
1.8  
mA  
mA  
−40°C TA +125°C  
DYNAMIC PERFORMANCE  
Slew Rate  
SR  
0.2  
0.6  
80  
V/μs  
RL = 10 kΩ  
Gain Bandwidth Product  
Phase Margin  
GBP  
MHz  
Degrees  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
Current Noise Density  
en p-p  
en  
0.1 Hz to 10 Hz  
f = 1 kHz  
0.25  
10  
μV p-p  
nV/Hz  
pA/Hz  
in  
f = 1 kHz  
0.074  
Rev. 0 | Page 4 of 16  
AD8677  
ABSOLUTE MAXIMUM RATINGS  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Table 3.  
Parameter  
Supply Voltage  
Input Voltage  
Differential Input Voltage  
Output Short-Circuit Duration to GND  
Storage Temperature Range  
UJ-5, R Package  
Operating Temperature Range  
Junction Temperature Range  
RM, R Package  
Value  
18 V  
V Supply  
0.7 V  
Indefinite  
−65°C to +150°C  
−40°C to +125°C  
THERMAL RESISTANCE  
θJA is specified for the worst-case conditions, that is, a device  
soldered in a circuit board for surface-mount packages.  
−65°C to +150°C  
+300°C  
Table 4.  
Lead Temperature (Soldering, 10 sec)  
Package Type  
θJA  
θJC  
61  
43  
Unit  
°C/W  
°C/W  
5-Lead TSOT (UJ-5)  
8-Lead SOIC (R-8)  
207  
158  
ESD CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on  
the human body and test equipment and can discharge without detection. Although this product features  
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy  
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance  
degradation or loss of functionality.  
Rev. 0 | Page 5 of 16  
AD8677  
TYPICAL PERFORMANCE CHARACTERISTICS  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
V
= ±15V  
V
= ±15V  
S
S
45  
40  
35  
30  
25  
20  
15  
10  
5
0
0
–100 –80 –60 –40 –20  
0
20  
(µV)  
40  
60  
80 100  
0
0.15 0.30 0.45 0.60 0.75 0.90 1.05 1.20  
V
TCV (µV/°C)  
OS  
OS  
Figure 3. Input Offset Voltage Distribution  
Figure 6. TCVOS vs. Number of Amplifiers  
40  
35  
30  
25  
20  
15  
10  
5
200  
150  
100  
50  
V
= ±5V  
V
= ±15V  
S
S
0
–50  
–100  
–150  
–200  
0
–100 –80 –60 –40 –20  
0
20  
40  
60  
80 100  
–50  
0
50  
100  
150  
V
(µV)  
TEMPERATURE (°C)  
OS  
Figure 4. Input Offset Voltage Distribution  
Figure 7. Offset Voltage vs. Temperature  
50  
40  
30  
20  
10  
0
200  
150  
100  
50  
V
= ±5V  
V
= ±5V  
S
S
0
–50  
–100  
–150  
–200  
0
0.15  
0.30  
0.45  
0.60  
OS  
0.75  
0.90  
1.05  
–50  
0
50  
100  
150  
TCV (µV/°C)  
TEMPERATURE (°C)  
Figure 8. Offset Voltage vs. Temperature  
Figure 5. TCVOS vs. Number of Amplifiers  
Rev. 0 | Page 6 of 16  
AD8677  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
–13.92  
–13.94  
–13.96  
–13.98  
–14.00  
–14.02  
–14.04  
–14.06  
–14.08  
–14.10  
V
R
= ±15V  
= 10k  
S
L
V
= ±15V  
S
V
= ±5V  
S
–50  
0
50  
TEMPERATURE (°C)  
100  
150  
150  
150  
–50  
0
50  
100  
100  
100  
150  
TEMPERATURE (°C)  
Figure 9. Supply Current vs. Temperature  
Figure 12. −VOUT vs. Temperature  
14.40  
14.35  
14.30  
14.25  
14.20  
14.15  
14.10  
–3.98  
–4.00  
–4.02  
–4.04  
–4.06  
–4.08  
–4.10  
–4.12  
–4.14  
–4.16  
V
= ±5V  
= 10kΩ  
S
R
V
R
= ±15V  
= 10k  
S
L
L
–50  
0
50  
100  
–50  
0
50  
150  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 10. +VOUT vs. Temperature  
Figure 13. −VOUT vs. Temperature  
4.45  
4.40  
4.35  
4.30  
4.25  
4.20  
4.15  
0
–0.1  
–0.2  
–0.3  
–0.4  
–0.5  
V
R
= ±5V  
= 10kΩ  
S
V
= ±15V  
S
L
–50  
0
50  
100  
–50  
0
50  
150  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 11. +VOUT vs. Temperature  
Figure 14. Input Bias Current vs. Temperature  
Rev. 0 | Page 7 of 16  
AD8677  
0
–0.05  
–0.10  
–0.15  
–0.20  
–0.25  
–0.30  
–0.35  
150  
140  
130  
120  
V
= ±5V  
S
V
= ±4V TO ±18V  
S
–0.40  
–50  
0
50  
100  
150  
150  
150  
–50  
0
50  
100  
150  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 15. Input Bias Current vs. Temperature  
Figure 18. PSRR vs. Temperature  
40  
30  
20  
10  
146  
144  
142  
140  
138  
134  
134  
132  
130  
128  
126  
V
= ±15V  
S
V
= ±15V  
S
V
= ±5V  
S
V
= ±5V  
50  
S
124  
–50  
–50  
0
50  
TEMPERATURE (°C)  
100  
150  
0
100  
TEMPERATURE (°C)  
Figure 19. Short Circuit Current vs. Temperature  
Figure 16. CMRR vs. Temperature  
16000  
14000  
12000  
10000  
8000  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
R
= 2kΩ  
L
V
= ±15V  
S
V
= ±5V  
S
6000  
4000  
2000  
–50  
0
50  
TEMPERATURE (°C)  
100  
0
10  
20  
30  
40  
SUPPLY VOLTAGE (V)  
Figure 17. Open-Loop Gain vs. Temperature  
Figure 20. Supply Current vs. Total Supply Voltages  
Rev. 0 | Page 8 of 16  
AD8677  
50  
40  
30  
20  
10  
0
10  
V
V
R
= ±15V  
S
V
= ±15V  
S
= 28mV  
IN  
=
L
L
V
= +V  
OUT  
OH  
C
= 20pF  
G = +100  
G = +10  
V
= –V  
OUT  
OL  
1
G = +1  
–10  
100  
0.1  
10  
1k  
10k  
100k  
1M  
1M  
12  
0.01  
0.1  
1
10  
100  
FREQUENCY (Hz)  
I
(mA)  
LOAD  
Figure 21. Output Voltage Swing vs. Load Current  
Figure 24. Closed-Loop Gain vs. Frequency  
50  
40  
30  
20  
10  
0
V
V
R
C
= ±5V  
V
= ±5V  
S
S
= 28mV  
IN  
G = +100  
=
L
L
= 20pF  
V
= –V  
OUT  
OL  
G = +10  
1
V
= +V  
OUT  
OH  
G = +1  
0.1  
0.01  
–10  
100  
0.1  
1
10  
100  
1k  
10k  
100k  
I
(mA)  
FREQUENCY (Hz)  
LOAD  
Figure 22. Output Voltage Swing vs. Load Current  
Figure 25. Closed-Loop Gain vs. Frequency  
100  
100  
80  
60  
40  
20  
0
30  
25  
20  
15  
10  
5
V
V
= ±15V  
S
= ±50mV  
IN  
80  
60  
G = +1  
PHASE  
–OS  
+OS  
40  
20  
GAIN  
0
V
= ±15V  
=  
= 20pF  
S
–20  
R
C
L
L
Φ
= 80 Degrees  
m
–40  
100  
0
1k  
10k  
100k  
1M  
10M  
0
2
4
6
8
10  
FREQUENCY (Hz)  
C
(nF)  
LOAD  
Figure 26. Overshoot vs. Capacitive Load  
Figure 23. Open-Loop Gain and Phase vs. Frequency  
Rev. 0 | Page 9 of 16  
AD8677  
30  
100  
10  
V
V
= ±5V  
V
V
R
= ±15V  
S
S
= ±50mV  
= 28mV  
IN  
IN  
–OS  
G = +1  
=
L
L
25  
20  
15  
10  
5
C
= 20pF  
G = +100  
+OS  
G = +10  
1
G = +1  
0.1  
0
0.01  
0
2
4
6
8
10  
12  
10  
100  
1k  
10k  
100k  
1M  
C
(nF)  
FREQUENCY (Hz)  
LOAD  
Figure 30. Output Impedance vs. Frequency  
Figure 27. Overshoot vs. Capacitive Load  
100  
10  
112  
110  
108  
106  
104  
102  
100  
98  
V
V
R
= ±5V  
S
V
= ±15V  
S
= 28mV  
IN  
=
L
L
C
= 20pF  
G = +100  
G = +10  
1
G = +1  
0.1  
0.01  
96  
100  
10  
100  
1k  
10k  
100k  
1M  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 28. CMRR vs. Frequency  
Figure 31. Output Impedance vs. Frequency  
100  
100  
10  
1
V
= ±15V  
S
–PSRR  
80  
60  
40  
20  
0
+PSRR  
10  
100  
1k  
10k  
100k  
1M  
0.1  
1
10  
100  
1k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 29. PSRR vs. Frequency  
Figure 32. Voltage Noise Density vs. Frequency  
Rev. 0 | Page 10 of 16  
AD8677  
10  
V
= ±15V  
S
V
C
= ±5V  
= 1nF  
S
L
G = +1  
V
= 4V p-p  
IN  
1
2
0.1  
0.01  
0.1  
1
10  
100  
1k  
FREQUENCY (Hz)  
TIME (100µs/DIV)  
Figure 33. Current Noise Density vs. Frequency  
Figure 36. Large Signal Transient  
400mV  
200mV  
0V  
V
C
= ±5V AND ±15V  
= 1nF  
S
V
V
= ±15V  
S
L
= 200mV  
IN  
G = +1  
V
G = –100  
RECOVERY = 1µs  
= 100mV p-p  
IN  
V
IN  
–200mV  
0V  
2
–5V  
V
OUT  
–10V  
–15V  
–20V  
TIME (100µs/DIV)  
TIME (10µs/DIV)  
Figure 34. Small Signal Transient  
Figure 37. Positive Overload Recovery  
400mV  
V
C
= ±15V  
= 1nF  
S
V
V
= ±15V  
S
L
= 200mV  
G = +1  
= 4V p-p  
IN  
200mV  
0V  
G = –100  
RECOVERY = 5µs  
V
IN  
V
IN  
–200mV  
15V  
10V  
5V  
2
V
OUT  
0V  
–5V  
TIME (100µs/DIV)  
TIME (10µs/DIV)  
Figure 35. Large Signal Transient  
Figure 38. Negative Overload Recovery  
Rev. 0 | Page 11 of 16  
AD8677  
1200mV  
600mV  
0V  
V
= ±15V  
V
V
= ±5V  
S
S
VN p-p = 0.24µV  
= 600mV  
IN  
G = –10  
RECOVERY = 2.4µs  
V
V
IN  
–600mV  
1
0V  
–2V  
–4V  
–6V  
–8V  
OUT  
TIME (1s/DIV)  
TIME (4µs/DIV)  
Figure 39. Positive Overload Recovery  
Figure 42. Voltage Noise (0.1 Hz to 10 Hz)  
20k  
1200mV  
V+  
V
V
= ±5V  
S
1
= 600mV  
IN  
600mV  
0V  
8
G = –10  
RECOVERY = 5.6µs  
2
3
7
V
V
IN  
5
OUTPUT  
INPUT  
+
AD8677  
+
V
TRIM RANGE IS  
TYPICALLY ±3.5mV  
4
OS  
–600mV  
4V  
V–  
OUT  
2V  
0V  
Figure 43. Optional Offset Nulling Circuit  
–2V  
–4V  
TIME (4µs/DIV)  
Figure 40. Negative Overload Recovery  
V
S
= ±5V  
= ±5.7V  
V
IN  
V
IN  
V
OUT  
2
TIME (400µs/DIV)  
Figure 41. No Phase Reversal  
Rev. 0 | Page 12 of 16  
AD8677  
OUTLINE DIMENSIONS  
2.90 BSC  
5.00 (0.1968)  
4.80 (0.1890)  
5
1
4
3
2.80 BSC  
1.60 BSC  
8
1
5
4
2
6.20 (0.2440)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
PIN 1  
0.95 BSC  
1.90  
BSC  
*
0.90  
0.87  
0.84  
1.27 (0.0500)  
BSC  
0.50 (0.0196)  
0.25 (0.0099)  
× 45°  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
*
1.00 MAX  
0.20  
0.08  
8°  
0.51 (0.0201)  
0.31 (0.0122)  
0° 1.27 (0.0500)  
COPLANARITY  
0.10  
0.25 (0.0098)  
0.17 (0.0067)  
8°  
4°  
0°  
SEATING  
PLANE  
0.40 (0.0157)  
0.10 MAX  
0.60  
0.45  
0.30  
0.50  
0.30  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN  
*
COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH  
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.  
Figure 45. 8-Lead Standard Small Outline Package [SOIC_N]  
Figure 44. 5-Lead Thin Small Outline Transistor Package [TSOT]  
Narrow Body  
(R-8)  
Dimensions shown in millimeters and (inches)  
(UJ-5)  
Dimensions shown in millimeters  
ORDERING GUIDE  
Model  
Temperature Range  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
Package Description  
Package Option  
Branding  
AD8677ARZ1  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Standard Small Outline Package [SOIC_N]  
5-Lead Thin Small Outline Transistor Package [TSOT]  
5-Lead Thin Small Outline Transistor Package [TSOT]  
5-Lead Thin Small Outline Transistor Package [TSOT]  
R-8  
R-8  
R-8  
UJ-5  
UJ-5  
UJ-5  
AD8677ARZ-REEL1  
AD8677ARZ-REEL71  
AD8677AUJZ-R21  
AD8677AUJZ-REEL1  
AD8677AUJZ-REEL71  
A0E  
A0E  
A0E  
1 Z = Pb-free part.  
Rev. 0 | Page 13 of 16  
 
AD8677  
NOTES  
Rev. 0 | Page 14 of 16  
AD8677  
NOTES  
Rev. 0 | Page 15 of 16  
AD8677  
NOTES  
©
2005 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D05578-0-11/05(0)  
Rev. 0 | Page 16 of 16  
 

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